Noise analysis method and device, equipment and storage medium

Abstract

The embodiment of the invention discloses a noise analysis method and device, equipment and a storage medium. The noise analysis method comprises the following steps: applying an input voltage to a three-dimensional phase change memory device to enable the three-dimensional phase change memory device to generate relaxation resonance; measuring the three-dimensional phase change memory device to obtain an induced voltage; and analyzing the noise of the three-dimensional phase change memory device based on the input voltage and the induced voltage.

Description

Technical Field

[0001] This application relates to the semiconductor field, and more particularly to a noise analysis method, apparatus, device, and storage medium. Background Technology

[0002] Three-dimensional phase change memory (PCM) utilizes the conductivity of phase change materials after state transitions to record data "1" or "0". This allows for breakthroughs in both storage capacity and write / erase speed, meeting the performance demands of the explosive growth in information volume. A three-dimensional PCM includes memory cells and selectors. The memory cells are made of phase change materials, while the selectors can employ bidirectional threshold switches (OTS).

[0003] For three-dimensional phase-change memories (3D phase-change memories) employing OTS (Optical Time Switching), changes in structure, chemical composition, and electrical properties near the conductive channels alter the device's threshold voltage, leading to read noise, or random telegraph noise (RTN). The presence of RTN poses a risk of device failure in terms of reliability, such as endurance, retention, and read disturbance, thus hindering the large-scale commercialization of 3D phase-change memories. Furthermore, the difficulty in accurately measuring the RTN characteristics of 3D phase-change memories hinders their further research and development. Summary of the Invention

[0004] In view of this, embodiments of this application provide a noise analysis method, apparatus, device, and storage medium that can accurately analyze the noise of a three-dimensional phase change memory.

[0005] The technical solution of this application embodiment is implemented as follows:

[0006] This application provides a noise analysis method, comprising: applying an input voltage to a three-dimensional phase-change memory device to induce relaxation resonance in the three-dimensional phase-change memory device; measuring the three-dimensional phase-change memory device to obtain an induced voltage; and analyzing the noise of the three-dimensional phase-change memory device based on the input voltage and the induced voltage.

[0007] In the above scheme, applying an input voltage to the three-dimensional phase change memory device to cause it to relax and resonate includes: applying the input voltage to one end of the three-dimensional phase change memory device; and limiting the current of the test circuit to be lower than a preset current upper limit.

[0008] In the above scheme, the input voltage is between the low-resistance turn-on voltage and the high-resistance turn-on voltage of the three-dimensional phase-change memory device; the input voltage is greater than the threshold voltage of the three-dimensional phase-change memory device; and the preset upper limit of the current is the holding current of the three-dimensional phase-change memory device.

[0009] In the above scheme, measuring the three-dimensional phase change memory device to obtain the induced voltage includes: measuring the induced voltage at the other end of the three-dimensional phase change memory device.

[0010] In the above scheme, the noise of the three-dimensional phase-change memory device is analyzed based on the input voltage and the induced voltage, including: recording the change curve of the input voltage and the change curve of the induced voltage; obtaining the change curve of the threshold voltage of the three-dimensional phase-change memory device based on the change curve of the input voltage and the change curve of the induced voltage; and analyzing the noise of the three-dimensional phase-change memory device based on the change curve of the threshold voltage.

[0011] In the above scheme, the threshold voltage variation curve of the three-dimensional phase change memory device is obtained based on the variation curve of the input voltage and the variation curve of the induced voltage, including: subtracting the variation curve of the induced voltage from the variation curve of the input voltage to obtain the voltage difference variation curve; and recording each peak of the voltage difference variation curve to obtain the threshold voltage variation curve.

[0012] In the above scheme, the noise of the three-dimensional phase change memory device is analyzed based on the change curve of the threshold voltage, including: analyzing the fluctuation range of the change curve of the threshold voltage; wherein, the larger the fluctuation range of the change curve of the threshold voltage, the greater the noise of the three-dimensional phase change memory device.

[0013] This application also provides a noise analysis device, comprising: an input unit configured to apply an input voltage to a three-dimensional phase-change memory device to cause the three-dimensional phase-change memory device to relax and resonate; a measurement unit configured to measure the three-dimensional phase-change memory device to obtain an induced voltage; and an analysis unit configured to analyze the noise of the three-dimensional phase-change memory device based on the input voltage and the induced voltage.

[0014] This application also provides a computer device, including a memory and a processor. The memory stores a computer program that can run on the processor, and the processor executes the program to implement the steps in the above-described method.

[0015] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the steps in the above-described method.

[0016] Understandably, the technical solution provided in this application utilizes the relaxation resonance phenomenon of the OTS to achieve repeated switching of the device in the negative resistance region, thereby enabling rapid measurement of the device's threshold voltage and subsequent noise analysis. On the other hand, since the technical solution provided in this application does not repeatedly switch the device on and off, the influence of read interference can be avoided, improving measurement accuracy. Furthermore, because the device in the technical solution provided in this application always operates within a low current range, damage to the device caused by testing can be reduced. Attached Figure Description

[0017] Figure 1 A schematic diagram of the implementation process of the noise analysis method provided in the embodiments of this application. Figure 1 ;

[0018] Figure 2 This is a schematic diagram of the structure of the three-dimensional phase-change memory in the embodiments of this application;

[0019] Figure 3 This is a schematic diagram of the voltage curve in the embodiments of this application. Figure 1 ;

[0020] Figure 4 A schematic diagram of the implementation process of the noise analysis method provided in the embodiments of this application. Figure 2 ;

[0021] Figure 5 This is a schematic diagram of the voltage curve in the embodiments of this application. Figure 2 ;

[0022] Figure 6 This is a schematic diagram of the voltage curve in the embodiments of this application. Figure 3 ;

[0023] Figure 7A This is a schematic diagram of the voltage curve in the embodiments of this application. Figure 4 ;

[0024] Figure 7B This is a schematic diagram of the voltage curve in the embodiments of this application. Figure 5 ;

[0025] Figure 8 This is a schematic diagram of the composition of the noise analysis device provided in the embodiments of this application;

[0026] Figure 9 A schematic diagram of the hardware entity of the computer device provided in the embodiments of this application. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application are further described in detail below with reference to the accompanying drawings and embodiments. The described embodiments should not be regarded as limitations on this application. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0028] In the following description, references to "some embodiments" refer to a subset of all possible embodiments. It is understood that "some embodiments" may be the same or different subsets of all possible embodiments and may be combined with each other without conflict. The terms "first / second / third" are used merely to distinguish similar objects and do not represent a specific ordering of objects. It is understood that "first / second / third" may be interchanged in a specific order or sequence where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.

[0029] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains. The terminology used herein is for descriptive purposes only and is not intended to limit the scope of this application.

[0030] Figure 1 This is a schematic diagram illustrating the implementation flow of a noise analysis method provided in an embodiment of this application, as shown below. Figure 1 As shown, the method includes steps S101 to S103.

[0031] S101. Apply an input voltage to the three-dimensional phase change memory device to induce relaxation resonance in the three-dimensional phase change memory device.

[0032] It should be noted that, Figure 2 The structure of a three-dimensional phase-change memory device is shown. (Reference) Figure 2 The three-dimensional phase-change memory device 10 includes: a gating unit 101 employing an OTS (Optical Time Switch) and a memory cell 102 made of a phase-change material. A first terminal of the three-dimensional phase-change memory device 10 is connected to a word line 20, and a second terminal of the three-dimensional phase-change memory device 10 is connected to a bit line 30.

[0033] The material forming the gate unit 101 can be Zn. x Te y 、Ge x Te y 、Nb x O y Si x As y Te zThe material forming the memory cell 102 may be any one of the following: a chalcogenide, including a compound formed from at least one element selected from germanium (Ge), antimony (Sb), tellurium (Te), indium (In), or gallium (Ga). The material forming the memory cell 102 may also be any one of binary compounds such as GaSb, InSb, InSe, SbTe, and GeTe. The material forming the memory cell 102 may also be any one of ternary compounds such as GeSbTe, GaSeTe, InSbTe, SnSbTe, and InSbGe. The material forming the memory cell 102 may also be any one of quaternary compounds such as AgInSbTe, GeSnSbTe, GeSbSeTe, and TeGeSbS.

[0034] In some embodiments of this application, reference is made to Figure 2 An input voltage can be applied to one end of the three-dimensional phase-change memory device 10. For example, an input voltage can be applied to word line 20, that is, an input voltage can be applied to the first end of the three-dimensional phase-change memory device 10. Alternatively, an input voltage can be applied to bit line 30, that is, an input voltage can be applied to the second end of the three-dimensional phase-change memory device 10. Furthermore, while applying the input voltage, the current in the test circuit needs to be limited to a preset current upper limit so that the OTS (i.e., gating unit 101) of the three-dimensional phase-change memory device can relax and resonate.

[0035] In this embodiment, the turn-on voltage of the three-dimensional phase-change memory device 10 in a low-resistance state (set state) and the turn-on voltage of the three-dimensional phase-change memory device 10 in a high-resistance state (reset state) can be measured and recorded; then, an input voltage is determined between the low-resistance turn-on voltage and the high-resistance turn-on voltage of the three-dimensional phase-change memory device 10. The input voltage is greater than the threshold voltage of the three-dimensional phase-change memory device 10.

[0036] In this embodiment, the preset current upper limit can be the holding current of the three-dimensional phase change memory device 10. That is, while applying the input voltage, it is necessary to limit the current of the test circuit to be lower than the holding current of the three-dimensional phase change memory device 10.

[0037] In some embodiments of this application, reference is made to Figure 2 A current mirror circuit can be connected to bit line 30 so that the current in the test circuit is proportional to the current in the current mirror, that is, the current in the test circuit can mirror the current in the current mirror. Furthermore, by controlling the current in the current mirror, the current in the test circuit can be made to be lower than a preset current upper limit.

[0038] Figure 3This shows the corresponding values ​​of the input voltage Vin and the voltage difference Vcell across the device in the set and reset states of the phase change material in the device. Figure 3 As shown, when an input voltage Vin is applied to a three-dimensional phase change memory device, the device is in an unstable negative resistance region when the voltage difference Vcell across the device is greater than the device's threshold voltage and the current in the test circuit is lower than the device's holding current Ihold. The device will repeatedly turn on and off, thus resonating repeatedly within the range of the threshold voltage and the holding voltage, that is, the device will experience relaxation resonance.

[0039] S102. Measure the three-dimensional phase change storage device to obtain the induced voltage.

[0040] In this embodiment of the application, reference continues to be made to... Figure 2 When an input voltage is applied to one end of the three-dimensional phase-change memory device 10, an induced voltage can be measured at the other end of the device. For example, if an input voltage is applied to the word line 20, that is, to the first end of the three-dimensional phase-change memory device 10, then an induced voltage is measured on the bit line 30, that is, at the second end of the device. Similarly, if an input voltage is applied to the bit line 30, that is, to the second end of the device, then an induced voltage is measured on the word line 20, that is, at the first end of the device.

[0041] S103. Based on the input voltage and induced voltage, analyze the noise of the three-dimensional phase change memory device.

[0042] In this embodiment of the application, after applying an input voltage and measuring the induced voltage, the noise of the three-dimensional phase change memory device can be analyzed based on the input voltage and the induced voltage.

[0043] In some embodiments of this application, it can be achieved through Figure 4 The steps S201 to S203 shown are implemented to achieve this. Figure 1 Step S103 is shown. The explanation will be based on each step.

[0044] S201. Record the curves of the input voltage change and the curves of the induced voltage change.

[0045] In this embodiment of the application, during the process of applying an input voltage and measuring the induced voltage, the curves of the input voltage change over time and the curves of the induced voltage change over time can be recorded.

[0046] like Figure 5As shown, the curves of the input voltage Vin and the induced voltage Vsen of the phase change material in the device in the set and reset states were recorded. In the set state, the curves of the input voltage Vin and the induced voltage Vsen share a common time axis; correspondingly, in the reset state, the curves of the input voltage Vin and the induced voltage Vsen share a common time axis.

[0047] S202. Based on the input voltage change curve and the induced voltage change curve, the threshold voltage change curve of the three-dimensional phase change memory device is obtained.

[0048] In some embodiments of this application, the voltage difference curve can be obtained by subtracting the induced voltage curve from the input voltage curve. For example, the voltage difference curve can be obtained by... Figure 5 Subtracting the curve of the change in induced voltage Vsen in the reset state from the curve of the change in input voltage Vin in the reset state yields the following result: Figure 6 The curve showing the change in the voltage difference Vcell across the device in the reset state. Correspondingly, Figure 5 Subtracting the curve of the induced voltage Vsen in the set state from the curve of the input voltage Vin in the set state yields the following result. Figure 6 The curve showing the change of the voltage difference Vcell across the device in the set state.

[0049] Further reference Figure 6 After obtaining the voltage difference Vcell variation curve, each peak value in the voltage difference Vcell variation curve can be recorded. The peak value of the voltage difference Vcell is the threshold voltage of the device. In this way, the threshold voltage variation curve over time (i.e., the RTN curve) is obtained.

[0050] S203. Based on the threshold voltage variation curve, analyze the noise of three-dimensional phase change memory devices.

[0051] In this embodiment of the application, statistical analysis can be performed on the change curve of the threshold voltage. Figure 7A and Figure 7B These are the normal quantiles of the peak value (i.e., threshold voltage) of the voltage difference Vcell in the reset and set states, respectively. Figure 7A and Figure 7B It can summarize and statistically analyze the mean, standard deviation, standard error of the mean, upper limit of the mean, and lower limit of the mean of Vcell, thereby enabling statistical analysis of the noise of three-dimensional phase change storage devices.

[0052] In some embodiments of this application, the fluctuation range of the threshold voltage variation curve can be analyzed. The larger the fluctuation range of the threshold voltage variation curve, the greater the noise of the three-dimensional phase-change memory device. Therefore, the noise characteristics of the device can be obtained through fluctuation range analysis.

[0053] Understandably, the technical solution provided in this application utilizes the relaxation resonance phenomenon of the OTS to achieve repeated switching of the device in the negative resistance region, thereby enabling rapid measurement of the device's threshold voltage and subsequent noise analysis. On the other hand, since the technical solution provided in this application does not repeatedly switch the device on and off, the influence of read interference can be avoided, improving measurement accuracy. Furthermore, because the device in the technical solution provided in this application always operates within a low current range, damage to the device caused by testing can be reduced.

[0054] Figure 8 This is a schematic diagram of the structure of a noise analysis device provided in an embodiment of this application, as shown below. Figure 8 As shown, the noise analysis device 800 includes an input unit 810, a measurement unit 820, and an analysis unit 830. The input unit 810 is configured to apply an input voltage to the three-dimensional phase-change memory device, causing the device to relax and resonate. The measurement unit 820 is configured to measure the three-dimensional phase-change memory device to obtain an induced voltage. The analysis unit 830 is configured to analyze the noise of the three-dimensional phase-change memory device based on the input voltage and the induced voltage.

[0055] In some embodiments of this application, the input unit 810 is also configured to apply an input voltage to one end of the three-dimensional phase change memory device; and to limit the current of the test circuit to be lower than a preset current upper limit.

[0056] In some embodiments of this application, the input voltage is between the low-resistance turn-on voltage and the high-resistance turn-on voltage of the three-dimensional phase-change memory device; the input voltage is greater than the threshold voltage of the three-dimensional phase-change memory device. A preset upper limit for the current is the holding current of the three-dimensional phase-change memory device.

[0057] In some embodiments of this application, the measurement unit 820 is also configured to measure the induced voltage at the other end of the three-dimensional phase change memory device.

[0058] In some embodiments of this application, the analysis unit 830 is further configured to record the change curve of the input voltage and the change curve of the induced voltage; obtain the change curve of the threshold voltage of the three-dimensional phase change memory device based on the change curve of the input voltage and the change curve of the induced voltage; and analyze the noise of the three-dimensional phase change memory device based on the change curve of the threshold voltage.

[0059] In some embodiments of this application, the analysis unit 830 is further configured to subtract the change curve of the induced voltage from the change curve of the input voltage to obtain the change curve of the voltage difference; and to record each peak of the change curve of the voltage difference to obtain the change curve of the threshold voltage.

[0060] In some embodiments of this application, the analysis unit 830 is further configured to analyze the fluctuation range of the threshold voltage change curve; wherein, the larger the fluctuation range of the threshold voltage change curve, the greater the noise of the three-dimensional phase change memory device.

[0061] The descriptions of the apparatus embodiments above are similar to those of the method embodiments above, and have similar beneficial effects. In some embodiments, the functions or modules included in the apparatus provided in this application can be used to perform the methods described in the method embodiments above. For technical details not disclosed in the apparatus embodiments of this application, please refer to the descriptions of the method embodiments of this application for understanding.

[0062] It should be noted that, in the embodiments of this application, if the above-described noise analysis method is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiments of this application, or the part that contributes to the related technology, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, mobile hard drives, read-only memory (ROM), magnetic disks, or optical disks. Thus, the embodiments of this application are not limited to any specific hardware, software, or firmware, or any combination of hardware, software, and firmware.

[0063] Figure 9 This application provides a hardware entity diagram of a computer device as an embodiment of the present application, such as... Figure 9 As shown, the hardware entity of the computer device 1100 includes a processor 1101 and a memory 1102, wherein the memory 1102 stores a computer program that can run on the processor 1101, and the processor 1101 executes the program to implement the steps in the method of any of the above embodiments.

[0064] The memory 1102 stores computer programs that can run on the processor. The memory 1102 is configured to store instructions and applications that can be executed by the processor 1101. It can also cache data to be processed or already processed (e.g., image data, audio data, voice communication data, and video communication data) in the processor 1101 and various modules in the computer device 1100. It can be implemented by flash memory or random access memory (RAM).

[0065] When processor 1101 executes a program, it implements the steps of any of the noise analysis methods described above. Processor 1101 typically controls the overall operation of computer device 1100.

[0066] This application also provides a computer storage medium storing one or more programs that can be executed by one or more processors to implement the steps of the noise analysis method as described in any of the above embodiments.

[0067] It should be noted that the descriptions of the storage medium and device embodiments above are similar to the descriptions of the method embodiments above, and have similar beneficial effects. For technical details not disclosed in the storage medium and device embodiments of this application, please refer to the descriptions of the method embodiments of this application for understanding.

[0068] The aforementioned processor can be at least one of the following: Application Specific Integrated Circuit (ASIC), Digital Signal Processor (DSP), Digital Signal Processing Device (DSPD), Programmable Logic Device (PLD), Field Programmable Gate Array (FPGA), Central Processing Unit (CPU), Controller, Microcontroller, and Microprocessor. It is understood that other electronic devices can also implement the functions of the aforementioned processor, and this application does not specifically limit the specific implementation.

[0069] The aforementioned computer storage media / memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), magnetic random access memory (FRAM), flash memory, magnetic surface memory, optical disc, or compact disc read-only memory (CD-ROM), etc.; or it can be various terminals that include one or any combination of the above-mentioned memories, such as mobile phones, computers, tablet devices, personal digital assistants, etc.

[0070] It should be understood that the phrase "one embodiment" or "an embodiment" throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in the various embodiments of this application, the sequence numbers of the above steps / processes do not imply a sequential order of execution; the execution order of each step / process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. The sequence numbers of the above embodiments of this application are merely descriptive and do not represent the superiority or inferiority of the embodiments.

[0071] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0072] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed can be through some interfaces, and the indirect coupling or communication connection between devices or units can be electrical, mechanical, or other forms.

[0073] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units. They may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs.

[0074] Furthermore, in the various embodiments of this application, all functional units can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or in a combination of hardware and software functional units. Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, read-only memory (ROM), magnetic disks, or optical disks.

[0075] Alternatively, if the integrated units described above are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence or the part that contributes to related technologies, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROM, magnetic disks, or optical disks.

[0076] The above description is merely an embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application.

Claims

1. A noise analysis method, characterized in that, include: An input voltage is applied to the three-dimensional phase change memory device to induce relaxation resonance. The induced voltage was obtained by measuring the three-dimensional phase-change memory device. The noise of the three-dimensional phase-change memory device is analyzed based on the input voltage and the induced voltage.

2. The noise analysis method according to claim 1, characterized in that, Applying an input voltage to the three-dimensional phase-change memory device to induce relaxation resonance includes: The input voltage is applied to one end of the three-dimensional phase-change memory device; The current in the test circuit is limited to be lower than the preset current limit.

3. The noise analysis method according to claim 2, characterized in that, The input voltage is between the low-resistance turn-on voltage and the high-resistance turn-on voltage of the three-dimensional phase-change memory device; the input voltage is greater than the threshold voltage of the three-dimensional phase-change memory device. The preset current upper limit is the holding current of the three-dimensional phase change storage device.

4. The noise analysis method according to claim 2, characterized in that, Measuring the three-dimensional phase-change storage device to obtain the induced voltage includes: The induced voltage was measured at the other end of the three-dimensional phase change memory device.

5. The noise analysis method according to claim 1, characterized in that, Based on the input voltage and the induced voltage, the noise of the three-dimensional phase-change memory device is analyzed, including: Record the curves of the input voltage change and the curves of the induced voltage change; Based on the change curve of the input voltage and the change curve of the induced voltage, the change curve of the threshold voltage of the three-dimensional phase change memory device is obtained; The noise of the three-dimensional phase-change memory device is analyzed based on the change curve of the threshold voltage.

6. The noise analysis method according to claim 5, characterized in that, Based on the input voltage variation curve and the induced voltage variation curve, the threshold voltage variation curve of the three-dimensional phase-change memory device is obtained, including: Subtract the induced voltage change curve from the input voltage change curve to obtain the voltage difference change curve; Record each peak of the voltage difference change curve to obtain the threshold voltage change curve.

7. The noise analysis method according to claim 5, characterized in that, Based on the change curve of the threshold voltage, the noise of the three-dimensional phase-change memory device is analyzed, including: The fluctuation range of the threshold voltage variation curve is analyzed; wherein, the larger the fluctuation range of the threshold voltage variation curve, the greater the noise of the three-dimensional phase change memory device.

8. A noise analysis device, characterized in that, include: The input unit is configured to apply an input voltage to the three-dimensional phase-change memory device, causing the three-dimensional phase-change memory device to relax and resonate. The measurement unit is configured to measure the three-dimensional phase-change storage device to obtain the induced voltage; The analysis unit is configured to analyze the noise of the three-dimensional phase-change memory device based on the input voltage and the induced voltage.

9. A computer device comprising a memory and a processor, the memory storing a computer program executable on the processor, characterized in that, When the processor executes the program, it implements the steps of the method according to any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 7.

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