An active thermal equalization modulation method for energy storage converters

By segmenting and optimizing the modulation wave of the energy storage converter and using a 0-1 programming algorithm, the problems of power chip loss and uneven junction temperature distribution were solved, achieving high reliability and long lifespan operation of the energy storage converter.

CN121485449BActive Publication Date: 2026-04-17HUNAN UNIV +2
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
HUNAN UNIV
Filing Date
2026-01-07
Publication Date
2026-04-17

AI Technical Summary

Technical Problem

Existing modulation methods for energy storage converters fail to effectively consider the differences in power chip losses and junction temperatures, resulting in uneven loss distribution and affecting device reliability and lifespan.

Method used

By dividing the modulation wave of the energy storage converter into N segments, calculating the loss and junction temperature matrix of each power device, optimizing the switching sequence using a 0-1 programming algorithm, and selecting the modulation method to switch at the highest or lowest point of the carrier wave, junction temperature equalization of the power device chips is achieved.

Benefits of technology

This achieves a balanced junction temperature for power device chips, improves the operational reliability and lifespan of the energy storage converter, and reduces the maximum junction temperature.

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Abstract

This application relates to the field of modulation technology for energy storage converters, and discloses an active thermal equalization modulation method for energy storage converters. The method includes: dividing the modulation wave into N segments; extracting the casing temperature of the power device and updating the loss calculation parameters; determining whether the iteration result meets the accuracy requirements, and if so, proceeding downwards; otherwise, looping upwards; calculating the loss matrix under different modulation methods, and calculating the junction temperature matrix in conjunction with the casing temperature; based on the junction temperature matrix, introducing binary decision variables and auxiliary variables, solving the problem of minimizing the maximum value of the auxiliary variables, and using a planning algorithm to obtain a segmented switching sequence with optimal decision variable values; switching the modulation method according to the decision variables; returning the switching sequence for the current cycle, updating the loss calculation parameters for the next cycle, and repeating the above process. This application achieves the minimization of the maximum junction temperature of the power device chip, improving the reliability and lifespan of the energy storage converter.
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Description

Technical Field

[0001] This application relates to the field of energy storage converter modulation technology, specifically an active thermal equalization modulation method for energy storage converters. Background Technology

[0002] In response to the increasingly serious greenhouse effect, both domestic and international efforts to address climate change are intensifying, and my country's power system is continuously evolving towards a higher proportion of renewable energy sources. Energy storage converters, as interface devices between energy storage batteries and the industrial frequency grid, enable bidirectional energy flow between the DC and AC sides. The power rating and lifespan of energy storage converters are limited by the power chips, which have the highest losses and junction temperatures. The choice of modulation method affects the distribution of switching losses and conduction losses in the power devices, while the type of power chip also influences the distribution of losses and junction temperature, further increasing the complexity of junction temperature calculations for the power chips.

[0003] Considering the varying impacts of modulation methods on the junction temperature of device chips, the junction temperature distribution can be optimized by switching modulation methods. Traditional control methods switch modulation methods within the power frequency cycle, performing a switch once per half-cycle of a single power frequency. However, it is difficult to obtain the switching timing and the duration of each modulation method. Furthermore, calculations typically use the same junction temperature for all device chips, ignoring the differences in junction temperatures between different chips. This approach may lead to deviations in the calculation of power chip losses and junction temperature, affecting the junction temperature optimization effect of the modulation method.

[0004] In summary, there is an urgent need for an active thermal equalization modulation method for energy storage converters that takes into account power chip losses and junction temperature, in order to reduce the maximum junction temperature of power device chips in energy storage converters and improve the reliability and lifespan of energy storage converters. Summary of the Invention

[0005] The purpose of this application is to provide an active thermal equalization modulation method for energy storage converters, so as to solve the technical problems in the prior art where uneven loss distribution of power device chips in energy storage converters leads to decreased device reliability and limited power level.

[0006] To achieve the above objectives, this application provides an active thermal equalization modulation method for an energy storage converter, comprising:

[0007] S1: Read the power command value of the energy storage converter, take into account the filtering stage to obtain the modulation wave, and divide the modulation wave into N segments in time sequence;

[0008] S2: Extract the case temperature of the power device and iteratively update the loss calculation parameters; the loss calculation includes the calculation of conduction loss and switching loss.

[0009] S3: Determine whether the results of two adjacent junction temperature iterations meet the preset accuracy requirements. If yes, execute S4; otherwise, repeat S2 to S3.

[0010] S4: Calculate the loss matrix formed by the segmented losses of power devices under different modulation methods. Based on the loss matrix and the case temperature, calculate the junction temperature matrix of each power device chip. Among them, the power device chips include IGBT chips and FWD chips.

[0011] S5: Based on the junction temperature matrix, introduce binary decision variables and auxiliary variables, add constraints on the auxiliary variables, solve the problem of minimizing the maximum value of the auxiliary variables, and use the 0-1 programming algorithm to obtain the piecewise switching sequence corresponding to the optimal decision variable value;

[0012] S6: Based on the decision variables, the recombined switching sequence segmented modulation drive signal is obtained and output to the power device to select the switching of the modulation method at the highest or lowest point of the carrier.

[0013] S7: Return the switching sequence within the current power frequency cycle to S1, iteratively update the loss calculation parameters of each power device chip in the next power frequency cycle, and cycle from S1 to S7.

[0014] As a preferred option, S1 is specifically:

[0015] Based on the power command value and filter parameters of the energy storage converter, the equivalent sinusoidal waveform of the modulation wave of the energy storage converter is obtained, and the modulation wave is... The time period is divided into N time periods. Based on the active and reactive power command values ​​of the energy storage converter and the filter circuit parameters, the instantaneous value of the port current of the energy storage converter, the modulation index M, and the electrical angle leading the instantaneous current value are calculated.

[0016] Preferably, before S1, the loss model of the power device is also included, and the formula relationship between the junction temperature and loss calculation parameters of the power device chip is fitted.

[0017] On-state losses include parameter threshold voltage and equivalent on-resistance; switching losses include single turn-on loss, single turn-off loss and single reverse recovery loss; and the loss calculation parameters are based on the instantaneous current value of the energy storage converter port and the type of power device through which the port current flows.

[0018] As a preferred option, S2 to S3 are specifically as follows:

[0019] For the switching segment sequence used in the previous power frequency cycle of the energy storage converter, the junction temperature of each power device chip is calculated by combining the case temperature, chip losses and the thermal impedance model from the chip to the case.

[0020] The calculated junction temperatures of each power device chip are substituted back into S1 to S3 to update the loss calculation parameters. The junction temperatures are then updated again. This iterative calculation continues until the values ​​of two adjacent junction temperature iterations meet the accuracy requirements.

[0021] As a preferred option, a modulation method is selected for each segment of the modulated wave. The ANPC three-level topology in S4 includes two different 0-level switching paths, and each 0-level switching path corresponds to one modulation method, including SPWM1 and SPWM2.

[0022] SPWM1 is the high-frequency switching action of the outer tube and clamping tube of the energy storage converter, and the power frequency switching action of the inner tube.

[0023] SPWM2 is the high-frequency switching action of the inner tube of the energy storage converter, and the power frequency switching action of the outer tube and clamping tube.

[0024] As a preferred option, S4 is specifically:

[0025] The junction temperature matrix is ​​calculated based on the formula for calculating the junction temperature matrix. The formula for calculating the junction temperature matrix is ​​as follows:

[0026]

[0027] in, The thermal network impedance matrix is ​​obtained through the loss model of power devices. For the outer casing temperature, The loss matrix is ​​composed of segmented losses. The calculated junction temperature matrix, The value is [1,2] and Corresponding modulation method SPWM1, The corresponding modulation method is SPWM2.

[0028] Preferably, S5 is used to determine the optimal modulation method for each segment of the modulated wave divided into N segments, wherein the modulation method is SPWM1 or SPWM2.

[0029] As a preferred option, S5 is specifically:

[0030] Based on junction temperature matrix Introducing binary decision variables and auxiliary variables Add auxiliary variables Given the constraints, solve for the auxiliary variables. The problem of minimizing the maximum value can be solved using a 0-1 programming algorithm to obtain the optimal value. The corresponding segmented switch sequence for the value; where: The integers are from 1 to N, representing each of the N segments; auxiliary variables. This represents the upper limit of the temperature range for all power device chips.

[0031] As a preferred option, decision variables A single-choice constraint is set, and the mathematical expression for this single-choice constraint is:

[0032]

[0033] This single-choice constraint is based on a 0-1 programming algorithm, requiring that only one and only option be selected from... The corresponding segment or Select one from the corresponding segments;

[0034] Auxiliary variables The constraint is a maximum upper bound constraint on the temperature of all power device chips, and the mathematical expression for this maximum constraint is:

[0035]

[0036] in, This refers to the chip number of the power device.

[0037] As a preferred option, S6 is specifically:

[0038] The decision variables determined by single-choice constraints and maximum value constraints The modulation method used in the segment of the modulated wave is determined, and the recombined switching sequence segmented modulation drive signal is obtained and output to the power device, which includes at least an insulated gate bipolar transistor (IGBT), and output to the gate of the IGBT.

[0039] Determine the switching time between modulation methods, which is the highest or lowest point of the carrier wave.

[0040] Beneficial effects: The active thermal equalization modulation method for energy storage converters in this application transforms the junction temperature equalization problem of power devices into an optimization problem by establishing accurate loss and thermal network models of the power device modules of the energy storage converter. By classifying and flexibly segmenting the device losses within a single power frequency cycle and using a 0-1 integer programming algorithm to optimize the modulation strategy in real time, the maximum junction temperature of the power device chips is minimized, making the junction temperature of each power device chip tend to be equal. This provides a new approach to thermal equalization modulation for high power density energy storage converters and improves the reliability and lifespan of energy storage converters. Attached Figure Description

[0041] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1 A flowchart illustrating the active thermal equalization modulation method for energy storage converters provided in this application embodiment;

[0043] Figure 2 A thermal network model diagram provided for embodiments of this application, without considering the thermal coupling effect of power device chips;

[0044] Figure 3 A thermal network model diagram considering the thermal coupling effect of power device chips is provided for embodiments of this application;

[0045] Figure 4 The schematic diagram of modulation wave amplitude and phase angle deviation of the energy storage converter under different power factor angles at the rated apparent power of the energy storage converter is provided in the embodiments of this application, and is used to correct the sinusoidal waveform of the converter modulation wave.

[0046] Figure 5 Two modulation methods for the ANPC three-level topology and a power device switching sequence diagram are provided for embodiments of the present invention;

[0047] Figure 6 A schematic diagram of the segmented loss matrix of a power frequency cycle power device chip provided in an embodiment of this application;

[0048] Figure 7 A flowchart of the active thermal equalization modulation method for energy storage converters provided in the embodiments of this application;

[0049] Figure 8 A switching sequence diagram of the charging conditions of the energy storage converter provided in the embodiments of this application;

[0050] Figure 9 The figure shows a comparison of the junction temperatures of the power device chips of SPWM1, SPWM2 and the active thermal equalization modulation method of the energy storage converter provided in this embodiment of the invention. In the figure: (a) is the junction temperature of each chip when using the SPWM1 modulation method, (b) is the junction temperature of each chip when using the SPWM2 modulation method, and (c) is the junction temperature of each chip when using the active thermal equalization modulation method of the energy storage converter.

[0051] The implementation, functional features, and advantages of this invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0052] The technical solutions in the embodiments of this application will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0053] In this document, the term "comprising" is intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0054] To address the technical problems of power device losses and uneven junction temperature distribution during the operation of energy storage converters, this embodiment discloses an active thermal equalization modulation method for energy storage converters. This method is applied to an energy storage converter system, specifically to the modulation method control circuit of the energy storage converter system.

[0055] Reference Figure 1 , Figure 1 A flowchart illustrating the active thermal equalization modulation method for energy storage converters provided in this application embodiment.

[0056] like Figure 1 As shown, this embodiment discloses an active thermal equalization modulation method for an energy storage converter, including:

[0057] S1: Read the power command value of the energy storage converter, take into account the filtering stage to obtain the modulation wave, and divide the modulation wave into N segments in time sequence.

[0058] Specifically, S1 is:

[0059] Based on the power command value and filter parameters of the energy storage converter, the equivalent sinusoidal waveform of the modulation wave of the energy storage converter is obtained, and the modulation wave is... The time period is divided into N time periods; among them, the instantaneous value of the port current of the energy storage converter is calculated based on the active and reactive power command values ​​of the energy storage converter and the filter circuit parameters. Modulation modulation M and electrical angle leading the instantaneous current value .

[0060] Due to the symmetry of the positive and negative half-cycles of the modulating wave, the modulating wave It is divided into N time periods. Therefore, in the specific application of this embodiment, for the modulated wave... This corresponds to dividing the time into 2N time periods. For ease of explanation, this embodiment only uses the modulated wave. For example, the subsequent loss matrix and junction temperature matrix only apply to the device chips corresponding to the first half of the modulation wave. The number of rows in the matrix corresponds to the IGBT chips and FWD chips corresponding to S1, S2, and S5, respectively, for a total of 6: IGBT chip T1 and FWD chip D1 for S1, IGBT chip T2 and FWD chip D2 for S2, and IGBT chip T5 and FWD chip D5 for S5.

[0061] Specifically, before S1, the loss model of the power device is imported, and the formula relationship between the junction temperature and loss calculation parameters of the power device chip is fitted.

[0062] On-state losses include parameter threshold voltage and equivalent on-resistance; switching losses include single turn-on loss, single turn-off loss and single reverse recovery loss; and the loss calculation parameters are based on the instantaneous current value of the energy storage converter port and the type of power device through which the port current flows.

[0063] In this specific application, the loss model of the imported power device can be based on the thermal description file of the power device obtained from the manufacturer. The junction temperature of the IGBT in the power chip is obtained through linearization fitting. and FWD junction temperature The linear relationship between the loss calculation parameters and the loss parameters includes:

[0064] Parameters for calculating on-state losses: Threshold voltage , and equivalent on-resistance , ;

[0065] Parameters for calculating switching losses: Single turn-on loss Single activation loss Single reverse recovery loss .

[0066] The calculation of conduction losses and switching losses is related to the instantaneous value of the converter port current. The current flows through the port and is related to the type of power device. For example, when the ANPC topology energy storage converter is in inverter mode and uses the high-frequency modulation method of the external tube, the port output voltage is 0 level. At this time, the power device chip through which the current flows is the FWD chip of the clamping tube and the IGBT chip of the internal tube.

[0067] S2: Extract the case temperature of the power device and iteratively update the loss calculation parameters; the loss calculation includes the calculation of conduction loss and switching loss.

[0068] S3: Determine whether the results of two adjacent junction temperature iterations meet the preset accuracy requirements. If yes, execute S4; otherwise, repeat S2 to S3.

[0069] Reference Figures 2 to 3 , Figure 2 This is a thermal network model diagram provided in an embodiment of the present application, which does not consider the thermal coupling effect of power device chips. Figure 3 This is a thermal network model diagram considering the thermal coupling effect of a power device chip, provided for an embodiment of this application. In this embodiment, the following is employed... Figure 3 The thermal network model shown.

[0070] Specifically, S2 to S3 are as follows:

[0071] For the switching segment sequence used in the previous power frequency cycle of the energy storage converter, the junction temperature of each power device chip is calculated by combining the case temperature, chip losses and the thermal impedance model from the chip to the case.

[0072] The calculated junction temperatures of each power device chip are substituted back into S1 to S3 to update the loss calculation parameters. The junction temperatures are then updated again. This iterative calculation continues until the values ​​of two adjacent junction temperature iterations meet the accuracy requirements.

[0073] In the specific application of this embodiment, for the switching segment sequence used in the previous fundamental cycle of the energy storage converter, combined with the extracted casing temperature of the power devices, the losses of each power device chip can be calculated, including the conduction losses and switching losses of each power device. Then, based on the thermal impedance model from the power device chip to the casing fitted by the thermal description file of the power device, the junction temperature of each power device chip is calculated. The calculated junction temperature of the power device is substituted back into S1 to update the loss calculation parameters. The junction temperature is updated again through the aforementioned calculation process. Iterative calculation is performed until the values ​​of the iterative calculations of two adjacent junction temperatures meet the requirements, thus obtaining the junction temperature data of the power device chip in the previous fundamental cycle. It should be noted that the accuracy requirement in this embodiment is set based on actual needs, aiming to start the active thermal equalization modulation method of the energy storage converter disclosed in this embodiment only after the temperature rise of the power devices tends to stabilize.

[0074] Reference Figures 4 to 5 , Figure 4 This application provides a schematic diagram showing the modulation wave amplitude and phase angle deviation of an energy storage converter at different power factor angles when the rated apparent power is different, used to correct the sinusoidal waveform of the converter modulation wave. Figure 5 Two modulation methods for the ANPC three-level topology and a power device switching sequence diagram are provided for embodiments of the present invention.

[0075] S4: Calculate the loss matrix formed by the segmented losses of power devices under different modulation methods. Based on the loss matrix and the case temperature, calculate the junction temperature matrix of each power device chip. Among them, the power device chips include IGBT chips and FWD chips.

[0076] Specifically, for each segment of the modulated wave, a modulation method is selected. The ANPC three-level topology in S4 includes two different 0-level switching paths, and each 0-level switching path corresponds to one modulation method, including SPWM1 and SPWM2.

[0077] SPWM1 is the high-frequency switching action of the outer tube and clamping tube of the energy storage converter, and the power frequency switching action of the inner tube.

[0078] SPWM2 is the high-frequency switching action of the inner tube of the energy storage converter, and the power frequency switching action of the outer tube and clamping tube.

[0079] Specifically, S4 is:

[0080] The junction temperature matrix is ​​calculated based on the formula for calculating the junction temperature matrix. The formula for calculating the junction temperature matrix is ​​as follows:

[0081]

[0082] in, The thermal network impedance matrix is ​​obtained through the loss model of power devices. For the outer casing temperature, The loss matrix is ​​composed of segmented losses. The calculated junction temperature matrix, The value is [1,2] and Corresponding modulation method SPWM1, The corresponding modulation method is SPWM2.

[0083] Reference Figure 5 The ANPC three-level topology contains two different 0-level commutation paths, corresponding to two different modulation methods: short-commutation SPWM1 and long-commutation SPWM2. In the ANPC three-level topology, due to the symmetry of the upper and lower halves of the modulation wave, the power devices S1 and S4 (outer transistors), S2 and S3 (inner transistors), and S5 and S6 (clamping transistors) also exhibit symmetry in their upper and lower halves. This embodiment's analysis only focuses on the modulation wave interval. The following explanation will be provided.

[0084] S5: Based on the junction temperature matrix, introduce binary decision variables and auxiliary variables, add constraints on the auxiliary variables, solve the problem of minimizing the maximum value of the auxiliary variables, and use the 0-1 programming algorithm to obtain the piecewise switching sequence corresponding to the optimal decision variable value.

[0085] Specifically, S5 is used to determine the optimal modulation method for each segment of the modulated wave divided into N segments, which is either SPWM1 or SPWM2.

[0086] Specifically, S5 is:

[0087] Based on junction temperature matrix Introducing binary decision variables and auxiliary variables Add auxiliary variables Given the constraints, solve for the auxiliary variables. The problem of minimizing the maximum value can be solved using a 0-1 programming algorithm to obtain the optimal value. The corresponding segmented switch sequence for the value; where: The integers are from 1 to N, representing each of the N segments; auxiliary variables. This represents the upper limit of the temperature range for all power device chips.

[0088] Specifically, decision variables A single-choice constraint is set, and the mathematical expression for this single-choice constraint is:

[0089]

[0090] This single-choice constraint is based on a 0-1 programming algorithm, requiring that only one and only option be selected from... The corresponding segment or Select one from the corresponding segments;

[0091] Auxiliary variables The constraint is a maximum upper bound constraint on the temperature of all power device chips, and the mathematical expression for this maximum constraint is:

[0092]

[0093] in, This refers to the chip number of the power device.

[0094] In this embodiment, the modulation method based on 0-1 programming means that the modulation wave... The system is divided into N equal-length time periods, each of which can select one of two modulation methods. This means the switching sequence of the power devices switches between the two modulation methods for equal time periods. The two modulation methods mentioned above include:

[0095] For SPWM1, the high-frequency switches of the outer tube and clamping tube of the energy storage converter operate, while the power frequency switch of the inner tube operates. Taking the first quadrant as an example, the port voltage output is... When the output voltage is 0, the conduction loss is borne by the outer tube T1 and the inner tube T2. When the output voltage is 0, the conduction loss is borne by the inner tube T2 and the clamping tube D5.

[0096] For SPWM2, the high-frequency switch of the inner tube of the energy storage converter operates, while the power frequency switch of the outer tube and the clamping tube operates. Taking the first quadrant as an example, when the port voltage output is 0, it is the same as SPWM1. When the output is 0, the current will flow through the lower half of the topology. The conduction loss is borne by the inner tube D3 and the clamping tube T6. Based on the symmetry of the upper and lower half cycles of the modulation wave, the losses will be classified into the inner tube D2 and the clamping tube T5 respectively in the subsequent loss matrix calculation. This is explained here.

[0097] Reference Figure 6 , Figure 6 This is a schematic diagram of the segmented loss matrix of a power frequency cycle power device chip provided in an embodiment of this application.

[0098] like Figure 6 As shown, It is a 6×N matrix, where 6 represents the two chips T1 and D1 of the outer tube, the two chips T2 and D2 of the inner tube, and the two chips T5 and D5 of the clamping tube, for a total of 6 chips. i The values ​​[1,2] correspond to SPWM1 and SPWM2, and the loss matrices formed by the two segmented losses are calculated respectively. and .

[0099] The thermal network impedance matrix of the IGBT power device is obtained through the loss model of the power device. and the extracted case temperature of the IGBT power device. The junction temperature matrix of each power chip in the energy storage converter was obtained. The mathematical relationship is:

[0100]

[0101] Thus, the junction temperature matrices are obtained. .

[0102] S6: Based on the decision variables, the recombined switching sequence segmented modulation drive signal is obtained and output to the power device, and the modulation method is switched at the highest or lowest point of the carrier.

[0103] Introducing decision variables using binary representation and auxiliary variables Based on this, the selection will be implemented The corresponding segment or A logical problem in one of the corresponding segments is transformed into an upper limit value. The min-max optimization problem can be solved using a 0-1 programming algorithm to obtain the optimal solution. The segmented switch sequence corresponding to the value, i.e., through The modulation methods used in different segments of the 0-1 selection were optimized and recombined for the switching sequence of the power devices.

[0104] Specifically, S6 is:

[0105] The decision variables determined by single-choice constraints and maximum value constraints The modulation method used in the segment of the modulated wave is determined, and the recombined switching sequence segmented modulation drive signal is obtained and output to the power device, which includes at least an insulated gate bipolar transistor (IGBT), and output to the gate of the IGBT.

[0106] Determine the switching time between modulation methods, which is the highest or lowest point of the carrier wave.

[0107] In this embodiment, the analysis of determining the handover occurrence time as the highest or lowest point of the carrier wave is as follows:

[0108] When the switching occurs at the maximum value of the carrier wave, i.e. the highest point, the output voltage of the energy storage converter port is 0 level. The current will be switched from the path through T2 and D5 to the path through T6 and D3. Since the two 0-level switching paths are connected in parallel, the IGBT and FWD are zero-voltage turn-on and zero-voltage turn-off during this switching process, and no additional switching losses will be generated.

[0109] When the switching occurs at the minimum value of the carrier wave, i.e., the lowest point, the output voltage at the energy storage converter port is: The power devices will not generate additional switching actions, the current flow path will not change, and the switching between the two modulation methods SPWM1 and SPWM2 will not generate additional losses.

[0110] S7: Return the switching sequence within the current power frequency cycle to S1, iteratively update the loss calculation parameters of each power device chip in the next power frequency cycle, and cycle from S1 to S7.

[0111] Reference Figure 7 , Figure 7 A flowchart of the active thermal equalization modulation method for energy storage converters provided in the embodiments of this application.

[0112] like Figure 7 As shown, in the specific application of this embodiment: the first step is to import the IGBT power module loss model and fit the formula relationship between the junction temperature of the device chip and the loss calculation parameters; the second step is to read the power command value PQ of the energy storage converter, take into account the filtering stage to obtain the modulation wave and divide it into N time periods, where N refers to the modulation wave. The third step is to extract the module casing temperature and iteratively update the power device chip loss calculation parameters. The fourth step is a judgment step, which determines whether the results of two adjacent junction temperature iterations meet the accuracy requirements, so that active thermal equalization modulation can begin after the IGBT power module temperature rise stabilizes. If the requirements are met, proceed to the fifth step; otherwise, return to the third step. The fifth step is to calculate the loss matrix and junction temperature matrix composed of the segmented losses of the power devices. At this point, a 0-1 programming algorithm and binary decision variables are introduced. and the upper bound of junction temperature for all chips Under the constraints of single-choice decision variables and maximum value constraints of auxiliary variables, solve... The sixth step is based on solving... The result is that The generation of device switching sequence segmented drive signals is output to the IGBT gate, and the modulation mode is switched at the maximum or minimum value of the carrier. The modulation generated in this sixth step is returned to the segment in the second step to provide a data basis for the next modulation.

[0113] Reference Figure 8 , Figure 8 The diagram shows the device switching sequence for the energy storage converter charging operation provided in this application embodiment, with the switching drive signals of power devices S1-S6 corresponding from top to bottom.

[0114] Figure 9 This is a comparison diagram of the junction temperatures of the power device chips in the SPWM1 and SPWM2 provided in this embodiment of the invention and the active thermal equalization modulation method for the energy storage converter in this embodiment. Figure 9 As shown, (a) represents the junction temperature of each chip when using the SPWM1 modulation method, (b) represents the junction temperature of each chip when using the SPWM2 modulation method, and (c) represents the junction temperature of each chip when using the active thermal equalization modulation method for the energy storage converter. The determination of the modulation method for each segment implemented in this embodiment, compared to using either SPWM1 or SPWM2 alone, reduces the maximum junction temperature of the power device chips in the energy storage converter, improves the reliability and lifespan of the energy storage converter, and effectively upgrades the power rating of the energy storage converter.

[0115] In the embodiments provided in this application, it should be understood that the embodiments described herein can be implemented in hardware, software, firmware, middleware, code, or any suitable combination thereof. For hardware implementation, the processor may be implemented in one or more of the following: application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), processors, controllers, microcontrollers, microprocessors, other electronic units designed to implement the functions described herein, or combinations thereof. For software implementation, some or all of the processes of the embodiments may be performed by a computer program instructing the associated hardware. During implementation, the program may be stored in a computer-readable storage medium or transmitted as one or more instructions or code on a computer-readable storage medium. Computer-readable storage media include computer storage media and communication media, wherein communication media include any medium that facilitates the transmission of a computer program from one place to another. Storage media may be any available medium accessible to a computer. Computer-readable storage media may include, but are not limited to, RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage media or other magnetic storage devices, or any other medium capable of carrying or storing desired program code having the form of instructions or data structures and accessible to a computer.

[0116] Finally, it should be noted that the above description is only a preferred embodiment of this application and is not intended to limit this application. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A method for active thermal equalization modulation of an energy storage converter, characterized in that, include: S1: Read the power command value of the energy storage converter, take into account the filtering stage to obtain the modulation wave, and divide the modulation wave into N segments in time sequence; S2: Extract the case temperature of the power device and iteratively update the loss calculation parameters; the loss calculation includes the calculation of conduction loss and switching loss. S3: Determine whether the results of two adjacent junction temperature iterations meet the preset accuracy requirements. If yes, execute S4; otherwise, repeat S2 to S3. S4: Calculate the loss matrix formed by the segmented losses of power devices under different modulation methods. Based on the loss matrix and the case temperature, calculate the junction temperature matrix of each power device chip. Among them, the power device chips include IGBT chips and FWD chips. S5: Based on the junction temperature matrix, introduce binary decision variables and auxiliary variables, add constraints on the auxiliary variables, solve the problem of minimizing the maximum value of the auxiliary variables, and use the 0-1 programming algorithm to obtain the piecewise switching sequence corresponding to the optimal decision variable value; S6: Based on the decision variables, the recombined switching sequence segmented modulation drive signal is obtained and output to the power device to select the switching of the modulation method at the highest or lowest point of the carrier. S7: Return the switching sequence within the current power frequency cycle to S1, iteratively update the loss calculation parameters of each power device chip in the next power frequency cycle, and cycle from S1 to S7. S5, specifically: Based on junction temperature matrix Introducing binary decision variables and auxiliary variables Add auxiliary variables Given the constraints, solve for the auxiliary variables. The problem of minimizing the maximum value can be solved using a 0-1 programming algorithm to obtain the optimal value. The corresponding segmented switch sequence for the value; where: The integers are from 1 to N, representing each of the N segments; auxiliary variables. This is the upper limit of the temperature of all power device chips; The value is [1,2] and Corresponding modulation method SPWM1, Corresponding modulation method: SPWM2; Decision variables A single-choice constraint is set, and the mathematical expression for this single-choice constraint is: This single-choice constraint is based on a 0-1 programming algorithm, requiring that only one and only option be selected from... The corresponding segment or Select one from the corresponding segments; Auxiliary variables The constraint is a maximum upper bound constraint on the temperature of all power device chips, and the mathematical expression for this maximum constraint is: in, This refers to the chip number of the power device.

2. The active thermal equalization modulation method for energy storage converters according to claim 1, characterized in that, S1, specifically: Based on the power command value and filter parameters of the energy storage converter, the equivalent sinusoidal waveform of the modulation wave of the energy storage converter is obtained, and the modulation wave is... The time period is divided into N time periods. Based on the active and reactive power command values ​​of the energy storage converter and the parameters of the filter circuit, the instantaneous value of the port current of the energy storage converter, the modulation index M, and the electrical angle leading the instantaneous current value are calculated.

3. The active thermal equalization modulation method for energy storage converters according to claim 2, characterized in that, Before S1, the loss model of the power device is also included, and the formula relationship between the junction temperature and loss calculation parameters of the power device chip is obtained by fitting. On-state losses include parameter threshold voltage and equivalent on-resistance; switching losses include single turn-on loss, single turn-off loss and single reverse recovery loss. Furthermore, the loss calculation parameters are based on the instantaneous current value at the port of the energy storage converter and the type of power device through which the current flows.

4. The active thermal equalization modulation method for energy storage converters according to claim 1, characterized in that, S2 to S3 are as follows: For the switching segment sequence used in the previous power frequency cycle of the energy storage converter, the junction temperature of each power device chip is calculated by combining the case temperature, chip losses and the thermal impedance model from the chip to the case. The calculated junction temperatures of each power device chip are substituted back into S1 to S3 to update the loss calculation parameters. The junction temperatures are then updated again. This iterative calculation continues until the values ​​of two adjacent junction temperature iterations meet the accuracy requirements.

5. The active thermal equalization modulation method for energy storage converters according to claim 1, characterized in that, For each segment of the modulated wave, a modulation method is selected. The ANPC three-level topology in S4 includes two different 0-level switching paths, and each 0-level switching path corresponds to one modulation method, including SPWM1 and SPWM2. SPWM1 is the high-frequency switching action of the outer tube and clamping tube of the energy storage converter, and the power frequency switching action of the inner tube. SPWM2 is the high-frequency switching action of the inner tube of the energy storage converter, and the power frequency switching action of the outer tube and clamping tube.

6. The active thermal equalization modulation method for energy storage converters according to claim 5, characterized in that, S4, specifically: The junction temperature matrix is ​​calculated based on the formula for calculating the junction temperature matrix. The formula for calculating the junction temperature matrix is ​​as follows: in, The thermal network impedance matrix is ​​obtained through the loss model of power devices. For the outer casing temperature, The loss matrix is ​​composed of segmented losses. The calculated junction temperature matrix, The value is [1,2] and Corresponding modulation method SPWM1, The corresponding modulation method is SPWM2.

7. The active thermal equalization modulation method for energy storage converters according to claim 6, characterized in that, S5 is used to determine the optimal modulation method for each segment of a modulated wave divided into N segments, which is either SPWM1 or SPWM2.

8. The active thermal equalization modulation method for energy storage converters according to claim 1, characterized in that, S6, specifically: The decision variables determined by single-choice constraints and maximum value constraints The modulation method used within the segment of the modulated wave is determined, and the recombined switching sequence segmented modulation drive signal is obtained and output to the power device, which includes at least an insulated gate bipolar transistor (IGBT), and output to the gate of the IGBT. Determine the switching time between modulation methods, which is the highest or lowest point of the carrier wave.

Citation Information

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