Method for monitoring production of electronic components by means of monitoring system, computer program product, computer readable storage medium, and monitoring system

Abstract

The invention relates to a method for monitoring the production of electronic components (14, 16, 18), comprising the steps of: receiving first data (24) from an automatic optical inspection device (10), where the first data (24) describes a component (20) of the electronic components (14, 16, 18); receiving second data (26) from the automatic optical inspection device (10), wherein the second data (26) describes a pin (22) of a component (20) of the electronic component (14, 16, 18); providing a neural network (32), wherein the neural network (32) is configured for calculating data having a preset size; determining each size of the received data; comparing the determined dimensions of the first data (24) and the second data (26) with preset dimensions; populating the received first data (24) and second data (26) such that a first data vector is generated at a first size and a second data vector is generated at a second size; generating a mask (28, 30), where the mask (28, 30) describes a first data vector with respect to the received first data (24) and the first padding and a second data vector with respect to the received second data (26) and the second padding; sending the first data vector, the second data vector, and the mask (28, 30) to a neural network (32); analysing the electronic component (14, 16, 18) as a function of the first data vector and the second data vector; and monitoring the electronic components (14, 16, 18) according to the analysis. Furthermore, the invention relates to a computer program product, a computer-readable storage medium and a monitoring system (12).

Description

[0001] Independent of the use of the grammatical term, individuals with a male, female gender identity are included in the term.

[0002] The invention relates to a method of monitoring production of electronic assemblies by a monitoring system according to independent claim 1. Furthermore, the invention relates to a computer program product, a computer readable storage medium, and a monitoring system.

[0003] In the prior art, so-called automatic optical inspection (AOI) is known, which is an automatic visual inspection of printed circuit boards (PCB) or LCD or transistor manufacturers, in which a camera automatically scans the device under test for catastrophic faults (e.g. missing components) and quality defects (e.g. corner size or shape or component skew). It is commonly used in manufacturing processes, as it is a non-contact testing method. It is implemented at many stages throughout the manufacturing process, including bare board inspection, separate paste inspection (SPI), pre-reflow and post-reflow, and other stages.

[0004] Historically, the main location for AOI systems has been after solder reflow or later in production. Mainly because, post-reflow AOI systems can check most types of defects (e.g. component placement, solder shorts, opens), or in addition at one location on the production line with one single system. In this way, defective circuit boards are reworked, while other circuit boards are sent to the next processing stage.

[0005] A major concern for manufacturers that deploy AOI machines on their assembly lines is the false error rate reported by these AOI machines. Therefore, a manual process has to be employed to inspect the rejected PCBs and finally decide which circuit boards can go to the next stage (which can be considered as false errors) or which are reworked (which can be considered as true errors). Automation of this manual process is desirable and there are many AI-based works that target the defect detection problem on PCBs, but they rely on images, as the AOI machines and humans do. Unfortunately, many AOI machine vendors prohibit access to the images recorded by the AOI machines, while only storing and allowing access to transactions extracted from the images by their undisclosed algorithms that include information about the circuit board, its components, and component pins. As an alternative to AOI machines, one option is to use the data produced by the AOI machines to find patterns that distinguish false errors (especially so-called false positives) from true errors and in this way reduce the number of manual post-AOI inspections of PCBs. Currently, there is no specialized AI-based method available that can interface with the special data structure produced by the AOI machines.

[0006] It is an object of the present invention to provide a method, computer program product, computer readable storage medium and monitoring system by which the amount of false positive errors from electronic component production is automatically minimized.

[0007] This object is solved by the method, computer program product, computer readable storage medium and monitoring system according to the independent claims.

[0008] Advantageous forms of embodiment are given in the dependent claims.

[0009] One aspect of the present invention relates to a method for monitoring electronic component production by a monitoring system. First data from an automated optical inspection device is received by an electronic computing device of the monitoring system, wherein the first data describes components of an electronic component. Second data from an automated optical inspection device (AOI device) is received by the electronic computing device, wherein the second data describes pins of the components of the electronic component. A neural network is provided by the electronic computing device, wherein the neural network is configured for computing data having a preset first size for the first data and a preset second size for the second data. Each size of the received data is determined by the electronic computing device. The determined sizes of the first data and the second data are compared by the electronic computing device with the preset first size and the preset second size for the neural network. The received first data and the second data are padded such that a first data vector is generated by the electronic computing device in the first size and a second data vector is generated in the second size. A mask is generated by the electronic computing device, wherein the mask describes about the received first data and the first padded first data vector and about the received second data and the second padded second data vector. The first data vector, the second data vector and the mask are sent to the neural network. The neural network analyzes the electronic component from the first data vector and the second data vector and monitors the electronic component from the analysis.

[0010] Therefore, a neural network based modeling method is proposed which is able to process the produced data in its natural form and which integrates all the measurement information of the printed circuit board under inspection. In its natural form, this means that for each printed circuit board, there are measurements for a variable set of components and for each component, there is a set of variable pins measurements.

[0011] Therefore, processing layered-organized inputs with different shapes, in particular the number of components and corresponding pins, is an important approach. To make this input compatible with a neural network, a combination of padding and masking is used. Padding is used to organize each input example in the same shape array that can be processed and digested by the neural network model batch, e.g. data of a single PCB (Printed Circuit Board). Masking is used to provide the model with information of which parts of the input to ignore when processing the data, especially the padding. In particular, the pin data and component data of each component are organized in separate arrays as shown.

[0012] Therefore, the goal of this approach is an automatic false positive reduction, which directly reduces the manual review effort of PCBs that are classified as false by the automatic optical inspection equipment. This approach is superior to other data-based approaches in that the layered data generated by the automatic optical inspection equipment is modeled as-is without information loss. This means that more information is used to judge whether a problematic PCB is indeed false. In particular, the data of the entire circuit board can be processed end-to-end by the model, which is not possible with existing approaches as they cannot handle dynamic input sizes.

[0013] The neural network can also be seen as a model. Generally, the false positive reduction use case dataset is characterized by a high classification imbalance, which means that there is an imbalance between the inspection of circuit boards that are reported as false errors (majority) and true errors (minority) by the AOI machine. In addition to training the false / true error classification model using the described neural network architecture with existing stochastic gradient-based optimization methods, additional measures are used to deal with this classification imbalance. For example, during model training, the batches are balanced by resampling the minority class (true errors) such that between 10% and 50% of the examples in the batch are circuit boards with true errors. In case the training data consists of different AOI test patterns, the batches are additionally balanced by resampling such that during training, the model is exposed to all AOI test patterns with similar frequency. Secondly, a loss function is used that further improves the training results when trained with imbalanced datasets.

[0014] According to an embodiment, the electronic component is analyzed such that the electronic component is classified as a false component or a non-false component. In particular, the electronic component is analyzed such that a true error and / or a false error is classified.

[0015] Therefore, a minimization of false errors in the production of electronic components is provided.

[0016] In another embodiment, the classification of the automated optical inspection device is considered by the electronic computing device. In particular, only electronic components are analyzed by the electronic computing device which are classified as faulty by the automated optical inspection device. Specifically, if the automated optical inspection device provides an electronic component as non-faulty, no inspection / monitoring of the monitoring system is provided. Only in case the automated optical inspection device classifies an electronic component as faulty, the monitoring system monitors these electronic components. The monitoring system is then configured for classifying the electronic components such that false positives or true positives of the AOI are detected by the monitoring system. Thus, a minimization of false positives is provided.

[0017] In another embodiment, the first data vector is a three-dimensional data vector and / or the second data vector is a four-dimensional data vector. In particular, the component data is organized as a three-dimensional array, where the first dimension is the lot axis, meaning that each entry along this dimension describes a different PCB. The second dimension is the component axis, where each entry describes a measurement of a component on the PCB. Please note that the order of the components is not forced here. Since the number of components per PCB can be different, this dimension has the size of the maximum number of components seen on the PCBs of the current lot. Finally, the feature axis is the same for all components, since the same kind of measurements is made on them.

[0018] The pin data is organized as a four-dimensional array, where the first two dimensions are the same as in the case of the component data. The third dimension is the pin axis, where each entry describes a measurement of an inspected pin of a component. Please note that the order of the pins is not forced here. Since the number of pins per component on the PCBs can be different, this dimension has the size of the maximum number of pins seen on the components of all PCBs of the current lot. Thus, an improved monitoring of the electronic components can be achieved.

[0019] In another embodiment, the masking is provided as a Boolean masking array. Thus, besides the component data and the pin data, also the information about the padding located where in the component and pin data is organized as a Boolean masking array. Please note that padding and masking are typically only needed when the model should handle data of multiple circuit boards at the same time. The typical requirements of the optimization process are applied to train the downstream neural network model. However, in the inference process, it is also meaningful to process the data of multiple circuit boards in a lot to improve the run time. Thus, an improved monitoring of the electronic components is provided.

[0020] In another embodiment, the neural network comprises at least a first encoder for the first data vector and a second encoder for the second data vector. In particular, the neural network further comprises at least a third encoder, wherein in the third encoder the first result of the first encoder and the second result of the second encoder are fused. Thus, a neural network is provided which improves the monitoring of the electronic components.

[0021] In another embodiment, the first encoder and the second encoder are provided with the same encoder structure.

[0022] Thus, a simple way of encoding is provided.

[0023] Alternatively, the structure of each encoder can be different.

[0024] According to another embodiment, zero padding is used to fill the received data. In particular, in case there is no information in the data related to the feature, a slot is filled with zero. Thus, a simple way of generating the data vector is provided.

[0025] In another embodiment, the neural network ignores the padding during analyzing the first data vector and the second data vector. In particular, the neural network is configured to ignore the zero padding. Thus, the neural network can analyze the data, but ignore the irrelevant data, in particular the padded data. Thus, an improved analysis of the electronic component is provided.

[0026] In another embodiment, the neural network comprises at least a classifier module for classifying the electronic component. In particular, a classifier module is applied, whose output is a single confidence value that the ingested board data representation is a false error. For example, the classifier module is a multi-layer perception (MLP) that ingests the encoding of all component and pin measurements of a board and produces a single confidence that the measurements reflect a false error of the AOI device. For example, the MLP can consist of two consecutive fully connected neural network layers, where the first layer uses a real activation function. Of course, other choices can be reasonable as well.

[0027] In particular, the proposed method is a computer-implemented method. Thus, another aspect of the present invention relates to a computer program product comprising program code means for performing the method according to the preceding aspect.

[0028] Another aspect of the present invention relates to a computer-readable storage medium comprising at least the computer program product according to the preceding aspect.

[0029] Yet another aspect of the present invention relates to a monitoring system for monitoring production of electronic components comprising at least one electronic computing device, wherein the monitoring system is configured for performing the method according to the preceding aspect. In particular, the method is performed by the monitoring system.

[0030] The electronic computing device can comprise electronic components for performing the method according to the preceding aspects, such as a processor, a circuit, in particular an integrated circuit, and further electronic components. The electronic computing device can also be regarded as a computing unit. The computing unit can in particular be understood as a data processing device comprising a processing circuit. The computing unit can thus in particular process data to perform a computing operation. This can also include an operation of performing an indexed access to a data structure, such as a lookup table, LUT.

[0031] In particular, the computing unit can comprise one or more computers, one or more microcontrollers, and / or one or more integrated circuits, such as one or more application-specific integrated circuits, ASICs, one or more field-programmable gate arrays, FPGAs, and / or one or more systems on a chip, SoC. The computing unit can also comprise one or more processors, such as one or more microprocessors, one or more central processing units, CPU, one or more graphics processing units, GPU, and / or one or more signal processors, in particular one or more digital signal processors, DSP. The computing unit can also comprise a physical or virtual cluster of computers or other said units.

[0032] In various embodiments, the computing unit comprises one or more hardware and / or software interfaces and / or one or more memory units.

[0033] The memory unit can be implemented as a volatile data memory, such as a dynamic random access memory, DRAM, or a static random access memory, SRAM, or as a non-volatile data memory, such as a read-only memory, ROM, a programmable read-only memory, PROM, an erasable programmable read-only memory, EPROM, an electrically erasable programmable read-only memory, EEPROM, a flash memory or flash EEPROM, a ferroelectric random access memory, FRAM, a magnetoresistive random access memory, MRAM, or a phase change random access memory, PCRAM.

[0034] An advantageous form of the configuration of the method is considered to be an advantageous form of the configuration of the computer program product, the computer-readable storage medium, and the monitoring system. Thus, the monitoring system comprises means for performing the method.

[0035] For use cases or use situations that can occur in the method and are not explicitly described here, it can be provided that, according to the method, an error message and / or a user feedback prompt is output, and / or a default setting and / or a predetermined initial state is set. Independently of the use of grammatical terms, individuals with a male, female gender identity are included in the terms.

[0036] Further features of the present invention are derived from the claims, the figures and the figure description. The features mentioned in the above description and the features of the claims, which are not explicitly mentioned in the above description, can be combined with each other independently of their dependency in the claims, and can be combined with features of the above description, which are not explicitly mentioned in the claims.

[0037] The present invention will now be explained in more detail with reference to preferred examples of embodiments and with reference to the accompanying drawings.

[0038] Figure 1 An abstract representation of data generated by an automatic optical inspection device is shown; Figure 2 A schematic block diagram of a structure according to PCB data is shown after performing at least part of the method according to the present invention; Figure 3 A schematic block diagram according to an embodiment of a monitoring system is shown; Figure 4 A schematic block diagram of an attention module according to an embodiment of the present invention is shown.

[0039] Figure 1 An abstract representation of data generated by an automatic optical inspection device 10 (AOI device) from a monitoring system 12 is shown. In particular, according to the shown embodiment, three different printed circuit boards are inspected, which can also be regarded as electronic assemblies 14, 16, 18, wherein each circuit board comprises a different set of components 20. The first electronic assembly 14 has three components 20, e.g. a capacitor, a resistor and another resistor, the second electronic assembly 16 comprises two components 20, and the third electronic assembly 18 comprises four components 20. Each component 20 can have a different number of pins 22 inside, so that the amount of measurement data generated by each component 20 is varying.

[0040] Figure 2 A structure of the electronic assemblies 14, 16, 18 after applying padding and masking is shown. In particular, Figure 2 A first data 24 is shown, wherein the first data 24 describes the components 20 of the electronic assemblies 14, 16, 18.

[0041] Further, a second data 26 is shown, wherein the second data 26 describes the pins 22 of the components 20 of the electronic assemblies 14, 16, 18. Further, a first masking 28 for the component data 24 and a second masking 30 for the second data 26 is shown. The first and second masking 28, 30 can be fused into one masking 28, 30.

[0042] In particular, Figure 1 and 2A hierarchical processing of the organized input with different shapes, in particular the number of components 20 and corresponding pins 22, is shown. To make this input compatible with the neural network 32 Figure 3 padding is used to organize each input example in an array of the same shape, e.g. data of a single PCB (Printed Circuit Board), which can be batched and digested by the neural network 32. Masking is used to provide the model with information of the input parts (especially padding) to ignore when processing the data. In the shown case, data of each component 20 and pin 22 is separated in the array.

[0043] In particular, Figure 2 A first data 24 is shown organized in a three-dimensional array, where the first dimension is the batch axis, which means that each entry along this dimension describes a different electronic component 14, 16, 18. The second dimension is the component axis, where each entry describes a measurement on a component 20 of the electronic component 14, 16, 18. Note that the order of the components 20 is not enforced here. Since the number of components 20 per electronic component 14, 16, 18 can be different, this dimension has the size of the maximum number of components 20 seen on the electronic components 14, 16, 18 belonging to the current batch. Finally, the feature axis is the same for all components 20, since the same kind of measurement is taken on them. Assuming Figure 1 electronic components 14, 16, 18 data is batched, the batch dimension will have the size 3, with the component axis having the size 4. The data of the first electronic component 14 and the second electronic component 16 will be zero-padded along the component axis, since they do not have four components 20. Finally, the feature axis is the same for all components 20, since the same kind of measurement is taken on them.

[0044] A second data 26 is organized in a four-dimensional array, where the first two dimensions are the same as in the case of the component data. The third dimension is the pin axis, where each entry describes a measurement of an expected pin 22 of a component 20. Note that the order of the pins 22 is not enforced here. Since the number of pins 22 per component 20 on the electronic components 14, 16, 18 can be different, this dimension has the size of the maximum number of pins 22 seen on the components 20 of all electronic components 14, 16, 18 belonging to the current batch.

[0045] Moreover, assuming that the component data is stored by an array C of shape n x c x f, and that the pin data is stored by an array P of shape n x c x p x h, where n is the batch size, c is the maximum number of components 20 observed on the electronic components 14, 16, 18 in the batch, f is the different kind of measurements taken on the components 20, p is the maximum number of pins 22 observed in the batch, and h is the measurement taken on the pins 22. Then C n=0，c=1is the component measurement of the second component 20 on the first electronic assembly 14.C n=1，c=3 is the component measurement of the fourth component on the second electronic assembly 16, where the fourth component 20 is not present on the second electronic assembly 16, so it will be a fill value / zero.P n=1，c=1，p=0 is the measurement value of the first pin 22 of the second component 20 of the second electronic assembly 16.

[0046] In addition to the component data and pin data, information about the positions filled in the component 20 and pin data arrays is organized in a Boolean mask array.

[0047] Note that filling and masking is generally only needed when the neural network 32 should process data of multiple circuit boards at the same time. The typical requirements of the optimization process are applied to train the downstream neural network model. However, during disturbances, it is also meaningful to process data of multiple circuit boards in batches to improve the run-time.

[0048] Figure 3 A schematic block diagram is shown according to an embodiment of the monitoring system 12, in particular of the neural network 32. Given the input representation as described above, a neural network 32 is suggested that is able to process it correctly. In particular, the neural network 32 is composed of four modules 34, 36, 38, 40. A first encoder 34 for component measurements, which ingests the batch of component data and component data masks. A second encoder 36 for pin measurements, which ingests the batch of component data and component data masks. After each pin 22 and component 20 of the circuit board has been encoded with respect to their measurements, a third encoder 38 is applied, which fuses all previous, in particular different number of encodings (also taking into account the masks 28, 30) into one fixed-size encoding, which represents the state of the ingested circuit board with respect to the observed measurements of the components 20 and the corresponding pins 22. Finally, a fourth encoder, in particular a so-called classifier module 40 is applied, whose output is a single confidence value of the ingested circuit board data representation being pseudo-error-free. In the following, the four components 34, 36, 38, 40 will be described in more detail.

[0049] For the encoding of pins or components, the same encoder structure is provided, where the encoders for pins and components do not share any model parameters. Thus, there is no distinction between pins and components, and they can simply be referred to as entities in the following.

[0050] Thus, the structure of the first encoder 34 and the second encoder 36 is described in more detail.

[0051] First, the input measurements are classified into three categories: categorical measurements (including binary) (e.g. "component type" or "pin type"); numerical measurements (e.g. "component height", "electrode length"); cyclic numerical measurements (e.g. "component angle relative to board", "electrode angle relative to board").

[0052] Furthermore, the masks 28, 30 are also passed to the encoder module, as the encoder is applied to all entities of a batch at once, which can include zero padding. Each C categorical measurement passes through its own embedding layer 46, which transforms each categorical input into a d-dimensional vector in a learned embedding space. For the cyclic numerical features, a sine and cosine based transformation 42 is applied to replace them and concatenated (concatenation 48) to the other numerical features. The complete numerical feature set of an entity is then passed through a masked batch normalization 44, which normalizes these inputs. Note that the masked batch normalization 44 uses the masks 28, 30 such that zero padding values are ignored during normalization. The resulting normalized numerical inputs are then concatenated with the categorical embeddings and fed into a fully connected neural network layer (dense layer 50), which results in an encoding of the entity. Note that the task of this module is to fuse all available information of an entity, which means that if e.g. data of 10 entities enters, 10 vectors in a learned latent space (encoding) representing the fused information are produced.

[0053] The task of the component and pin encoders, in particular the first encoder 34 and the second encoder 36, is to encode the available information of each component 20 and each pin 22. The task of the board encoder, in particular the third encoder 38, is to combine the encodings of all available component 20 and pin 22 measurements of a PCB to produce an encoding of the whole board.

[0054] In a first step, the encodings of all pins 22 of a component 20 are fused using a pin aggregator 52. In a second step, the resulting encodings of all pins 22 of a component 20 are concatenated (concatenation 54) to the encoding of the respective component 20. Finally, the enriched component encodings are fused by passing them through a component aggregator 56. The result is an encoding of the whole PCB.

[0055] The pin aggregator 52 fuses the encodings of the pin measurements of each component 20, but ignores padding. Here, a number of reasonable choices for the aggregation function can be made: a max function, which applies the maximum to all pin encodings; an average function, which applies the average to all pin encodings; an attention module.

[0056] In the case of an attention module, one can use e.g. Figure 4The illustrated attention mechanism either computes the weights of the weighted average by applying multi-head attention as provided in off-the-shelf libraries like pytorch. The latter is used to implement so-called cross-attention, where the input to the module (pin code) is not used as query either, but a single query is applied, which can be learned as part of the complete architecture or using the respective component code.

[0057] Again, if the input is a set of pin codes, where each pin code is a vector of size k, the pin aggregator 52 outputs a single code of size k representing the fused code.

[0058] Figure 4 An embodiment of the attention module 62 is illustrated, where the attention weights are computed by feeding the component code together with the pin code into a shared attention network (dense layer 64). The resulting weights are normalized to add up to 1.0 using a softmax function.

[0059] Subsequently, each pin code is multiplied with its respective weight (a scalar). Finally, the re-weighted pin codes are added. Thus, Figure 4 A plurality of dense layers 64, a plurality of multiplication layers 66, a plurality of additional layers 68, pin codes 70, component codes 72, and further pin codes 74 are illustrated.

[0060] According to Figure 3 The component aggregator 56 fuses the codes of the component measurements (enriched by the codes of the pins) of each circuit board, but ignores padding. Here, a number of reasonable choices for the aggregation function can be made: a max function, which applies the maximum to all component codes; an average function, which applies the average to all component codes; an attention module.

[0061] Attention on the component codes can be computed by applying multi-head attention as provided in off-the-shelf libraries like pytorch. In contrast to the pin aggregator 52, in this case, the queries have to be learned as part of the complete architecture.

[0062] Again, if the input is a set of component codes, where each component code is a vector of size h, the component aggregator 56 outputs a single code of size h representing the fused code.

[0063] The classifier 40 is a multi-layer perception (MLP), which ingests the codes of all component and pin measurements of a circuit board and produces a single confidence whether the measurements reflect a pseudo-error of the AOI device. In the illustrated case, the MLP comprises two consecutive fully connected neural network layers (dense layers 58, 60), where the first dense layer 58 uses a ReLU activation function. Of course, other choices can be reasonable as well.

Claims

1. A method for monitoring the production of electronic components (14, 16, 18) via a monitoring system (12), comprising the following steps: - The electronic computing device of the monitoring system (12) receives first data (24) from the automatic optical inspection device (10), wherein the first data (24) describes the components (20) of the electronic components (14, 16, 18). - The electronic computing device receives second data (26) from the automated optical inspection device (10), wherein the second data (26) describes the pin (22) of the component (20) of the electronic components (14, 16, 18). - A neural network (32) is provided by an electronic computing device, wherein the neural network (32) is configured to compute data having a preset first size for first data (24) and a preset second size for second data (26); - Each dimension of the received data is determined by an electronic computing device; - The determined dimensions of the first data (24) and the second data (26) are compared with the preset first and second dimensions for the neural network (32) by an electronic computing device; - Fill the received first data (24) and second data (26) such that the electronic computing device generates a first data vector at a first size and a second data vector at a second size; - A mask (28, 30) is generated by an electronic computing device, wherein the mask (28, 30) describes a first data vector with respect to the first received data (24) and the first padding, and a second data vector with respect to the second received data (26) and the second padding; - Send the first data vector, the second data vector, and the mask (28, 30) to the neural network (32); - The electronic components (14, 16, 18) are analyzed by the neural network (32) based on the first data vector and the second data vector; and - Monitor electronic components (14, 16, 18) based on the analysis.

2. The method according to claim 1, wherein, Electronic components (14, 16, 18) are analyzed, and electronic components (14, 16, 18) are classified as faulty components or non-faulty components.

3. The method according to claim 1 or 2, wherein, The classification of automated optical inspection equipment (10) is based on electronic computing devices.

4. The method according to claim 3, wherein, The electronic computing device only analyzes the electronic components (14, 16, 18) that were classified as incorrect by the automated optical inspection device (10).

5. The method according to any one of claims 1 to 4, wherein, The first data vector is a three-dimensional data vector, and / or the second data vector is a four-dimensional data vector.

6. The method according to any one of claims 1 to 5, wherein, Mask (28, 30) is provided as a Boolean mask array.

7. The method according to any one of claims 1 to 6, wherein, The neural network (32) includes at least a first encoder (34) for a first data vector and a second encoder (36) for a second data vector.

8. The method according to claim 7, wherein, The neural network (32) also includes at least a third encoder (38), in which the first result of the first encoder (34) and the second result of the second encoder (36) are fused.

9. The method according to claim 7 or 8, wherein, The first encoder (34) and the second encoder (36) are provided with the same encoder structure.

10. The method according to any one of claims 1 to 9, wherein, Zero padding is used to fill in the received data.

11. The method according to any one of claims 1 to 10, wherein, The neural network (32) ignores padding during the analysis of the first and second data vectors.

12. The method according to any one of claims 1 to 11, wherein, The neural network (32) includes at least a classifier module (40) for classifying electronic components (14, 16, 18).

13. A computer program product comprising program code components for performing the method according to any one of claims 1 to 12.

14. A computer-readable storage medium comprising at least the computer program product according to claim 13.

15. A monitoring system (12) for monitoring the production of electronic components (14, 16, 18), comprising at least one electronic computing device, wherein the monitoring system (12) is configured to perform the method according to any one of claims 1 to 12.

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