Display device and electronic device having the same

Abstract

The invention relates to a display device and an electronic device having the same. The display device includes: a display panel; and an input sensor including: a charging electrode in the sensing region and configured to generate an induced magnetic field; a first trace in the peripheral region adjacent to the sensing region and electrically connected to the charging electrode; an inorganic layer covering the charging electrode; a first organic layer over the inorganic layer; a sensing electrode in the sensing region over the inorganic layer; and a second organic layer over the first organic layer and overlapping the sensing electrode, in which the first trace includes: a 1-1 line portion under the inorganic layer; a (1-2)-th line portion between the inorganic layer and the first organic layer and electrically connected to the (1-1)-th line portion; and a 1-3-th line portion between the first organic layer and the second organic layer and electrically connected to the 1-2-th line portion.

Description

Technical Field

[0001] This disclosure relates herein to display devices including input sensors and electronic devices including display devices. Background Technology

[0002] Multimedia electronic devices such as televisions, mobile phones, tablet computers, laptop computers, navigation devices, and game consoles include display devices for displaying images. In addition to typical input methods using buttons, keyboards, mice, etc., electronic devices may also include a sensor layer (or input sensor) capable of providing a touch-based input method that allows users to input information or commands appropriately, intuitively, and conveniently. The sensor layer can sense the user's touch or pressure. Meanwhile, the demand for precise touch input using a pen is increasing among users familiar with inputting information using writing instruments or for specific applications (e.g., applications for sketching or drawing). Summary of the Invention

[0003] This disclosure provides a display device capable of sensing input from different types of input devices.

[0004] This disclosure also provides electronic devices including the above-described display device.

[0005] One or more embodiments provide a display device comprising: a display panel; and an input sensor above the display panel, and including: a charging electrode in a sensing region and configured to generate an induced magnetic field; a first trace in a peripheral region adjacent to the sensing region and electrically connected to the charging electrode; an inorganic layer covering the charging electrode; a first organic layer above the inorganic layer; a sensing electrode in the sensing region and above the inorganic layer; and a second organic layer above the first organic layer and overlapping the sensing electrode, wherein the first trace includes: a first-1 line portion below the inorganic layer; a first-2 line portion between the inorganic layer and the first organic layer and electrically connected to the first-1 line portion; and a first-3 line portion between the first organic layer and the second organic layer and electrically connected to the first-2 line portion.

[0006] At least one of the 1-1 line portion, the 1-2 line portion, and the 1-3 line portion may include: a first metal layer; a second metal layer above the first metal layer and thicker than the first metal layer; and a third metal layer above the second metal layer, thinner than the second metal layer, and comprising the same material as the first metal layer.

[0007] In a planar view, the second metal layer can be narrower than the first and third metal layers.

[0008] The sensing electrode may include: a first electrode extending in a first direction and arranged in a second direction intersecting the first direction; and a second electrode extending in the second direction and arranged in the first direction, wherein the charging electrode includes line portions that overlap with the second electrode respectively.

[0009] The charging electrode may further include a connection portion connecting a first end of a line portion, wherein the first trace is provided as a plurality of traces, each of which is connected to a second end of a corresponding line portion within the line portion.

[0010] The input sensor may further include: a second-2 trace connected to a second end of the first electrode; and a second-1 trace connected to a first end of the first electrode, and including: a second-1 line portion below the inorganic layer; a second-2 line portion between the inorganic layer and the first organic layer and electrically connected to the second-1 line portion; and a second-3 line portion between the first organic layer and the second organic layer and electrically connected to the second-2 line portion.

[0011] The 2-1 line portion and the 2-2 line portion can be connected via a first contact hole penetrating the inorganic layer, wherein the 2-2 line portion and the 2-3 line portion are connected via a second contact hole penetrating the first organic layer.

[0012] The first contact hole and the second contact hole do not need to overlap.

[0013] The input sensor may further include: a second-2 trace connected to a second end of the first electrode; and a second-1 trace connected to a first end of the first electrode, and including: a second-1 line portion below the inorganic layer; a second-2 line portion between the inorganic layer and the first organic layer and electrically connected to the second-1 line portion; and a second-3 line portion between the first organic layer and the second organic layer and electrically connected to the second-1 line portion.

[0014] The input sensor may further include a third trace, which is connected to one end of the second electrode.

[0015] The input sensor may further include electrostatic discharge lines, which are located in the peripheral region and are included in the wire portions at different layers and electrically connected to each other.

[0016] The display panel may include a light-emitting area and a non-light-emitting area adjacent to the light-emitting area, wherein an opening corresponding to the light-emitting area is defined in the sensing electrode.

[0017] The display device may further include: a pad electrode electrically connected to an end of a first trace, and includes: a first conductive pattern directly on the end of the first trace; and a second conductive pattern connected to the first conductive pattern via a contact hole penetrating an inorganic layer and a first organic layer, wherein the inorganic layer and the first organic layer are between the first conductive pattern and the second conductive pattern.

[0018] The charging electrode may include: a first line component below the inorganic layer; and a first line component between the inorganic layer and the first organic layer, and electrically connected to the first line component.

[0019] The sensing electrode may include: a first electrode extending in a first direction between a first organic layer and a second organic layer, and arranged in a second direction intersecting the first direction; and a second electrode extending in the second direction, arranged in the first direction, having an integral shape, and having a length smaller than that of the first electrode, wherein the first electrode includes: a sensing portion between the first organic layer and the second organic layer; and a connecting portion between the inorganic layer and the first organic layer, and connecting adjacent sensing portions in the sensing portion.

[0020] One or more embodiments provide a display device comprising: a display panel; and an input sensor above the display panel, and including: a charging electrode in a sensing region and configured to generate an induced magnetic field; an inorganic layer covering the charging electrode; a first organic layer above the inorganic layer; a sensing electrode in the sensing region and above the inorganic layer; a second organic layer above the first organic layer and covering the sensing electrode; and a trace in a peripheral region adjacent to the sensing region, electrically connected to a corresponding electrode of the charging electrode and the sensing electrode, and including: a first-1 line portion below the inorganic layer; a first-2 line portion between the inorganic layer and the first organic layer and electrically connected to the first-1 line portion; and a first-3 line portion between the first organic layer and the second organic layer and electrically connected to the first-2 line portion.

[0021] The first-1 line portion and the first-2 line portion may each include: a first metal layer; a second metal layer above the first metal layer; and a third metal layer above the second metal layer and comprising the same material as the first metal layer, wherein the second metal layer is thicker than the first metal layer and the third metal layer, and wherein, in a plan view, the second metal layer may be narrower than the first metal layer and the third metal layer.

[0022] The sensing electrode may include: a first electrode extending in a first direction and arranged in a second direction intersecting the first direction; and a second electrode extending in the second direction and arranged in the first direction, wherein the charging electrode includes line portions that overlap with the second electrode respectively.

[0023] One or more embodiments provide an electronic device including an input device and a display device. The display device includes: a display panel; and an input sensor above the display panel, and includes: a charging electrode in a sensing region and configured to generate an induced magnetic field for charging the input device; a first trace in a peripheral region adjacent to the sensing region and electrically connected to the charging electrode; an inorganic layer covering the charging electrode; a first organic layer above the inorganic layer; a sensing electrode in the sensing region and above the inorganic layer; and a second organic layer above the first organic layer and covering the sensing electrode. The first trace includes: a first-1 line portion below the inorganic layer; a first-2 line portion between the inorganic layer and the first organic layer and electrically connected to the first-1 line portion; and a first-3 line portion between the first organic layer and the second organic layer and electrically connected to the first-2 line portion.

[0024] The input device may include an RLC resonant circuit configured to be charged by an induced magnetic field. Attached Figure Description

[0025] The accompanying drawings are included to provide a further understanding of this disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the present disclosure and, together with the description, serve to explain various aspects of the disclosure.

[0026] In the attached diagram:

[0027] Figure 1 This is a perspective view of an electronic device according to one or more embodiments of the present disclosure;

[0028] Figure 2 This is a cross-sectional view of an electronic device according to one or more embodiments of the present disclosure;

[0029] Figure 3A It is a diagram used to illustrate the operation of an electronic device according to one or more embodiments of the present disclosure;

[0030] Figure 3B This is a plan view of a display panel according to one or more embodiments of the present disclosure;

[0031] Figure 4 This is a cross-sectional view of a display device according to one or more embodiments of the present disclosure;

[0032] Figure 5 This is a plan view of an input sensor according to one or more embodiments of the present disclosure;

[0033] Figure 6A yes Figure 5 An enlarged plan view of a portion;

[0034] Figure 6B It is along Figure 6AA cross-sectional view taken from line I-I';

[0035] Figure 6C It is a cross-sectional view of a short-circuit fault between the first conductive pattern and the second conductive pattern.

[0036] Figure 6D It is a cross-sectional view of the second and third conductive patterns, in which there is no short-circuit fault;

[0037] Figure 6E and Figure 6F It is along Figure 6A A cross-sectional view taken from line II-II';

[0038] Figure 6G It is along Figure 6A A cross-sectional view taken from line III-III';

[0039] Figure 6H yes Figure 6A An enlarged plan view of a portion;

[0040] Figure 7A yes Figure 5 An enlarged plan view of a portion;

[0041] Figure 7B It is along Figure 7A A cross-sectional view taken from line IV-IV';

[0042] Figure 8A yes Figure 5 An enlarged plan view of a portion;

[0043] Figure 8B It is along Figure 8A A cross-sectional view taken from line IV-IV';

[0044] Figure 9A yes Figure 5 An enlarged plan view of a portion;

[0045] Figure 9B It is along Figure 9A A cross-sectional view taken from line IV-IV';

[0046] Figure 10A yes Figure 5 A partial enlarged plan view; and

[0047] Figure 10B It is along Figure 10A A cross-sectional view taken from line V-V'. Detailed Implementation

[0048] Aspects of some embodiments of this disclosure and their implementation methods can be more readily understood by referring to the detailed description and accompanying drawings of the embodiments. The described embodiments are provided as examples so that this disclosure will be thorough and complete, and will fully convey aspects of this disclosure to those skilled in the art. Accordingly, redundant processes, elements, and techniques that are irrelevant or unrelated to the description of the embodiments, or unnecessary for a person of ordinary skill in the art to fully understand aspects of this disclosure, may be omitted. Unless otherwise stated, the same reference numerals, characters, or combinations thereof denote the same elements throughout the drawings and written description, and therefore their repeated description may be omitted.

[0049] The described embodiments may have various modifications and may be embodied in different forms, and should not be construed as being limited to the embodiments illustrated herein. The terms "may," "can," or "may not" are used in the description of embodiments to correspond to one or more embodiments of this disclosure.

[0050] Those skilled in the art will understand that, when considered in its entirety, various suitable features of the various embodiments of this disclosure may be combined in part or in whole, or combined with one another, and may be technically associated with each other in a variety of suitable ways, and that the various embodiments may be implemented independently of each other or in any suitable combination with one another, unless otherwise stated or implied.

[0051] In the accompanying drawings, the relative dimensions of elements, layers, and regions may be exaggerated for clarity and / or descriptive purposes. In other words, this disclosure is not limited to the dimensions and thicknesses of elements shown in the drawings arbitrarily for ease of description. Additionally, the use of crosshairs and / or shading in the drawings is generally provided to clarify boundaries between adjacent elements. Therefore, unless otherwise specified, the presence or absence of crosshairs or shading does not convey or indicate any preference or requirement for particular materials, material properties, dimensions, scale, commonalities between illustrated elements, and / or any other characteristics, properties, or characteristics of the elements.

[0052] Various embodiments are described herein with reference to cross-sectional diagrams, which are schematic illustrations of the structures of the embodiments and / or intermediates. Therefore, variations in the shape of the diagrams are expected, for example, due to manufacturing techniques and / or tolerances. Furthermore, the specific structural or functional descriptions disclosed herein are merely illustrative for the purpose of describing embodiments according to the concept of this disclosure. Therefore, the embodiments disclosed herein should not be construed as limited to the shapes of the illustrated elements, layers, or regions, but rather include deviations in shape due to, for example, manufacturing processes.

[0053] For example, the injection zone illustrated as rectangular typically has arcuate or curved features at its edges and / or a gradient of injectant concentration, rather than a binary change from the injection zone to the non-injection zone. Similarly, the burial zone formed by injection can result in some injection in the zone between the burial zone and the surface through which the injection occurs.

[0054] For ease of explanation, spatial relative terms such as “below,” “under,” “lower,” “lower side,” “below,” “above,” “above,” “higher,” “upper side,” and “side” (e.g., as in “sidewall”) are used herein to describe the relationship between one element or feature and another element(s) as shown in the accompanying figures. It will be understood that, in addition to the orientations depicted in the figures, the spatial relative terms are intended to cover different orientations of the device in use or operation. For example, if the device in the figures is flipped, an element described as “below,” “under,” or “below” other elements or features will subsequently be oriented “above” other elements or features. Thus, the example terms “below” and “below” can cover both upper and lower orientations. The device may be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and the spatial relative descriptive terms used herein should be interpreted accordingly. Similarly, when a first part is described as being arranged “on” a second part, this indicates that the first part is arranged above or below the second part based on the direction of gravity, and not limited to its upper side.

[0055] Furthermore, the phrase "in a plan view" means when viewing a portion of the object from above, and the phrase "in a schematic cross-sectional view" means when viewing a schematic cross-section taken by vertically cutting the portion of the object from the side. The terms "overlapping" or "overlapping" mean that the first object may be above, below, or to the side of the second object, and vice versa. Additionally, the term "overlapping" can include stacking, facing, extending over, covering, or partially covering, or any other suitable term that will be understood and appreciated by one of ordinary skill in the art. The expression "non-overlapping" can include meanings such as "separated from," "set to one side," or "offset from," and any other suitable equivalent that will be understood and appreciated by one of ordinary skill in the art. The term "facing" can mean that the first object may be directly or indirectly opposite the second object. In the case where a third object is located between the first and second objects, the first and second objects can be understood as indirectly opposite each other, although still facing each other.

[0056] It will be understood that when a component, layer, area, or part (e.g., device, apparatus, circuit, wiring, electrode, terminal, conductive film, etc.) is referred to as "formed on," "on," "connected to," or "(operably, functionally, or communicatively) coupled to" another component, layer, area, or part," it can be directly formed on, directly connected to, or directly coupled to that other component, layer, area, or part, or indirectly formed on, indirectly connected to, or indirectly coupled to that other component, layer, area, or part, such that one or more intervening components, layers, areas, or parts may exist. Furthermore, this can be collectively referred to as direct or indirect connection or coupling, and integral or non-integral connection or coupling. For example, when a layer, area, or component is referred to as "electrically connected" or "electrically coupled" to another layer, area, or component, it may be directly electrically connected or coupled to that other layer, area, or component, or there may be one or more intervening layers, areas, or components. One or more intervening components may include switches, transistors, resistors, inductors, capacitors, and / or diodes, etc. Accordingly, "connection" is not limited to the connections illustrated in the drawings or detailed description, and may also include other types of connections. In describing embodiments, unless explicitly described as a direct connection, the expression "connection" indicates an electrical connection, and "direct connection / direct coupling" or "directly on" means that a component is directly connected or directly coupled to another component or directly on another component, without any intervening components.

[0057] Furthermore, in this specification, when a portion of a layer, film, region, or plate is formed on another portion, the forming direction is not limited to the upward direction, but includes forming the portion on a side surface or in the downward direction. Conversely, when a portion of a layer, film, region, or plate is formed "below" another portion, this includes not only the case where the portion is "directly" "below" the other portion, but also the case where there is another portion between the portion and the other portion. Similarly, other expressions describing the relationship between components, such as "between" and "directly between," or "adjacent to" and "directly adjacent to," can be interpreted in a similar way. It will be understood that when an element or layer is referred to as being "between" two elements or layers, it can be the only element or layer between the two elements or layers, or there can be one or more intervening elements or layers.

[0058] For the purposes of this disclosure, expressions such as “at least one of,” “any one of,” or “one or more of” modify the entire list of elements when placed after the list of elements, but do not modify any individual element in the list. For example, “at least one of X, Y, and Z” and “at least one selected from the group consisting of X, Y, and Z” can be interpreted as any combination of two or more of only X, only Y, only Z, X, Y, and Z, such as, for example, XYZ, XY, YZ, and XZ or any variation thereof. Similarly, the expression “at least one of A and B” can include A, B, or A and B. As used herein, “or” generally means “and / or,” and the term “and / or” includes any and all combinations of one or more of the items in the relevant list. For example, the expression “A and / or B” can include A, B, or A and B. Similarly, expressions such as “at least one of,” “a plurality of,” “one of,” and other prepositional phrases modify the entire list of elements when placed before / after the list of elements, but do not modify any individual element in the list. Unless otherwise specified, when “C to D” is stated, it means above C and below D.

[0059] It will be understood that although the terms “first,” “second,” “third,” etc., may be used herein to describe various elements, components, areas, layers, and / or segments, these elements, components, areas, layers, and / or segments should not be limited by these terms. These terms do not correspond to a particular order, position, or superiority, and are used only to distinguish one element, component, area, layer, or segment from another. Therefore, the first element, component, area, layer, or segment described below may be referred to as the second element, component, area, layer, or segment without departing from the spirit and scope of this disclosure. Describing an element as a “first” element does not require or imply the existence of a second element or other elements. The terms “first,” “second,” etc., may also be used herein to distinguish different categories or sets of elements. For the sake of brevity, the terms “first,” “second,” etc., may respectively mean “first category (or first set),” “second category (or second set),” etc.

[0060] In the example, the x, y, and / or z directions are not limited to directions corresponding to the three axes of a Cartesian coordinate system and can be interpreted broadly. For example, the x, y, and z directions can be perpendicular to each other, or they can represent different directions that are not perpendicular to each other. The same applies to the first, second, and / or third directions.

[0061] The terminology used herein is for the purpose of describing embodiments only and is not intended to limit this disclosure. As used herein, the singular form “a” is also intended to include the plural form, and the plural form is also intended to include the singular form, unless the context clearly indicates otherwise. It will be further understood that, when used in this specification, the terms “comprising,” “having,” and “including” indicate the presence of the stated features, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof.

[0062] As used herein, the terms “substantially,” “approximately,” “approximately,” and similar terms are used as terms of approximation rather than terms of degree and are intended to take into account the inherent deviations in measured or calculated values ​​that would be recognized by one of ordinary skill in the art. For example, “substantially” can include a range of ±5% of the corresponding value. Taking into account the measurement in question and the errors associated with the measurement of a particular quantity (i.e., limitations of the measurement system), “approximately” or “approximately” as used herein includes the stated value and means within an acceptable range of deviation for a particular value as determined by one of ordinary skill in the art. For example, “approximately” can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the stated value. Further, when describing embodiments of this disclosure, the word “may” refers to “one or more embodiments of this disclosure.” Additionally, the expression “identical” can mean “substantially identical.” In other words, the expression “identical” can include a range tolerable by one of ordinary skill in the art. Other expressions may also be expressions from which “substantially” has been omitted.

[0063] Unless otherwise specified, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will be further understood that terms (e.g., those defined in common dictionaries) shall be interpreted as having the same meaning as they have in the context of the relevant technology and / or this specification, and shall not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0064] Figure 1 This is a perspective view of an electronic device ED according to one or more embodiments of the present disclosure. Figure 1 As shown, the electronic device ED can display an image via the display surface IDS. The display surface IDS is parallel to the plane defined by the first direction DR1 and the second direction DR2. The third direction DR3 indicates the normal direction of the display surface IDS, that is, the thickness direction of the electronic device ED.

[0065] The front (or upper) and rear (or lower) surfaces of each of the components or units described below are divided by a third direction DR3. However, the first direction to the third direction DR1, DR2, and DR3 may be merely examples, and one or more embodiments of this disclosure are not limited thereto.

[0066] In one or more embodiments of this disclosure, an electronic device ED including a flat display surface IDS is illustrated, but one or more embodiments of this disclosure are not limited thereto. The electronic device ED may include a curved display surface or a three-dimensional display surface IDS. A three-dimensional display surface IDS may include multiple display areas indicating different orientations and may include, for example, a bent display surface. The electronic device ED may be a foldable electronic device ED capable of being folded. The electronic device ED may be a tablet terminal, but one or more embodiments of this disclosure are not limited thereto.

[0067] like Figure 1 As shown, the display surface IDS includes an image area DA in which an image is displayed and a border area NDA adjacent to the image area DA. The border area NDA is the area in which no image is displayed. Figure 1 The illustration shows an icon image as an example of an image. For example... Figure 1 As shown, the image region DA can have a substantially quadrilateral shape. The term "substantially quadrilateral shape" refers not only to a mathematically quadrilateral shape but also to a quadrilateral shape in which curved boundaries, rather than vertices, are defined in the vertex region (or corner region). The border region NDA can surround the image region DA. However, one or more embodiments of this disclosure are not limited thereto, and the shape of the border region NDA can be varied. For example, the border region NDA can be located only on one side of the image region DA.

[0068] Figure 2 This is a cross-sectional view of an electronic device ED according to one or more embodiments of the present disclosure. Some components of the electronic device ED are from... Figure 2 The text is omitted or not shown in the figure. Figure 2 middle.

[0069] An electronic device ED may include a display device DD and a window WM located on the display device DD (as used herein, "located on" may mean "above"). The display device DD and the window WM may be bonded to each other by an adhesive layer PSA. According to one or more embodiments of this disclosure, the window WM may be formed or provided for contact with the display device DD by using a coating method, and in this case, the adhesive layer PSA may be omitted.

[0070] The display device DD may include a display panel 100, an input sensor 200, and an anti-reflective layer 300. The display panel 100 may include a substrate layer 110, a driving element layer 120, a light-emitting element layer 130, and a thin-film encapsulation layer 140.

[0071] The driving element layer 120 is located on the upper surface of the substrate layer 110. The substrate layer 110 can be a rigid substrate or a flexible substrate that can be bent, folded, rolled, etc. The substrate layer 110 can be a glass substrate, a metal substrate, or a polymer substrate, etc. However, one or more embodiments of this disclosure are not limited thereto, and the substrate layer 110 can be an inorganic layer, an organic layer, or a composite material layer. The substrate layer 110 has substantially the same shape as the display panel 100.

[0072] The substrate 110 may have a multilayer structure. For example, the substrate 110 may include a first synthetic resin layer, a second synthetic resin layer, and an inorganic layer therebetween. The first and second synthetic resin layers may each comprise a polyimide (PI) resin, and one or more embodiments of this disclosure are not particularly limited.

[0073] The driving element layer 120 may be located on the substrate layer 110. The driving element layer 120 may include multiple insulating layers, multiple semiconductor patterns, multiple conductive patterns, and multiple signal lines, etc. The driving element layer 120 may include pixel driving circuitry.

[0074] The light-emitting element layer 130 may be located on the driving element layer 120. The light-emitting element layer 130 may include light-emitting elements. For example, the light-emitting elements may include organic light-emitting materials, inorganic light-emitting materials, organic-inorganic light-emitting materials, quantum dots, quantum rods, micron LEDs, or nano LEDs.

[0075] A thin-film encapsulation layer 140 may be located on the light-emitting element layer 130. The thin-film encapsulation layer 140 can protect the light-emitting element layer 130 (i.e., the light-emitting element) from moisture, oxygen, and foreign matter such as dust particles. The thin-film encapsulation layer 140 may include at least one inorganic encapsulation layer. The thin-film encapsulation layer 140 may include a stacked structure of a first inorganic encapsulation layer / an organic encapsulation layer / a second inorganic encapsulation layer.

[0076] The input sensor 200 can be located directly on the display panel 100. The input sensor 200 can sense external input by, for example, using electromagnetic induction and / or capacitive methods. The input sensor 200 can sense both input from the user's body and input from an input device that generates a magnetic field with a corresponding resonant frequency.

[0077] The input sensor 200 can be formed or provided on the display panel 100 through a continuous process. Here, the term "directly located" can mean that the third element is not located between the input sensor 200 and the display panel 100. For example, a separate adhesive layer may not be located between the input sensor 200 and the display panel 100.

[0078] The antireflective layer 300 reduces the reflectivity of external light incident from above the window WM. The antireflective layer 300 according to one or more embodiments of this disclosure may include a retarder and a polarizer. The retarder may be a film-type retarder or a liquid crystal coating-type retarder, and may include λ / 2 retarders and / or λ / 4 retarders. The polarizer may also be a film-type polarizer or a liquid crystal coating-type polarizer. The film-type may include a stretched synthetic resin film, and the liquid crystal coating-type may include liquid crystals arranged in a corresponding arrangement (e.g., a predetermined arrangement). The retarder and polarizer may further include a protective film. The retarder and polarizer themselves or the protective film may be defined as the base layer of the antireflective layer 300.

[0079] An antireflective layer 300 according to one or more embodiments of the present disclosure may include color filters. The color filters have a corresponding arrangement (e.g., a predetermined arrangement). The arrangement of multiple groups of pixels categorized by color emission can be determined by considering the arrangement of these color filters. The antireflective layer 300 may further include a black matrix adjacent to the color filters. The antireflective layer 300 including the color filters may be located directly on the display panel 100.

[0080] A window WM according to one or more embodiments of the present disclosure may include a substrate layer and a light-shielding pattern. The substrate layer may include a glass substrate and / or a synthetic resin film, etc. The light-shielding pattern partially overlaps with the substrate layer. The light-shielding pattern may be located on the rear surface of the substrate layer and substantially defines the border area NDA of the electronic device ED (see [link to relevant documentation]). Figure 1 The area where the light-shielding pattern is not located can define the image area DA of the electronic device ED (see...). Figure 1 ).

[0081] In one or more embodiments, the electronic device ED further includes a bracket and a base (or housing) coupled to the window WM. Additionally, the electronic device ED may further include a motherboard located below the display device DD and substantially between the display device DD and the base. In the electronic device ED, electronic modules, camera modules, power modules, etc., mounted on the motherboard may also be located within the base.

[0082] Figure 3A This is a diagram illustrating the operation of an electronic device ED according to one or more embodiments of the present disclosure. Figure 3B This is a plan view of a display panel 100 according to one or more embodiments of the present disclosure.

[0083] refer to Figure 3A The electronic device ED may include a display panel 100, an input sensor 200, a first driving circuit (e.g., a driving circuit for the display panel 100) 100C, a second driving circuit 200C, a main driving circuit 1000C, and a power supply circuit 1000P.

[0084] Input sensor 200 can sense a first input 2000 and a second input 3000 that are different from each other. The first input 2000 may come from an input device capable of providing capacitance changes to the sensing electrode SE, and the second input 3000 may come from an input device capable of forming or generating an induced current in the sensing electrode SE. For example, the first input 2000 may come from an input device capable of providing charge. The second input 3000 may be an input from a pen PN or an input from a radio frequency integrated circuit (RFIC) tag. For example, the pen PN may be a passive pen or an active pen.

[0085] In one or more embodiments of this disclosure, the pen PN can be a device that outputs a magnetic field at a corresponding resonant frequency (e.g., a predetermined resonant frequency). The pen PN can be configured to transmit an output signal based on an electromagnetic resonance method. The pen PN can be referred to as an input pen, a magnetic pen, a stylus, or an electromagnetic resonant pen.

[0086] The PN can include an RLC resonant circuit, and the RLC resonant circuit can include an inductor L and a capacitor C. In one or more embodiments of this disclosure, the RLC resonant circuit can be a variable resonant circuit that changes the resonant frequency. In this case, the inductor L can be a variable inductor and / or the capacitor C can be a variable capacitor, but one or more embodiments of this disclosure are not particularly limited thereto. For example, the RLC resonant circuit can include an additional resistor.

[0087] Inductor L generates current due to the magnetic field induced in the charging electrode CRE (hereinafter referred to as the induced magnetic field). However, one or more embodiments of this disclosure are not particularly limited thereto. For example, in the case where the pen PN operates as an active device, the pen PN can generate current even if no magnetic field is provided from the outside. The generated current is transferred to capacitor C. Capacitor C is charged with the current input from inductor L and releases the charged current to inductor L. Thereafter, inductor L can emit a magnetic field at a resonant frequency. The induced current can flow through sensing electrode SE due to the magnetic field emitted by pen PN and can be transmitted as a received signal (or sensing signal) to the second drive circuit 200C.

[0088] The main drive circuit 1000C can control the overall operation of the electronic device ED. For example, the main drive circuit 1000C can control the operation of the drive circuit 100C of the display panel 100 (hereinafter, the first drive circuit) and the drive circuit 200C of the input sensor 200 (e.g., the sensor drive circuit, hereinafter, the second drive circuit). The main drive circuit 1000C may include at least one microprocessor and may further include a graphics controller. The main drive circuit 1000C may be referred to as an application processor, a central processing unit, or a main processor.

[0089] The first driving circuit 100C can drive the display panel 100. The first driving circuit 100C can receive image data and control signals from the main driving circuit 1000C. The control signals can include various signals. For example, the control signals can include input vertical synchronization signals, input horizontal synchronization signals, master clock signals, and data enable signals, etc.

[0090] The second drive circuit 200C can drive the input sensor 200. The second drive circuit 200C can receive control signals from the main drive circuit 1000C. The control signals may include a clock signal of the second drive circuit 200C. In addition, the control signals may further include a mode determination signal that determines the driving mode of the input sensor 200 and the second drive circuit 200C.

[0091] The second driving circuit 200C can be implemented as an integrated circuit (IC) and electrically connected to the input sensor 200. For example, the second driving circuit 200C can be directly mounted in a corresponding area (e.g., a predetermined area) of the display panel 100, or mounted on a separate printed circuit board using a chip-on-film (COF) method and electrically connected to the input sensor 200.

[0092] The second driving circuit 200C can selectively operate the input sensor 200 in either a first mode or a second mode. For example, the first mode could be a mode for sensing touch input, such as a first input 2000. The second mode could be a mode for sensing input from a pen PN, such as a second input 3000. The first mode can be referred to as a touch sensing mode (or mutual capacitance detection mode), and the second mode can be referred to as a pen sensing mode. The second driving circuit 200C can operate the charging electrode CRE in the second mode.

[0093] The switching between the first mode and the second mode can be performed in various ways. For example, the input sensor 200 can be driven in a time-division manner in both the first and second modes, sensing the first input 2000 and the second input 3000. The charging electrode CRE can be deactivated in the first mode and can operate in the second mode during corresponding time periods (e.g., predetermined time periods).

[0094] The second driving circuit 200C can calculate coordinate information about the input based on the signal received from the sensing electrode SE, and can provide the coordinate signal with the coordinate information to the main driving circuit 1000C. The main driving circuit 1000C performs an operation corresponding to the user's input based on the coordinate signal. For example, the main driving circuit 1000C can operate the first driving circuit 100C so that a new application image is displayed on the display panel 100.

[0095] The power supply circuit 1000P may include a power management integrated circuit (PMIC). The power supply circuit 1000P may generate multiple drive voltages for driving the display panel 100, the input sensor 200, the first drive circuit 100C, and the second drive circuit 200C. For example, the multiple drive voltages may include a gate high voltage, a gate low voltage, a first drive voltage (e.g., ELVSS voltage), a second drive voltage (e.g., ELVDD voltage), and an initialization voltage, but are not particularly limited to these examples.

[0096] like Figure 3B As shown, the display panel 100 may include multiple pixels PX, a scan drive circuit SDV, a transmit drive circuit EDV, multiple signal lines, and multiple pad electrodes PD. The multiple pixels PX are located in the display area 100-DA. The driver chip DIC, mounted in the non-display area 100-NDA, may include a data drive circuit. The display area 100-DA can be connected to... Figure 1 The image area DA corresponds to this, and the non-display area 100-NDA can be associated with... Figure 1 The border area NDA corresponds to the border area. In this disclosure, the phrase "corresponding to another area or portion" means that the areas or portions overlap and is not necessarily limited to two different areas or portions having the same shape and the same area. In one or more embodiments of this disclosure, like the scan drive circuit SDV and the transmit drive circuit EDV, the data drive circuit can also be integrated into the display panel 100.

[0097] Multiple signal lines may include multiple scan lines SL1 to SLm, multiple data lines DL1 to DLn, multiple transmit lines EL1 to ELm, a first control line SL-C1 and a second control line SL-C2, and a first power line PL1 and a second power line PL2. m and n are natural numbers equal to or greater than 2.

[0098] Scan lines SL1 to SLm can extend along the first direction DR1 and can be electrically connected to the pixel PX and the scan drive circuit SDV. Data lines DL1 to DLn can extend along the second direction DR2 and can be electrically connected to the pixel PX and the driver chip DIC. Transmit lines EL1 to ELm can extend along the first direction DR1 and can be electrically connected to the pixel PX and the transmit drive circuit EDV.

[0099] A first power line PL1 receives a first power supply voltage, and a second power line PL2 receives a second power supply voltage having a level lower than the first power supply voltage. In one or more embodiments, the second electrode (e.g., a cathode) of the light-emitting element is electrically connected to the second power line PL2.

[0100] The first control line SL-C1 can be electrically connected to the scan drive circuit SDV and can extend towards the lower end of the display panel 100. The second control line SL-C2 can be electrically connected to the transmit drive circuit EDV and can extend towards the lower end of the display panel 100. The pad electrode PD can be located in the non-display area 100-NDA adjacent to the lower end of the display panel 100 and can be closer to the lower end of the display panel 100 than the driver chip DIC. The pad electrode PD can be electrically connected to the driver chip DIC and some signal lines.

[0101] The scan driver circuit SDV generates multiple scan signals, which are applied to pixel PX via scan lines SL1 to SLm. The driver chip DIC generates multiple data voltages, which are applied to pixel PX via data lines DL1 to DLn. The transmit driver circuit EDV generates multiple transmit signals, which are applied to pixel PX via transmit lines EL1 to ELm. Pixel PX can be supplied with data voltages in response to the scan signals. Pixel PX can display an image by emitting light with a brightness corresponding to the data voltages in response to the transmit signals.

[0102] Figure 3B The diagram illustrates a circuit board (FPC) electrically bonded to pad electrodes (PDs) in a detached manner. The FPC may be a flexible circuit board. The FPC may include a first output pad area OP1 bonded to the pad electrodes (PDs). Figure 5 The first output pad area OP1, the second output pad area OP2, the third output pad area OP3, and the input pad area IP are all part of the pad electrode PDE. The circuit board FPC may include an input pad area IP electrically bonded to the main circuit board MB. Multiple pad electrodes PD may be located in each of the first output pad area OP1, the second output pad area OP2, the third output pad area OP3, and the input pad area IP. The first output pad area OP1, the second output pad area OP2, and the third output pad area OP3 may each be connected to the input pad area IP via signal lines.

[0103] The main circuit board (MB) may include output pad areas (OP) corresponding to the input pad areas (IP). Various electronic components, including the main processor and auxiliary processors, can be mounted on the main circuit board (MB).

[0104] Figure 4This is a cross-sectional view of a display device DD according to one or more embodiments of the present disclosure. Figure 2 Anti-reflective layer 300 from Figure 4 The text is omitted or not shown in the figure. Figure 4 middle.

[0105] refer to Figure 4 At least one buffer layer BFL is formed or provided on the upper surface of the substrate layer 110. The buffer layer BFL can improve the adhesion between the substrate layer 110 and the semiconductor patterns SC, AL, DR, and SCL. The buffer layer BFL can be formed of multiple layers. Alternatively, the display panel 100 may further include a barrier layer. The buffer layer BFL may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. For example, the buffer layer BFL may include a structure in which silicon oxide layers and silicon nitride layers are alternately stacked.

[0106] Semiconductor patterns SC, AL, DR, and SCL may be located on the buffer layer BFL (as used herein, "located on" can mean "above"). Semiconductor patterns SC, AL, DR, and SCL may comprise polycrystalline silicon (e.g., low-temperature polycrystalline silicon). However, one or more embodiments of this disclosure are not limited thereto, and semiconductor patterns SC, AL, DR, and SCL may comprise amorphous silicon or oxide semiconductors.

[0107] Figure 4 The diagram illustrates a portion of the semiconductor patterns SC, AL, DR, and SCL, and other semiconductor patterns can be further located in another region. The semiconductor patterns SC, AL, DR, and SCL can be distributed across multiple pixels PX according to corresponding rules (see...). Figure 3B The semiconductor patterns SC, AL, DR, and SCL can have different electrical characteristics depending on whether they are doped. The semiconductor patterns SC, AL, DR, and SCL can include a first region SC, DR, and SCL with high conductivity and a second region AL with low conductivity. The first regions SC, DR, and SCL can be doped with N-type or P-type dopants. A P-type transistor can include a doped region doped with P-type dopants, and an N-type transistor can include a doped region doped with N-type dopants. The second region AL can be an undoped region or a region doped at a lower concentration than the first regions SC, DR, and SCL.

[0108] The first regions SC, DR, and SCL can have higher conductivity than the second region AL and can essentially function as electrodes or signal lines. The second region AL can essentially correspond to the active region AL (or channel) of transistor 100PC. In other words, the second region AL of the semiconductor pattern SC, AL, DR, and SCL can be the active region AL of transistor 100PC, another part of SC and DR can be the source region SC or drain region DR of transistor 100PC, and yet another part of SCL can be a connecting electrode or a connecting signal line SCL.

[0109] Pixel PX (see) Figure 3B Each pixel PX can have an equivalent circuit including multiple transistors, at least one capacitor and at least one light-emitting element, and the equivalent circuit diagram of the pixel PX can be changed in various shapes. Figure 4 The illustration includes pixels PX (see) Figure 3B It contains a light-emitting element LD and a transistor 100PC.

[0110] The source region SC, active region AL, and drain region DR of transistor 100PC can be formed by semiconductor patterns SC, AL, DR, and SCL. In a cross-sectional view, the source region SC and drain region DR can extend from the active region AL in opposite directions. Figure 4 The illustration shows a portion of the connection signal line SCL formed by semiconductor patterns SC, AL, DR, and SCL. In one or more embodiments, in a plan view, the connection signal line SCL may be electrically connected to the drain region DR of transistor 100PC.

[0111] The first insulating layer 10 may be located on the buffer layer BFL. The first insulating layer 10 may be commonly connected to multiple pixels PX (see...). Figure 3B The first insulating layer 10 overlaps and covers the semiconductor patterns SC, AL, DR, and SCL. The first insulating layer 10 can be an inorganic layer and / or an organic layer, and has a single-layer or multi-layer structure. The first insulating layer 10 can include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. The first insulating layer 10 can be a single-layer silicon oxide layer. Not only the first insulating layer 10, but also the insulating layers of the driving element layer 120, which will be described later, can be inorganic layers and / or organic layers, and have a single-layer or multi-layer structure. The inorganic layer can include at least one of the materials described above, but is not limited thereto.

[0112] The gate GT of transistor 100PC is located on the first insulating layer 10. The gate GT may be part of a metal pattern. The gate GT overlaps with the active region AL. The gate GT may act as a mask in the process of doping or reducing semiconductor patterns SC, AL, DR, and SCL.

[0113] The second insulating layer 20 may be located on the first insulating layer 10 and cover the gate GT. The second insulating layer 20 may be commonly connected to multiple pixels PX (see...). Figure 3B The third insulating layer 30 may be located on the second insulating layer 20. The first connecting electrode CNE1 may be located on the third insulating layer 30. The first connecting electrode CNE1 may be connected to the connecting signal line SCL via a contact hole CNT-1 that penetrates the first insulating layer 10, the second insulating layer 20 and the third insulating layer 30.

[0114] A fourth insulating layer 40 may be located on the third insulating layer 30. The fourth insulating layer 40 may cover the first connecting electrode CNE1. A fifth insulating layer 50 may be located on the fourth insulating layer 40. The fifth insulating layer 50 may be an organic layer. A second connecting electrode CNE2 may be located on the fifth insulating layer 50. The second connecting electrode CNE2 may be connected to the first connecting electrode CNE1 via a contact hole CNT-2 penetrating both the fourth and fifth insulating layers 40. A sixth insulating layer 60 may be located on the fifth insulating layer 50 and cover the second connecting electrode CNE2. The sixth insulating layer 60 may be an organic layer.

[0115] The light-emitting element layer 130 may be located on the driving element layer 120. The light-emitting element layer 130 may include a light-emitting element LD. For example, the light-emitting element layer 130 may include organic light-emitting materials, inorganic light-emitting materials, organic-inorganic light-emitting materials, quantum dots, quantum rods, micron LEDs, or nano LEDs. In the following description, the light-emitting element LD will be described as an organic light-emitting element by way of example, but is not particularly limited thereto.

[0116] The light-emitting element (LD) may include a first electrode AE, an emitting layer EL, and a second electrode CE. The first electrode AE ​​may be connected to the second connecting electrode CNE2 via a contact hole CNT-3 that penetrates the sixth insulating layer 60.

[0117] The pixel defining film PDL may be located on the sixth insulating layer 60 and cover a portion of the first electrode AE. An opening PDL-OP is defined in the pixel defining film PDL. The opening PDL-OP of the pixel defining film PDL exposes at least a portion of the first electrode AE.

[0118] Display area 100-DA (see Figure 3B It may include a light-emitting region LA and a non-light-emitting region NLA adjacent to the light-emitting region LA. The non-light-emitting region NLA may surround the light-emitting region LA. The light-emitting region LA is defined correspondingly to the portion of the first electrode AE ​​exposed by the open PDL-OP.

[0119] The emitter layer EL can be located on the first electrode AE. The emitter layer EL can be located in the region corresponding to the opening PDL-OP. Figure 4The illustration shows an emitter layer EL located within an opening PDL-OP as an example, but one or more embodiments of this disclosure are not particularly limited thereto. For example, the emitter layer EL may extend to cover a portion of the upper surface of the pixel defining film PDL and the side surface of the defining opening PDL-OP of the pixel defining film PDL.

[0120] In one or more embodiments of this disclosure, pixel PX (see...) Figure 3B Each of the pixels PXs may have an emission layer EL formed or provided separately. In the case where an emission layer EL is formed or provided separately in each of the pixels PXs, each of the emission layer ELs may emit light having at least one color selected from blue, red, and green. However, one or more embodiments of this disclosure are not limited thereto, and the emission layer EL may have a monolithic shape and may be commonly included in multiple pixels PXs. In this case, the emission layer EL may provide blue light or white light.

[0121] The second electrode CE can be located on the emitter layer EL. The second electrode CE can have a monolithic shape and can be commonly included in multiple pixels PX (see [link to PX]). Figure 3B )middle.

[0122] In one or more embodiments of this disclosure, a hole control layer may be located between the first electrode AE ​​and the emitter layer EL. The hole control layer may be commonly located in the light-emitting region LA and the non-light-emitting region NLA. The hole control layer may include a hole transport layer and may further include a hole injection layer. An electron control layer may be located between the emitter layer EL and the second electrode CE. The electron control layer may include an electron transport layer and may further include an electron injection layer. The hole control layer and the electron control layer may be commonly formed or provided in multiple pixels PX using an open mask or inkjet process.

[0123] The thin-film encapsulation layer 140 may be located on the light-emitting element layer 130. The thin-film encapsulation layer 140 may include a first inorganic encapsulation layer 141, an organic encapsulation layer 142 and a second inorganic encapsulation layer 143 stacked in sequence, but the layers constituting the thin-film encapsulation layer 140 are not limited to these.

[0124] The input sensor 200 may include three conductive layers and four insulating layers. The input sensor 200 may include a substrate insulating layer 210, a first conductive layer 220, an inorganic insulating layer 230 (hereinafter, the inorganic layer), a second conductive layer 240, a first organic insulating layer 250 (hereinafter, the first organic layer), a third conductive layer 260, and a second organic insulating layer 270 (hereinafter, the second organic layer). In one or more embodiments of this disclosure, the substrate insulating layer 210 may be omitted.

[0125] Figure 4The diagram schematically illustrates the line component LE of the first conductive layer 220, the line component LE of the second conductive layer 240, and the line component LE of the third conductive layer 260. The line component LE of the third conductive layer 260 may define an opening region EOP corresponding to the light-emitting region LA.

[0126] The first conductive layer 220, the second conductive layer 240, and the third conductive layer 260 may each have a single-layer structure or a multilayer structure in which multiple layers are stacked along a third direction DR3. The first conductive layer 220 and the second conductive layer 240 may include wire components LE of electrodes defining a grid shape.

[0127] The first conductive layer 220, the second conductive layer 240, and the third conductive layer 260, which have a multilayer structure, may each include stacked metal layers. The first conductive layer 220, the second conductive layer 240, and the third conductive layer 260 may each include a titanium layer, an aluminum layer on the titanium layer, and a titanium layer on the aluminum layer.

[0128] The first conductive layer 220, the second conductive layer 240, and the third conductive layer 260 can each be formed or provided by a photolithography process. Vias or contact holes can be formed or defined in the inorganic layer 230, which will be described later, by a photolithography process, and the line components LE of the first conductive layer 220 and the second conductive layer 240 can be connected via these vias. Vias can be formed or defined in the first organic layer 250, which will be described later, by an exposure and development process, and the line components LE of the second conductive layer 240 and the third conductive layer 260 can be connected via these vias.

[0129] The substrate insulating layer 210 can be directly located on the thin-film encapsulation layer 140. The substrate insulating layer 210 may include an organic layer or an inorganic layer. The substrate insulating layer 210 may include at least one of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer. The substrate insulating layer 210 may have approximately up to approximately The thickness can be formed or provided through a deposition process.

[0130] The inorganic layer 230 may cover the first conductive layer 220. The inorganic layer 230 may include at least one of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer. The inorganic layer 230 may have approximately up to approximately The thickness can be formed or provided through a deposition process.

[0131] The first organic layer 250 may cover the second conductive layer 240, and the second organic layer 270 may cover the third conductive layer 260. The first organic layer 250 and the second organic layer 270 may comprise at least one of acrylic resins (e.g., methacrylic acid resins), polyisoprene resins, vinyl resins, epoxy resins, urethane resins, cellulose resins, siloxane resins, polyimide resins, polyamide resins, and perylene resins. The first organic layer 250 and the second organic layer 270 may each have approximately up to approximately The thickness can be formed or provided by a deposition process. The first organic layer 250 and the second organic layer 270 may each have different thicknesses in the regions overlapping with and not overlapping with the line component LE. The first organic layer 250 and the second organic layer 270 may each have approximately [thickness missing] in the regions overlapping with the line component LE. up to approximately The thickness, and has approximately [a certain thickness] in the area that does not overlap with the line component LE. up to approximately The thickness.

[0132] Figure 5 This is a plan view of an input sensor 200 according to one or more embodiments of the present disclosure.

[0133] like Figure 5 As shown, the input sensor 200 includes a sensing area 200-DA and a peripheral area 200-NDA adjacent to the sensing area 200-DA. The sensing area 200-DA and the peripheral area 200-NDA are respectively adjacent to... Figure 3B The display area 100-DA in the diagram corresponds to the non-display area 100-NDA.

[0134] The input sensor 200 may include a charging electrode CRE, a sensing electrode SE, and a trace SL electrically connected to the charging electrode CRE and the sensing electrode SE. The sensing electrode SE may include first sensing electrodes E1-1 to E1-4 (hereinafter, the first electrode) and second sensing electrodes E2-1 to E2-8 (hereinafter, the second electrode), and the trace SL may include a first trace SL1, a second trace SL2, and a third trace SL3. A pad electrode PDE may be electrically connected to the end of the trace SL.

[0135] The charging electrode CRE overlaps at least with the sensing region 200-DA. The charging electrode CRE includes a plurality of line portions LP arranged along a first direction DR1 and each extending along a second direction DR2. The charging electrode CRE may further include a connection portion CP electrically connecting the plurality of line portions LP. Eight line portions LP and a connection portion CP electrically connecting all eight line portions LP are illustrated, but one or more embodiments of this disclosure are not limited thereto. The connection portion CP is illustrated overlapping with the peripheral region 200-NDA, but one or more embodiments of this disclosure are not limited thereto.

[0136] Each electrical connection in the first trace SL1 is to the corresponding line portion LP in the line portion LP. The line portion LP is located in the second direction DR2 between the first trace SL1 and the connection portion CP.

[0137] like Figure 5 As shown, a first trace SL1 can be electrically connected to two adjacent line portions LP. The two line portions LP form or provide a channel. Figure 5 The diagram illustrates the eight-line portion LP that defines four channels.

[0138] The leftmost of the four channels can be defined as the first channel. The remaining three channels, moving to the right from the first channel, can be defined as the second, third, and fourth channels, respectively.

[0139] The charging electrode CRE can operate during the charging drive period in the second mode. In the charging drive mode, the second drive circuit 200C (see...) Figure 3A A first drive signal can be applied to any one of the first, second, third, and fourth channels, and a second drive signal can be applied to another channel. The first drive signal can be applied to the first channel, and the second drive signal can be applied to the second channel. The first drive signal can be applied in a scanning manner from the first channel to the third channel. The second drive signal can be the inverted signal of the first drive signal. For example, the first drive signal can be a sinusoidal signal. In one or more embodiments of this disclosure, if the first drive signal is a square wave signal, the second drive signal can have a constant voltage (e.g., a predetermined constant voltage). A channel not to which a signal is applied can be located between the channel to which the first drive signal is applied and the channel to which the second drive signal is applied.

[0140] The current path is formed by applying a first drive signal and a second drive signal to two of the first, second, third, and fourth channels, respectively. A channel formed in this way can be defined as a charging channel. This current path can be in the form of a coil, and the PN (see...) Figure 3AThe RLC resonant circuit can be charged by the induced magnetic field formed by the current path.

[0141] The first electrodes E1-1 to E1-4 and the second electrodes E2-1 to E2-8, which are insulated from each other and intersect each other, overlap with the sensing area 200-DA. A second trace SL2 electrically connected to the first electrodes E1-1 to E1-4 and a third trace SL3 electrically connected to the second electrodes E2-1 to E2-8 are located in the peripheral area 200-DA. The second trace SL2 may include a 2-1 trace SL2-1 electrically connected to the first end of the first sensing electrodes E1-1 to E1-4 and a 2-2 trace SL2-2 electrically connected to the second end of the first sensing electrodes E1-1 to E1-4. The first ends of the second electrodes E2-1 to E2-8 are electrically connected to the third trace SL3, and the second ends of the second electrodes E2-1 to E2-8 are not electrically connected to the trace SL3. The third trace SL3 is located on the side opposite to the connecting portion CP, and the sensing area 200-DA is located between the third trace SL3 and the connecting portion CP.

[0142] The first electrodes E1-1 to E1-4 may each include a sensing pattern SP1 (or a first sensing portion) and a bridging pattern CP1 (or a connection pattern). Two adjacent sensing patterns SP1 may be electrically connected by two bridging patterns CP1, but the number of bridging patterns CP1 is not limited.

[0143] The second electrodes E2-1 to E2-8 may each include a sensing portion SP2 (or a second sensing portion) and an intermediate portion CP2. The sensing portion SP2 may have an area larger than the intermediate portion CP2 and may have an approximately rhomboid shape. Each of the intermediate portions CP2 is located between two adjacent sensing portions SP2. The length of the intermediate portion CP2 may be relatively small, and the intermediate portion CP2 may be omitted. In this case, the sensing portion SP2 may extend directly from the adjacent sensing portion SP2.

[0144] The second electrodes E2-1 to E2-8 can each have an integral shape. That is, the sensing portion SP2 and the intermediate portion CP2 forming a second electrode are located on the same layer and are formed or provided by the same etching process. In addition, the second electrodes E2-1 to E2-8 correspond to the line portions LP in a one-to-one manner. Each line portion LP overlaps with the corresponding second electrode among the second electrodes E2-1 to E2-8.

[0145] According to one or more embodiments of this disclosure, reference is made to Figure 3A The first mode described can be a mutual capacitance detection mode. In the mutual capacitance detection mode, touch input is sensed by driving the first electrodes E1-1 to E1-4 and the second electrodes E2-1 to E2-8.

[0146] Second drive circuit 200C (see...) Figure 3A The transmission signal (or drive signal) can be sequentially provided to the second electrodes E2-1 to E2-8, and the detection based on the first input 2000 (see...) can be achieved by using the received signal (or sensing signal) detected by the first electrodes E1-1 to E1-4. Figure 3A The coordinates of the input coordinates. For example, the second drive circuit 200C can sense the change in mutual capacitance between the capacitively coupled first electrodes E1-1 to E1-4 and the second electrodes E2-1 to E2-8, and calculate the input coordinates.

[0147] The charging electrode CRE, the first electrode E1-1 to E1-4, and the second electrode E2-1 to E2-8 can operate during the pen sensing drive period in the second mode.

[0148] The pen PN is charged during the charging drive period in the second mode (see...). Figure 3A The RLC resonant circuit can emit a magnetic field at its resonant frequency while releasing the charged charge. Due to the magnetic field supplied from the pen PN, an induced current can be generated in the first electrodes E1-1 to E1-4. Traces SL2-1 and SL2-2, electrically connected to the two ends of each of the first electrodes E1-1 to E1-4, can form or provide current paths with the first electrodes E1-1 to E1-4. The value of the induced current in the first electrodes E1-1 to E1-4 is measured, and the value is calculated with respect to the second input 3000 (see...). Figure 3A Coordinate information in the second direction DR2.

[0149] Simultaneously, induced current can be generated in the second electrodes E2-1 to E2-8, and induced current can also be generated in the line portion LP overlapping with the second electrodes E2-1 to E2-8. A coupling capacitor is formed or generated between each of the second electrodes E2-1 to E2-8 and the corresponding line portion LP, and the induced current formed or generated in the line portion LP can be transmitted to the corresponding second electrode through the coupling capacitor. Second drive circuit 200C (see...) Figure 3A )Measure the values ​​of the induced current from the second electrodes E2-1 to E2-8, and calculate the values ​​with respect to the second input 3000 (see Figure 3A Coordinate information in the first direction DR1.

[0150] refer to Figure 5 Electrostatic discharge (ESD) lines can be located in the peripheral area 200-NDA.

[0151] Figure 6A yes Figure 5 A magnified plan view of a portion of the image. Figure 6B It is along Figure 6AThe cross-sectional view taken from line I-I'. Figure 6C This is a cross-sectional view illustrating a short-circuit fault between the first conductive pattern and the second conductive pattern. Figure 6D It is a cross-sectional view of the second and third conductive patterns, which do not have short-circuit faults. Figure 6E and Figure 6F It is along Figure 6A The cross-sectional view taken from line II-II'. Figure 6G It is along Figure 6A The cross-sectional view taken from line III-III'. Figure 6H yes Figure 6A A partial enlarged plan view. Referencing below. Figures 6A to 6H A more detailed description Figure 5 Input sensor 200.

[0152] Figure 6A The figure shows an enlarged plan view of one of the multiple unit regions UA defined by the first electrodes E1-1 to E1-4 and the second electrodes E2-1 to E2-8. (Reference) Figure 6A The first electrodes E1-1 to E1-4 and the second electrodes E2-1 to E2-8 may each have a mesh shape in which a plurality of opening regions are defined. The first electrodes E1-1 to E1-4 and the second electrodes E2-1 to E2-8 each include a line component defining a plurality of opening regions. The plurality of opening regions may each be associated with, for example... Figure 4 The luminescent regions LA overlap (or correspond to each other).

[0153] Two spaced-apart sensing patterns SP1 and a bridging pattern CP1 electrically connecting the two sensing patterns SP1 are located in the cell region UA ​​of one of the first electrodes E1-1 to E1-4. Two spaced-apart sensing portions SP2 and an intermediate portion CP2 located between the two sensing portions SP2 are located in the cell region UA ​​of one of the second electrodes E2-1 to E2-8. A portion of the line portion LP is located in the cell region UA ​​to overlap with the two sensing portions SP2.

[0154] exist Figure 6A In the diagram, the line portion LP is shown as a single thick line to distinguish it from the sensing pattern SP1, the bridging pattern CP1, the sensing portion SP2, and the intermediate portion CP2, but one or more embodiments of this disclosure are not limited thereto. The line portion LP may also have a grid shape in which multiple opening regions are defined. The line portion LP may include line members defining multiple opening regions and may be configured to overlap with line members located thereon.

[0155] Figure 6BThe diagram illustrates three line components LE of a line portion LP located on a substrate insulating layer 210. An inorganic layer 230 covers the line portion LP. In the plan view, a bridging pattern CP1 intersects the line components LE of the line portion LP on the inorganic layer 230. A first organic layer 250 covers the bridging pattern CP1. A sensing pattern SP1, connected to the bridging pattern CP1 via a contact hole 250-C penetrating the first organic layer 250, is located on the first organic layer 250. A middle portion CP2 is located between spaced-out areas of the sensing pattern SP1. A second organic layer 270 covers the sensing pattern SP1 and the middle portion CP2.

[0156] When a display device, such as a tablet terminal, with a larger area than a mobile terminal is used, the lengths of the first electrodes E1-1 to E1-4 and the second electrodes E2-1 to E2-8 increase, and the load on the electrodes increases. This increased load leads to problems such as RC delay.

[0157] The thickness of the first electrodes E1-1 to E1-4 and the second electrodes E2-1 to E2-8 can be increased to reduce or prevent such problems. When the thickness of the first electrodes E1-1 to E1-4 and the second electrodes E2-1 to E2-8 is increased, steps may form between the first electrodes E1-1 to E1-4 and the second electrodes E2-1 to E2-8. A first organic layer 250 and a second organic layer 270 are provided to reduce or prevent the possibility of steps forming between the first electrodes E1-1 to E1-4 and the second electrodes E2-1 to E2-8.

[0158] The reason for using an inorganic layer 230 instead of an organic layer is as follows. In the case where an organic layer replaces the inorganic layer 230, a first organic layer 250 and a second organic layer 270 are located on top of the organic layer. The process of forming or providing the first organic layer 250 and the second organic layer 270 is performed via a wet process. If two wet processes are performed after the formation of the organic layer, defects such as deformation of the organic layer may occur. The inorganic layer 230 is used to solve this problem.

[0159] Figure 6C The diagram illustrates a short-circuit fault between a first conductive pattern CDP1 and a second conductive pattern CDP2, with an inorganic layer IOL between them. The first conductive pattern CDP1 and the second conductive pattern CDP2 may each include a first metal layer CL1, a second metal layer CL2 located on the first metal layer CL1, and a third metal layer CL3 located on the second metal layer CL2 and comprising the same material as the first metal layer CL1. The second metal layer CL2 may be thicker than the first metal layer CL1 and the third metal layer CL3. The second metal layer CL2 may have a higher conductivity than the first metal layer CL1 and the third metal layer CL3.

[0160] The first metal layer CL1 can be a titanium layer, and has approximately up to approximately The thickness of the second metal layer CL2 is approximately [missing information]. up to approximately The thickness of the third metal layer CL3 is approximately [thickness value missing]. The third metal layer CL3 can be a titanium layer and has approximately [thickness value missing]. up to approximately The thickness.

[0161] Figure 6C The three-layer stacked structure of the first conductive pattern CDP1 and the second conductive pattern CDP2 shown in the figure can be applied in the same way. Figure 4 The diagram shows a first conductive layer 220, a second conductive layer 240, and a third conductive layer 260. That is to say, Figure 5 The line component LE of each of the charging electrode CRE, sensing electrode SE, and trace SL illustrated in the figure may include a conductive pattern having the same structure as the three-layer stacked structure of the first conductive pattern CDP1 and the second conductive pattern CDP2.

[0162] Figure 6C Inorganic layer IOL can be with Figure 4 Corresponding to the inorganic layer 230, Figure 6C The first conductive pattern CDP1 can be with Figure 4 The first conductive layer 220 corresponds to the line component LE, and the second conductive pattern CDP2 can be associated with... Figure 4 The second conductive layer 240 corresponds to the line component LE.

[0163] For reference Figure 6B As described, the thickness of the second metal layer CL2 can be increased to reduce the resistance of the first conductive pattern CDP1 and the second conductive pattern CDP2. The three-layer stacked structure is patterned using the same etching process, and because the etching rate varies depending on the metal material, thus... Figure 6C As shown in the plan view and cross-sectional view, the second metal layer CL2 is disposed inwardly than the first metal layer CL1 and the third metal layer CL3. As a result, the third metal layer CL3 can form a pointed structure relative to the second metal layer CL2. In the plan view, the second metal layer CL2 can be narrower than the first metal layer CL1 and the third metal layer CL3.

[0164] In this case, cracks CR may appear in the inorganic layer IOL due to the pointed structure. These cracks CR may be a seam phenomenon. Such cracks CR may cause a short circuit between the first conductive pattern CDP1 and the second conductive pattern CDP2.

[0165] According to this disclosure, as referenced Figure 6BAs described, the first organic layer 250 can suppress short-circuit faults between the bridging pattern CP1 and the intermediate portion CP2. Due to the characteristics of the manufacturing process of the first organic layer 250, which uses a wet process to form the organic material, seam phenomena do not appear in the first organic layer 250. This can... Figure 6D The relationship between the second conductive pattern CDP2 and the third conductive pattern CDP3 illustrated in the diagram is confirmed. Figure 6D In the diagram, the first organic layer 250 is shown as organic layer OL.

[0166] refer to Figure 6E The line component LE of the sensing portion SP2 or sensing pattern SP1 is located in most of the unit area UA, except for the area where bridging pattern CP1 and intermediate portion CP2 intersect each other. The line component LE of the line portion LP that overlaps with the line component LE of the sensing portion SP2 or sensing pattern SP1 is located in the partial area.

[0167] refer to Figure 6F According to one or more embodiments of this disclosure, the line portion LP may include a first-1 line member LE1-1 located on a substrate insulating layer 210 and a first-2 line member LE1-2 located on an inorganic layer 230. The corresponding first-1 line member LE1-1 and the corresponding first-2 line member LE1-2 may be connected via corresponding contact holes 230-C penetrating the inorganic layer 230. Even with reference to Figure 6C The short circuit fault described is also not a problem because the 1-1 line component LE1-1 and the 1-2 line component LE1-2 receive the same signal.

[0168] Figure 6G It is along Figure 6A The cross-sectional view taken from line III-III'. Figure 6G The illustration includes Figure 4 The diagram shows sensing patterns SP1 for the line components LE of the first conductive layer 220, the second conductive layer 240, and the third conductive layer 260. The corresponding line components LE of the first conductive layer 220 and the second conductive layer 240 can be connected via corresponding contact holes 230-C penetrating the inorganic layer 230, and the corresponding line components LE of the second conductive layer 240 and the third conductive layer 260 can be connected via contact holes 250-C penetrating the first organic layer 250. In one or more embodiments of this disclosure, at least one of the line components LE of the first conductive layer 220 and the second conductive layer 240 may be omitted.

[0169] The sensing part SP2 may also include Figure 4The diagram shows the line component LE of the first conductive layer 220, the line component LE of the second conductive layer 240, and the line component LE of the third conductive layer 260, but is not limited thereto. In one or more embodiments of this disclosure, at least one of the line component LE of the first conductive layer 220 and the line component LE of the second conductive layer 240 of the sensing portion SP2 may be omitted.

[0170] Figure 6H The diagram illustrates the grid shapes of the sensing pattern SP1 and the sensing portion SP2.

[0171] according to Figure 3B The pixel PX in the diagram is shown in the image. Figure 4 The luminous regions LA shown in the diagram can have different areas and shapes. The first luminous region LA1, the second luminous region LA2, and the third luminous region LA3, with different areas, can be located according to corresponding rules. Figure 3B The diagram shows display area 100-DA.

[0172] The line component LE can define a first opening region EOP1, a second opening region EOP2, and a third opening region EOP3, respectively, corresponding to the first light-emitting region LA1, the second light-emitting region LA2, and the third light-emitting region LA3. Each of the first opening region EOP1, the second opening region EOP2, and the third opening region EOP3 has an area larger than the area of ​​its corresponding light-emitting region LA1, LA2, or LA3. The first opening region EOP1 can have the smallest area, and the third opening region EOP3 can have the largest area. The third opening region EOP3 can substantially correspond to two adjacent third light-emitting regions LA3 in the second direction DR2.

[0173] A line component LE may include a first line component LE1 extending in a first direction DR1 and a second line component LE2 extending in a second direction DR2. The illustration shows a first line component LE1 and a second line component LE2 having a constant line width, but this disclosure is not limited thereto. A first opening region EOP1, a second opening region EOP2, and a third opening region EOP3 may each be defined by two first line components LE1 and two second line components LE2.

[0174] Figure 7A yes Figure 5 A magnified plan view of a portion of the image. Figure 7B It is along Figure 7A The cross-sectional view taken from line IV-IV'. Figure 8A yes Figure 5 A magnified plan view of a portion of the image. Figure 8B It is along Figure 8A The cross-sectional view taken from line IV-IV'. Figure 9A yes Figure 5 A magnified plan view of a portion of the image. Figure 9B It is along Figure 9A The cross-sectional view taken from line IV-IV'.

[0175] Figures 7A to 9B Can be illustrated Figure 5 Part of the trace SL shown in the diagram. Figures 7A to 9B The connection area shown in the diagram can be set to multiple in the trace SL. In other words, the first trace SL1, the second trace SL2, and the third trace SL3 can each include multiple Figures 7A to 9B The connecting area is shown in the diagram. In the following text, in... Figures 7A to 9B In the diagram, the trace SL will be described as the first trace SL1.

[0176] refer to Figure 7A and Figure 7B The first trace SL1 may include a first-1 line portion SL1-1 located below the inorganic layer 230, a first-2 line portion SL1-2 located between the inorganic layer 230 and the first organic layer 250 and electrically connected to the first-1 line portion SL1-1, and a first-3 line portion SL1-3 located between the first organic layer 250 and the second organic layer 270 and electrically connected to the first-2 line portion SL1-2. The first-1 line portion SL1-1, the first-2 line portion SL1-2, and the first-3 line portion SL1-3 may each be as follows: Figure 6C The diagram shows a first metal layer CL1, a second metal layer CL2, and a third metal layer CL3. Figure 7A The illustration shows that line portions 1-1 to 1-3, SL1-1, SL1-2 and SL1-3 (e.g., in a plan view), have different line widths to distinguish them from each other, but one or more embodiments of this disclosure are not limited thereto.

[0177] Line portion SL1-1 (first-first line) and line portion SL1-2 (first-second line) are connected via contact holes 230-C penetrating the inorganic layer 230. Line portion SL1-2 (first-second line) and line portion SL1-3 (first-third line) are connected via contact holes 250-C penetrating the first organic layer 250. In the plan view, the contact holes 250-C penetrating the first organic layer 250 may overlap with the contact holes 230-C penetrating the inorganic layer 230.

[0178] The three line portions SL1-1, SL1-2, and SL1-3 can be electrically connected to each other, and the resistance of the first trace SL1 can be reduced. Because the resistance of the first trace SL1 is reduced, the resistance of the charging channel defined by the first trace SL1 and line portion LP is also reduced. Because the resistance of the charging channel is reduced, a high-intensity induced magnetic field can be generated.

[0179] In one or more embodiments, the second trace SL2 may include a second-1 line portion, a second-2 line portion, and a second-3 line portion, respectively corresponding to the first-1 line portion SL1-1, the first-2 line portion SL1-2, and the first-3 line portion SL1-3. Additionally, refer to... Figure 5 The description of electrostatic discharge (ESD) lines may also include Figure 7A and Figure 7B At least two line portions from line portion 1-1 (SL1-1) to line portion 1-3 (SL1-3) shown in the diagram.

[0180] Figure 8A and Figure 8B The arrangement of the contact holes 250-C penetrating the first organic layer 250 and the contact holes 230-C penetrating the inorganic layer 230 of the first trace SL1 shown in the figure differs from that in the reference diagram. Figure 7A and Figure 7B The arrangement of the contact holes 250-C penetrating the first organic layer 250 and the contact holes 230-C penetrating the inorganic layer 230 of the first trace SL1 is described. (Reference) Figure 8A and Figure 8B The contact hole 250-C penetrating the first organic layer 250 may not overlap with the contact hole 230-C penetrating the inorganic layer 230 (e.g., may be separated from the contact hole 230-C in a plan view), and may be configured to be spaced apart from the contact hole 230-C in a plan view.

[0181] Figure 9A and Figure 9B The first trace SL1 illustrated in the figure may include a plurality of first- and second-line portions SL1-2 that are spaced apart in the plan view. Figure 9A The diagram shows the upper first and second line portions SL1-21 and the lower first and second line portions SL1-22. An opening region 230-OP of the inorganic layer 230 can be defined in the gap between the upper first and second line portions SL1-21 and the lower first and second line portions SL1-22.

[0182] The upper first-second line portion SL1-21 and the lower first-second line portion SL1-22 can each be connected to the first-first line portion SL1-1 via a contact hole 230-C penetrating the inorganic layer 230.

[0183] Line portion SL1-3 (1-3) can be connected to line portion SL1-1 (1-1) via contact hole 250-C penetrating the first organic layer 250. Contact hole 250-C penetrating the first organic layer 250 can be located in opening region 230-OP of inorganic layer 230.

[0184] Figure 10A yes Figure 5A magnified plan view of a portion of the image. Figure 10B It is along Figure 10A A cross-sectional view taken from line V-V'.

[0185] Figure 10A and Figure 10B Illustration Figure 5 An enlarged view of the pad electrode PDE. The pad electrode PDE can be electrically connected to the end SL-E of the corresponding trace SL.

[0186] The end SL-E of the trace SL can be connected to Figure 4 The first connection electrode CNE1 is located in the same layer. It can be connected via... Figure 4 The first connecting electrode CNE1 is formed or provided by the same process as the end of the trace SL-E.

[0187] like Figures 7A to 9B As shown, Figure 5 The trace SL shown in the diagram is mostly composed of the first line portion to the third line portion SL1-1, SL1-2, and SL1-3. The first line portion to the third line portion SL1-1, SL1-2, and SL1-3 are respectively composed of... Figure 4 A first conductive layer 220, a second conductive layer 240, and a third conductive layer 260 are formed.

[0188] In the region adjacent to the pad electrode PDE, the trace SL can be changed from the first line portion to the third line portion SL1-1, SL1-2, and SL1-3. Figure 10A and Figure 10B The end SL-E is shown in the diagram. That is, the trace SL may include a portion consisting of the first line portion to the third line portion SL1-1, SL1-2 and SL1-3 and the end SL-E connected to that portion.

[0189] By using Figure 4 The dummy electrode DME, formed or provided by the same process as the gate GT, can be located below the end SL-E. The dummy electrode DME can be omitted or connected to the end SL-E.

[0190] The pad electrode PDE may include a first conductive pattern PDE1 and a second conductive pattern PDE2. The first conductive pattern PDE1 is located directly on the end SL-E of the trace SL. The second conductive pattern PDE2 may be connected to the first conductive pattern PDE1 via a contact hole CH that penetrates the inorganic layer 230 and the first organic layer 250.

[0191] The sixth insulating layer 60 may be located between the first conductive pattern PDE1 and the second conductive pattern PDE2. An opening region 60-OP corresponding to the contact hole CH may be defined in the sixth insulating layer 60. The inorganic layer 230, the first organic layer 250, and the contact hole CH are located in the opening region 60-OP.

[0192] In one or more embodiments of this disclosure, the substrate insulating layer 210 may be further located between the first conductive pattern PDE1 and the second conductive pattern PDE2, and the contact hole CH may further penetrate the substrate insulating layer 210. Additionally, an additional insulating layer may be further located between the sixth insulating layer 60 and the third insulating layer 30.

[0193] refer to Figure 3B The described pad electrode PD can also have Figure 10A and Figure 10B The structure of the cross-section shown in the diagram. Figure 3B The signal lines connecting the pad electrodes PD and the driver chip DIC can be connected to Figure 10B The ends SL-E of the trace SL are located in the same layer. The pad electrode PD may also include... Figure 10B The first conductive pattern PDE1 and the second conductive pattern PDE2. In this case, the display panel 100 (see...) Figure 3B The pad electrodes PD and input sensor 200 (see) Figure 5 The pad electrodes PDE of the circuit board can be connected to the same circuit board FPC (see [link]). Figure 3B Because the pad electrode PD and the pad electrode PDE have similar structures, the pad electrode PD and the pad electrode PDE can be bonded to the circuit board FPC without defects (see...). Figure 3B ).

[0194] Based on the above description, it is possible to sense not only input from the user's body but also input from a pen. Input from the user's body can be sensed using a capacitive method, while input from a passive pen can be sensed using an electromagnetic induction method.

[0195] Because the charging electrodes and the input sensor are located on different layers / locations, the design freedom of the charging electrodes is increased. Since it is possible to form or provide a high-intensity induced magnetic field, the charging efficiency of the charging electrodes can be improved by applying signal lines with a multi-layered structure.

[0196] Although embodiments of this disclosure have been described with reference to them, it should be understood that this disclosure is not limited to these embodiments, and those skilled in the art can make various changes and modifications within the spirit and scope of the claimed disclosure.

[0197] Therefore, the technical scope of this disclosure is not limited to what is described in the detailed description of the specification, but should be determined by the claims.

Claims

1. A display device, comprising: Display panel; as well as An input sensor is located above the display panel and includes: The charging electrode is located in the sensing area and is configured to generate an induced magnetic field; The first trace is located in the peripheral region adjacent to the sensing region and is electrically connected to the charging electrode; An inorganic layer covers the charging electrodes; A first organic layer is located above the inorganic layer; Sensing electrodes are located in the sensing region, above the inorganic layer; and A second organic layer is placed above the first organic layer and overlaps with the sensing electrode; The first trace includes: The first-1 line portion is located below the inorganic layer; The first-second line portion is located between the inorganic layer and the first organic layer, and is electrically connected to the first-first line portion; and The first to third lines are located between the first organic layer and the second organic layer, and are electrically connected to the first to second lines.

2. The display device according to claim 1, wherein, At least one of the first-1 line portion, the first-2 line portion, and the first-3 line portion includes: First metal layer; A second metal layer, situated above the first metal layer and thicker than the first metal layer; and A third metal layer, located above the second metal layer, is thinner than the second metal layer and comprises the same material as the first metal layer.

3. The display device according to claim 2, wherein, In the plan view, the second metal layer is narrower than the first metal layer and the third metal layer.

4. The display device according to claim 1, wherein, The sensing electrode includes: A first electrode extends in a first direction and is arranged in a second direction intersecting the first direction; and The second electrode extends in the second direction and is arranged in the first direction, and The charging electrode includes line portions that overlap with the second electrode.

5. The display device according to claim 4, wherein, The charging electrode further includes a connecting portion that connects the first end of the wire portion, and The first trace is provided as multiple traces, each of which is connected to the second end of a corresponding line portion within the line portion.

6. The display device according to claim 4, wherein, The input sensor further includes: The second-second trace is connected to the second end of the first electrode; and The second-1 trace is connected to the first end of the first electrode and includes: The second-1 line portion is located below the inorganic layer; The 2-2 line portion is located between the inorganic layer and the first organic layer, and is electrically connected to the 2-1 line portion; and The second-third line portion is located between the first organic layer and the second organic layer, and is electrically connected to the second-second line portion.

7. The display device according to claim 6, wherein, The second-1 line portion and the second-2 line portion are connected via a first contact hole penetrating the inorganic layer, and The second-2 line portion and the second-3 line portion are connected via a second contact hole that penetrates the first organic layer.

8. The display device according to claim 7, wherein, In the plan view, the first contact hole and the second contact hole are separated.

9. The display device according to claim 4, wherein, The input sensor further includes: The second-second trace is connected to the second end of the first electrode; and The second-1 trace is connected to the first end of the first electrode and includes: The second-1 line portion is located below the inorganic layer; The 2-2 line portion is located between the inorganic layer and the first organic layer, and is electrically connected to the 2-1 line portion; and The second-third line portion is located between the first organic layer and the second organic layer, and is electrically connected to the second-first line portion.

10. The display device according to claim 4, wherein, The input sensor further includes a third trace connected to one end of the second electrode.

11. The display device according to claim 1, wherein, The input sensor further includes an electrostatic discharge line, which is located in the peripheral region and includes line portions that are electrically connected to each other at different layers.

12. The display device according to claim 1, wherein, The display panel includes a light-emitting area and a non-light-emitting area adjacent to the light-emitting area, and The sensing electrode has an opening corresponding to the light-emitting area.

13. The display device according to claim 1, further comprising: A pad electrode, electrically connected to the end of the first trace, includes: A first conductive pattern is directly on the end of the first trace; and The second conductive pattern is connected to the first conductive pattern via a contact hole penetrating the inorganic layer and the first organic layer, and The inorganic layer and the first organic layer are located between the first conductive pattern and the second conductive pattern.

14. The display device according to claim 1, wherein, The charging electrode includes: The first-line component is located below the inorganic layer; and The first-second line component is located between the inorganic layer and the first organic layer, and is electrically connected to the first-first line component.

15. The display device according to claim 1, wherein, The sensing electrode includes: A first electrode extends in a first direction between the first organic layer and the second organic layer, and is arranged in a second direction intersecting the first direction; and The second electrode extends in the second direction, is arranged in the first direction, has an integral shape, and has a length smaller than that of the first electrode. The first electrode includes: The sensing portion is located between the first organic layer and the second organic layer; and The connecting portion is located between the inorganic layer and the first organic layer, and connects adjacent sensing portions in the sensing portion.

16. A display device, comprising: Display panel; as well as An input sensor is located above the display panel and includes: The charging electrode is located in the sensing area and is configured to generate an induced magnetic field; An inorganic layer covers the charging electrodes; A first organic layer is located above the inorganic layer; The sensing electrode is located in the sensing area, above the inorganic layer; A second organic layer, situated above the first organic layer, and covering the sensing electrode; and The trace, in a peripheral region adjacent to the sensing region, is electrically connected to the corresponding electrode of the charging electrode and the sensing electrode, and includes: The first-1 line portion is located below the inorganic layer; The first-second line portion is located between the inorganic layer and the first organic layer, and is electrically connected to the first-1... Line part; and The first to third lines are located between the first organic layer and the second organic layer, and are electrically connected to the first to second lines.

17. The display device according to claim 16, wherein, The first-1 line portion and the first-2 line portion each include: First metal layer; A second metal layer is disposed above the first metal layer; and A third metal layer, situated above the second metal layer, comprises the same material as the first metal layer. Wherein, the second metal layer is thicker than the first metal layer and the third metal layer, and In the plan view, the second metal layer is narrower than the first metal layer and the third metal layer.

18. The display device according to claim 16, wherein, The sensing electrode includes: A first electrode extends in a first direction and is arranged in a second direction intersecting the first direction; and The second electrode extends in the second direction and is arranged in the first direction, and The charging electrode includes line portions that overlap with the second electrode.

19. An electronic device comprising an input device and a display device according to any one of claims 1 to 18, in, The induced magnetic field is used to charge the input device.

20. The electronic device according to claim 19, wherein, The input device includes an RLC resonant circuit configured to be charged by the induced magnetic field.

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