Source driving device with digital-to-analog converter suitable for parts of gamma curve
By using multiple sub-digital-to-analog converters in the display driver integrated circuit to process gamma voltages with different output voltage ranges, the problem of limited output voltage range of differential amplifiers is solved, linearity and output accuracy are improved, and the area and cost of display driver integrated circuits are reduced.
Patent Information
- Application Number
- CN202411586321.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-08-07
- Filing Date
- 2024-11-08
- Publication Date
- 2026-02-10
AI Technical Summary
When increasing grayscale values, the digital-to-analog converters of existing display driver integrated circuits limit the output voltage range of the differential amplifier, and the linearity problem cannot meet the requirements, which increases the area and cost of the display driver integrated circuit.
Multiple sub-digital-to-analog converters are used to process gamma voltages with different output voltage ranges. The switching circuit switches to the source operational amplifier for interpolation and amplification, thereby improving the linearity of the data voltage.
It improves the output accuracy and range of the differential amplifier, reduces the linearity error of the data voltage, optimizes the linearity of the gamma curve, and reduces the area of the display driver integrated circuit.
Smart Images

Figure CN121506041A_ABST
Abstract
Description
Technical Field
[0001] This application relates to a source drive device, and more particularly to a source drive device capable of improving the output linearity of different parts of the gamma curve. Background Technology
[0002] As modern displays move towards wider color gamuts, the demand for output grayscale in display driver integrated circuits (DDICs) is increasing. This increase in grayscale leads to a significant increase in the area of the digital-to-analog converter (DAC) to be implemented in the source drive of the DDIC, thus increasing the cost of the DDIC. Differential amplifiers (DDAs) are a solution to reduce the need for DACs. However, linearity issues limit the output voltage range of DDAs. Although grayscale values continue to increase, the output efficiency of the DDA cannot keep up with the increase in grayscale values. In this situation, the area of the DDIC still increases with the increase in grayscale values. Therefore, improvements to existing technologies are necessary. Summary of the Invention
[0003] Therefore, the purpose of this application is to provide a source drive device including a digital-to-analog converter for providing an input voltage to a differential amplifier (DDA) to improve the linearity of the DDA output. This helps to improve the output accuracy and increase the output range of the DDA.
[0004] One embodiment of this application discloses a source drive device, including a digital-to-analog converter, comprising an m-bit sub-digital-to-analog converter for receiving a plurality of first data codes from a plurality of data codes and generating a set of first intermediate voltages based on the plurality of first data codes; a k-bit sub-digital-to-analog converter for receiving a plurality of second data codes from the plurality of data codes and generating a set of second intermediate voltages based on the plurality of second data codes; and an operational amplifier for outputting a data voltage based on the set of first intermediate voltages or the set of second intermediate voltages; wherein m and k are positive integers. Attached Figure Description
[0005] Figure 1 This is a schematic diagram of a source drive device for a display driver circuit.
[0006] Figure 2An exemplary embodiment of a source operational amplifier for implementing the operation of a differential amplifier is shown.
[0007] Figure 3 The correspondence between output voltage and data code is shown in the operation of a differential amplifier.
[0008] Figure 4 This is a schematic diagram of the source drive device according to Embodiment 1 of this application.
[0009] Figure 5 This is a schematic diagram of a source drive device according to another embodiment of this application.
[0010] The reference numerals in the attached figures are explained as follows:
[0011] 10 Source drive device
[0012] 102 Latch Circuit
[0013] 104 Digital-to-Analog Converter
[0014] 106 source operational amplifier
[0015] 108 Gamma Voltage Generation Circuit
[0016] 110 Switching Circuit
[0017] 1062 operational amplifier
[0018] 1064 interpolation circuit
[0019] 1042, 1044 Sub-digit Analog Converter
[0020] VG[1]~VG[N],VG,VG_OUT,VH,voltage
[0021] VL,VOUT,VX,VX',VI1,VI2
[0022] DC,Min,DC_X,Max,DC1,DC2,Data Code
[0023] DC3 Detailed Implementation
[0024] Certain terms are used in this specification and the subsequent claims to refer to specific components. It will be understood by those skilled in the art that hardware manufacturers may use different names to refer to the same component. This specification and the subsequent claims do not distinguish components by differences in name, but by differences in function. The term "comprising" as used throughout this specification and the subsequent claims is an open-ended term and should be interpreted as "including but not limited to". Furthermore, the term "coupled" here includes any direct and indirect electrical connection means. Therefore, if a first device is described as coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices or connection means.
[0025] Please refer to Figure 1 . Figure 1 This is a schematic diagram of a source driver device 10 for a display driver circuit, which can be implemented by a display driver integrated circuit (DDIC). The source driver device 10 includes a latch circuit 102, a digital-to-analog converter (DAC) 104, and a source operational amplifier (SOP) 106. Figure 1 A gamma voltage generation circuit 108 is shown, which may be included in or coupled to the source drive device 10. The gamma voltage generation circuit 108 can be used to provide a gamma voltage VG_OUT to the digital-to-analog converter 104. For example, the gamma voltage generation circuit 102 generates multiple gamma tap voltages VG[1] to VG[M], which can be divided by a series of resistors to generate 2 10 = 1024 gamma voltages VG_OUT[1] to VG_OUT
[1024] , provided to the digital-to-analog converter 104 of the source drive device 10, but not limited thereto. It should be noted that, for ease of explanation, the following description uses 1024 gamma voltages VG_OUT[1] to VG_OUT
[1024] as an example. The source operational amplifier 106 is a differential amplifier (DDA) that can interpolate the input voltages it receives (including a high voltage VH and a low voltage VL) to generate a data voltage VOUT. The data voltage VOUT is used to drive the target pixels on the display screen.
[0026] In the source drive device 10, the latch circuit 102 can receive and output a data code DC (such as a grayscale value) to the digital-to-analog converter 104. Based on the operation of the differential amplifier, the digital-to-analog converter 104 can output a high voltage VH and a low voltage VL, corresponding to a portion of the bits of the data code DC from the latch circuit 102. For example, the digital-to-analog converter 104 can select two or more gamma voltages from the 1024 gamma voltages VG_OUT of the gamma voltage generation circuit 102 based on multiple higher bits in the data code DC, and output them as the high voltage VH and low voltage VL to the source operational amplifier 106. The source operational amplifier 106 then generates a data voltage VOUT based on the high voltage VH and low voltage VL, wherein the data voltage VOUT can be a voltage between the high voltage VH and low voltage VL generated by interpolation, which is performed based on other bits of the data code DC.
[0027] Figure 2 An exemplary embodiment of a source operational amplifier 106 used to implement the operation of a differential amplifier is shown. For example... Figure 2 As shown, the source operational amplifier 106 can generally be divided into an input stage, a gain stage, and an output stage. In this example, the operation of the differential amplifier can be implemented in the input stage, where the transconductances Gm1, Gm2… can be modified according to the data code DC to generate an interpolated voltage as the data voltage VOUT. Generally, by receiving an N-bit data code DC, the source operational amplifier 106 can perform N-bit interpolation to generate the data voltage VOUT, where N can be any suitable integer. For example, if a 4-bit differential amplifier is used, the source operational amplifier 106 can generate 16 different data voltages VOUT located between the high voltage VH and the low voltage VL, with a voltage step size of approximately 1 / 16 of the voltage difference between VH and VL. The transconductances Gm1, Gm2… can be preset to suitable values to generate the desired value of the data voltage VOUT. In one embodiment, the values of transconductances Gm1, Gm2... can be modified by controlling the current source used to supply bias current to the input pairs in the input stage.
[0028] However, as the number of bits used for interpolation increases, the linearity of the data voltage VOUT decreases. That is, in the operation of a 4-bit differential amplifier, the voltage step between two adjacent values of the data voltage VOUT may deviate from 1 / 16 of the voltage difference between VH and VL. For example, as... Figure 3As shown, the source operational amplifier 106 can receive a high voltage VH and a low voltage VL to perform interpolation in response to the data code DC, where the high voltage VH corresponds to a maximum data code (Max) and the low voltage VL corresponds to a minimum data code (Min). Ideally, the correspondence between the data voltage VOUT and the data code DC should be a straight line within the range between the high voltage VH and the low voltage VL. However, in the actual circuit of the source operational amplifier 106, the correspondence between the data voltage VOUT and the data code DC is non-linear, resulting in... Figure 3 The nonlinear curve shown is illustrated. For example, for a data code DC_X, the source operational amplifier 106 ideally expects the output data voltage VOUT to be equal to VX. However, due to nonlinearity, the data voltage VOUT is equal to VX', meaning the linearity error voltage of the data voltage VOUT is (VX-VX').
[0029] This nonlinear relationship stems from the transconductance of the source operational amplifier 106, which generates the input transistor in the input stage. This input transistor exhibits nonlinear voltage-to-current conversion behavior. More specifically, the purpose of the input stage is to generate a differential current to supply the gain stage, the value of which is determined by the input voltage (i.e., VH and VL) and the transconductance of the source operational amplifier 106. The voltage-to-differential-current conversion follows the square law of the input transistor, which is nonlinear. In this case, the interpolation voltage generated based on the transconductance variation also exhibits nonlinear characteristics, thus generating a differential amplifier error on the data voltage VOUT.
[0030] Furthermore, the transconductance values Gm1, Gm2… of the source operational amplifier 106 are also related to both the input voltage (i.e., VH and VL) and the data voltage VOUT. In this case, the greater the difference between the high voltage VH and the low voltage VL, the greater the differential amplifier error of the data voltage VOUT will be. For example, Figure 1 The gamma curve on the left describes the display manufacturer's desired specification for grayscale output data voltage. This desired specification's gamma curve corresponds to the gamma value that makes the display achieve the desired gamma value, such as gamma 2.2 or gamma 1.8. Figure 1As shown in the gamma curve, the gamma curve has significantly different slopes for the first output voltage range (0V-2V) and the second output voltage range (2V-6V). Therefore, for the first output voltage range (0V-2V) and the second output voltage range (2V-6V), the digital-to-analog converter 104 selects the same number (e.g., 16 gamma voltages VG_OUT each) of gamma voltages from the 1024 gamma voltages VG_OUT of the gamma voltage generation circuit 102 based on multiple bits of the higher bits in the data code DC, and outputs them as high voltage VH and low voltage VL to the source operational amplifier 106. As a result, the difference between two adjacent values of the gamma voltage selected for the second output voltage range (2V-6V) will be greater than the difference between two adjacent values of the gamma voltage selected for the first output voltage range (0V-2V). In other words, the differential amplifier error of the data voltage VOUT for the second output voltage range (2V-6V) will be greater than the differential amplifier error of the data voltage VOUT for the first output voltage range (0V-2V).
[0031] To improve the linearity of the data voltage VOUT, this application proposes a source drive device that can select an appropriate number of gamma voltages from the 1024 gamma voltages VG_OUT of the gamma voltage generation circuit 102 as high voltage VH and low voltage VL for different output voltage ranges (e.g., a first output voltage range and a second output voltage range). Figure 4This is a schematic diagram of a source drive device 40 according to an embodiment of this application. The source drive device 40 is derived from the source drive device 10, so the same components are represented by the same symbols. The source drive device 40 includes a latch circuit 102, a digital-to-analog converter 104, and a source operational amplifier 106. The latch circuit 102 can receive and output data code DC (such as grayscale value) to the digital-to-analog converter 104. The digital-to-analog converter 104 includes an m-bit sub-digital-to-analog converter 1044 and a k-bit sub-digital-to-analog converter 1042, wherein the m-bit sub-digital-to-analog converter 1044 can receive multiple first data codes DC1 in the data code DC and generate a set of first intermediate voltages VI1 accordingly, and the k-bit sub-digital-to-analog converter 1042 can receive multiple second data codes DC2 in the data code DC and generate a set of second intermediate voltages VI2 accordingly. For example, the m-bit sub-digital-to-analog converter 1044 can select two or more first gamma voltages from the first 512 gamma voltages (corresponding to the first part of the full gamma voltage range 0 to V2) of the 1024 gamma voltages VG_OUT of the gamma voltage generation circuit 102, based on multiple first data codes DC1, as a first intermediate voltage VI1 and output it to the source operational amplifier 106. The k-bit sub-digital-to-analog converter 1042 can select two or more second gamma voltages from the last 512 gamma voltages VG_OUT of the 1024 gamma voltages VG_OUT of the gamma voltage generation circuit 102, based on multiple second data codes DC2, as a second intermediate voltage VI2 and output it to the source operational amplifier 106. It should be noted that the first and second parts do not overlap.
[0032] Furthermore, the source drive device 40 may also include a switching circuit 110 coupled between the digital-to-analog converter 104 and the source operational amplifier 106. The switching circuit 110 can receive a first intermediate voltage VI1 and a second intermediate voltage VI2, and switch the m-bit sub-digital-to-analog converter 1044 or the k-bit sub-digital-to-analog converter 1042 coupled to the source operational amplifier 106 according to a plurality of first data codes DC1 and a plurality of second data codes DC2. In other words, the switching circuit 110 can switch the output of the first intermediate voltage VI1 or the second intermediate voltage VI2 to the source operational amplifier 106. Specifically, the source operational amplifier 106 is a differential amplifier, which includes an interpolation circuit 1064 and an operational amplifier 1062. The interpolation circuit 1064 can receive the first intermediate voltage VI1 or the second intermediate voltage VI2 as a high voltage VH and a low voltage VL, and perform interpolation on it according to a plurality of third data codes DC3 in the data codes DC to generate at least one output voltage. Operational amplifier 1062 amplifies at least one output voltage to generate a data voltage VOUT. The data voltage VOUT is used to drive target pixels on the display screen. It should be noted that m, k, and j are all positive integers and can be the same or different. In this way, the source drive device 40 of this application selects appropriate numbers of gamma voltages as high voltage VH and low voltage VL for different output voltage ranges to improve the linearity of the data voltage VOUT.
[0033] It should be noted that, Figure 4 This is merely an embodiment of the present application, and those skilled in the art can make appropriate adjustments according to system requirements. For example, display manufacturers may display more complex gamma curves for the desired grayscale-to-data voltage specifications. To improve the linearity of the data voltage VOUT, the digital-to-analog converter 104 of this application may include more sub-digital-to-analog converters, such as three sub-digital-to-analog converters, but is not limited thereto. Figure 5 As shown, Figure 5This is a schematic diagram of the source drive device 50 according to an embodiment of this application. The digital-to-analog converter 104 of the source drive device 50 includes a first sub-digital-to-analog converter (5 bits), a second sub-digital-to-analog converter (6 bits), and a third sub-digital-to-analog converter (5 bits), which correspond to the first part (0-2V), the second part (2-5V), and the third part (5-6V) of the full gamma voltage range (0-6V), respectively. In detail, the first sub-digital-to-analog converter (5 bits) receives data code D[9:5] to select 16 first gamma voltages (V[0], V
[16] , V
[32] , ..., V
[512] ) from the first 512 gamma voltages VG_OUT (corresponding to the first part 0-2V) of the 1024 gamma voltages VG_OUT of the gamma voltage generation circuit 102 as the first intermediate voltage VI1 and output it to the source operational amplifier 106. The second sub-digital-to-analog converter (6-bit) receives data code D[9:4] and selects 60 second gamma voltages (V
[512] , V
[520] , V
[528] , ..., V
[992] ) from the 512th to 992nd gamma voltages (corresponding to the second part of the full gamma voltage range 2 to 5V) of the 1024 gamma voltages VG_OUT of the gamma voltage generation circuit 102 as the second intermediate voltage VI2 and outputs it to the source operational amplifier 106. The third sub-digital-to-analog converter (5-bit) receives data code D[5:1] and selects 32 third gamma voltages (V
[992] , V
[993] , V
[994] , ..., V
[1023] ) from the 992nd to 1024th gamma voltages VG_OUT of the 1024 gamma voltages VG_OUT of the gamma voltage generation circuit 102 (corresponding to the third part of the full gamma voltage range, 5-6V) as the third intermediate voltage VI3, which is output to the source operational amplifier 106. Specifically, the voltage difference between two adjacent first gamma voltages is 65.5mV, and its linearity error is approximately 0.4mV; the voltage difference between two adjacent second gamma voltages is 50mV, and its linearity error is approximately 0.4mV; the voltage difference between two adjacent third gamma voltages is 31.25mV, and its linearity error is approximately 0.4mV. Compared to traditional 6-bit digital-to-analog converters, 64 gamma voltages (V[0], V
[16] , V
[32] , ..., V
[1023] ) are selected from 1024 gamma voltages VG_OUT and output as intermediate voltages to the source operational amplifier 106.For the first part of the full gamma voltage range, 0-2V gamma voltages (V[0], V
[16] , V
[32] , ..., V
[512] ), the voltage difference between two adjacent gamma voltages is 65.5mV, and its linear error is approximately 0.4mV; for the second part of the full gamma voltage range, 2-5V gamma voltages (V
[512] , V
[528] , ..., V
[992] ), the voltage difference between two adjacent gamma voltages is 100mV, and its linear error is approximately 1.5mV; for the third part of the full gamma voltage range, 5-6V gamma voltages (V
[992] , V
[1008] , ..., V
[1023] ), the voltage difference between two adjacent gamma voltages is 500mV, and its linear error is greater than 20mV. In other words, the digital-to-analog converter 104 of this application can reduce the linearity error corresponding to the data voltages of the second part (2-5V) and the third part (5-6V), and improve the linearity of the data voltage. Furthermore, it should be noted that in organic light-emitting diode (OLED) applications, the 4-6V data voltage is used for low-grayscale applications that are sensitive to human vision.
[0034] On the other hand, in the source drive device 50, the switching circuit 110 is coupled between the three sub-digital-to-analog converters and the source operational amplifier 106, and is used to switch the output of the first intermediate voltage VI1, the second intermediate voltage VI2, or the third intermediate voltage VI3 to the source operational amplifier 106. The implementation of the switching circuit 110 is not limited to this; those skilled in the art can combine, modify, or change the embodiments described above in accordance with the spirit of this application. For example, the switching circuit 110 can be implemented by multiple switches and a logic circuit, such as... Figure 5As shown. The logic circuit includes two exclusive-OR gates (XOR) and one AND gate. When the data code value is less than 512 (DA = 0 and DAB = 1), the switching circuit 110 switches the first sub-digital-to-analog converter to the source operational amplifier 106, and switches the second and third sub-digital-to-analog converters to disconnect the source operational amplifier 106. When the data code value is between 512 and 992 (DA = 1 and DAB = 0), the switching circuit 110 switches the second sub-digital-to-analog converter to the source operational amplifier 106, and switches the first and third sub-digital-to-analog converters to disconnect the source operational amplifier 106. When the value of the data code is greater than 992 (D[6]-D[9]=1, DB[6]-DB[9]=1 and DREAL=1), the switching circuit 110 switches the third sub-digital-to-analog converter to the source operational amplifier 106, and switches the first and second sub-digital-to-analog converters to disconnect the source operational amplifier 106. In this way, the source operational amplifier 106 of the source drive device 50 can interpolate and amplify the received first intermediate voltage VI1, second intermediate voltage VI2 or third intermediate voltage VI3 to generate the data voltage VOUT. It should be noted that the working principles of XOR and AND are well known in the art and will not be described in detail here.
[0035] In summary, the source driver device of this application can divide the gamma curve of the grayscale to data voltage specification expected by the display manufacturer into multiple parts, and use multiple sub-digital-to-analog converters to process the gamma voltage corresponding to each part. In this way, compared with the prior art, the source driver device of this application can optimize the linearity error corresponding to each part of the gamma curve and improve the linearity of the data voltage.
[0036] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.
Claims
1. A source drive device, characterized in that, include: A digital-to-analog converter, comprising: An m-bit digital-to-analog converter is used to receive multiple first data codes from multiple data codes and generate a set of first intermediate voltages based on the multiple first data codes. as well as A k-bit digital-to-analog converter is used to receive multiple second data codes from the plurality of data codes and generate a set of second intermediate voltages based on the plurality of second data codes; and An operational amplifier is used to output a data voltage based on either the first intermediate voltage or the second intermediate voltage of the group. Where m and k are positive integers.
2. The source drive device as described in claim 1, characterized in that, Also includes: A switching circuit, coupled between the digital-to-analog converter and the operational amplifier, is used to switch the connection of the m-bit sub-digital-to-analog converter or the k-bit sub-digital-to-analog converter to the operational amplifier according to the plurality of first data codes and the plurality of second data codes.
3. The source drive device as described in claim 2, characterized in that, Also includes: An interpolation circuit, coupled between the switching circuit and the operational amplifier, is used to receive multiple third data codes from the plurality of data codes, and to perform a j-bit interpolation on the first intermediate voltage group or the second intermediate voltage group according to the plurality of third data codes to generate at least one output voltage. The operational amplifier receives the at least one output voltage to generate the data voltage; and Where j is a positive integer.
4. The source drive device as described in claim 3, characterized in that, Also includes: A latching circuit, coupled to the digital-to-analog converter and the interpolation circuit, is used to store the multiple data codes.
5. The source drive device as described in claim 3, characterized in that, m, k, and j may be the same or different.
6. The source drive device as described in claim 1, characterized in that, These multiple data codes correspond to a full gamma voltage range.
7. The source drive device as described in claim 6, characterized in that, The plurality of first data codes correspond to a first portion of the full gamma voltage range, and the plurality of second data codes correspond to a second portion of the full gamma voltage range, wherein the second portion does not overlap with the first portion.
8. The source drive device as described in claim 1, characterized in that, Also includes: A gamma voltage generating circuit, coupled to the m-bit sub-digital-to-analog converter and the k-bit sub-digital-to-analog converter, is used to generate multiple gamma voltages.
9. The source drive device as described in claim 8, characterized in that, The m-bit sub-digital-to-analog converter receives a plurality of first gamma voltages from the plurality of gamma voltages, and the k-bit sub-digital-to-analog converter receives a plurality of second gamma voltages from the plurality of gamma voltages, wherein the plurality of first gamma voltages are located in a first portion of a full gamma voltage range, and the plurality of second gamma voltages are located in a second portion of the full gamma voltage range, wherein the second portion does not overlap with the first portion.
10. The source drive device as described in claim 9, characterized in that, A first voltage difference between two adjacent first gamma voltages in the plurality of first gamma voltages is different from a second voltage difference between two adjacent second gamma voltages in the plurality of second gamma voltages.