Multilayer ceramic capacitor and method of manufacturing same

Abstract

The present disclosure provides a multilayer ceramic capacitor and a method of manufacturing the same. The multilayer ceramic capacitor includes: a capacitor body including a dielectric layer and an inner electrode layer; and an external electrode disposed on an outer side of the capacitor body, in which the dielectric layer includes a plurality of dielectric grains, and at least one of the plurality of dielectric grains includes black dots, 4 to 16 black dots are included per 1 [mu] m * 1 [mu] m cross-sectional area within the dielectric layer, and the black dots include Si element and do not include at least two elements selected from among Ba, Ti, and O.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a multilayer ceramic capacitor and a manufacturing method thereof. BACKGROUND

[0002] As ceramic electronic components using ceramic materials, there are capacitors, inductors, piezoelectric elements, piezoresistors, thermistors, and the like. Among the ceramic electronic components, a multilayer ceramic capacitor (MLCC) is used in various electronic devices due to advantages such as small size, high capacitance, easy mounting, and the like.

[0003] For example, a multilayer ceramic capacitor (MLCC) can be a chip capacitor used to be mounted on a printed circuit board of various electronic products such as an image display device (e.g., a liquid crystal display (LCD), a plasma display panel (PDP), an organic light emitting diode (OLED), and the like), a computer, a personal portable terminal, a smart phone, and the like, to charge or discharge the same.

[0004] In addition, since barium titanate, which is a piezoelectric material and a photoelectric material, has recently been used as a main material of an MLCC, research is being conducted to improve reliability. SUMMARY

[0005] The present disclosure provides a multilayer ceramic capacitor having excellent reliability and voltage resistance characteristics.

[0006] The present disclosure provides a method of manufacturing a multilayer ceramic capacitor.

[0007] The present disclosure provides a multilayer ceramic capacitor including: a capacitor body including a dielectric layer and an internal electrode layer; and an external electrode disposed on an outer side of the capacitor body, wherein the dielectric layer includes a plurality of dielectric grains, and at least one dielectric grain of the plurality of dielectric grains includes at least one black spot, 4 to 16 of the black spots are included per 1 μm x 1 μm cross-sectional area within the dielectric layer, and the at least one black spot includes a Si element and does not contain at least two elements selected from Ba, Ti, and O.

[0008] A size of the at least one black spot measured on a straight line drawn along a long axis of the dielectric grain can be about 5 nm to about 40 nm.

[0009] The dielectric layer can further include a black spot peripheral region defined as an area (i) extending from the at least one black spot to a distance corresponding to 10% to 100% of a size of the at least one black spot and (ii) extending in an outward direction of the at least one black spot.

[0010] The black spot peripheral region can have a shape surrounding the at least one black spot.

[0011] The black dot peripheral region can include Si elements, Ba elements, and Ti elements.

[0012] The dielectric layer can include a barium titanate-based main component including Ba and Ti, and a sub-component including Si.

[0013] A molar ratio of Si elements included in the at least one black dot and Si elements included in the black dot peripheral region can be in a range of about 1:8 to about 8:1, based on 100 mol parts of the barium titanate-based main component.

[0014] The sub-component can further include one or more selected from Dy, Tb, Mn, V, Ba, Al, Ca, and Sn.

[0015] The sub-component can include Dy, Tb, Mn, V, Ba, Al, Ca, and Sn.

[0016] The at least one dielectric grain of the plurality of dielectric grains can include one black dot.

[0017] The at least one black dot can not include Ba, Ti, and O.

[0018] The disclosure provides a method of manufacturing a multilayer ceramic capacitor, the method including: mixing a barium titanate-based main component powder and a sub-component powder to prepare a dielectric slurry; manufacturing a dielectric green sheet using the dielectric slurry and forming a conductive paste layer on a surface of the dielectric green sheet; manufacturing a dielectric green sheet stack by stacking a plurality of the dielectric green sheets on which the conductive paste layer is formed; manufacturing a capacitor body including a dielectric layer and an internal electrode layer by firing the dielectric green sheet stack; and forming an external electrode on a surface of the capacitor body, wherein the dielectric layer includes a plurality of dielectric grains, and at least one dielectric grain of the plurality of dielectric grains includes at least one black dot, 4 to 16 black dots are included per 1 µm x 1 µm cross-sectional area within the dielectric layer, and the black dot includes Si elements and does not include at least two elements selected from Ba, Ti, and O.

[0019] The barium titanate-based main component powder can be prepared by a hydrothermal synthesis method including: mixing a barium raw material and a titanium raw material to prepare a barium titanate seed; and growing a grain of the barium titanate seed.

[0020] The barium raw material and the titanium raw material can be mixed such that a Ba / Ti molar ratio is about 1.020 to about 1.050.

[0021] The grain growth can be performed at a temperature of about 208 °C to about 242 °C.

[0022] The sub-component powder can include a Si-containing compound.

[0023] The Si-containing compound can be mixed in an amount of about 0.5 mol parts to about 4 mol parts, based on 100 mol parts of the barium titanate-based main component powder.

[0024] The sub-component powder can further include at least one selected from a Dy-containing compound, a Tb-containing compound, a Mn-containing compound, a V-containing compound, a Ba-containing compound, an Al-containing compound, a Ca-containing compound, and a Sn-containing compound.

[0025] The multilayer ceramic capacitor according to the embodiments can not only improve the withstand voltage characteristics, but also improve the high-temperature stress reliability and the moisture resistance reliability, by including a dielectric layer having a controlled defect level. BRIEF DESCRIPTION OF DRAWINGS

[0026] Figure 1 is a perspective view illustrating a multilayer ceramic capacitor according to an embodiment.

[0027] Figure 2 is a cross-sectional view of the multilayer ceramic capacitor taken along line I-I' of Figure 1

[0028] Figure 3 is a cross-sectional view of the multilayer ceramic capacitor taken along line II-II' of Figure 1

[0029] Figure 4 is an exploded perspective view illustrating a capacitor body of Figure 1

[0030] Figure 5 is a schematic view illustrating a cross-section of a dielectric layer according to an embodiment.

[0031] Figure 6 is a TEM (Transmission Electron Microscope) image of a dielectric layer according to Example 1.

[0032] Figure 7 is a TEM (Transmission Electron Microscope) image of a dielectric layer according to Comparative Example 1.

[0033] Figures 8A to 8E is a TEM-EDS (Transmission Electron Microscope-Energy Dispersive Spectroscopy) analysis image of a dielectric layer according to Example 1.

[0034] Figures 9A to 9E is a TEM-EDS (Transmission Electron Microscope-Energy Dispersive Spectroscopy) analysis image of a dielectric layer according to Example 2.

[0035] Figures 10A to 10E ​​​is a TEM-EDS (Transmission Electron Microscope-Energy Dispersive Spectroscopy) analysis image of the dielectric layer according to Example 3.

[0036] Figures 11A to 11E is a TEM-EDS (Transmission Electron Microscope-Energy Dispersive Spectroscopy) analysis image of the dielectric layer according to Example 4.

[0037] Figures 12A to 12B is a TEM-EDS (Transmission Electron Microscope-Energy Dispersive Spectroscopy) analysis image of the dielectric layer according to Comparative Example 1. DETAILED DESCRIPTION

[0038] Hereinafter, the present disclosure will be described in detail with reference to the accompanying drawings showing embodiments of the present disclosure. The accompanying drawings and the description are to be considered illustrative in nature and not restrictive. Throughout the specification, like drawing reference numerals denote like elements. In the drawings, some components are exaggerated, omitted, or schematically shown, and the size of each component does not completely reflect the actual size.

[0039] The accompanying drawings are intended to facilitate understanding of the embodiments disclosed in the specification, and it should be understood that the technical idea disclosed herein is not limited by the accompanying drawings, and includes all modifications, equivalents, or alternatives within the scope of the idea and technology of the present disclosure.

[0040] Although the terms "first", "second", and the like are used to explain various components, the components are not limited by such terms. These terms are used only to distinguish one component from another.

[0041] Further, it will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements can also be present. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements present. Further, when an element is referred to as being "on" or "over" another element, it can be located over, under, or in the other element and the element not necessarily on the other element in a direction opposite to a gravitational direction.

[0042] Throughout the specification, the terms "comprise" or "have" are intended to indicate the presence of stated features, numbers, steps, operations, components, parts, or combinations thereof, but not to exclude the presence or addition of one or more other features, numbers, steps, operations, components, parts, and / or combinations thereof. Therefore, unless explicitly described to the contrary, the words "comprise" and variations such as "comprise" or "comprising" will be understood to imply the inclusion of stated elements but not the exclusion of any other elements.

[0043] Furthermore, throughout the specification, the phrase "in a plan view" or "on a plane" indicates the target portion as viewed from the top, and the phrase "in a cross-sectional view" or "on a cross-section" indicates the cross-section formed by vertically cutting the target portion as viewed from the side.

[0044] Throughout the specification, the term "connection" can refer not only to a direct connection between two or more constituent components, but also to an indirect connection between two or more constituent components through another constituent component. It can refer not only to a physical connection, but also to an electrical connection, and can also refer to a situation where the constituent components are indicated by different names due to their location or function, but are actually a single unit.

[0045] In the following text, reference will be made to Figures 1 to 3 A multilayer ceramic capacitor according to an embodiment is described.

[0046] Figure 1 This is a perspective view showing a multilayer ceramic capacitor according to an embodiment. Figure 2 It is along Figure 1 A cross-sectional view of a multilayer ceramic capacitor taken by line I-I'. Figure 3 It is along Figure 1 A cross-sectional view of a multilayer ceramic capacitor taken from line II-II', and Figure 4 It is shown Figure 1 An exploded perspective view of the capacitor body.

[0047] Figures 1 to 4 The L-axis, W-axis, and T-axis directions shown represent the length, width, and thickness directions of the capacitor body 110, respectively. Here, the thickness direction (T-axis) can be perpendicular to the wide surface (main surface) of the sheet assembly, and can be used, for example, as the same concept as the stacking direction of the stacked dielectric layers 111. The length direction (L-axis) can be parallel to the wide surface (main surface) of the sheet assembly and substantially perpendicular to the thickness direction (T-axis). For example, the length direction (L-axis) can be the direction in which the first external electrode 131 and the second external electrode 132 are opposite each other. The width direction (W-axis) can be parallel to the wide surface (main surface) of the sheet assembly and substantially perpendicular to both the thickness direction (T-axis) and the length direction (L-axis). The length of the sheet assembly in the length direction (L-axis) can be longer than its length in the width direction (W-axis).

[0048] Reference Figures 1 to 4 According to an embodiment, the multilayer ceramic capacitor 100 includes a capacitor body 110 and external electrodes 131 and 132 disposed on the outside of the capacitor body 110. The external electrodes 131 and 132 may include a first external electrode 131 and a second external electrode 132 disposed at opposite ends of the capacitor body 110 in the longitudinal direction (L-axis direction).

[0049] For example, the capacitor body 110 can have a substantially hexahedral shape.

[0050] For convenience of description of the embodiment, two surfaces of the capacitor body 110 opposite to each other in a thickness direction (T-axis direction) are referred to as a first surface and a second surface, two surfaces of the capacitor body 110 connected to the first surface and the second surface and opposite to each other in a length direction (L-axis direction) are referred to as a third surface and a fourth surface, and two surfaces of the capacitor body 110 connected to the first surface and the second surface and connected to the third surface and the fourth surface and opposite to each other in a width direction (W-axis direction) are referred to as a fifth surface and a sixth surface.

[0051] As an example, the first surface as a lower surface can be a mounting surface. In addition, the first surface to the sixth surface can be flat, but the embodiment is not limited thereto. For example, the first surface to the sixth surface can be curved surfaces having convex central portions, and edges (boundaries between surfaces) of each surface can be rounded.

[0052] The shape and size of the capacitor body 110 and the number of stacks of the dielectric layers 111 are not limited to those of the capacitor body 110 and the number of stacks of the dielectric layers 111 shown in the drawings of the embodiment.

[0053] The capacitor body 110 includes a plurality of dielectric layers 111 and a plurality of inner electrode layers 121 and 122. Specifically, the capacitor body 110 includes a plurality of dielectric layers 111 and a plurality of first inner electrode layers 121 and a plurality of second inner electrode layers 122, the first inner electrode layers 121 and the second inner electrode layers 122 being alternately disposed in a thickness direction (T-axis direction), and the dielectric layers 111 being interposed between the first inner electrode layers 121 and the second inner electrode layers 122.

[0054] At this time, adjacent dielectric layers 111 of the capacitor body 110 can be integrated to a degree that a boundary therebetween is difficult to identify without using a scanning electron microscope (SEM).

[0055] The capacitor body 110 can include an effective region and cover regions 112 and 113.

[0056] The effective region is a region in which the dielectric layers 111 and the inner electrode layers 121 and 122 are alternately disposed, which contributes to forming a capacitance of the multilayer ceramic capacitor 100. Specifically, the effective region can be a region in which the first inner electrode layers 121 and the second inner electrode layers 122 stacked along the thickness direction (T-axis direction) are stacked on each other.

[0057] Cover regions 112 and 113 are thickness-direction edges and may be located on the upper and lower surfaces of the effective region in the thickness direction (T-axis direction), respectively. Cover regions 112 and 113 may be a single dielectric layer or two or more dielectric layers stacked on the upper and lower surfaces of the effective region, respectively.

[0058] In addition, the capacitor body 110 may also include a side edge region.

[0059] The side edge region is the edge portion in the width direction and can be located on the side surfaces of the effective region that are opposite to each other in the width direction (W-axis direction) (i.e., on the surfaces corresponding to the fifth and sixth surfaces). The side edge region can be formed as follows: when a conductive paste for the inner electrode layer is coated on the surface of the dielectric green sheet, the conductive paste is only coated on a portion of the surface of the dielectric green sheet, and not on both sides of the surface of the dielectric green sheet in the width direction. Then the obtained dielectric green sheets are stacked and fired, but the formation method is not limited to this.

[0060] Coverage areas 112 and 113, as well as side edge areas, are used to prevent damage to the first inner electrode layer 121 and the second inner electrode layer 122 due to physical stress and / or chemical stress.

[0061] Each of the dielectric layer, inner electrode layer, and outer electrode is described in detail below.

[0062] Dielectric layer Reference Figure 5 The dielectric layer will be explained.

[0063] Figure 5 This is a schematic diagram showing a cross-section of the dielectric layer according to an embodiment.

[0064] Reference Figure 5 The dielectric layer 111 includes a plurality of dielectric grains 10, and at least one of the plurality of dielectric grains 10 includes black dots 20.

[0065] The black dots 20 according to the embodiment include silicon (Si) and may not include at least two elements selected from barium (Ba), titanium (Ti), and oxygen (O). Since the dielectric grains 10 in the dielectric layer 111 have the black dots 20 with the above composition, the reliability and voltage withstand characteristics of the multilayer ceramic capacitor can be improved.

[0066] Black spots 20 may manifest as defects within the dielectric grain 10. However, since black spots 20 include Si elements, they differ from defects, pores, or voids that typically occur in dielectric materials. That is, since defects, pores, or voids do not contain any components and are empty, they can be distinguished from black spots 20 according to the embodiment.

[0067] The components forming the black spot 20 may originate from the barium titanate-based main and secondary components forming the dielectric layer 111. For example, the Si element included in the black spot 20 may originate from a secondary component that includes Si. The black spot 20 does not include the two elements of barium (Ba) and titanium (Ti) included in the surrounding dielectric layer 111 (i.e., the region in the dielectric layer 111 located near the black spot 20), but more precisely, it includes only one of the two elements, or neither element, so that the black spot 20 can be distinguished from the surrounding region within the dielectric layer 111.

[0068] The dielectric layer 111 may include black dots 20 in an amount of 4 to 16 (e.g., 5 to 15, 6 to 14, or 7 to 13) per 1 μm × 1 μm cross-sectional area. In this disclosure, the expression "per 1 μm × 1 μm cross-sectional area" means "one 1 μm × 1 μm cross-sectional area in a transmission electron microscope (TEM) image of a 2.5 μm × 2.5 μm measurement region" (described later). When the dielectric layer 111 includes black dots 20 within the above-mentioned range, the reliability and withstand voltage characteristics of the multilayer ceramic capacitor can be improved. Specifically, if black dots 20 are absent within the dielectric grains 10, a uniform reaction for material diffusion will not occur, making it difficult to obtain dielectric grains 10 of uniform size within the dielectric layer 111. Furthermore, if too many black dots 20 are present, partial discharge breakdown may occur due to the electric field concentrating on the black dots at high temperatures.

[0069] The number of black spots 20 with the aforementioned composition within the dielectric layer 111 can be confirmed by TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis of the dielectric layer.

[0070] More specifically, after immersing the multilayer ceramic capacitor 100 in an epoxy resin mixture and then curing it, the W-axis and T-axis surfaces (WT surfaces) of the capacitor body 110 are polished to a position at half the length of the capacitor body 110 in the L-axis direction. This is then fixed and held in a vacuum chamber, allowing for the observation of an effective region where the dielectric layers 111 and inner electrode layers 121 and 122 are alternately stacked. Next, the effective region of the cross-sectional sample can be measured using transmission electron microscopy (TEM) so that at least one (e.g., one to five) of the dielectric layers 111 is visible. For example, TEM can be performed using Xe-FIB (focused ion beam) at an accelerating voltage of 200 kV in an area of ​​approximately 2.5 μm × 2.5 μm in the effective region (where at least one dielectric layer 111 is visible). The number of black spots 20 within the dielectric layers 111 can be confirmed in the obtained TEM image of the cross-sectional sample. That is, the number of black spots 20 per 1 μm × 1 μm cross-sectional area within the dielectric layer 111 can be confirmed in the TEM image of the obtained cross-sectional sample. Next, EDS (energy-dispersive spectroscopy) analysis is performed on the TEM image of the obtained cross-sectional sample to confirm the composition included in the black spots 20 within the dielectric layer 111. Other methods and / or other tools understood by those skilled in the art may be used even if not described in this disclosure.

[0071] The size of the black dot 20 can be from approximately 5 nm to approximately 40 nm, for example, from approximately 7 nm to approximately 38 nm, from approximately 10 nm to approximately 35 nm, from approximately 12 nm to approximately 33 nm, or from approximately 15 nm to approximately 30 nm. The size of the black dot 20 represents the diameter measured on a straight line drawn based on the long axis of the dielectric grain 10. When the size of the black dot is within the above range, the multilayer ceramic capacitor can be ensured to have excellent reliability and voltage withstand characteristics.

[0072] The size of the black dot 20 can be confirmed in the TEM image of the cross-sectional sample obtained by the method described above. Other methods and / or other tools as understood by those skilled in the art may be used, even if not described in this disclosure.

[0073] The dielectric layer 111 may also include a black dot peripheral region 30. The black dot peripheral region 30 may be defined as the region extending outward from the black dot 20 to a distance corresponding to 10% to 100% of the size of the black dot 20. For example, the black dot peripheral region 30 may be in the form of surrounding the black dot 20.

[0074] The outer region 30 of the black dot may include Si, Ba, and Ti elements. Si, Ba, and Ti can all be derived from the barium titanate-based main and secondary components that form the dielectric layer 111. Since the outer region 30 of the black dot has a different composition from the black dot 20, the black dot 20 can be distinguished from the outer region 30 of the black dot within the dielectric layer 111.

[0075] The composition of the region 30 surrounding the black spot can be confirmed by TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis of the dielectric layer measured by the methods described above. Other methods and / or other tools as understood by those skilled in the art may be used, even if not described in this disclosure.

[0076] The dielectric layer 111 may include barium titanate-based main components and secondary components.

[0077] The barium titanate-based main component is a dielectric matrix material with a high dielectric constant, and it contributes to the capacitance of the multilayer ceramic capacitor 100.

[0078] The barium titanate-based main component powder is a compound containing barium (Ba) and titanium (Ti), and may include, for example, BaTiO3, Ba(Ti,Zr)O3, Ba(Ti,Sn)O3, (Ba,Ca)TiO3, (Ba,Ca)(Ti,Ca)O3, (Ba,Ca)(Ti,Zr)O3, (Ba,Ca)(Ti,Sn)O3, (Ba,Sr)TiO3, (Ba,Sr)(Ti,Zr)O3, (Ba,Sr)(Ti,Sn)O3, or combinations thereof.

[0079] Secondary components may include silicon (Si). In addition, secondary components may also include one or more selected from dysprosium (Dy), terbium (Tb), manganese (Mn), vanadium (V), barium (Ba), aluminum (Al), calcium (Ca) and tin (Sn).

[0080] According to an embodiment, based on 100 moles of barium titanate-based main component, the Si element included in the black spot 20 and the Si element included in the peripheral region 30 of the black spot can have a molar ratio of about 1:8 to about 8:1, for example, about 1:7 to about 7:1, about 1:6 to about 6:1, about 1:5 to about 5:1, or about 1:4 to about 4:1. When the molar ratio of the Si element included in the black spot 20 to the Si element included in the peripheral region 30 of the black spot is within the above range, the reliability and voltage withstand characteristics of the multilayer ceramic capacitor can be improved.

[0081] The molar ratio can be confirmed by TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis of the dielectric layer measured by the methods described above. Other methods and / or other tools as understood by those skilled in the art may be used, even if not described in this disclosure.

[0082] The average thickness (average length in the T-axis direction) of the dielectric layer 111 can be from about 0.1 μm to about 8.0 μm, for example, from about 2.0 μm to about 6.0 μm. When the average thickness of the dielectric layer 111 is within the above range, the reliability of the multilayer ceramic capacitor can be improved.

[0083] The average thickness of dielectric layer 111 can be measured by immersing the multilayer ceramic capacitor 100 in an epoxy resin mixture, curing it, polishing it, then ion-milling it, and finally analyzing it using a scanning electron microscope (SEM). An SEM, such as the Verios G4 from Thermo Fisher Scientific, can be used at 10 kV and 0.2 nA, with a magnification of 100x, and the measurement can be performed on at least one layer of dielectric layer 111 (e.g., 3, 5, or 10 or more layers). The average thickness of dielectric layer 111 can be obtained as an arithmetic mean by taking the center point of the dielectric layer 111 along its length (L-axis) or width (W-axis) as a reference point in the SEM image of the cross-sectional sample obtained as described above, and taking the arithmetic mean of the thickness of dielectric layer 111 at 10 points spaced at predetermined intervals from the reference point. The spacing between the 10 points can be adjusted according to the scale of the SEM image; for example, it can be approximately 1 μm to approximately 100 μm, approximately 1 μm to approximately 50 μm, or approximately 1 μm to approximately 10 μm. Here, the spacing refers to the distance between two adjacent points. All 10 points must be located within the dielectric layer 111. If not all 10 points are located within the dielectric layer 111, the position of the reference point can be changed, or the spacing between the 10 points can be adjusted.

[0084] Inner electrode layer The inner electrode layers 121 and 122 (i.e., the first inner electrode layer 121 and the second inner electrode layer 122) are electrodes with different polarities and are alternately arranged to be opposite each other along the T-axis direction, with a dielectric layer 111 between them, and one end of the first inner electrode layer 121 and one end of the second inner electrode layer 122 can be exposed through the third surface and the fourth surface of the capacitor body 110, respectively.

[0085] The first inner electrode layer 121 and the second inner electrode layer 122 are electrically insulated from each other by a dielectric layer 111 disposed between them.

[0086] The ends of the first inner electrode layer 121 and the second inner electrode layer 122, which are exposed through the third and fourth surfaces of the capacitor body 110, can be electrically connected to the first outer electrode 131 and the second outer electrode 132, respectively.

[0087] The first inner electrode layer 121 and the second inner electrode layer 122 comprise conductive metals and may include metals such as Ni, Cu, Ag, Pd, Au, or alloys thereof (e.g., Ag-Pd alloys).

[0088] Furthermore, the first inner electrode layer 121 and the second inner electrode layer 122 may include dielectric grains having the same composition as the ceramic material included in the dielectric layer 111.

[0089] The first inner electrode layer 121 and the second inner electrode layer 122 can be formed using a conductive paste comprising a conductive metal. The conductive paste can be printed using screen printing or gravure printing.

[0090] The average thickness of the first inner electrode layer 121 and the second inner electrode layer 122 can be from about 0.1 μm to about 2 μm. The average thickness of the first inner electrode layer 121 and the second inner electrode layer 122 can be measured by scanning electron microscopy (SEM) analysis. Here, the method for measuring the average thickness of the inner electrode layers is the same as the method for measuring the average thickness of the dielectric layer 111 described above, so its description is omitted.

[0091] The capacitor body 110 can be formed by firing a stacked structure in which multiple dielectric layers 111 and multiple internal electrode layers 121 and 122 are stacked.

[0092] Outer electrode The first external electrode 131 and the second external electrode 132 are provided with voltages of different polarities and can be electrically connected to the exposed portions of the first internal electrode layer 121 and the second internal electrode layer 122, respectively.

[0093] According to the above structure, when a predetermined voltage is applied to the first external electrode 131 and the second external electrode 132, charge accumulates between the first inner electrode layer 121 and the second inner electrode layer 122, which are opposite to each other. At this time, the capacitance of the multilayer ceramic capacitor 100 is proportional to the stacked area of ​​the first inner electrode layer 121 and the second inner electrode layer 122 stacked together along the T-axis in the effective region.

[0094] The first external electrode 131 may include a first connecting portion disposed on the third surface of the capacitor body 110 and connected to the first inner electrode layer 121, and a first strip portion disposed at the edge where the third surface of the capacitor body 110 intersects with the first and second surfaces and / or the fifth and sixth surfaces of the capacitor body 110. The second external electrode 132 may include a second connecting portion disposed on the fourth surface of the capacitor body 110 and connected to the second inner electrode layer 122, and a second strip portion disposed at the edge where the fourth surface of the capacitor body 110 intersects with the first and second surfaces and / or the fifth and sixth surfaces of the capacitor body 110.

[0095] The first strip may extend from the first connecting portion to a portion of the first surface, a portion of the second surface, and / or a portion of the fifth surface and a portion of the sixth surface of the capacitor body 110. The second strip may extend from the second connecting portion to a portion of the first surface, a portion of the second surface, and / or a portion of the fifth surface and a portion of the sixth surface of the capacitor body 110. The first strip and the second strip may be used to improve the bonding strength between the first external electrode 131 and the second external electrode 132 and the capacitor body 110, respectively.

[0096] Each of the first external electrode 131 and the second external electrode 132 may include a sintered metal layer in contact with the capacitor body 110, a conductive resin layer configured to cover the sintered metal layer, and a plating layer configured to cover the conductive resin layer.

[0097] The sintered metal layer may include conductive metals and glass.

[0098] The conductive metal may include at least one of copper (Cu), nickel (Ni), silver (Ag), palladium (Pd), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), lead (Pb), and alloys thereof, and the sintered metal layer comprising copper (Cu) may indicate the inclusion of elemental copper (Cu) and / or copper (Cu) alloys. When the conductive metal comprises copper (Cu), based on 100 molar parts of copper (Cu), metals other than copper (Cu) may be included in an amount of less than or equal to 5 molar parts.

[0099] The glass may comprise a composition of oxides (e.g., one or more selected from the group consisting of silicon oxide, boron oxide, aluminum oxide, transition metal oxides, alkali metal oxides, and alkaline earth metal oxides). The transition metal may be at least one selected from zinc (Zn), titanium (Ti), copper (Cu), vanadium (V), manganese (Mn), iron (Fe), and nickel (Ni); the alkali metal may be at least one selected from lithium (Li), sodium (Na), and potassium (K); and the alkaline earth metal may be at least one selected from magnesium (Mg), calcium (Ca), strontium (Sr), and barium (Ba).

[0100] Optionally, the conductive resin layer may be formed on the sintered metal layer, for example, it may be formed in a shape that completely covers the sintered metal layer. Additionally, the first external electrode 131 and the second external electrode 132 may not include the sintered metal layer, and in this case, the conductive resin layer may directly contact the capacitor body 110.

[0101] The conductive resin layer extends to the first and second surfaces and / or the fifth and sixth surfaces of the capacitor body 110, and the length of the region (i.e., the strip portion) where the conductive resin layer extends and is disposed on the first and second surfaces and / or the fifth and sixth surfaces of the capacitor body 110 may be longer than the length of the region (i.e., the strip portion) where the sintered metal layer extends and is disposed on the first and second surfaces and / or the fifth and sixth surfaces of the capacitor body 110. That is, the conductive resin layer may be formed on the sintered metal layer and may be formed in a shape that completely covers the sintered metal layer.

[0102] The conductive resin layer may include resin and conductive metal.

[0103] The resin included in the conductive resin layer can be, but is not limited to, a material that has adhesive and shock-absorbing properties and is capable of forming a paste when mixed with conductive metal powder. For example, the resin may include phenolic resin, acrylic resin, silicone resin, epoxy resin, or polyimide resin.

[0104] The conductive metal included in the conductive resin layer is used to electrically connect the first inner electrode layer 121 and the second inner electrode layer 122 or the sintered metal layer to the plating layer described below.

[0105] The conductive metal included in the conductive resin layer may have a spherical shape, a sheet shape, or a combination thereof. That is, the conductive metal may be formed only in sheet form, only in spherical form, or in a mixed form of sheet and spherical form.

[0106] Here, spherical shape can also include shapes that are not perfect spheres, such as shapes whose length ratio of the major axis to the minor axis (major axis / minor axis) is less than or equal to about 1.45. Sheet shape refers to a flat and elongated shape, and there are no particular restrictions; for example, the length ratio of the major axis to the minor axis (major axis / minor axis) can be greater than or equal to about 1.95.

[0107] The first external electrode 131 and the second external electrode 132 may further include a plating layer disposed on the outside of the conductive resin layer.

[0108] The coating may include at least one of nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), tungsten (W), titanium (Ti), lead (Pb), and alloys thereof. For example, the coating may be a nickel (Ni) coating or a tin (Sn) coating, or a coating in which nickel (Ni) and tin (Sn) coatings are stacked sequentially, or a coating in which tin (Sn), nickel (Ni), and tin (Sn) coatings are stacked sequentially. Furthermore, the coating may include multiple nickel (Ni) coatings and / or multiple tin (Sn) coatings.

[0109] The coating can improve the mountability, structural reliability, external durability, heat resistance and equivalent series resistance (ESR) of the multilayer ceramic capacitor 100 relative to the substrate.

[0110] Method of manufacturing a multilayer ceramic capacitor In the following, a method for manufacturing a multilayer ceramic capacitor 100 according to an embodiment will be described.

[0111] The multilayer ceramic capacitor 100 according to the embodiment can be manufactured by: mixing barium titanate-based main component powder and secondary component powder to prepare a dielectric paste; using the dielectric paste to manufacture a dielectric green sheet and forming a conductive paste layer on the surface of the dielectric green sheet; manufacturing a dielectric green sheet stack by stacking the dielectric green sheets on which the conductive paste layer is formed; manufacturing a capacitor body including a dielectric layer and an inner electrode layer by firing the dielectric green sheet stack; and forming an outer electrode on the surface of the capacitor body.

[0112] The barium titanate-based main component powder is a compound containing barium (Ba) and titanium (Ti), and may include, for example, BaTiO3, Ba(Ti,Zr)O3, Ba(Ti,Sn)O3, (Ba,Ca)TiO3, (Ba,Ca)(Ti,Ca)O3, (Ba,Ca)(Ti,Zr)O3, (Ba,Ca)(Ti,Sn)O3, (Ba,Sr)TiO3, (Ba,Sr)(Ti,Zr)O3, (Ba,Sr)(Ti,Sn)O3, or combinations thereof.

[0113] Barium titanate-based main component powder can be prepared by hydrothermal synthesis. Specifically, the barium titanate-based main component powder can be manufactured by: mixing barium and titanium raw materials to produce barium titanate seed crystals; and growing the barium titanate seed crystals into granules.

[0114] Barium raw materials may include barium hydroxide, for example, barium hydroxide octahydrate (Ba(OH)₂●8H₂O). Barium raw materials can be ionized and used by heating them to 60°C or higher.

[0115] Titanium raw materials may include titanium dioxide sol (TiO2). x / 2 (OH) 4-x Titanium dioxide (TiO2) or titanium dioxide. Titanium raw materials can be used in the form of a sol dispersed in acid or alkali.

[0116] Barium and titanium raw materials can be mixed such that the Ba / Ti molar ratio is about 1.020 to about 1.050, for example, about 1.022 to about 1.048 or about 1.024 to about 1.046. When barium and titanium raw materials are mixed in the above proportions, the number of black spots 20 in the dielectric layer 111 can be controlled to an appropriate range, thus ensuring that the multilayer ceramic capacitor has excellent reliability and voltage withstand characteristics.

[0117] To accelerate the formation of barium titanate seed crystals, rapid stirring, microwave, or ultrasound can be used.

[0118] Next, before allowing the barium titanate seed crystals to grow, the manufactured barium titanate seed crystals can be mixed with pure water and a grain growth inhibitor.

[0119] Grain growth inhibitors can be used to slow down grain growth and may include: materials that can reduce the polarity of the solvent, such as alcohols (e.g., butanediol, dimethoxyethane, 1,6-hexanediol, hexyleneglycol, and methoxyethanol); materials that can reduce the pH, such as acids (e.g., acetic acid and nitric acid); or materials that can inhibit redeposition, such as surfactants (e.g., sodium alkyl sulfate, alkylbenzene sulfonates, N-acryloyl amino acid salts, acrylamide, diethanolamine, and amine oxides).

[0120] Next, grain growth can be performed at a high temperature, specifically at a temperature of approximately 208°C to approximately 242°C, for example, at a temperature of approximately 209°C to approximately 241°C or approximately 210°C to approximately 240°C. When the deposition process is performed within the above temperature range, the number of black spots 20 can be controlled to an appropriate range, thus ensuring that the multilayer ceramic capacitor has excellent reliability and voltage withstand characteristics.

[0121] Grain growth can take place from about 1 hour to about 72 hours, for example, from about 3 hours to about 70 hours.

[0122] Next, the grown material can be dried to produce barium titanate main component powder.

[0123] The by-product powder may include Si-containing compounds.

[0124] Based on 100 moles of barium titanate-based main component powder, a Si-containing compound can be mixed in amounts from about 0.5 moles to about 4 moles (e.g., about 0.7 moles to about 3.8 moles, about 0.9 moles to about 3.6 moles, about 1.1 moles to about 3.4 moles, about 1.3 moles to about 3.2 moles, or about 1.5 moles to about 3.0 moles). When the Si-containing compound is mixed within the above content range, a suitable number of black dots 20 in the dielectric layer 111 can be obtained, thus ensuring that the multilayer ceramic capacitor has excellent reliability and voltage withstand characteristics.

[0125] The secondary component powder may also include one or more additional components selected from compounds containing Dy, Tb, Mn, V, Ba, Al, Ca, and Sn.

[0126] Based on 100 moles of barium titanate-based main component powder, a Dy-containing compound can be mixed in an amount of about 0.1 moles to about 1 mole (e.g., 0.2 moles to 0.9 moles or 0.3 moles to 0.8 moles). Based on 100 moles of barium titanate-based main component powder, a Tb-containing compound can be mixed in an amount of 0.1 moles to about 1 mole (e.g., 0.2 moles to 0.9 moles or 0.3 moles to 0.8 moles). Based on 100 moles of barium titanate-based main component powder, a Mn-containing compound can be mixed in an amount of less than or equal to about 0.2 moles (e.g., about 0.01 moles to about 0.2 moles or about 0.05 moles to about 0.15 moles). Based on 100 moles of barium titanate-based main component powder, a V-containing compound can be mixed in an amount less than or equal to about 0.15 moles (e.g., about 0.01 moles to about 0.15 moles or about 0.05 moles to about 0.1 moles). Based on 100 moles of barium titanate-based main component powder, a Ba-containing compound can be mixed in an amount less than or equal to about 2 moles (e.g., about 0.1 moles to about 2 moles or about 0.5 moles to about 1.5 moles). Based on 100 moles of barium titanate-based main component powder, an Al-containing compound can be mixed in an amount of about 0.4 moles to about 0.6 moles (e.g., about 0.45 moles to about 0.55 moles). Based on 100 moles of barium titanate-based main component powder, a Ca-containing compound can be mixed in an amount less than or equal to about 0.8 moles (e.g., about 0.1 moles to about 0.8 moles or about 0.3 moles to about 0.6 moles). Based on 100 moles of barium titanate-based main component powder, a Sn-containing compound can be mixed in amounts from about 0.1 moles to about 5 moles (e.g., from about 0.5 moles to about 4.5 moles or from about 1 mole to about 4 moles). When the above-mentioned additional components are mixed in the above content range, the reliability and voltage withstand characteristics of multilayer ceramic capacitors can be improved.

[0127] The secondary component powders (i.e., compounds containing Si, Dy, Tb, Mn, V, Ba, Al, Ca, and Sn) may each be oxides, nitrides, or salt compounds, or may be used in the form of a sol dispersed in an organic solvent.

[0128] Dielectric pastes can be prepared by further mixing additives (such as dispersants, binders, plasticizers, lubricants, antistatic agents) and solvents.

[0129] The dispersant may include, for example, phosphate ester dispersants, polycarboxylic acid dispersants, or combinations thereof. Based on 100 parts by weight of barium titanate-based main component powder, about 0.1 parts by weight to about 5 parts by weight (e.g., about 0.3 parts by weight to about 3 parts by weight) of dispersant may be mixed. When the mixed dispersant is within the above range, the dielectric paste exhibits excellent dispersibility and the amount of impurities included in the manufactured dielectric layer can be reduced.

[0130] The binder can be, for example, acrylic resin, polyvinyl butyl resin, polyvinyl alcohol acetal resin, ethyl cellulose resin, etc. Based on 100 parts by weight of barium titanate-based main component powder, about 0.1 parts by weight to about 50 parts by weight (e.g., about 3 parts by weight to about 30 parts by weight) of binder can be added. When the mixed binder is within the above content range, the dielectric paste exhibits excellent dispersibility and can reduce the amount of impurities included in the manufactured dielectric layer.

[0131] Plasticizers can be, for example: phthalic acid compounds (such as dioctyl phthalate, butyl benzyl phthalate, dibutyl phthalate, dihexyl phthalate, di(2-ethylhexyl) phthalate, and di(2-ethylbutyl) phthalate); adipate compounds (such as dihexyl adipate and di(2-ethylhexyl) adipate); glycol compounds (such as ethylene glycol, diethylene glycol, and triethylene glycol); glycol ester compounds (such as triethylene glycol dibutyrate, triethylene glycol di(2-ethylbutyrate), and triethylene glycol di(2-ethylhexanoate)). Based on 100 parts by weight of barium titanate-based main component powder, about 0.1 parts by weight to about 20 parts by weight (e.g., about 1 part by weight to about 10 parts by weight) of plasticizer can be added. When the mixed plasticizer is within the above content range, the dielectric paste exhibits excellent dispersibility and can reduce the amount of impurities included in the manufactured dielectric layer.

[0132] Solvents can be: aqueous solvents (such as water); alcohol solvents (such as ethanol, methanol, benzyl alcohol, and methoxyethanol); glycol solvents (such as ethylene glycol and diethylene glycol); ketone solvents (such as acetone, methyl ethyl ketone, methyl isobutyl ketone, and cyclohexanone); ester solvents (such as butyl acetate, ethyl acetate, carbitol acetate, and butyl carbitol acetate); ether solvents (such as methyl cellosolve, ethyl cellosolve, butyl ether, and tetrahydrofuran); aromatic solvents (such as benzene, toluene, and xylene), etc. Considering the solubility or dispersibility of the various additives included in the dielectric paste, the solvent can be, for example, an alcohol solvent or an aromatic solvent. Based on 100 parts by weight of barium titanate-based main component powder, about 50 parts by weight to about 1000 parts by weight (e.g., about 100 parts by weight to about 500 parts by weight) of solvent can be mixed. When the mixed solvent is within the above range, the dielectric paste components can be sufficiently mixed and the solvent can be easily removed subsequently.

[0133] The dielectric slurry described above can be mixed using a wet ball mill or a stirred mill. When using zirconia balls in a wet ball mill, multiple zirconia balls with a diameter of about 0.1 mm to about 10 mm can be used for wet mixing for about 8 hours to about 48 hours, for example, about 10 hours to about 24 hours.

[0134] The prepared dielectric paste forms a dielectric layer after firing.

[0135] As a method for forming the prepared dielectric paste into a sheet, a strip forming method such as a doctor blade method or a calendering roll method can be used. For example, an on-roll forming coating machine using a coating head discharge method can be used to form the prepared dielectric paste into a molded body, and then the molded body can be dried to obtain a dielectric sheet.

[0136] To form a conductive paste layer that becomes the inner electrode layer after firing, the conductive paste is prepared by mixing conductive powder made of a conductive metal or its alloy, a binder, and a solvent. Furthermore, if desired, barium titanate powder can be mixed in as a co-material (i.e., the same material as the dielectric layer). The co-material helps to inhibit the sintering of the conductive powder during the firing process. The conductive paste layer is formed by applying the conductive paste in a prescribed pattern to the surface of the dielectric green sheet using various printing or transfer methods, such as screen printing.

[0137] The conductive powder may include nickel (Ni) or nickel (Ni) alloys.

[0138] Next, a dielectric green sheet stack is prepared by stacking multiple dielectric green sheets on which an internal electrode layer pattern is formed, and then pressing the multiple dielectric green sheets in the stacking direction. At this time, dielectric green sheets without an internal electrode layer pattern can be stacked, such that the dielectric green sheets are located on the upper and lower surfaces of the dielectric green sheet stack in the stacking direction.

[0139] The step of cutting the prepared dielectric sheet stack into a predetermined size by means of cutting or the like can be selectively performed.

[0140] Furthermore, if necessary, the dielectric green sheet stack can be cured and dried to remove plasticizers, etc., and after curing and drying, the dielectric green sheet stack can be tumble polished using a horizontal centrifugal tumbler or similar device. During tumble polishing, the dielectric green sheet stack is placed in a tumbler container containing a dielectric and polishing fluid, and rotational motion or vibration is applied to the tumbler container, thus polishing away unwanted parts (such as burrs generated during cutting). After tumble polishing, the dielectric green sheet stack can be washed with a cleaning solution (such as water) and dried.

[0141] Subsequently, the capacitor body can be prepared after the binder removal process (calcination) and firing of the dielectric green sheet stack.

[0142] The adhesive removal conditions can be appropriately adjusted according to the composition of the dielectric layer and / or the composition of the internal electrode layer. For example, the heating rate during the adhesive removal process can be from about 5°C / hour to about 300°C / hour, the holding temperature can be from about 180°C to about 400°C, and the temperature holding time can be from about 0.5 hours to about 24 hours. The adhesive removal process can be carried out in an air atmosphere or a reducing atmosphere.

[0143] The firing conditions can be appropriately adjusted according to the main component composition of the dielectric layer and / or the main component composition of the inner electrode layer. For example, firing can be carried out at a temperature of about 1100°C to about 1400°C, or, for example, at a temperature of about 1200°C to about 1350°C. Furthermore, firing can be carried out for about 0.5 hours to about 8 hours, or, for example, about 1 hour to about 3 hours. Moreover, firing can be carried out in a reducing atmosphere (e.g., in a wetting mixture of nitrogen and hydrogen), and under conditions such as a hydrogen concentration of less than or equal to about 1.0%. When the inner electrode layer comprises nickel (Ni) or a nickel (Ni) alloy, the oxygen partial pressure in the firing atmosphere can be about 1.0 × 10⁻⁶. -14 MPa to approximately 1.0 × 10 -10 MPa.

[0144] After firing, annealing can be performed as needed. Annealing is a process that re-oxidizes the dielectric layer, and it can be performed if firing is carried out in a reducing atmosphere. The annealing conditions can also be appropriately adjusted according to the composition of the dielectric layer. For example, the annealing temperature can be from about 950°C to about 1150°C, the time can be greater than about 0 and less than or equal to about 20 hours, and the heating rate can be from about 50°C / hour to about 500°C / hour. The annealing atmosphere can be a moistened nitrogen (N2) atmosphere, and the oxygen partial pressure can be about 1.0 × 10⁻⁶. -9 MPa to approximately 1.0 × 10-5 MPa.

[0145] In the adhesive removal process, firing process, or annealing process, a wetting agent (e.g., water) may be used to wet the nitrogen or mixed gas. In this case, the temperature of the wetting agent (e.g., water temperature) may be from about 5°C to about 75°C. The adhesive removal process, firing process, and annealing process may be performed sequentially or independently.

[0146] Optionally, the third and fourth surfaces of the capacitor body 110 may be surface treated (such as sandblasting, laser irradiation, tumble polishing, etc.). By performing this surface treatment, the ends of the first inner electrode layer and the second inner electrode layer can be exposed to the third and fourth surfaces, respectively, thereby improving the electrical connection between the first outer electrode and the first inner electrode layer and the electrical connection between the second outer electrode and the second inner electrode layer, and making it easier to form an alloy portion.

[0147] Subsequently, an external electrode is formed on the surface of the manufactured capacitor body 110.

[0148] As an example, a paste for forming a sintered metal layer can be applied to the surface of the manufactured capacitor body and then sintered to form the sintered metal layer.

[0149] The paste used to form the sintered metal layer may include conductive metals and glass. Since the description of conductive metals and glass is the same as that described above, repeated descriptions will be omitted. Alternatively, the paste used to form the sintered metal layer may include binders, solvents, dispersants, plasticizers, oxide powders, etc. The binder may be, for example, ethyl cellulose resin, acrylic resin, butyral resin, etc., and the solvent may be, for example, an organic solvent (such as terpineol, butyl carbitol, ethanol, methyl ethyl ketone, acetone, toluene, etc.) or an aqueous solvent.

[0150] Methods for applying a paste for forming a sintered metal layer to the outer surface of the capacitor body 110 may include dipping, various printing methods (such as screen printing), coating methods using a dispenser, and spraying methods using a spray gun. The paste for forming the sintered metal layer may be applied to at least the third and fourth surfaces of the capacitor body 110, and optionally to portions of the first, second, fifth, and / or sixth surfaces on which the strips of the first and second external electrodes will be formed.

[0151] Subsequently, the capacitor body 110 coated with paste for forming a sintered metal layer is dried and sintered at a temperature of about 700°C to about 1000°C for about 0.1 hours to about 3 hours to form a sintered metal layer.

[0152] Optionally, a paste for forming a conductive resin layer is coated onto the outer surface of the obtained capacitor body 110 and then cured to form a conductive resin layer.

[0153] The paste used to form the conductive resin layer may include a resin and a conductive metal, and optionally, a non-conductive filler. Since the description of the conductive metal and resin is the same as that described above, repeated descriptions will be omitted. Furthermore, the paste used to form the conductive resin layer may optionally include an adhesive, solvent, dispersant, plasticizer, oxide powder, etc. The adhesive may be, for example, ethyl cellulose resin, acrylic resin, butyral resin, etc., and the solvent may be an organic solvent (such as terpineol, butyl carbitol, ethanol, methyl ethyl ketone, acetone, and toluene) or an aqueous solvent.

[0154] For example, the conductive resin layer can be formed by immersing the capacitor body 110 in a paste for forming the conductive resin layer and then curing it, or by printing the paste for forming the conductive resin layer onto the surface of the capacitor body 110 by screen printing or gravure printing and then curing it, or by applying the paste for forming the conductive resin layer onto the surface of the capacitor body 110 and then curing it.

[0155] Next, a plating layer is formed on the outside of the conductive resin layer.

[0156] For example, a coating can be formed by plating, sputtering, or electroplating (electrodeposition).

[0157] In the following description, embodiments will be illustrated in more detail with reference to examples. However, these examples are exemplary, and the scope of the claims is not limited thereto.

[0158] (Manufacturing of multilayer ceramic capacitors) Examples 1 to 7 and Comparative Examples 1 to 6 Barium hydroxide octahydrate (Ba(OH)₂·8H₂O) was mixed with titanium dioxide (TiO₂) sol heated to 60°C or higher to prepare barium titanate seed crystals. Furthermore, Ba(OH)₂·8H₂O and TiO₂ sol were mixed at the Ba / Ti molar ratio shown in Table 1. Subsequently, the barium titanate seed crystals were grown at the temperatures shown in Table 1 and dried to prepare barium titanate (BaTiO₃) main component powder.

[0159] The prepared BaTiO3 main component powder is mixed with secondary component powders (such as 2.5 moles of SiO2, 0.5 moles of Dy2O3, 0.5 moles of Tb2O3, 0.1 moles of MnO2, 0.08 moles of V2O5, 1 mole of BaCO3, 0.5 moles of Al2O3, 0.4 moles of CaCO3 and 2.5 moles of SnO2 based on 100 moles of BaTiO3 main component powder) to prepare a dielectric paste.

[0160] In preparing the dielectric paste, mixing is carried out by using zirconia spheres (ZrO2 spheres) as the dispersion medium, adding ethanol / toluene and polyvinyl butyral (PVB) resin as wetting and dispersing agents and binders, and then mechanically grinding.

[0161] Dielectric green sheets are manufactured using dielectric paste by using a coating head discharge type roller forming coating machine.

[0162] A conductive paste layer including nickel (Ni) is printed on the surface of a dielectric green sheet, and the dielectric green sheets with the conductive paste layer formed on them are stacked and pressed to manufacture a dielectric green sheet stack.

[0163] A capacitor body is formed by calcining a dielectric green sheet stack at a temperature of 400°C or lower under a nitrogen atmosphere, and further calcining the dielectric green sheet stack at a firing temperature of 1300°C or lower and a hydrogen concentration of 1.0% or lower.

[0164] Subsequently, an external electrode is formed on the surface of the capacitor body using a process such as plating to form an external electrode, thereby manufacturing a multilayer ceramic capacitor.

[0165] (Table 1)

[0166] Evaluation 1 : TEM analysis TEM (transmission electron microscopy) analysis was performed on the multilayer ceramic capacitors manufactured in Examples 1 to 7 and Comparative Examples 1 to 6, and the results are shown in Table 2. Figure 6 and Figure 7 middle.

[0167] Specifically, cross-sectional samples in which the effective region, in which alternating dielectric and inner electrode layers are stacked, are observed are obtained by: placing multilayer ceramic capacitors manufactured in Examples 1 to 7 and Comparative Examples 1 to 6 into an epoxy resin mixture and curing them; polishing the W-axis and T-axis surfaces (WT surfaces) of the capacitor body to half the length of the capacitor body in the L-axis direction; and then fixing and holding them in a vacuum chamber. Next, the effective region of the cross-sectional sample is measured using transmission electron microscopy (TEM) such that at least one dielectric layer is visible. TEM is performed using Xe-FIB (focused ion beam) at an accelerating voltage of 200 kV in an area of ​​approximately 2.5 μm × 2.5 μm in the effective region (where at least one dielectric layer is visible). The number of black dots per 1 μm × 1 μm cross-section within the dielectric layer is confirmed in the TEM image of the measured cross-sectional sample.

[0168] (Table 2)

[0169] Figure 6 It is based on the TEM (transmission electron microscopy) image of the dielectric layer in Example 1, and Figure 7 The image is based on the TEM (transmission electron microscope) image of the dielectric layer of Comparative Example 1.

[0170] Reference Figure 6 and Figure 7 In Example 1, the number of black spots per 1μm × 1μm cross-sectional area in the dielectric layer is 4 as shown in Table 2, while in Comparative Example 1, there are no black spots.

[0171] Evaluation 2: TEM-EDS analysis TEM-EDS (Transmission Electron Microscopy-Energy Dispersive Spectroscopy) analysis was performed on the multilayer ceramic capacitors manufactured in Examples 1 to 7 and Comparative Examples 1 to 6, and the results of Examples 1 to 4 and Comparative Example 1 are shown below. Figures 8A to 12B middle.

[0172] Specifically, by performing EDS (energy dispersive spectroscopy) analysis on the TEM image of the cross-sectional sample obtained in Evaluation 1, the components included in the black spots 20 within the dielectric layer 111 can be confirmed.

[0173] Figures 8A to 8E The image is based on the TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis of the dielectric layer in Example 1. Figures 9A to 9E The image is based on the TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis of the dielectric layer in Example 2. Figures 10A to 10E The image is based on the TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis of the dielectric layer in Example 3. Figures 11A to 11EThe image is based on the TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis of the dielectric layer in Example 4, and Figures 12A to 12B The images are based on TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis of the dielectric layer of Comparative Example 1.

[0174] Reference Figures 8A to 11E In Examples 1 to 4, it was confirmed that the black spots in the dielectric grains of each dielectric layer included Si elements but excluded Ba, Ti, and O elements. In contrast, in Comparative Example 1, Figures 12A to 12B The dots shown appear similar to black dots, but do not include Si elements, thus confirming that they are different from the black dots according to the embodiment.

[0175] Evaluation 3: Voltage resistance characteristics The breakdown voltage (BDV) of the multilayer ceramic capacitors according to Examples 1 to 7 and Comparative Examples 1 to 6 was measured, and the results are shown in Table 3.

[0176] The breakdown voltage (BDV) was measured as follows: For each of Examples 1 to 7 and Comparative Examples 1 to 6, 50 multilayer ceramic capacitors were prepared. A Keithley measuring device (model 2410) was used to apply voltage to the multilayer ceramic capacitors in a scanning manner from 0V to 1100V in increments of 1.00000V to obtain the voltage at the moment when the current changed to 20mA. The results are shown in Table 3. The breakdown voltage (BDV) was measured in a silicone oil bath.

[0177] Table 3 provides the minimum and average values ​​of the measured BDV.

[0178] (Table 3)

[0179] Referring to Table 3, compared to Comparative Examples 1 and 2, Examples 1 to 7, which have 4 to 16 black dots per 1 μm × 1 μm cross-sectional area in the dielectric layer according to the embodiments, exhibited high insulation breakdown voltage and thus excellent withstand voltage characteristics. On the other hand, Comparative Examples 3 to 6 had excellent withstand voltage characteristics, but as shown in Evaluation 4, which will be described later, they exhibited deteriorated high-temperature stress reliability and moisture resistance reliability.

[0180] Evaluation 4: Reliability The high-temperature stress reliability (e.g., high-temperature accelerated life test (HALT)) and moisture resistance reliability of the multilayer ceramic capacitors according to Examples 1 to 7 and Comparative Examples 1 to 6 were measured, and the results are shown in Table 4.

[0181] Specifically, for each of Examples 1 to 7 and Comparative Examples 1 to 6, 40 multilayer ceramic capacitors were prepared and the prepared multilayer ceramic capacitors were mounted on a measurement substrate. High-temperature stress reliability (e.g., HALT) was measured at 150°C, 100 hours, and 100V using an ESPEC (PV-222, HALT) device, and moisture resistance reliability was measured at 85°C, 85% relative humidity (RH), 32V, and 24 hours using an ESPEC (PR-3J, 8585) device.

[0182] (Table 4)

[0183] Referring to Table 4, compared with Comparative Examples 1 to 6, Examples 1 to 7, which have 4 to 16 black dots per 1 μm × 1 μm cross-sectional area in the dielectric layer according to the embodiments, exhibit excellent high-temperature stress reliability and moisture resistance reliability.

[0184] While this disclosure has been described in conjunction with embodiments now considered practical, it should be understood that this disclosure is not limited to the disclosed embodiments, but rather is intended to cover various modifications and equivalents included within the spirit and scope of the appended claims.

Claims

1. A multilayer ceramic capacitor, comprising: The capacitor body includes a dielectric layer and an inner electrode layer; as well as The external electrode is disposed on the outside of the capacitor body. The dielectric layer comprises a plurality of dielectric grains, and at least one of the plurality of dielectric grains includes at least one black dot. The dielectric layer contains 4 to 16 black dots per 1μm × 1μm cross-sectional area, and The at least one black spot includes the element Si and does not contain at least two elements selected from Ba, Ti and O.

2. The multilayer ceramic capacitor according to claim 1, wherein, The size of the at least one black dot, measured along a straight line drawn along the long axis of the dielectric grain, is between 5 nm and 40 nm.

3. The multilayer ceramic capacitor according to claim 1, wherein, The dielectric layer further includes a black dot peripheral region, which is defined as a region extending from the at least one black dot to a distance corresponding to 10% to 100% of the size of the at least one black dot and extending in the outward direction of the at least one black dot.

4. The multilayer ceramic capacitor according to claim 3, wherein, The area surrounding the black dot has a shape that surrounds the at least one black dot.

5. The multilayer ceramic capacitor according to claim 3, wherein, The area surrounding the black dot includes Si, Ba, and Ti elements.

6. The multilayer ceramic capacitor according to claim 5, wherein, The dielectric layer comprises a barium titanate-based main component containing Ba and Ti, and a secondary component containing Si.

7. The multilayer ceramic capacitor according to claim 6, wherein, Based on 100 moles of the barium titanate-based main component, the molar ratio of Si element included in the at least one black spot and Si element included in the peripheral region of the black spot is in the range of 1:8 to 8:

1.

8. The multilayer ceramic capacitor according to claim 6, wherein, The secondary components also include one or more selected from Dy, Tb, Mn, V, Ba, Al, Ca and Sn.

9. The multilayer ceramic capacitor according to claim 8, wherein, The secondary components include Dy, Tb, Mn, V, Ba, Al, Ca, and Sn.

10. The multilayer ceramic capacitor according to claim 1, wherein, At least one of the plurality of dielectric grains includes a black dot.

11. The multilayer ceramic capacitor according to claim 1, wherein, The at least one black spot does not contain Ba, Ti, or O.

12. A method for manufacturing a multilayer ceramic capacitor, comprising: A dielectric paste was prepared by mixing barium titanate-based main component powder and secondary component powder. The dielectric paste is used to manufacture a dielectric green sheet, and a conductive paste layer is formed on the surface of the dielectric green sheet; A dielectric sheet stack is manufactured by stacking multiple dielectric sheets on which the conductive paste layer is formed; A capacitor body comprising a dielectric layer and an inner electrode layer is manufactured by firing the dielectric green sheet stack; and An external electrode is formed on the surface of the capacitor body. The dielectric layer comprises a plurality of dielectric grains, and at least one of the plurality of dielectric grains comprises at least one black spot. The dielectric layer comprises 4 to 16 black spots per 1 μm × 1 μm cross-sectional area, and the black spots comprise Si and do not include at least two elements selected from Ba, Ti and O.

13. The method according to claim 12, wherein, The barium titanate-based main component powder is prepared by a hydrothermal synthesis method, which includes: Mixing barium and titanium raw materials to prepare barium titanate seed crystals; and This allows the barium titanate seed crystals to grow.

14. The method according to claim 13, wherein, The barium raw material and the titanium raw material are mixed such that the Ba / Ti molar ratio is 1.020 to 1.

050.

15. The method according to claim 13, wherein, The grain growth is carried out at a temperature of 208°C to 242°C.

16. The method according to claim 12, wherein, The by-product powder includes Si-containing compounds.

17. The method according to claim 16, wherein, The Si-containing compound is mixed with 100 moles of the barium titanate-based main component powder in an amount of 0.5 to 4 moles.

18. The method according to claim 16, wherein, The secondary component powder also includes at least one selected from compounds containing Dy, Tb, Mn, V, Ba, Al, Ca, and Sn.

Images