Ethernet EOS protection circuit, host and computer equipment
The multi-layered protection circuit, consisting of an interface module, a first protection module, a network transformer, a second protection module, and a filtering module, solves the problem of network outages or packet loss caused by external electrical over-stress or electrostatic discharge in the RJ45 Ethernet interface. It also suppresses surge energy and electromagnetic interference, ensuring network stability.
Patent Information
- Application Number
- CN202511645476.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-11
- Publication Date
- 2026-02-10
AI Technical Summary
In existing technologies, RJ45 Ethernet interfaces are susceptible to external electrical stress or electrostatic discharge during use, which can lead to network outages or packet loss.
The circuit employs a multi-layered protection structure consisting of an interface module, a first protection module, a network transformer, a second protection module, and a filter module to suppress surge energy and electromagnetic interference, thereby preventing chip damage and suppressing electromagnetic interference.
It effectively avoids interface malfunctions caused by lightning surges and electrostatic discharge, and suppresses electromagnetic interference on the circuit board, ensuring network stability.
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Figure CN121507669A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of electronic equipment technology, and more particularly to Ethernet EOS protection circuits, host computers, and computer equipment. Background Technology
[0002] With the development of the electronics and semiconductor industry, electronic devices are becoming increasingly integrated and feature-rich. This brings with it various electromagnetic compatibility (EMC) issues, such as electromagnetic interference from the external environment to the electronic devices themselves and vice versa. Both industrial and consumer electronics face this problem. EMC issues not only affect product performance (e.g., compliance with national and regional standards) but also impact people's living environment. Therefore, EMC issues in electronic products are receiving increasing attention.
[0003] Ensuring that electronic products pass certification smoothly and operate stably in more complex environments is a problem that every R&D engineer inevitably encounters. Take the common RJ45 Ethernet interface as an example. This type of interface is frequently used in laptops, all-in-ones, PCs (personal computers), and servers. During use, it inevitably encounters a series of problems such as network outages and packet loss. These problems are generally caused by external ESD (Electrical Static Discharge) and EOS (Electrical Over Stress), leading to functional malfunctions. Therefore, there is an urgent need for protective measures to address these issues in the increasingly severe electromagnetic environment. Summary of the Invention
[0004] This invention provides an Ethernet EOS protection circuit, host, and computer equipment, aiming to solve the problem that RJ45 Ethernet interfaces in the prior art are prone to network outages or packet loss due to external electrical overstress or electrostatic discharge during use.
[0005] In a first aspect, embodiments of the present invention provide an Ethernet EOS protection circuit, including an interface module, a first protection module, a network transformer, a second protection module, a filtering module, and an external signal interface chip; the interface module is used to connect to a network cable; the first protection module is connected to the interface module and is also connected to the network transformer; the network transformer is also connected to the second protection module; the second protection module is also connected to the filtering module; the filtering module is also connected to the external signal interface chip; the interface module, the first protection module, the network transformer, the second protection module, and the filtering module are all used to suppress surge energy, and the second protection module is also used to suppress electromagnetic interference.
[0006] Secondly, embodiments of the present invention also provide a host computer, which includes the Ethernet EOS protection circuit described in the first aspect above, and further includes a chassis and a motherboard; the Ethernet EOS protection circuit is connected to the motherboard disposed in the chassis.
[0007] Thirdly, embodiments of the present invention also provide a computer device that includes the host described in the second aspect above.
[0008] This invention provides an Ethernet EOS protection circuit, a host computer, and a computer device. The Ethernet EOS protection circuit includes an interface module, a first protection module, a network transformer, a second protection module, a filtering module, and an external signal interface chip. The interface module is used to connect to a network cable. The first protection module is connected to the interface module and also to the network transformer. The network transformer is also connected to the second protection module. The second protection module is also connected to the filtering module. The filtering module is also connected to the external signal interface chip. The interface module, the first protection module, the network transformer, the second protection module, and the filtering module are all used to suppress surge energy. The second protection module is also used to suppress electromagnetic interference. This invention avoids interface malfunctions caused by EOS such as lightning surges and electrostatic discharge through multiple protections and can suppress electromagnetic interference on the connected circuit board. Attached Figure Description
[0009] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0010] Figure 1 This is a schematic block diagram of an Ethernet EOS protection circuit provided in an embodiment of the present invention; Figure 2 A circuit diagram of an interface module provided in an embodiment of the present invention; Figure 3 A circuit diagram of a first protection module and a network transformer provided in an embodiment of the present invention; Figure 4 This is a circuit diagram of a second protection module provided in an embodiment of the present invention; Figure 5 The circuit diagram is provided for a filtering module according to an embodiment of the present invention. Detailed Implementation
[0011] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0012] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.
[0013] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.
[0014] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.
[0015] In the embodiments of the present invention, any resistor or capacitor mentioned is arranged horizontally in the circuit diagram, and from left to right, they are the first end of the resistor or capacitor and the second end of the resistor or capacitor; if the resistor or capacitor is arranged perpendicular to the horizontal direction in the circuit diagram, from top to bottom, they are the first end of the resistor or capacitor and the second end of the resistor or capacitor.
[0016] Please see Figures 1 to 5 , Figure 1 This is a schematic block diagram of an Ethernet EOS protection circuit provided in an embodiment of the present invention; Figure 2 A circuit diagram of an interface module provided in an embodiment of the present invention; Figure 3 A circuit diagram of a first protection module and a network transformer provided in an embodiment of the present invention; Figure 4 This is a circuit diagram of a second protection module provided in an embodiment of the present invention; Figure 5 The circuit diagram is provided for a filtering module according to an embodiment of the present invention.
[0017] An Ethernet EOS protection circuit provided in this embodiment of the invention includes: an interface module 10, a first protection module 20, a network transformer 30, a second protection module 40, a filtering module 50, and an external signal interface chip 60; the interface module 10 is used to connect to a network cable; the first protection module 20 is connected to the interface module 10 and is also connected to the network transformer 30; the network transformer 30 is also connected to the second protection module 40; the second protection module 40 is also connected to the filtering module 50; the filtering module 50 is also connected to the external signal interface chip 60; the interface module 10, the first protection module 20, the network transformer 30, the second protection module 40, and the filtering module 50 are all used to suppress surge energy, and the second protection module 40 is also used to suppress electromagnetic interference.
[0018] In this embodiment, the Ethernet EOS protection circuit can be installed on the motherboard of an electronic device (such as a computer device). After the interface module in the Ethernet EOS protection circuit is connected to the Ethernet cable to access the Ethernet, in order to prevent surge energy from directly entering the motherboard through the interface ground, the interface module 10 can be connected to the network port ground instead of the motherboard ground.
[0019] Furthermore, while interface module 10 does not completely suppress surge energy, when surge energy enters the first protection module 20 and network transformer 30, secondary protection is provided by these modules. If this secondary protection also fails to suppress surge energy, when surge energy enters the second protection module 40 and filter module 50, further protection is provided by these modules, ensuring that the voltage of the input external signal interface chip 60 (i.e., the PHY chip, where PHY stands for Physical and represents the port physical layer) is less than the maximum voltage it can withstand, thus preventing chip damage. Moreover, the second protection module 40 can also dissipate ESD energy to motherboard ground when it enters the motherboard, suppressing electromagnetic interference. Therefore, the above circuit structure, through multiple layers of protection, avoids interface malfunctions caused by lightning surges and electrostatic discharge (ESD), and suppresses electromagnetic interference on the connected circuit boards.
[0020] In one embodiment, such as Figure 1 and Figure 2As shown, the interface module 10 includes an RJ45 interface RJ1, a first LED LED1, a second LED LED2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first capacitor C1, a second capacitor C2, a third capacitor C3, and a fourth capacitor C4. The G1 and G2 pins of the RJ45 interface RJ1 are both connected to the network port ground GND_R. The MX1+, MX1-, MX2+, MX2-, MX3+, MX3-, MX4+, and MX4- pins of the RJ45 interface RJ1 are all connected to the network transformer 30. The negative terminal of the first LED LED1 is connected to the network port ground GND_R through the first capacitor C1, and the negative terminal of the first LED LED1 is also connected sequentially through the fifth resistor R1. 5. The second resistor R2 is connected to the positive terminal of the first LED LED1. The negative terminal of the first LED LED1 is also grounded through the first resistor R1. The positive terminal of the first LED LED1 is connected to the network port ground GND_R through the second capacitor C2. The positive terminal of the first LED LED1 is also connected to the operating voltage through the sixth resistor R6. The negative terminal of the second LED LED2 is connected to the network port ground GND_R through the third capacitor C3. The negative terminal of the second LED LED2 is also connected to the positive terminal of the LED through the seventh resistor R7 and the fourth resistor R4 in sequence. The negative terminal of the second LED LED2 is also grounded through the third resistor R3. The positive terminal of the second LED LED2 is connected to the network port ground GND_R through the fourth capacitor C4. The positive terminal of the second LED LED2 is also connected to the operating voltage through the eighth resistor R8.
[0021] In this embodiment, when the interface module 10 with the above circuit structure is used, the G1 and G2 pins of the RJ45 interface RJ1 (specifically, RJ45) are both connected to the network socket ground GND_R and separated from the motherboard ground to prevent surge energy from directly entering the motherboard through the interface ground (i.e., the network socket ground GND_R). The first capacitor C1 and the second capacitor C2 serve as filter capacitors for the first LED LED1, and the third capacitor C3 and the fourth capacitor C4 serve as filter capacitors for the second LED LED2. The first resistor R1 to the eighth resistor R8 are used for voltage division and current limiting to effectively protect the RJ45 interface RJ1, the first LED LED1, and the second LED LED2.
[0022] In one embodiment, such as Figure 1 and Figure 2As shown, if the device corresponding to the Ethernet EOS protection circuit has a metal housing, the metal spring of the RJ45 interface RJ1 is connected to the metal housing, or the metal spring of the RJ45 interface RJ1 is connected to the metal housing through conductive foam.
[0023] In this embodiment, if the device corresponding to the Ethernet EOS protection circuit has a metal housing, the metal spring of the RJ45 interface RJ1 can be connected to the metal housing, or the metal spring of the RJ45 interface RJ1 can be connected to the metal housing through conductive foam. When surge energy enters from the RJ45 interface RJ1, a portion of the surge energy can be quickly discharged to the metal housing, and then discharged to the ground through the metal housing, thereby achieving primary suppression of surge energy.
[0024] In one embodiment, such as Figures 1-3 As shown, the first protection module 20 includes a first diode D1, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, and an eighth capacitor C8; the first diode D1 is a transient suppression diode; the first end of the ninth resistor R9 is connected to the network transformer 30, and the second end of the ninth resistor R9 is connected to the network port ground GND_R through the fifth capacitor C5; one end of the first diode D1 is connected to both the network transformer 30 and the first end of the ninth resistor R9, and the other end of the first diode D1 is connected to the network port socket. The first terminal of the tenth resistor R10 is connected to the network port ground GND_R, and the second terminal of the tenth resistor R10 is grounded; the first terminal of the eleventh resistor R11 is grounded, and the second terminal of the eleventh resistor R11 is connected to the network port ground GND_R; the first terminal of the sixth capacitor C6 is connected to the network port ground GND_R, and the second terminal of the sixth capacitor C6 is grounded; the first terminal of the seventh capacitor C7 is grounded, and the second terminal of the seventh capacitor C7 is connected to the network port ground GND_R; the first terminal of the eighth capacitor C8 is connected to the network transformer 30, and the second terminal of the eighth capacitor C8 is grounded.
[0025] In this embodiment, when the first protection module 20 with the above circuit structure is used, its main function is to provide impedance matching for the differential network port when the interface module 10 has not suppressed all surge energy and surge energy still enters the first protection module 20. When surge energy enters the first protection module 20 and the network transformer 30, the network transformer 30 and the fifth capacitor C5 can jointly withstand the surge energy specified by the transformer parameters. If a higher surge energy enters, the first diode D1, a transient suppression diode (i.e., TVS diode), begins to conduct and discharges current to ground, clamping the excessive voltage to a lower level. When the voltage in the overall circuit returns to normal, the first diode D1 disconnects and returns to the cutoff state. The first diode D1 can be considered as the center tap in the first protection module 20. The eighth capacitor C8 is considered as the secondary tap in the first protection module 20 and is used for filtering. The RJ45 interface RJ1 uses resistors R9 (ninth) and R10 (tenth) to achieve a single-point connection between the network port ground GND_R and the motherboard ground, which can effectively reduce electromagnetic interference caused by the return path. Furthermore, electromagnetic interference can be filtered out through capacitors C6 (sixth) and C7 (seventh).
[0026] In one embodiment, such as Figures 1-3 As shown, the network transformer 30 is a 1000M network transformer 30; the MX1+, MX1-, MX2+, MX2-, MX3+, MX3-, MX4+, and MX4- pins of the network transformer 30 are all connected to the interface module 10; the TD1+, TD1-, TD2+, TD2-, TD3+, TD3-, TD4+, and TD4- pins of the network transformer 30 are all connected to the second protection module 40.
[0027] In this embodiment, when the MX1+, MX1-, MX2+, MX2-, MX3+, MX3-, MX4+, and MX4- pins of the network transformer 30 are all connected to the interface module 10, more specifically, the MX4- pin of the network transformer 30 is connected to the MX1+ pin of the RJ45 interface RJ1 in the interface module 10, the MX4+ pin of the network transformer 30 is connected to the MX1- pin of the RJ45 interface RJ1 in the interface module 10, the MX3- pin of the network transformer 30 is connected to the MX2+ pin of the RJ45 interface RJ1 in the interface module 10, the MX3+ pin of the network transformer 30 is connected to the MX2- pin of the RJ45 interface RJ1 in the interface module 10, the MX2- pin of the network transformer 30 is connected to the MX3+ pin of the RJ45 interface RJ1 in the interface module 10, and the MX2+ pin of the network transformer 30 is connected to the MX3- pin of the RJ45 interface RJ1 in the interface module 10. The MX1- pin of the network transformer 30 is connected to the MX4+ pin of the RJ45 interface RJ1 in the interface module 10, and the MX1+ pin of the network transformer 30 is connected to the MX4- pin of the RJ45 interface RJ1 in the interface module 10. The network transformer 30 is a 1000M network transformer 30, specifically model G24107 / SMD. As a component of the secondary protection structure, the network transformer 30, together with the fifth capacitor C5, can withstand part of the surge energy.
[0028] In one embodiment, such as Figures 1-4 As shown, the second protection module 40 includes a first transient voltage suppressor DRJ1, a second transient voltage suppressor DRJ2, a second diode D2, a third diode D3, a fourth diode D4, and a fifth diode D5; Pins 1, 3, 4 and 6 of the first transient voltage suppressor DRJ1 are all connected to the network transformer 30, pin 2 of the first transient voltage suppressor DRJ1 is grounded, and pin 5 of the first transient voltage suppressor DRJ1 is connected to the operating voltage. Pins 1, 3, 4 and 6 of the second transient voltage suppressor DRJ2 are all connected to the network transformer 30, pin 2 of the second transient voltage suppressor DRJ2 is grounded, and pin 5 of the second transient voltage suppressor DRJ2 is connected to the operating voltage. The first and second ends of the second diode D2 are both connected to the network transformer 30; the first and second ends of the third diode D3 are both connected to the network transformer 30; the first and second ends of the fourth diode D4 are both connected to the network transformer 30; and the first and second ends of the fifth diode D5 are both connected to the network transformer 30.
[0029] In this embodiment, the first transient voltage suppressor DRJ1 and the second transient voltage suppressor DRJ2 can be transient voltage suppressors of model CM1293. The first transient voltage suppressor DRJ1 has its first pin connected to the TD4- pin of the network transformer 30, its third pin connected to the TD3+ pin of the network transformer 30, its fourth pin connected to the TD3- pin of the network transformer 30, and its sixth pin connected to the TD4+ pin of the network transformer 30. The second transient voltage suppressor DRJ2 has its first pin connected to the TD2- pin of the network transformer 30, its third pin connected to the TD1+ pin of the network transformer 30, its fourth pin connected to the TD1- pin of the network transformer 30, and its sixth pin connected to the TD2+ pin of the network transformer 30. The first end of the second diode D2 is connected to the TD4- pin of the network transformer 30 and the second end is connected to the TD4+ pin of the network transformer 30; the first end of the third diode D3 is connected to the TD3- pin of the network transformer 30 and the second end is connected to the TD3+ pin of the network transformer 30; the first end of the fourth diode D4 is connected to the TD2- pin of the network transformer 30 and the second end is connected to the TD2+ pin of the network transformer 30; the first end of the fifth diode D5 is connected to the TD1- pin of the network transformer 30 and the second end is connected to the TD1+ pin of the network transformer 30.
[0030] When a differential-mode surge passes through the network transformer 30 to the second protection module 40, the second diode D2, the third diode D3, the fourth diode D4, and the fifth diode D5 react quickly, clamping the overvoltage to a low level, below the maximum voltage that the external signal interface chip 60 can withstand, preventing chip damage. If the differential-mode surge passing through the second protection module 40 still has significant energy, the filter module 50 needs to further suppress it. Furthermore, when ESD energy enters the second protection module 40, the first transient voltage suppressor DRJ1 and the second transient voltage suppressor DRJ2 quickly conduct, dissipating the electrostatic energy to the motherboard ground, preventing interference with network port signals and power supplies on the motherboard.
[0031] In one embodiment, such as Figures 1-5 As shown, the filtering module 50 includes a common-mode inductor group and a voltage divider and current-limiting resistor group; the first end of the common-mode inductor group is connected to the network transformer 30, and the second end of the common-mode inductor group is connected to the network transformer 30 through the voltage divider and current-limiting resistor group.
[0032] In this embodiment, the common-mode inductor group in the filter module 50 is used to suppress possible high-frequency common-mode interference when there is differential-mode surge energy; the voltage divider and current limiting resistor group is used to perform voltage divider and current limiting when there is differential-mode surge energy, and forces the second diode D2, the third diode D3, the fourth diode D4 and the fifth diode D5 in the second protection module 40 to respond quickly, so as to prevent affecting the normal operation of the external signal interface chip 60 and the subsequent circuit.
[0033] In one embodiment, such as Figures 1-5 As shown, the common-mode inductor group includes a first common-mode inductor LL1, a second common-mode inductor LL2, a third common-mode inductor LL3, and a fourth common-mode inductor LL4; the voltage divider and current-limiting resistor group includes a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, and a nineteenth resistor R19. The first terminal of the first common mode inductor LL1 is connected to the TD4+ and TD4- pins of the network transformer 30, and the second terminal of the first common mode inductor LL1 is connected to the first terminal of the first common mode inductor LL1 through the twelfth resistor R12 and the thirteenth resistor R13. The first end of the second common mode inductor LL2 is connected to the TD3+ and TD3- pins of the network transformer 30, and the second end of the second common mode inductor LL2 is connected to the first end of the second common mode inductor LL2 through the fourteenth resistor R14 and the fifteenth resistor R15. The first end of the third common mode inductor LL3 is connected to the TD2+ pin and T24- pin of the network transformer 30, and the second end of the third common mode inductor LL3 is connected to the first end of the third common mode inductor LL3 through the sixteenth resistor R16 and the seventeenth resistor R17. The first end of the fourth common-mode inductor LL4 is connected to the TD1+ and TD1- pins of the network transformer 30, and the second end of the fourth common-mode inductor LL4 is connected to the first end of the fourth common-mode inductor LL4 through the eighteenth resistor R18 and the nineteenth resistor R19.
[0034] In this embodiment, when the common-mode inductor group and voltage divider current-limiting resistor group with the above circuit structure are used, when there is differential-mode surge energy, the first common-mode inductor LL1, the second common-mode inductor LL2, the third common-mode inductor LL3 and the fourth common-mode inductor LL4 connected in series on the network differential line are used to suppress possible high-frequency common-mode interference. When there is differential-mode surge energy, the twelfth resistor R12, the thirteenth resistor R13, the fourteenth resistor R14, the fifteenth resistor R15, the sixteenth resistor R16, the seventeenth resistor R17, the eighteenth resistor R18 and the nineteenth resistor R19 are used to perform voltage divider current limiting, and the second diode D2, the third diode D3, the fourth diode D4 and the fifth diode D5 in the second protection module 40 are forced to respond quickly to prevent affecting the normal operation of the external signal interface chip 60 and the subsequent circuit.
[0035] As can be seen, the Ethernet EOS protection circuit of the present invention avoids interface function abnormalities caused by EOS such as lightning surges and electrostatic discharge through multiple protections, and can suppress electromagnetic interference on the connected circuit board.
[0036] This invention also provides a host computer that includes an Ethernet EOS protection circuit as described in any of the foregoing embodiments, and further includes a chassis and a motherboard; the Ethernet EOS protection circuit is connected to the motherboard disposed within the chassis.
[0037] In this embodiment, the host includes a chassis, a motherboard, and the Ethernet EOS protection circuit described in any of the foregoing embodiments. The Ethernet EOS protection circuit is connected to the motherboard located inside the chassis, and therefore has at least all the beneficial effects brought about by the technical solutions of the foregoing embodiments, which will not be described in detail here.
[0038] This invention also provides a computer device comprising a host as described in any of the foregoing embodiments.
[0039] In this embodiment, the computer device includes a host as described in any of the foregoing embodiments, and therefore possesses at least all the beneficial effects brought about by the technical solutions of the foregoing embodiments, which will not be elaborated upon here. In specific implementations, the computer device may be a laptop computer, an all-in-one computer, a PC (i.e., a personal computer), or a server, etc.
[0040] This invention provides an Ethernet EOS protection circuit, a host computer, and a computer device. The Ethernet EOS protection circuit includes an interface module, a first protection module, a network transformer, a second protection module, a filter module, and an external signal interface chip. The interface module is used to connect to a network cable. The first protection module is connected to the interface module and also to the network transformer. The network transformer is also connected to the second protection module. The second protection module is also connected to the filter module. The filter module is also connected to the external signal interface chip. The interface module, the first protection module, the network transformer, the second protection module, and the filter module are all used to suppress surge energy. This invention avoids interface malfunctions caused by EOS such as lightning surges and electrostatic discharge through multiple protections and can suppress electromagnetic interference on the connected circuit board.
[0041] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.
Claims
1. An Ethernet EOS protection circuit, characterized in that, The system includes an interface module, a first protection module, a network transformer, a second protection module, a filtering module, and an external signal interface chip. The interface module is used to connect to a network cable. The first protection module is connected to the interface module and also to the network transformer. The network transformer is also connected to the second protection module. The second protection module is also connected to the filtering module. The filtering module is also connected to the external signal interface chip. The interface module, the first protection module, the network transformer, the second protection module, and the filtering module are all used to suppress surge energy. The second protection module is also used to suppress electromagnetic interference.
2. The Ethernet EOS protection circuit according to claim 1, characterized in that, The interface module includes an RJ45 interface, a first LED, a second LED, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor. The G1 and G2 pins of the RJ45 interface are both connected to the network socket ground. The MX1+, MX1-, MX2+, MX2-, MX3+, MX3-, MX4+, and MX4- pins of the RJ45 interface are all connected to the network transformer. The negative terminal of the first LED is connected to the network socket ground through the first capacitor, and the negative terminal of the first LED is also connected sequentially through the fifth resistor. The first LED is connected to the positive terminal of the first LED via the first resistor and the negative terminal of the first LED via the first resistor. The positive terminal of the first LED is connected to the network socket ground via the second capacitor and the operating voltage via the sixth resistor. The negative terminal of the second LED is connected to the network socket ground via the third capacitor and the positive terminal of the second LED is connected to the positive terminal of the LED via the seventh resistor and the fourth resistor. The negative terminal of the second LED is also connected to the ground via the third resistor and the positive terminal of the second LED is connected to the network socket ground via the fourth capacitor and the operating voltage via the eighth resistor.
3. The Ethernet EOS protection circuit according to claim 2, characterized in that, If the device corresponding to the Ethernet EOS protection circuit has a metal housing, the metal spring of the RJ45 interface is connected to the metal housing, or the metal spring of the RJ45 interface is connected to the metal housing through conductive foam.
4. The Ethernet EOS protection circuit according to claim 1, characterized in that, The first protection module includes a first diode, a ninth resistor, a tenth resistor, an eleventh resistor, a fifth capacitor, a sixth capacitor, a seventh capacitor, and an eighth capacitor. The first diode is a transient suppression diode. The first end of the ninth resistor is connected to the network transformer, and the second end of the ninth resistor is connected to the network port ground through the fifth capacitor. One end of the first diode is connected to both the network transformer and the first end of the ninth resistor, and the other end of the first diode is connected to the network port ground. The first end of the tenth resistor is connected to the network port ground, and the second end of the tenth resistor is grounded. The first end of the eleventh resistor is grounded, and the second end of the eleventh resistor is connected to the network port ground. The first end of the sixth capacitor is connected to the network port ground, and the second end of the sixth capacitor is grounded. The first end of the seventh capacitor is grounded, and the second end of the seventh capacitor is connected to the network port ground. The first end of the eighth capacitor is connected to the network transformer, and the second end of the eighth capacitor is grounded.
5. The Ethernet EOS protection circuit according to claim 1, characterized in that, The network transformer is a 1000M network transformer; the MX1+, MX1-, MX2+, MX2-, MX3+, MX3-, MX4+, and MX4- pins of the network transformer are all connected to the interface module; the TD1+, TD1-, TD2+, TD2-, TD3+, TD3-, TD4+, and TD4- pins of the network transformer are all connected to the second protection module.
6. The Ethernet EOS protection circuit according to claim 1, characterized in that, The second protection module includes a first transient voltage suppressor, a second transient voltage suppressor, a second diode, a third diode, a fourth diode, and a fifth diode; Pins 1, 3, 4 and 6 of the first transient voltage suppressor are all connected to the network transformer, pin 2 of the first transient voltage suppressor is grounded, and pin 5 of the first transient voltage suppressor is connected to the operating voltage. Pins 1, 3, 4 and 6 of the second transient voltage suppressor are all connected to the network transformer, pin 2 of the second transient voltage suppressor is grounded, and pin 5 of the second transient voltage suppressor is connected to the operating voltage. The first and second ends of the second diode are both connected to the network transformer; the first and second ends of the third diode are both connected to the network transformer; the first and second ends of the fourth diode are both connected to the network transformer; and the first and second ends of the fifth diode are both connected to the network transformer.
7. The Ethernet EOS protection circuit according to claim 1, characterized in that, The filtering module includes a common-mode inductor group and a voltage divider and current-limiting resistor group; the first end of the common-mode inductor group is connected to the network transformer, and the second end of the common-mode inductor group is connected to the network transformer through the voltage divider and current-limiting resistor group.
8. The Ethernet EOS protection circuit according to claim 7, characterized in that, The common-mode inductor group includes a first common-mode inductor, a second common-mode inductor, a third common-mode inductor, and a fourth common-mode inductor; the voltage divider and current-limiting resistor group includes a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, and a nineteenth resistor; The first terminal of the first common mode inductor is connected to the TD4+ and TD4- pins of the network transformer, and the second terminal of the first common mode inductor is connected to the first terminal of the first common mode inductor through the twelfth resistor and the thirteenth resistor. The first terminal of the second common mode inductor is connected to the TD3+ and TD3- pins of the network transformer, and the second terminal of the second common mode inductor is connected to the first terminal of the second common mode inductor through the fourteenth resistor and the fifteenth resistor; The first terminal of the third common-mode inductor is connected to the TD2+ and T24- pins of the network transformer, and the second terminal of the third common-mode inductor is connected to the first terminal of the third common-mode inductor through the sixteenth resistor and the seventeenth resistor. The first terminal of the fourth common-mode inductor is connected to the TD1+ and TD1- pins of the network transformer, and the second terminal of the fourth common-mode inductor is connected to the first terminal of the fourth common-mode inductor through the eighteenth and nineteenth resistors.
9. A host computer, characterized in that, The device includes the Ethernet EOS protection circuit as described in any one of claims 1-8, and further includes a chassis and a motherboard; the Ethernet EOS protection circuit is connected to the motherboard located within the chassis.
10. A computer device, characterized in that, Includes the host as described in claim 9.