Constant current and PWM dual-drive circuit suitable for IP module

Abstract

The invention discloses a constant current and PWM dual-drive circuit suitable for an IP module. The constant current and PWM dual-drive circuit comprises a PWM signal source, a constant current signal source, MOS tubes Q5 and Q6, operational amplifiers U19 and U20, a current source and an output signal source. If the PWM signal source has a signal, the Q5 is conducted, so that the driving current flows to the U20 from the current source, and then flows to the output signal source AIN6IPIN after being amplified; if the constant current signal source has a signal, the signal is amplified by the U19 and then the Q6 is conducted, so that the driving current flows to the operational amplifier U20 from the current source J4, and then flows to the output signal source AIN6IPIN after being amplified. According to the control method suitable for the IP module, by adjusting the superposition proportion of PWM driving and constant-current driving, noise generated in the operation process of the IP module can be effectively reduced while the control precision and speed meeting the actual requirements can be obtained.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of valve, especially to a constant current and PWM dual drive circuit suitable for IP module. BACKGROUND

[0002] The valve positioner is the main accessory of the regulating valve, which is usually used with the pneumatic regulating valve. It receives the output signal of the regulator, and then controls the pneumatic regulating valve with its output signal. When the regulating valve acts, the displacement of the valve rod is fed back to the valve positioner through the mechanical device, and the valve position is transmitted to the upper system through the electrical signal.

[0003] The key component of the valve positioner is the electrical conversion module (i.e. IP module), which mainly converts the electrical signal into the pneumatic signal. Through the amplification of the back pressure and flow control of the nozzle, it has enough power to operate the pneumatic regulating valve. The precision, real-time performance, reliability, vibration resistance and low power consumption of the IP module will directly affect the overall performance of the valve positioner. Designing an excellent IP module is the key to realizing the intelligence of the valve positioner.

[0004] The soft magnetic counterweight type nozzle baffle electrical conversion module provides a soft magnetic counterweight type nozzle baffle electrical conversion module. The baffle is designed as a seesaw structure, and the counterweight plate is used to balance the stress of the baffle, thereby effectively reducing the demand for the force of the electromagnetic coil, obtaining the technical effects of reducing power consumption and improving sensitivity. However, since the stress balance of the counterweight plate is very sensitive, it is difficult to provide a fast response when using the traditional constant current drive mode to drive the IP module, so it is impossible to obtain a stable control value.

[0005] In other structures of IP module, there are similar problems. If the sensitivity of the baffle is improved through mechanical design, it is difficult to obtain a stable control value only through the constant current drive mode. SUMMARY

[0006] In view of the above problems existing in the prior art, the present application provides a constant current and PWM dual drive circuit. The PWM drive circuit is used to provide a fast response and obtain a stable control value. In order to eliminate the noise during the operation of the IP module, the constant current drive circuit is set to reduce the airflow vibration caused by the rapid change of voltage. By adjusting the superposition ratio of the PWM drive and the constant current drive, a balance between fast response and noise suppression can be achieved.

[0007] The technical scheme of the present application is as follows: The application discloses a constant current and PWM double drive circuit suitable for an IP module, which comprises a constant current signal source PA5_IP_DAC, a PWM signal source PB11_T2_C4_IP, a MOS tube Q5, a MOS tube Q6, a current source J4, an operational amplifier U19, an operational amplifier U20 and an output signal source AIN6_IP_IN; the constant current signal source PA5_IP_DAC and the PWM signal source PB11_T2_C4_IP are control signals of a coil current of the IP module, and the output signal source AIN6_IP_IN is a coil current feedback output of the IP module. The PWM signal source PB11_T2_C4_IP is connected with a resistor R184, the resistor R184 is connected with a gate of the MOS tube Q5; the current source J4 comprises a positive output end IP_DRV+ and a negative output end IP_DRV-, a source of the MOS tube Q5 is connected with the negative output end IP_DRV-; one end of a resistor R185 is connected between the resistor R184 and the gate of the MOS tube Q5, and the other end is grounded. The constant current signal source PA5_IP_DAC is connected with a resistor R188, the resistor R188 is connected with a positive input end V+ of the operational amplifier U19; one end of a resistor R189 is grounded, and the other end is connected between the resistor R188 and the positive input end V+ of the operational amplifier U19; one end of a capacitor C124 is grounded, and the other end is connected between the resistor R188 and the positive input end V+ of the operational amplifier U19. A signal output end of the operational amplifier U19 is connected with a resistor R187, the resistor R187 is connected with a gate of the MOS tube Q6; a drain of the MOS tube Q6 is connected with the negative output end IP_DRV-; a source of the MOS tube Q6 is connected with a resistor R192, the resistor R192 is connected with a negative input end V- of the operational amplifier U19; a drain of the MOS tube Q5 is connected with the drain of the MOS tube Q6 in parallel. The source of the MOS tube Q6 is connected with a resistor R193, the resistor R193 is connected with a resistor R196, and the resistor R196 is grounded; one end of a resistor R195 is connected between the resistor R193 and the resistor R196, and the other end is connected with a positive input end V+ of the operational amplifier U20; a signal output end of the operational amplifier U20 is connected with a resistor R194, the resistor R194 is connected with the output signal source AIN6_IP_IN; one end of a resistor R191 is connected between the resistor R194 and the signal output end of the operational amplifier U20, and the other end is connected with a negative input end V- of the operational amplifier U20; one end of a resistor R190 is grounded, and the other end is connected between the resistor R191 and the negative input end V- of the operational amplifier U20.

[0008] Furthermore, it includes a first power supply VDD1, a second power supply VDD2, MOSFET Q3, MOSFET Q4, an enable signal source PB2_IP_HI_PWR_EN, and an output power supply IP_DRV_PWR+; the output power supply IP_DRV_PWR+ is the power supply for the IP module. The second power supply VDD2 is connected to diode D21, diode D21 is connected to resistor R179, and resistor R179 is connected to the output power supply IP_DRV_PWR+. The enable signal source PB2_IP_HI_PWR_EN is connected to the gate of MOS transistor Q4 through resistor R181; the source of MOS transistor Q4 is grounded. The first power supply VDD1 is connected to the source of MOSFET Q3 and to the gate of MOSFET Q3 through resistor R176; the drain of MOSFET Q4 is connected to the gate of MOSFET Q3 through resistor R178. The drain of MOSFET Q3 is connected to the output power supply IP_DRV_PWR+ through diode D20.

[0009] Furthermore, a filter circuit is provided between the first power supply VDD1 and the resistor R176; the filter circuit includes resistors R174 and R175 and capacitors C114 and C115. The first power supply VDD1 is connected to resistor R175, resistor R175 is connected to resistor R174, and resistor R174 is connected to both resistor R176 and the source of MOSFET Q3. One end of capacitor C115 is grounded, and the other end is connected between resistors R175 and R174; one end of capacitor C114 is grounded, and the other end is connected between resistors R174 and R176.

[0010] Furthermore, it includes capacitor C127; one end of capacitor C127 is connected to the negative input terminal V- of operational amplifier U19, and the other end is connected to the signal output terminal of operational amplifier U19.

[0011] Furthermore, it includes capacitors C128 and C90; the negative input terminal V- of the operational amplifier U20 is connected to one end of capacitors C128 and C90, and the other end of capacitors C128 and C90 is connected to the signal output terminal of the operational amplifier U20; capacitors C128 and C90 are connected in parallel.

[0012] Furthermore, it includes capacitor C132; one end of capacitor C132 is grounded, and the other end is connected between resistor R195 and the positive input terminal V+ of operational amplifier U20.

[0013] Furthermore, it includes capacitor C129; one end of capacitor C129 is grounded, and the other end is connected between resistor R194 and the output signal source AIN6_IP_IN.

[0014] Furthermore, it includes a capacitor C122; one end of the capacitor C122 is grounded, and the other end is connected between a resistor R179 and a diode D21.

[0015] Furthermore, it includes capacitor C123; one end of capacitor C123 is grounded, and the other end is connected between resistor R179 and the output power supply IP_DRV_PWR+.

[0016] The beneficial technical effects of this invention are as follows: By using a dual-drive approach of constant current and PWM, the highly sensitive IP module can be effectively controlled. This not only meets the requirements of practical applications in terms of control accuracy and speed, but also effectively suppresses the noise generated by high-speed airflow vibration. Attached Figure Description

[0017] Figure 1 This is a circuit diagram of constant current and PWM dual drive in an embodiment; Figure 2 This is a circuit diagram of the redundant power supply in an embodiment. Detailed Implementation

[0018] The present invention will now be described in detail with reference to the accompanying drawings and embodiments. Obviously, the described embodiments are merely some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0019] The circuit diagram of the embodiment is as follows Figure 1 , 2 As shown, it mainly includes a constant current signal source PA5_IP_DAC, a PWM signal source PB11_T2_C4_IP, MOSFET Q5, MOSFET Q6, a current source J4, operational amplifier U19, operational amplifier U20, and an output signal source AIN6_IP_IN. The constant current signal source PA5_IP_DAC and the PWM signal source PB11_T2_C4_IP are both control signals for the coil current of the IP module, and the output signal source AIN6_IP_IN is the coil current of the IP module.

[0020] The PWM signal source PB11_T2_C4_IP is connected to resistor R184, which is connected to the gate of MOSFET Q5. The current source J4 includes a positive output terminal IP_DRV+ and a negative output terminal IP_DRV-. The source of MOSFET Q5 is connected to the negative output terminal IP_DRV-. One end of resistor R185 is connected between resistor R184 and the gate of MOSFET Q5, and the other end is grounded.

[0021] The constant current signal source PA5_IP_DAC is connected to resistor R188, which is connected to the positive input terminal V+ of operational amplifier U19. One end of resistor R189 is grounded, and the other end is connected between resistor R188 and the positive input terminal V+ of operational amplifier U19. One end of capacitor C124 is grounded, and the other end is connected between resistor R188 and the positive input terminal V+ of operational amplifier U19.

[0022] The signal output terminal of operational amplifier U19 is connected to resistor R187, which is connected to the gate of MOSFET Q6; the drain of MOSFET Q6 is connected to the negative output terminal IP_DRV-; the source of MOSFET Q6 is connected to resistor R192, which is connected to the negative input terminal V- of operational amplifier U19; the drain of MOSFET Q5 is connected in parallel with the drain of MOSFET Q6.

[0023] The source of MOSFET Q6 is connected to resistor R193, which in turn is connected to resistor R196, which is grounded. One end of resistor R195 is connected between resistors R193 and R196, and the other end is connected to the positive input terminal V+ of operational amplifier U20. The signal output terminal of operational amplifier U20 is connected to resistor R194, which is connected to the output signal source AIN6_IP_IN. One end of resistor R191 is connected between resistor R194 and the signal output terminal of operational amplifier U20, and the other end is connected to the negative input terminal V- of operational amplifier U20. One end of resistor R190 is grounded, and the other end is connected between resistor R191 and the negative input terminal V- of operational amplifier U20.

[0024] The embodiment also includes a redundant power supply module, comprising a first power supply VDD1, a second power supply VDD2, MOSFETs Q3 and Q4, an enable signal source PB2_IP_HI_PWR_EN, and an output power supply IP_DRV_PWR+. The output power supply IP_DRV_PWR+ is the power supply for the IP module.

[0025] The second power supply VDD2 is connected to diode D21, diode D21 is connected to resistor R179, and resistor R179 is connected to the output power supply IP_DRV_PWR+. The enable signal source PB2_IP_HI_PWR_EN is connected to the gate of MOSFET Q4 through resistor R181; the source of MOSFET Q4 is grounded.

[0026] The first power supply VDD1 is connected to the source of MOSFET Q3 and to the gate of MOSFET Q3 through resistor R176; the drain of MOSFET Q4 is connected to the gate of MOSFET Q3 through resistor R178; the drain of MOSFET Q3 is connected to the output power supply IP_DRV_PWR+ through diode D20.

[0027] A filter circuit is provided between the first power supply VDD1 and resistor R176; the filter circuit includes resistors R174 and R175 and capacitors C114 and C115; the first power supply VDD1 is connected to resistor R175, resistor R175 is connected to resistor R174, and resistor R174 is connected to both resistor R176 and the source of MOSFET Q3; one end of capacitor C115 is grounded, and the other end is connected between resistors R175 and R174; one end of capacitor C114 is grounded, and the other end is connected between resistors R174 and R176.

[0028] For effective filtering, capacitors C127, C128, C90, C132, C129, C122, and C123 are provided in this embodiment. One end of capacitor C127 is connected to the negative input terminal V- of operational amplifier U19, and the other end is connected to the signal output terminal of operational amplifier U19. The negative input terminal V- of operational amplifier U20 is connected to one end of capacitors C128 and C90, and the other ends of capacitors C128 and C90 are connected to the signal output terminal of operational amplifier U20. Capacitor C128... It is connected in parallel with capacitor C90; one end of capacitor C132 is grounded, and the other end is connected between resistor R195 and the positive input terminal V+ of operational amplifier U20; one end of capacitor C129 is grounded, and the other end is connected between resistor R194 and the output signal source AIN6_IP_IN; one end of capacitor C122 is grounded, and the other end is connected between resistor R179 and diode D21; one end of capacitor C123 is grounded, and the other end is connected between resistor R179 and the output power supply IP_DRV_PWR+.

[0029] The working principle of the embodiment is as follows: If the PWM signal source PB11_T2_C4_IP has a signal, then MOSFET Q5 will be turned on, causing the drive current to flow from current source J4 to operational amplifier U20, and then to the output signal source AIN6_IP_IN after amplification; if the constant current signal source PA5_IP_DAC has a signal, then MOSFET Q6 will be turned on, causing the drive current to flow from current source J4 to operational amplifier U20, and then to the output signal source AIN6_IP_IN after amplification.

[0030] Traditional IP modules are mostly driven by constant current. However, the IP module driven in this embodiment features an innovative design using a seesaw-like baffle. This structure effectively improves the sensitivity of the IP module, but it also increases the difficulty of control, making it difficult to achieve stable airflow pressure using constant current drive. To improve the response speed of the control system, PWM drive is chosen, which can meet the practical application requirements in terms of speed and stability. However, in practical applications, it has been found that the IP module generates considerable noise during operation. The noise may originate from the following aspects: (1) Friction between the baffle and the nozzle: Friction occurs between the gap between the baffle and the nozzle, which generates noise.

[0031] (2) Unstable movement of the baffle: When adjusting the flow rate, the unevenness of the counterweight or the looseness of the adjustment mechanism can cause the baffle to move unstable, resulting in noise.

[0032] (3) Instability of gas flow: When the fluid passes through the nozzle and baffle, the fluid flow becomes unstable due to changes in parameters such as flow rate and pressure, which in turn generates noise.

[0033] In summary, the noise is caused by the impact response resulting from voltage changes during PWM driving, which interferes with the stability of gas flow. To reduce noise, this embodiment employs a combination of constant current driving and PWM driving. When the deviation is large, PWM driving is used; when the deviation is small, constant current driving is used. By experimentally determining the optimal superposition ratio of constant current driving and PWM driving, the noise generated during IP module operation can be effectively reduced while ensuring control accuracy and speed. The control method of this embodiment can also be applied to other high-sensitivity IP modules.

[0034] Although the embodiments of the present invention have been disclosed above, they are not limited to the applications listed in the specification and embodiments. They can be applied to various fields suitable for the present invention. For those skilled in the art, and for those of ordinary skill in the art, various changes, modifications, substitutions and variations can be made to these embodiments without departing from the principles and spirit of the present invention. Therefore, the present invention is not limited to the specific details without departing from the general concept defined by the claims and their equivalents.

Claims

1. A constant current and PWM dual-drive circuit suitable for IP modules, characterized in that: It includes a constant current signal source PA5_IP_DAC, a PWM signal source PB11_T2_C4_IP, MOSFET Q5, MOSFET Q6, a current source J4, operational amplifier U19, operational amplifier U20, and an output signal source AIN6_IP_IN; the constant current signal source PA5_IP_DAC and the PWM signal source PB11_T2_C4_IP are both control signals for the coil current of the IP module, and the output signal source AIN6_IP_IN is the coil current feedback output of the IP module; The PWM signal source PB11_T2_C4_IP is connected to resistor R184, and resistor R184 is connected to the gate of MOSFET Q5; the current source J4 includes a positive output terminal IP_DRV+ and a negative output terminal IP_DRV-, and the source of MOSFET Q5 is connected to the negative output terminal IP_DRV-; one end of resistor R185 is connected between resistor R184 and the gate of MOSFET Q5, and the other end is grounded; The constant current signal source PA5_IP_DAC is connected to resistor R188, which is connected to the positive input terminal V+ of operational amplifier U19. One end of resistor R189 is grounded, and the other end is connected between resistor R188 and the positive input terminal V+ of operational amplifier U19. One end of capacitor C124 is grounded, and the other end is connected between resistor R188 and the positive input terminal V+ of operational amplifier U19. The signal output terminal of operational amplifier U19 is connected to resistor R187, which is connected to the gate of MOSFET Q6; the drain of MOSFET Q6 is connected to the negative output terminal IP_DRV-; the source of MOSFET Q6 is connected to resistor R192, which is connected to the negative input terminal V- of operational amplifier U19; the drain of MOSFET Q5 is connected in parallel with the drain of MOSFET Q6. The source of MOSFET Q6 is connected to resistor R193, which in turn is connected to resistor R196, which is grounded. One end of resistor R195 is connected between resistors R193 and R196, and the other end is connected to the positive input terminal V+ of operational amplifier U20. The signal output terminal of operational amplifier U20 is connected to resistor R194, which is connected to the output signal source AIN6_IP_IN. One end of resistor R191 is connected between resistor R194 and the signal output terminal of operational amplifier U20, and the other end is connected to the negative input terminal V- of operational amplifier U20. One end of resistor R190 is grounded, and the other end is connected between resistor R191 and the negative input terminal V- of operational amplifier U20.

2. The constant current and PWM dual-drive circuit suitable for IP modules according to claim 1, characterized in that: It includes a first power supply VDD1, a second power supply VDD2, MOSFET Q3, MOSFET Q4, an enable signal source PB2_IP_HI_PWR_EN, and an output power supply IP_DRV_PWR+; the output power supply IP_DRV_PWR+ is the power supply for the IP module. The second power supply VDD2 is connected to diode D21, diode D21 is connected to resistor R179, and resistor R179 is connected to the output power supply IP_DRV_PWR+. The enable signal source PB2_IP_HI_PWR_EN is connected to the gate of MOS transistor Q4 through resistor R181; the source of MOS transistor Q4 is grounded. The first power supply VDD1 is connected to the source of MOSFET Q3 and to the gate of MOSFET Q3 through resistor R176; the drain of MOSFET Q4 is connected to the gate of MOSFET Q3 through resistor R178. The drain of MOSFET Q3 is connected to the output power supply IP_DRV_PWR+ through diode D20.

3. The constant current and PWM dual-drive circuit suitable for IP modules according to claim 2, characterized in that: A filter circuit is provided between the first power supply VDD1 and the resistor R176; the filter circuit includes resistors R174 and R175 and capacitors C114 and C115; The first power supply VDD1 is connected to resistor R175, resistor R175 is connected to resistor R174, and resistor R174 is connected to both resistor R176 and the source of MOSFET Q3. One end of capacitor C115 is grounded, and the other end is connected between resistors R175 and R174; one end of capacitor C114 is grounded, and the other end is connected between resistors R174 and R176.

4. A constant current and PWM dual-drive circuit suitable for IP modules according to claim 2, characterized in that: It includes capacitor C127; one end of capacitor C127 is connected to the negative input terminal V- of operational amplifier U19, and the other end is connected to the signal output terminal of operational amplifier U19.

5. A constant current and PWM dual-drive circuit suitable for IP modules according to claim 2, characterized in that: It includes capacitors C128 and C90; the negative input terminal V- of the operational amplifier U20 is connected to one end of capacitors C128 and C90, and the other end of capacitors C128 and C90 is connected to the signal output terminal of the operational amplifier U20; capacitors C128 and C90 are connected in parallel.

6. A constant current and PWM dual-drive circuit suitable for IP modules according to claim 2, characterized in that: Includes capacitor C132; one end of capacitor C132 is grounded, and the other end is connected between resistor R195 and the positive input terminal V+ of operational amplifier U20.

7. A constant current and PWM dual-drive circuit suitable for IP modules according to claim 2, characterized in that: Includes capacitor C129; one end of capacitor C129 is grounded, and the other end is connected between resistor R194 and the output signal source AIN6_IP_IN.

8. A constant current and PWM dual-drive circuit suitable for IP modules according to claim 2, characterized in that: Includes capacitor C122; one end of capacitor C122 is grounded, and the other end is connected between resistor R179 and diode D21.

9. A constant current and PWM dual-drive circuit suitable for IP modules according to claim 2, characterized in that: Includes capacitor C123; one end of capacitor C123 is grounded, and the other end is connected between resistor R179 and output power supply IP_DRV_PWR+.

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