Instrument bus voltage signal transmitting and receiving system and method
By setting up a signal forwarding circuit on the MBUS bus, the MBUS bus is divided into multiple branches, which solves the impact of MBUS bus failure on meter reading tasks, enables rapid fault location, and reduces the difficulty of on-site troubleshooting.
Patent Information
- Application Number
- CN202511676100.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-17
- Publication Date
- 2026-02-10
AI Technical Summary
MBUS bus short circuits or open circuits, as well as MBUS bus faults caused by slave short circuits, affect the entire meter reading task, and on-site troubleshooting is difficult.
An MBUS signal forwarding circuit is set up between the MBUS master and the MBUS slave to divide the MBUS bus into several branches. The MBUS master and the MBUS slave are connected through the MBUS signal forwarding circuit. The branches do not interfere with each other, and a fault only affects a single branch and does not affect other branches.
Reduce the impact of MBUS bus failures on meter reading tasks, quickly identify faulty branches, and reduce the difficulty of on-site troubleshooting.
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Figure CN121509141A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of water meter data acquisition, and particularly relates to an instrument bus voltage signal transceiving system and method. BACKGROUND
[0002] MBUS (Meter Bus), namely instrument bus, is used for meeting the needs of network system and remote meter reading. The MBUS bus combines power line and signal line, realizes power supply and signal sharing one bus, and realizes remote meter reading, data downloading and meter control through MBUS communication. In the related art, the MBUS host directly controls multiple slave communication through the bus, and as long as the MBUS bus fails, all slave communication fails. In the field operation environment, MBUS bus short circuit or open circuit, slave short circuit leading to MBUS bus short circuit, etc. will cause MBUS bus failure, thereby affecting the entire meter reading task, and bringing great difficulty to the troubleshooting of the field failure. SUMMARY
[0003] The present application provides an instrument bus voltage signal transceiving system and method, which solves the influence of the MBUS bus short circuit or open circuit, slave short circuit leading to MBUS bus short circuit, etc. on the meter reading task.
[0004] The present application is implemented through the following technical solutions.
[0005] On the one hand, the present application provides an instrument bus voltage signal transceiving system, which comprises: an instrument bus MBUS host, used for outputting a first MBUS signal to a first MBUS; at least one MBUS signal forwarding circuit, connected with the MBUS host through the first MBUS respectively, to receive the first MBUS signal sent by the MBUS host; and at least one MBUS slave, connected with one of the at least one MBUS signal forwarding circuit through a second MBUS respectively, to receive the first MBUS signal forwarded by one of the at least one MBUS signal forwarding circuit, and send a second MBUS signal to the MBUS host through one of the at least one MBUS signal forwarding circuit.
[0006] In some embodiments, the MBUS signal forwarding circuit comprises: a current demodulation sub-circuit, wherein an input end of the current demodulation sub-circuit is connected with the second MBUS, for converting the second MBUS signal sent by the at least one MBUS slave into a first TTL signal; a transceiving sub-circuit, wherein a first input end of the transceiving sub-circuit is connected with an output end of the current demodulation sub-circuit, for receiving the first TTL signal, and after converting the first TTL signal into the second MBUS signal, sending the second MBUS signal to the MBUS master through a first output end and the first MBUS; and a second input end of the transceiving sub-circuit is connected with the first MBUS, for receiving the first MBUS signal, and after converting the first MBUS signal into a second TTL signal, outputting the second TTL signal from a second output end; and a sending sub-circuit, wherein an input end of the sending sub-circuit is connected with the second output end of the transceiving sub-circuit, for converting the second TTL signal into the first MBUS signal, and sending the first MBUS signal to the at least one MBUS slave through the second MBUS.
[0007] In some embodiments, the current demodulation sub-circuit comprises: an adder, wherein a first input end of the adder is connected with the second MBUS, for receiving the second MBUS signal on the second MBUS, a second input end receives a reference voltage signal, and an output end outputs a sum voltage signal; an RC charge-discharge device, wherein the RC charge-discharge device is connected with the output end of the adder, for processing the sum voltage signal; and a comparator, wherein an inverting input end of the comparator receives the second MBUS signal, a non-inverting input end receives the sum voltage signal processed by the RC charge-discharge device, and an output end outputs a TTL signal corresponding to a logic level in the second MBUS signal.
[0008] In some embodiments, the RC charge-discharge device is an RC filter.
[0009] In some embodiments, the current demodulation sub-circuit further comprises: an amplification circuit, wherein the amplification circuit is located between the second MBUS and the adder and between the second MBUS and the comparator, and is connected with the first input end of the adder and the inverting input end of the comparator, respectively.
[0010] In some embodiments, the current demodulation sub-circuit further comprises: a current-voltage converter, wherein the current-voltage converter is connected with an input end of the amplification circuit, for converting a current signal on the second MBUS into the second MBUS signal.
[0011] In some embodiments, the current-voltage converter comprises: a sampling resistor, wherein the sampling resistor is connected in series with the second MBUS.
[0012] In some embodiments, the MBUS signal forwarding circuit further comprises an indication sub-circuit, wherein the indication sub-circuit is connected with the transceiving sub-circuit, and is configured to indicate the working state of the MBUS signal forwarding circuit.
[0013] In some embodiments, the MBUS signal forwarding circuit further comprises a power supply sub-circuit, which is connected with the current demodulation sub-circuit, the transceiving sub-circuit, and the indication sub-circuit, respectively.
[0014] In another aspect, the present application provides a method for transmitting and receiving an instrument bus voltage signal, which comprises: transmitting, by an instrument bus (MBUS) master, a first MBUS signal to a first MBUS; receiving, by at least one MBUS signal forwarding circuit, the first MBUS signal transmitted by the MBUS master through the first MBUS; receiving, by at least one MBUS slave, the first MBUS signal forwarded by one of the at least one MBUS signal forwarding circuit through one of the at least one MBUS signal forwarding circuit; and transmitting, by one of the at least one MBUS signal forwarding circuit, a second MBUS signal to the MBUS master.
[0015] Compared with the prior art, the present application has the following advantages and beneficial effects: by arranging the MBUS signal forwarding circuit between the MBUS master and the MBUS slave, the MBUS bus is divided into several branches, and the branches do not interfere with each other, so that the failure of one branch does not affect the meter reading task of other branches, thereby not only reducing the influence of the MBUS bus failure on the meter reading task, but also quickly determining which branch has failed, and reducing the difficulty of troubleshooting on site. BRIEF DESCRIPTION OF DRAWINGS
[0016] In order to more clearly illustrate the technical solutions of the exemplary embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be considered as limiting the scope. For those skilled in the art, other related drawings can also be obtained without creative labor.
[0017] Figure 1 FIG. 1 is a schematic diagram of an instrument bus voltage signal transmitting and receiving system according to an embodiment of the present application.
[0018] Figure 2 FIG. 2 is a schematic diagram of an MBUS signal forwarding circuit according to an embodiment of the present application.
[0019] Figures 3A to 3EThis is a circuit diagram of a transceiver sub-circuit according to an embodiment of the present invention.
[0020] Figure 4 This is a circuit diagram of the transmitting sub-circuit according to an embodiment of the present invention.
[0021] Figures 5A to 5I This is a circuit diagram of a current demodulation circuit according to an embodiment of the present invention.
[0022] Figure 6 This is a circuit diagram of an indicator sub-circuit according to an embodiment of the present invention.
[0023] Figure 7A and Figure 7B This is a circuit diagram of the power supply sub-circuit according to an embodiment of the present invention.
[0024] Figure 8 This is a flowchart of an instrument bus voltage signal transmission and reception method according to an embodiment of the present invention. Detailed Implementation
[0025] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to embodiments and accompanying drawings. The illustrative embodiments and descriptions of this invention are for illustrative purposes only and are not intended to limit the invention.
[0026] To address the impact of MBUS failures on meter reading tasks, this invention proposes an instrument bus voltage signal transceiver system. This system employs MBUS signal forwarding circuits, dividing the overall meter reading process into several smaller parts. The MBUS master unit connects to several MBUS signal forwarding circuits downstream, and each MBUS signal forwarding circuit connects to several slave units downstream. The entire MBUS bus is divided into several branches, which do not interfere with each other. A failure in one branch will not affect the meter reading tasks of other branches. This not only reduces the impact of MBUS bus failures on meter reading tasks but also allows for rapid identification of which branch is faulty, reducing the difficulty of on-site troubleshooting.
[0027] Figure 1 This is a schematic diagram of an instrument bus voltage signal transceiver system according to an embodiment of the present invention. The following references... Figure 1 The instrument bus voltage signal transceiver system of the present invention will be described in detail.
[0028] like Figure 1 As shown, the instrument bus voltage signal transceiver system includes an MBUS master, at least one MBUS signal forwarding circuit, and at least one MBUS slave.
[0029] The instrument bus MBUS master is used to output the first MBUS signal to the first MBUS.
[0030] At least one MBUS signal forwarding circuit is connected with the MBUS host through the first MBUS respectively to receive the first MBUS signal sent by the MBUS host.
[0031] At least one MBUS slave is connected with one of the at least one MBUS signal forwarding circuit through the second MBUS respectively to receive the first MBUS signal forwarded by one of the at least one MBUS signal forwarding circuit, and send the second MBUS signal to the MBUS host through one of the at least one MBUS signal forwarding circuit.
[0032] In the present application, the first MBUS refers to the bus between the MBUS host and the MBUS signal forwarding circuit, and the second MBUS refers to the bus between the MBUS signal forwarding circuit and the MBUS slave, and both the first MBUS and the second MBUS are multiple. By setting the MBUS signal forwarding circuit between the MBUS host and the MBUS slave, the whole MBUS bus is divided into several branches, and the branches will not interfere with each other, and the failure of one branch will not affect the meter reading task of other branches.
[0033] Figure 2 The figure is a schematic diagram of the MBUS signal forwarding circuit according to the embodiment of the present application. The following will be described in detail with reference to Figure 2 , the MBUS signal forwarding circuit.
[0034] As shown in Figure 2 , the MBUS signal forwarding circuit comprises a current demodulation sub-circuit, a transceiver sub-circuit, and a sending sub-circuit.
[0035] The input end of the current demodulation sub-circuit is connected with the second MBUS, and is used to convert the second MBUS signal sent by the at least one MBUS slave into the first TTL signal.
[0036] The first input end of the transceiver sub-circuit is connected with the output end of the current demodulation sub-circuit, and is used to receive the first TTL signal, and after converting the first TTL signal into the second MBUS signal, send the second MBUS signal to the MBUS host through the first output end and the first MBUS; and the second input end of the transceiver sub-circuit is connected with the first MBUS, and is used to receive the first MBUS signal, and after converting the first MBUS signal into the second TTL signal, output the second TTL signal from the second output end.
[0037] The input end of the sending sub-circuit is connected with the second output end of the transceiver sub-circuit, and is used to convert the second TTL signal into the first MBUS signal, and send the first MBUS signal to the at least one MBUS slave through the second MBUS.
[0038] Figures 3A to 3E This is a circuit diagram of a transceiver sub-circuit according to an embodiment of the present invention. The following references... Figures 3A to 3E The working process of the transceiver circuit is explained.
[0039] The MBUS host supplies power and enables communication to the entire transceiver circuitry via MBUS. For example... Figure 3A and Figure 3B As shown, in the downlink direction, the MBUS bus voltage signal (MBUS signal) first passes through terminal MJ2, then through two current-limiting resistors MR1 and MR3, and through the surge protector TVS diode MD1, before reaching the rectifier bridge MU1. The rectifier bridge MU1 rectifies the bus voltage signal and outputs a DC voltage. (The rest of the text appears to be unrelated and possibly machine-generated.) Figure 3C As shown, the DC voltage (network label: VB) supplies power to the MBUS chip at reference MU2 and to other circuits through the diode at reference MD3.
[0040] MU2 converts the received bus voltage signal into a second TTL signal, which is then sent to resistors R31 and R28 via pin 5 (TXD). Figure 3D As shown, the TTL signal is sent to debug port J3 via resistor R31 for serial port debugging and monitoring. The TTL signal is also sent to the transmitter sub-circuit via resistor R28. Figure 3E As shown, this is the power supply circuit that supplies power to MU2, providing it with operating voltage.
[0041] like Figure 7A As shown, the DC voltage (VB) is connected to the power input pin 5 (VB1) of the LDO (low dropout regulator) power chip with the reference number MU3 via the diode with reference number MD3.
[0042] Figure 4 This is a circuit diagram of the transmitting sub-circuit according to an embodiment of the present invention. The following references... Figure 4 The working process of the transmitting sub-circuit is explained.
[0043] like Figure 4 As shown, the high or low level of the serial data TXD signal emitted from pin 5 of the MBUS chip (reference MU2) adjusts the resistance of the LDO power chip ADJ (Adjustable Resistor) (reference U6), thereby converting the TXDTTL signal into an MBUS signal. This signal is then transmitted to the MBUS slave device via terminal J2 and the MBUS bus for power supply and communication. (Reference) Figure 5B The output pins 2 and 4 (network label M0) of MU2 are connected to the downstream MBUS terminal J2 via the resettable fuse of tag F2.
[0044] Figures 5A to 5I This is a circuit diagram of a current demodulation circuit according to an embodiment of the present invention. The following references... Figures 5A to 5I The current demodulation circuit of the present invention will be described.
[0045] The current demodulation circuit includes an adder, a comparator, and an RC charge / discharger.
[0046] The first input of the adder is connected to the second MBUS to receive the second MBUS voltage signal, the second input receives the reference voltage signal, and the output outputs the summed voltage signal.
[0047] The RC charger is connected to the output of the adder to process the summed voltage signal.
[0048] The inverting input of the comparator receives the second MBUS signal, the non-inverting input receives the summed voltage signal processed by the RC charger, and the output outputs a TTL signal corresponding to the logic level in the second MBUS signal.
[0049] like Figure 5A and Figure 5B As shown, the bus voltage signal sent by the MBUS master is transmitted to the MBUS slave through the transmitting sub-circuit, F2 and terminal J2. The bus voltage signal sent by the MBUS slave is converted into an MBUS signal by the sampling resistor R18.
[0050] A comparator receives the bus voltage signal at its inverting input and the summed voltage signal at its non-inverting input to determine the logic level corresponding to the bus voltage signal based on the signal level at its output. A comparator has two inputs and one output. The two inputs are an inverting input and a non-inverting input, and the output is used to output the comparison result between the input signal at the inverting input and the input signal at the non-inverting input. A comparator is an electronic circuit or device used to compare two or more analog voltage signals or data items. Its core function is to determine whether the input signal exceeds a preset threshold and output a binary result (high or low level). It is widely used in analog-to-digital conversion (ADC), signal detection, threshold triggering, and other scenarios.
[0051] like Figure 5CAs shown, U1 implements the comparator function. One path of the MBUS signal sent by the MBUS slave device is input to the inverting input (pin 2) of U1 (e.g., LM393DR), and the other path passes through an adder and an RC amplifier to the non-inverting input (pin 3) of U1. The serial port RXD signal can be obtained by comparison. Pin 1 of U1 is connected to pin 7 of MU2, and the RXD signal is received through pin 7 of MU2. That is, pins 2 and 3 of U1 receive OP1 (bus voltage signal) and OP2 (summation voltage signal) respectively. After comparing OP1 and OP2, the comparison result is output through pin 1 (OUTA).
[0052] like Figure 5D As shown, the addition function is implemented by the MBUS chip with tag number U2. U2 (e.g., OPA2188 chip), resistors R6, R7, R9, and R10 constitute the adder. Pin 5 of MU2 receives the bus voltage signal OP1 and the reference voltage signal VREF from the instrument bus, performs an addition operation on the bus voltage signal OP1 and the reference voltage signal VREF, and outputs the sum of the two voltage signals OP2 at pin 7 (OUTB).
[0053] like Figure 5C As shown, resistor R3 and capacitor C7 constitute an RC charger / discharger, which processes the summed voltage signal OP2 output from pin 7 (OUTB) of U2. The summed voltage signal OP2 output by the adder includes the bus voltage signal OP1 and the reference voltage signal VREF. In this invention, the reference voltage signal VREF is 60mV as an example. The RC charger / discharger removes the voltage pulse signal from the summed voltage signal OP2, obtaining a DC signal close to the DC component in the summed voltage signal OP2. Then, the reference voltage 60mV in this DC signal is compared with the voltage pulse signal on the bus voltage signal OP1. Based on the difference between the two signals, the logic level transmitted on the instrument bus, whether it is 0 or 1, can be determined. This RC charger / discharger is an RC filter.
[0054] In this invention, a current demodulation sub-circuit can be composed of an adder, a comparator, and an RC charger / discharger. The first input terminal of the adder receives the bus voltage signal from the instrument bus, the second input terminal receives a reference voltage signal, and the output terminal outputs a summed voltage signal. The inverting input terminal of the comparator receives the bus voltage signal, and the non-inverting input terminal receives the summed voltage signal processed by the RC charger / discharger. The bus voltage signal and the summed voltage signal are compared to determine the logic level corresponding to the bus voltage signal based on the signal level at its output terminal. In this way, based on the different pulse current values on the bus, the adder generates a corresponding comparison voltage, which is compared with the bus voltage on the bus to determine whether the logic level of the signal transmitted on the bus is "0" or "1". This overcomes the problem that different pulse current values of MBUS meters from different manufacturers cause uncontrollable current demodulation, resulting in the incompatibility of current MBUS host receiving circuits with all MBUS meters.
[0055] In some embodiments, the current demodulation circuit further includes an amplifier circuit located between the MBUS and the adder and between the MBUS and the comparator, and connected to the first input terminal of the adder and the inverting input terminal of the comparator, respectively.
[0056] In some embodiments, the amplifier circuit is a differential amplifier circuit with a gain of 10. (See reference) Figure 5D The differential amplification function is achieved through U2. The differential signals MBUS+ and MBUS- pass through resistors R5 and R8 respectively to pin 2 (-INA) and pin 3 (+INA) of U2. After being amplified by U2, the amplified bus voltage signal OP1 is output from OUTA.
[0057] In some embodiments, the current demodulation sub-circuit further includes a current-to-voltage converter connected to the input of an amplifier circuit for converting current signals on the instrument bus into bus voltage signals.
[0058] In some embodiments, the current-to-voltage converter includes a sampling resistor connected in series with the instrument bus, wherein the bus current is obtained by sampling the current through the sampling resistor. The sampling resistor is a precision electronic component based on Ohm's law, used to measure current or voltage through series or parallel connection.
[0059] In some embodiments, the resistance of the sampling resistor is 1 ohm.
[0060] in addition, Figure 5E The circuit providing the reference voltage REF1 is shown. Figure 5F The circuit providing the reference voltage VREF is shown. Figure 5GThe circuit shown is designed for a 5V operating voltage to provide the reference voltage VREF. Figure 5H The circuit providing RXD is shown. Figure 5I The circuit that provides a 5V operating voltage for U1 is shown.
[0061] The invention is illustrated below with a specific example. A current signal is converted into a voltage signal by a sampling resistor (1 ohm). After being amplified 10 times by a differential amplifier circuit, the voltage signal is directly input to the inverting input of the comparator. Simultaneously, it is input to the non-inverting input of the comparator after passing through an adder and an RC circuit. The adder consists of the amplified voltage signal and a voltage follower. The voltage follower is set to 60mV, meaning the reference voltage generation circuit is composed of a voltage follower. The RS8521XF has an amplification factor of 1 and a reference voltage of 60mV. When the MBUS slave communicates with the master, when the slave sends a logic "1" to the master, the current drawn by the slave is Imark (≤1.5mA). Based on the maximum value of Imark (1.5mA), after voltage amplification, it becomes the bus voltage +15mV. The inverting input of the comparator becomes the bus voltage +15mV, and simultaneously, after passing through the adder and RC circuit, the non-inverting input of the comparator becomes the bus voltage +60mV. When the comparator outputs a "1", and sends a logic "0", the slave's MBUS interface adds a pulse current of 11-20mA to Imark, forming Ispace. Based on a minimum Ispace value of 11mA, this current is amplified to become the bus voltage +125mV (15mV + 110mV). The inverting input of the comparator then becomes the bus voltage +125mV. After passing through an adder and an RC circuit, the non-inverting input becomes the bus voltage +60mV. The comparator outputs a "0". This current demodulation circuit accurately extracts any value of the 11-20mA pulse current signal from the slave, solving compatibility issues and providing strong anti-interference capabilities, high stability, and high load capacity.
[0062] In some embodiments, the MBUS signal forwarding circuit further includes an indicator sub-circuit connected to the transceiver sub-circuit for indicating the operating status of the MBUS signal forwarding circuit.
[0063] like Figure 6 As shown, the indicator sub-circuit includes three branches connected in parallel. Each branch includes a light-emitting diode and a resistor connected in series. One end of each of the three branches is connected to the power supply, and the other end is connected to the second output terminal, the second input terminal, and the ground terminal of the transceiver sub-circuit, respectively.
[0064] In some embodiments, the MBUS signal forwarding circuit further includes a power supply sub-circuit connected to the current demodulation sub-circuit, transceiver sub-circuit, transmitter sub-circuit, and indicator sub-circuit, for providing operating voltage to each structure.
[0065] Figure 7A and Figure 7B This is a circuit diagram of a power supply sub-circuit according to an embodiment of the present invention. Figure 7A As shown, the DC voltage (network label: VB) supplies power to the power supply sub-circuit through diode MD3, and is converted to 5V by step-down chip MU3 to supply power to U1, U2, and U3. Figure 7B As shown, the 5V power supply voltage is converted to 3.3V by the LDO power chip with tag number MU4, which supplies power to the indicator sub-circuit and matches the serial port level of MU2.
[0066] On the other hand, the present invention provides a method for transmitting and receiving instrument bus voltage signals. Figure 8 This is a flowchart illustrating a method for transmitting and receiving instrument bus voltage signals according to an embodiment of the present invention. The following references... Figure 8 The instrument bus voltage signal transmission and reception method of the present invention will be described.
[0067] like Figure 8 As shown, the instrument bus voltage signal transmission and reception method includes: S10 to S30.
[0068] In S10, the first MBUS signal is output to the first MBUS via the instrument bus MBUS host.
[0069] In S20, the first MBUS signal sent by the MBUS host is received by the first MBUS through at least one MBUS signal forwarding circuit.
[0070] In S30, at least one MBUS slave receives a first MBUS signal sent by the MBUS master through one of the at least one MBUS signal forwarding circuits, and sends a second MBUS signal to the MBUS master through one of the at least one MBUS signal forwarding circuits.
[0071] In some embodiments, the MBUS signal forwarding circuit includes: a current demodulation sub-circuit, a transceiver sub-circuit, and a transmitting sub-circuit. The input terminal of the current demodulation sub-circuit is connected to a second MBUS, used to convert the second MBUS signal transmitted by at least one MBUS slave device into a first TTL signal. The first input terminal of the transceiver sub-circuit is connected to the output terminal of the current demodulation sub-circuit, used to receive the first TTL signal, convert the first TTL signal into a second MBUS signal, and then transmit it to the MBUS master device through the first output terminal and the first MBUS; and the second input terminal of the transceiver sub-circuit is connected to the first MBUS, used to receive the first MBUS signal, convert the first MBUS signal into a second TTL signal, and then output it from the second output terminal. The input terminal of the transmitting sub-circuit is connected to the second output terminal of the transceiver sub-circuit, used to convert the second TTL signal into a first MBUS signal, and transmit it to at least one MBUS slave device through the second MBUS.
[0072] In some embodiments, the current demodulation circuit includes an adder, an RC charger / discharger, and a comparator. The first input of the adder is connected to the second MBUS signal to receive the second MBUS signal, the second input receives a reference voltage signal, and the output outputs a summed voltage signal. The RC charger / discharger is connected to the output of the adder to process the summed voltage signal. The inverting input of the comparator receives the second MBUS signal, the non-inverting input receives the summed voltage signal processed by the RC charger / discharger, and the output outputs a TTL signal corresponding to the logic level in the second MBUS signal.
[0073] In some embodiments, the RC charger / discharger is an RC filter.
[0074] In some embodiments, the current demodulation circuit further includes an amplifier circuit. This amplifier circuit is located between the second MBUS and the adder, and between the second MBUS and the comparator, and is connected to the first input terminal of the adder and the inverting input terminal of the comparator, respectively, for amplifying the received signal.
[0075] In some embodiments, the current demodulation circuit further includes a current-to-voltage converter connected to the input of the amplifier circuit for converting the current signal on the second MBUS into a second MBUS signal.
[0076] In some embodiments, the current-to-voltage converter includes a sampling resistor connected in series with MBUS for converting current into an MBUS voltage signal.
[0077] In some embodiments, the MBUS signal forwarding circuit further includes an indicator sub-circuit connected to the transceiver sub-circuit for indicating the operating status of the MBUS signal forwarding circuit.
[0078] In some embodiments, the MBUS signal forwarding circuit further includes a power supply sub-circuit, which is connected to the current demodulation sub-circuit, the transceiver sub-circuit, and the indicator sub-circuit respectively, for providing corresponding voltage signals to the current demodulation sub-circuit, the transceiver sub-circuit, and the indicator sub-circuit.
[0079] In this invention, by setting at least one MBUS signal forwarding circuit between the MBUS master and at least one MBUS slave, the entire MBUS bus is divided into several branches. The branches will not interfere with each other, and if one branch fails, it will not affect the meter reading tasks of other branches.
[0080] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.
Claims
1. An instrument bus voltage signal transceiver system, characterized in that, The system includes: The instrument bus MBUS master is used to output the first MBUS signal to the first MBUS. At least one MBUS signal forwarding circuit is connected to the MBUS host via a first MBUS connection to receive the first MBUS signal sent by the MBUS host; and At least one MBUS slave is connected to one of the at least one MBUS signal forwarding circuits via a second MBUS to receive a first MBUS signal forwarded by one of the at least one MBUS signal forwarding circuits, and to send a second MBUS signal to the MBUS master through one of the at least one MBUS signal forwarding circuits.
2. The circuit according to claim 1, characterized in that, The MBUS signal forwarding circuit includes: A current demodulation circuit, wherein the input terminal of the current demodulation circuit is connected to the second MBUS, and is used to convert the second MBUS signal sent by the at least one MBUS slave into a first TTL signal; A transceiver circuit, wherein a first input terminal of the transceiver circuit is connected to the output terminal of the current demodulation circuit, for receiving the first TTL signal, converting the first TTL signal into a second MBUS signal, and then transmitting it to the MBUS host through the first output terminal and the first MBUS signal; and a second input terminal of the transceiver circuit is connected to the first MBUS signal, for receiving the first MBUS signal, converting the first MBUS signal into a second TTL signal, and then outputting it from the second output terminal; and A transmitting sub-circuit, wherein the input terminal of the transmitting sub-circuit is connected to the second output terminal of the transceiver sub-circuit, for converting the second TTL signal into the first MBUS signal and transmitting it to the at least one MBUS slave device via the second MBUS.
3. The circuit according to claim 2, characterized in that, The current demodulation circuit includes: An adder, wherein the first input terminal of the adder is connected to the second MBUS and is used to receive the second MBUS signal on the second MBUS, the second input terminal receives a reference voltage signal, and the output terminal outputs a summed voltage signal; An RC charger / discharger, wherein the RC charger / discharger is connected to the output of the adder to process the summed voltage signal; and The comparator has an inverting input that receives the second MBUS signal, a non-inverting input that receives the summed voltage signal processed by the RC charger, and an output that outputs a TTL signal corresponding to the logic level in the second MBUS signal.
4. The circuit according to claim 3, characterized in that, The RC charger / discharger is an RC filter.
5. The circuit according to claim 2, characterized in that, The current demodulation circuit further includes an amplifier circuit, wherein the amplifier circuit is located between the second MBUS and the adder and between the second MBUS and the comparator, and is connected to the first input terminal of the adder and the inverting input terminal of the comparator, respectively.
6. The circuit according to claim 5, characterized in that, The current demodulation sub-circuit further includes a current-to-voltage converter, wherein the current-to-voltage converter is connected to the input terminal of the amplifier circuit and is used to convert the current signal on the second MBUS into the second MBUS signal.
7. The circuit according to claim 6, characterized in that, The current-to-voltage converter includes a sampling resistor, wherein the sampling resistor is connected in series with the second MBUS.
8. The circuit according to claim 2, characterized in that, The MBUS signal forwarding circuit further includes an indicator sub-circuit, wherein the indicator sub-circuit is connected to the transceiver sub-circuit and is used to indicate the operating status of the MBUS signal forwarding circuit.
9. The circuit according to claim 8, characterized in that, The MBUS signal forwarding circuit further includes a power supply sub-circuit, wherein the power supply sub-circuit is connected to the current demodulation sub-circuit, the transceiver sub-circuit, and the indicator sub-circuit, respectively.
10. A method for transmitting and receiving voltage signals on an instrument bus, characterized in that, The method includes: The first MBUS signal is output to the first MBUS via the instrument bus MBUS host; Through at least one MBUS signal forwarding circuit, the first MBUS signal transmitted by the MBUS host is received via the first MBUS; and At least one MBUS slave device receives a first MBUS signal forwarded by one of the at least one MBUS signal forwarding circuits through one of the at least one MBUS signal forwarding circuits; and sends a second MBUS signal to the MBUS master device through one of the at least one MBUS signal forwarding circuits.