Method of information transmission, network-on-chip, chip, medium, program product

Abstract

This disclosure provides a method for information transmission in an on-chip interconnect network, an on-chip interconnect network, a chip, a computer-readable medium, and a computer program product, belonging to the field of network architecture and routing technology, and can be used for information transmission in an on-chip interconnect network. The information transmission method of this disclosure includes: an active routing node acquiring a target transmission request; if the chip where the active routing node is located is the target chip and a first distance is not zero, the active routing node transmits the target information to a first adjacent routing node; if the first distance is zero, the target information is transmitted to a second adjacent routing node; if the chip where the active routing node is located is not the target chip and a third distance is not zero, the active routing node transmits the target information to the second adjacent routing node; if the third distance is zero, the target information is transmitted to the first adjacent routing node. This disclosure can avoid path congestion caused by traffic concentration and improve routing efficiency.

Description

Technical Field

[0001] This disclosure relates to the fields of network architecture and routing technology, and in particular to a method for information transmission in an on-chip interconnect network, an on-chip interconnect network, a chip, a computer-readable medium, and a computer program product. Background Technology

[0002] Network on Chip (NoC) is a communication architecture for multi-core System on Chip (SoC). It transplants technologies such as packet switching and routing from computer interconnect networks to the chip field, enabling information transmission between processing units, storage units, acceleration units, and other units within the chip, thereby improving processing efficiency.

[0003] For example, you can refer to Figure 1 The chip contains multiple routing nodes connected in a mesh. Each routing node is a "point" capable of transmitting information and can have different information processing capabilities, such as processing units, storage units, or acceleration units. Because the different routing nodes are interconnected, the information to be processed can be transmitted to one or more routing nodes for processing as needed.

[0004] Reference Figure 2 On-chip interconnects (IPCs) can also consist of multiple chips, such as in a "chip network" format. In this type of IPC, each chip has some routing nodes that act as "bridging routing nodes." These bridging routing nodes from different chips are interconnected, allowing information to be transmitted not only between different routing nodes within a single chip but also between different chips—that is, achieving "cross-socket (baseline) transmission." For example, if a chip in the IPC fails, cross-socket transmission can redirect information that was originally being processed by that chip to other chips for processing, thereby improving the selectivity of network routing and enhancing the reliability of the IPC.

[0005] For example, bridging routing nodes in different chips of an on-chip interconnect network can be directly interconnected; or, refer to... Figure 2 Cross-connect routing nodes can also first connect to the "routing device" of the chip, and then the routing devices of different chips can connect to each other to achieve the interconnection of cross-connect routing nodes.

[0006] It should be understood that each bridging routing node or routing device can connect to multiple bridging routing nodes or routing devices of multiple other chips, and can select which bridging routing node to which it sends information as needed. Figure 2 For simplicity, only a portion of the connections are shown.

[0007] However, according to the above method, some paths connected to the bridging routing node are prone to congestion due to concentrated traffic, reducing routing efficiency. Summary of the Invention

[0008] This disclosure provides a method for information transmission in an on-chip Internet, an on-chip Internet, a chip, a computer-readable medium, and a computer program product.

[0009] Secondly, embodiments of this disclosure provide a method for information transmission in an on-chip interconnect network, the on-chip interconnect network including multiple routing nodes located in multiple chips, the multiple routing nodes in each chip being connected to form a mesh along intersecting first and second directions, and at least some of them being cross-connect routing nodes connected to cross-connect routing nodes of other chips; the method includes:

[0010] The active routing node acquires the target transmission request from the target routing node that transmits the target information to the target chip; the active routing node can be any routing node, the target chip can be any chip, and the target routing node can be any routing node within the target chip;

[0011] If an active routing node determines that its chip is the target chip, the active routing node determines a first distance between itself and the target routing node in a first direction. If the first distance is not zero, the active routing node transmits the target information to a first adjacent routing node that is closer to the target routing node in the first direction. The first adjacent routing node is the routing node adjacent to the active routing node in the first direction. If the first distance is zero, the active routing node determines a second distance between itself and the target routing node in a second direction. If the second distance is not zero, the active routing node transmits the target information to a second adjacent routing node that is closer to the target routing node in the second direction. The second adjacent routing node is the routing node adjacent to the active routing node in the second direction.

[0012] If an active routing node determines that its chip is not the target chip, the active routing node determines the target bridging routing node in its chip that connects to the target chip, and determines the third distance between itself and the target bridging routing node in the second direction. If the third distance is not zero, the active routing node transmits the target information to the second adjacent routing node that is closer to the target bridging routing node in the second direction. If the third distance is zero, the active routing node determines the fourth distance between itself and the target bridging routing node in the first direction, and if the fourth distance is not zero, transmits the target information to the first adjacent routing node that is closer to the target routing node in the first direction.

[0013] In some embodiments, the active routing node acquiring the target transmission request of the target routing node to transmit target information to the target chip includes at least one of the following:

[0014] The active routing node receives the target transmission request;

[0015] The active routing node generates the target transmission request.

[0016] In some embodiments, after the active routing node determines its second distance from the target routing node in the second direction, the method further includes:

[0017] When the second distance is zero, the active routing node processes the target information.

[0018] In some embodiments, after the active routing node determines its fourth distance with the target bridging routing node in the first direction, the method further includes:

[0019] When the fourth distance is zero, the active routing node transmits the target information to the bridging routing node of the other chip connected to it.

[0020] In some embodiments, the target transmission request includes the identifier of the target chip, and each routing node stores the identifier of its own chip, as well as the connectivity between the bridging routing node in its own chip and other chips.

[0021] The step of determining a first distance between an active routing node and a target routing node in a first direction when the active routing node determines that its chip is the target chip includes: when the active routing node determines that the identifier of its chip is the same as the identifier of the target chip, the active routing node determines a first distance between its chip and the target routing node in the first direction.

[0022] The step of determining the target bridging routing node in the active routing node that connects to the target chip when the active routing node determines that its chip is not the target chip includes: when the active routing node determines that the identifier of its chip is different from the identifier of the target chip, the active routing node determines the target bridging routing node based on the identifier of the target chip and the connectivity relationship.

[0023] In some embodiments, the target transmission request further includes the location coordinates of the target routing node in the target chip, and each routing node further stores its own location coordinates in its own chip, as well as the location coordinates of the bridging routing node in its own chip, the location coordinates including a first direction coordinate in the first direction and a second direction coordinate in the second direction;

[0024] The active routing node determines its first distance from the target routing node in a first direction by comparing its own first direction coordinates with the first direction coordinates of the target routing node to determine the first distance.

[0025] The active routing node determines its second distance from the target routing node in the second direction by comparing its own second direction coordinates with the second direction coordinates of the target routing node to determine the second distance.

[0026] Determining the third distance between the active routing node and the target bridging routing node in the second direction includes: the active routing node comparing its own second-direction coordinates with the second-direction coordinates of the target bridging routing node to determine the third distance;

[0027] The active routing node determines its fourth distance with the target bridging routing node in the first direction by comparing its own first direction coordinates with the first direction coordinates of the target bridging routing node to determine the fourth distance.

[0028] Secondly, embodiments of this disclosure provide a routing node, including a memory and a processor; the memory stores a computer program that can be executed by the processor, and when the computer program is executed by the processor, it implements any of the information transmission methods of embodiments of this disclosure.

[0029] Thirdly, embodiments of this disclosure provide a chip including a plurality of routing nodes interconnected along a first direction and a second direction intersecting the first direction to form a grid, wherein at least some of the plurality of routing nodes are cross-connecting routing nodes, and the routing nodes are any type of routing node in embodiments of this disclosure.

[0030] Fourthly, embodiments of this disclosure provide an on-chip interconnect network, including multiple chips, wherein the chips are any type of chips in embodiments of this disclosure, and the bridging routing nodes of different chips are interconnected.

[0031] Fifthly, embodiments of this disclosure provide a computer-readable medium storing a computer program, which, when executed by a processor, implements any of the information transmission methods of embodiments of this disclosure.

[0032] Sixthly, embodiments of this disclosure provide a computer program product, including a computer program, which, when executed by a processor, implements any of the information transmission methods of embodiments of this disclosure.

[0033] In this embodiment of the disclosure, each chip adopts different routing methods for the target information based on whether the destination of the target transmission request is local or remote, thereby distributing the traffic flowing into the cross-connection routing node along different paths and distributing the traffic flowing out of the cross-connection routing node along different paths, avoiding traffic concentration and path congestion, and improving routing efficiency. Attached Figure Description

[0034] In the accompanying drawings of the embodiments disclosed herein:

[0035] Figure 1 This is a schematic diagram of the structure of a chip in related technologies;

[0036] Figure 2 This is a schematic diagram of the structure of an on-chip interconnect network in related technologies;

[0037] Figure 3 This is a schematic diagram of the structure of an on-chip interconnect network according to an embodiment of the present disclosure;

[0038] Figure 4 This is a flowchart illustrating a method for information transmission in an on-chip interconnect network according to an embodiment of the present disclosure;

[0039] Figure 5 This is a schematic diagram illustrating the transmission process of target information in an information transmission method according to an embodiment of the present disclosure;

[0040] Figure 6 This is an exemplary composition diagram of a routing node according to an embodiment of the present disclosure;

[0041] Figure 7 A block diagram illustrating the composition of a routing node provided in an embodiment of this disclosure;

[0042] Figure 8 A block diagram of a chip provided in an embodiment of this disclosure;

[0043] Figure 9 A block diagram of an on-chip interconnect network provided in an embodiment of this disclosure;

[0044] Figure 10 This is a block diagram illustrating the composition of a computer-readable medium provided in an embodiment of the present disclosure. Detailed Implementation

[0045] To enable those skilled in the art to better understand the technical solutions of this disclosure, the information transmission method, on-chip interconnection network, chip, computer-readable medium, and computer program product provided in the embodiments of this disclosure will be described in detail below with reference to the accompanying drawings.

[0046] The present disclosure will be described more fully below with reference to the accompanying drawings; however, the embodiments shown may be embodied in different forms, and the present disclosure should not be construed as limited to the embodiments set forth below. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will enable those skilled in the art to fully understand the scope of the disclosure.

[0047] The accompanying drawings are provided to further illustrate this disclosure and form part of the specification. They are used together with the detailed embodiments to explain this disclosure and do not constitute a limitation thereof. These and other features and advantages will become more apparent to those skilled in the art from the description of detailed embodiments with reference to the accompanying drawings.

[0048] Unless otherwise specified, each embodiment and feature of this disclosure may be used individually or in combination with other embodiments and features thereof.

[0049] Those skilled in the art will understand that various changes in form and detail may be made to the embodiments of this disclosure without departing from the scope of this disclosure as set forth by the appended claims.

[0050] The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to limit the disclosure. The term "and / or" as used in this disclosure includes any and all combinations of one or more of the associated enumerated entries. The singular forms "a" and "the" as used in this disclosure are also intended to include the plural forms, unless the context clearly indicates otherwise. The terms "comprising," "made of," etc., as used in this disclosure specify the presence of the stated feature, integral, step, operation, element, and / or component, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof.

[0051] Unless otherwise specified, all terms used in this disclosure (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this disclosure, and will not be interpreted as having an idealized or overly formal meaning, unless expressly so defined in this disclosure.

[0052] This disclosure is not limited to the embodiments shown in the accompanying drawings, but includes modifications to the configuration based on the manufacturing process. Therefore, the areas illustrated in the drawings are schematic, and the shapes of the areas shown illustrate specific shapes of the areas of an element, but are not intended to be limiting.

[0053] In some related technologies, including on-chip interconnect networks with multiple chips, some paths connected to bridging routing nodes are prone to congestion due to concentrated traffic, reducing routing efficiency.

[0054] In other words, most of the traffic "flowing out" from the bridging routing node is transmitted to other routing nodes along a path connected to it; and most of the traffic "flowing into" the bridging routing node also flows into it along a path connected to it.

[0055] Therefore, in on-chip interconnects, the traffic on some paths connected to the bridging routing nodes is too concentrated, which can easily cause congestion and reduce routing efficiency.

[0056] Firstly, referring to Figures 3 to 6 This disclosure provides a method for information transmission in an on-chip interconnect network, which includes multiple routing nodes located in multiple chips. The multiple routing nodes in each chip are connected to form a mesh along intersecting first and second directions, and at least some of them are cross-connect routing nodes connected to cross-connect routing nodes of other chips.

[0057] Reference Figure 3 The information transmission method of this embodiment is executed by each routing node in the on-chip interconnection network, so that as a whole, information transmission across multiple routing nodes can be realized in the on-chip interconnection network.

[0058] In this embodiment of the disclosure, a routing node that is "transmitting information according to the method of this embodiment of the disclosure" is called an "active routing node". Therefore, each routing node of the on-chip interconnect network may act as an "active routing node" for a certain period of time.

[0059] Reference Figure 3 The on-chip interconnect network of this disclosure includes multiple chips, and each chip includes multiple routing nodes. These routing nodes are connected to form a "mesh" in a first direction and a second direction that intersect each other. That is, in the same chip, any two adjacent routing nodes in the first direction are connected to each other, and any two adjacent routing nodes in the second direction are also connected to each other. Therefore, from the perspective of connection relationship, the multiple routing nodes constitute an "array" arranged along the first direction and the second direction.

[0060] It should be understood that the above "array" refers to the connection relationship, while the "physical location" of each routing node in the chip is not necessarily in the form of an array.

[0061] For example, the first direction and the second direction can be mutually perpendicular row and column directions, that is, referencing... Figure 3 The X and Y directions are given, so the above "array" can be further transformed into a "matrix".

[0062] It should be understood that in this embodiment of the disclosure, the first direction and the second direction are only two intersecting directions. They are not necessarily row and column directions, nor are they necessarily perpendicular to each other, and they are not related to the placement of the chip.

[0063] In this embodiment of the disclosure, at least one of the multiple routing nodes of each chip is a bridging routing node, and each bridging routing node is connected to at least one bridging routing node of other chips, thereby providing the ability to transmit information across sockets.

[0064] For example, you can refer to Figure 3 Each bridging routing node is connected to a routing device, and the routing devices of bridging routing nodes with different chips are interconnected.

[0065] Reference Figure 4 The information transmission method of this disclosure includes:

[0066] S101, The active routing node obtains the target transmission request of the target routing node that transmits the target information to the target chip.

[0067] The active routing node is any routing node, the target chip is any chip, and the target routing node is any routing node in the target chip.

[0068] S102A: When an active routing node determines that its chip is the target chip, the active routing node determines the first distance between itself and the target routing node in the first direction.

[0069] S102AA, if the first distance is not zero, the active routing node transmits the target information to the first neighboring routing node that is closer to the target routing node in the first direction.

[0070] The first adjacent routing node is the routing node that is adjacent to the active routing node in the first direction.

[0071] S102AB, when the first distance is zero, the active routing node determines the second distance between itself and the target routing node in the second direction.

[0072] S102ABA, when the second distance is not zero, the active routing node transmits the target information to the second adjacent routing node that is closer to the target routing node in the second direction.

[0073] The second adjacent routing node is the routing node that is adjacent to the active routing node in the second direction.

[0074] S102B: If an active routing node determines that its chip is not the target chip, the active routing node determines the target bridging routing node in its chip that connects to the target chip, and determines the third distance between itself and the target bridging routing node in the second direction.

[0075] S102BA: When the third distance is not zero, the active routing node transmits the target information to the second adjacent routing node that is closer to the target bridging routing node in the second direction.

[0076] S102BB, when the third distance is zero, the active routing node determines the fourth distance between itself and the target bridging routing node in the first direction.

[0077] S102BBA: When the fourth distance is not zero, the active routing node transmits the target information to the first neighboring routing node that is closer to the target routing node in the first direction.

[0078] As one embodiment of this disclosure, a target transmission request indicates that specific target information needs to be transmitted to a specific target routing node in a specific target chip.

[0079] In this embodiment of the disclosure, "target information" may be the target transmission request itself, such as a read request, a write request, etc.; or, "target information" may be other data that the target transmission request requests to be transmitted.

[0080] In this embodiment of the disclosure, each routing node, upon receiving the target transmission request, begins to act as an "active routing node" and executes the method of this embodiment of the disclosure.

[0081] In some embodiments, the active routing node obtains a target transmission request from the target routing node to transmit target information to the target chip (S101), including at least one of the following:

[0082] S101A, the active routing node receives the target transmission request.

[0083] S101B, an active routing node generates a target transmission request.

[0084] As one embodiment of this disclosure, the target transmission request obtained by the active routing node may be "received" from other sources, such as from adjacent routing nodes, from cross-connecting routing nodes of other chips, or from instructions input by "external objects" such as users or software.

[0085] Alternatively, as another embodiment of this disclosure, the target transmission request obtained by the active routing node may also be "generated" based on its own calculations.

[0086] For each active routing node that has acquired the target transmission request, the target chip of the target transmission request can be the chip where the active routing node is located, that is, the "destination" of the transmission can be "local"; or, the target chip of the target transmission request can be "other chips" other than the chip where the active routing node is located, that is, the target chip of the target transmission request is "not" the chip where the active routing node is located, or in other words, the "destination" of the transmission is "remote".

[0087] In this embodiment of the disclosure, the active routing node first determines whether the target chip is the same chip it is located in, and then performs different operations.

[0088] (1) When the target chip is the chip where the active routing node is located, it means that the target routing node must be located in the same chip as the active routing node.

[0089] In other words, for the chip where the active routing node is located, the destination of the target information is "local", so the target information should be transmitted to the internal target routing node.

[0090] It can be seen that for multiple routing nodes connected in a grid according to the first and second directions within the same chip, the "positional difference" between any two routing nodes can be decomposed into a distance component in the first direction and a distance component in the second direction.

[0091] For example, the distance component of two routing nodes in the first direction can be represented by the difference in the number of rows between the two nodes in the second direction; and the distance component of two routing nodes in the second direction can be represented by the difference in the number of rows between the two nodes in the first direction.

[0092] For example, refer to Figure 5 In chip 0, the routing node at position coordinate (2,0) and the routing node at position coordinate (1,3) can have a distance component of "1" in the first direction and a distance component of "3" in the second direction.

[0093] It should be understood that it is also possible to characterize the distance component in the embodiments of this disclosure using other methods such as "physical distance".

[0094] Therefore, according to the embodiments of this disclosure, when an active routing node determines that the target routing node is in the same chip as itself, it can continue to calculate the distance component between itself and the target routing node in the first direction, and use it as the "first distance".

[0095] Furthermore, when the first distance is not zero, it indicates that the active routing node and the target routing node are in two different "rows" along the second direction. Therefore, the active routing node can transmit the target information along the first direction to a routing node adjacent to it, that is, the first adjacent routing node. The first distance between the first adjacent routing node and the target routing node should be smaller than the first distance between the active routing node and the target routing node. In other words, the active routing node should transmit the target information along the "row direction" to the "adjacent column" that is closer to the target routing node.

[0096] For example, refer to Figure 5 If the routing node at position coordinate (2,0) in chip 0 is the active routing node, and the target routing node's position coordinate is (1,3), then the active routing node will determine that the first distance between itself and the target routing node is 1. Therefore, it will determine that the target information should be transmitted in the first direction to its first adjacent routing node, which is either the routing node at position coordinate (1,0) or the routing node at position (3,0). Since the first distance between the first adjacent routing node at position coordinate (1,0) and the target routing node at position coordinate (1,3) is 0 (less than 1), and the first distance between the first adjacent routing node at position coordinate (3,0) and the target routing node at position coordinate (1,3) is 2 (greater than 1), the active routing node should refer to... Figure 5 The dashed line in the diagram transmits the target information to the first adjacent routing segment at location coordinates (1,0).

[0097] Conversely, when the first distance is zero, it indicates that the active routing node and the target routing node are already in the same "row" along the second direction, so it is necessary to further calculate the "second distance" between the active routing node and the target routing node in the second direction.

[0098] If the second distance is not zero, it indicates that the active routing node and the target routing node are in two different "rows" along the first direction. Therefore, the target information should be transmitted along the second direction to the second adjacent routing node with a smaller second distance; or, the active routing node should transmit the target information along the "column direction" to the "adjacent row" that is closer to the target routing node.

[0099] For example, refer to Figure 5If the routing node at coordinates (1,0) in chip 0 is the active routing node, and the target routing node's coordinates are (1,3), then the active routing node will determine that its first distance from the target routing node is 0. Therefore, it will further calculate its second distance from the target routing node as 3. The routing node at coordinates (1,1) is its second adjacent routing node, and the second distance is smaller, 2. Therefore, the active routing node will refer to... Figure 5 The dashed line in the diagram transmits the target information to the second adjacent routing segment at location coordinates (1,1).

[0100] It should be understood that the first or second adjacent routing node that receives the target information will become a "new" active routing node. Therefore, the method of this disclosure embodiment should also be executed, that is, to calculate and determine the first distance, the second distance, etc., and continue to transmit the target information.

[0101] Therefore, when a target transmission request has entered the target chip, the method of this embodiment is executed by each routing node. In general, the target information is first transmitted to the "column" where the target routing node is located along the first direction, and then transmitted to the "row" where the target routing node is located along the second direction. In other words, for target information whose destination is "local", the chip implements a "first X direction then Y direction" transmission method.

[0102] (2) When the target chip is different from the chip where the active routing node is located, it means that the target information needs to be transmitted to other chips in order to finally reach the target routing node. Therefore, the active routing node needs to select a cross-connection routing node that can be connected to the target chip from the cross-connection routing nodes of its own chip as the "target cross-connection routing node".

[0103] In other words, for the chip where the active routing node is located, the destination of the target information is at the "remote end". It should transmit the target information to the target bridging routing node so that the target information can enter other chips and continue to be transmitted.

[0104] It should be understood, with reference Figure 2 The source chip and target chip for the target information can be directly connected, such as respectively Figure 2 Chips 1 and 0 are used in the chip; therefore, the transmission of target information can be referred to... Figure 2 The dashed lines in the diagram represent "Level 1 transmission" from chip 1 to chip 0; alternatively, the source chip and target chip of the target information can be indirectly connected through one or more chips, such as... Figure 2 Chips 1 and 2 are used in the chip, so the transmission of target information can be referenced. Figure 2The dotted lines in the diagram indicate that the data is transmitted from chip 1 to chip 0, and then from chip 0 to chip 2, which is referred to as "level 2 transmission". Therefore, the target bridging routing node determined by each chip can be directly connected to the target chip, or it can be indirectly connected to the target chip through one or more chips.

[0105] Unlike the case where the target chip is the chip where the active routing node itself resides, when the target chip is not the chip where the active routing node itself resides: the active routing node can first calculate the third distance between itself and the target bridging routing node in the second direction; if the third distance is not zero, the active routing node transmits the target information along the second direction to the second adjacent routing node that can reduce the third distance; and when the third distance is zero, the active routing node then calculates the fourth distance between itself and the target bridging routing node in the first direction, and when the fourth distance is not zero, transmits the target information along the first direction to the first adjacent routing node that can reduce the fourth distance.

[0106] Therefore, when a target transmission request enters an "intermediate chip" that is not the target chip, the method of this embodiment is executed by each routing node. In general, the target information is first transmitted to the "row" where the target routing node is located along the second direction, and then transmitted to the "column" where the target routing node is located along the first direction. In other words, for target information whose destination is "remote", the chip as a whole implements the transmission method of "first Y direction and then X direction".

[0107] For example, refer to Figure 5 Assuming the target information originates from the routing node at location coordinates (2,1) in chip 1, and chip 1 is connected to the cross-connecting routing node at location coordinates (2,0) in chip 0, then:

[0108] (1) If the target chip of the target information is chip 0, and the location coordinates of the target routing node are (1,3), then chip 0 will refer to the overall location of the target information. Figure 5 The dashed lines in the diagram use a "X-direction first, then Y-direction" approach. First, the target information is transmitted in the X direction to the routing node at position coordinate (1,0), and then in the Y direction, the target information is transmitted to the target routing node at position coordinate (1,3).

[0109] (2) If the target chip of the target information is Figure 5 Chip 2 (not shown) is connected to the bridging routing node at coordinates (1,3) in chip 0, so it is the target bridging routing node. Therefore, chip 0 as a whole will refer to... Figure 5The dotted line in the diagram adopts the method of "Y direction first, then X direction". First, the target information is transmitted to the routing node at position coordinate (2,3) in the Y direction, and then the target information is transmitted to the target bridging routing node at position coordinate (1,3) in the X direction, so that the target information can continue to be transmitted to chip 2 through the target bridging routing node.

[0110] As can be seen, according to the embodiments of this disclosure, for the cross-connection routing node from which the target information "flows out," such as Figure 5 The cross-connection routing node at position coordinate (2,0) in chip 0, depending on whether the target chip is local or remote, the target information flowing out from it flows on the paths in the X and Y directions respectively. That is, its outflow traffic is distributed on different paths, and the traffic on each path will not be too large, which can avoid congestion and improve routing efficiency.

[0111] Similarly, according to embodiments of this disclosure, for the cross-connection routing node into which the target information "flows," such as Figure 5 The cross-connection routing node at the location coordinates (1,3) of chip 0 receives target information from paths in the Y and X directions, depending on whether the target chip is located locally or remotely. This means that the incoming traffic is distributed across different paths, ensuring that the traffic on each path is not too large, thus avoiding congestion and improving routing efficiency.

[0112] In some embodiments, a bridging routing node is either an end routing node among a plurality of routing nodes connected along a first direction, or an end routing node among a plurality of routing nodes connected along a second direction.

[0113] As one embodiment of this disclosure, each bridging routing node in the chip may be located at the "end" of a plurality of adjacent routing nodes along a first or second direction; or, in other words, only routing nodes located at the "end" of a row or column of routing nodes may serve as bridging routing nodes. For example, refer to... Figure 3 The two routing nodes at both ends of each column of routing nodes are both bridging routing nodes.

[0114] In some embodiments, each bridging routing node is connected to a bridging routing node of another chip.

[0115] As one embodiment of this disclosure, each bridging routing node in the chip may be connected to only one bridging routing node in another chip, that is, the connection relationship between bridging routing nodes may be in the form of "one-to-one".

[0116] It should be understood that the location of the bridging routing nodes in the chip, and the connection relationships between bridging routing nodes of different chips, are not limited to the examples above. For instance, a bridging routing node can be connected to multiple other bridging routing nodes, and these bridging routing nodes can belong to one chip or multiple different chips.

[0117] In some embodiments, refer to Figure 4 After the active routing node determines its second distance (S102AB) with the target routing node in the second direction, the process also includes:

[0118] S102ABB, when the second distance is zero, the active routing node processes the target information.

[0119] As one embodiment of this disclosure, when the target chip is the chip where the active routing node is located, and the first distance and the second distance between the active routing node and the target routing node are both zero, it indicates that the active routing node "is" the target routing node. Therefore, it should no longer transmit target information, but should directly perform the necessary processing on the target information, such as storage, calculation, and data acquisition.

[0120] In some embodiments, refer to Figure 4 After the active routing node determines its fourth distance (S102BB) with the target bridging routing node in the first direction, the process also includes:

[0121] S102BBB, when the fourth distance is zero, the active routing node transmits the target information to the cross-connection routing nodes of other chips connected to it.

[0122] As one embodiment of this disclosure, when the target chip is not the chip where the active routing node is located, and the third distance and the fourth distance between the active routing node and the target bridging routing node are both zero, it indicates that the active routing node "is" the target bridging routing node. Therefore, it should transmit the target information to the bridging routing node of other chips to continue transmitting the target information.

[0123] It should be understood that in other chips, the cross-connection routing node that receives the target information sent by the target routing node will also act as a "new" active routing node and continue to execute the method of this disclosure embodiment, that is, determine whether its own chip is the target chip and execute different subsequent steps accordingly.

[0124] In some embodiments, the target transmission request includes the identifier of the target chip, and each routing node stores the identifier of its own chip, as well as the connectivity between the cross-connection routing nodes in its own chip and other chips.

[0125] In some embodiments, when an active routing node determines that its chip is the target chip, the active routing node determines a first distance between itself and the target routing node in a first direction (S102A), including:

[0126] S102A1. If the active routing node determines that the identifier of its chip is the same as the identifier of the target chip, the active routing node determines the first distance between itself and the target routing node in the first direction.

[0127] In some embodiments, if an active routing node determines that its chip is not the target chip, the active routing node determines the target bridging routing node (S102B) in its chip that connects to the target chip, including:

[0128] S102B1. When an active routing node determines that the identifier of its chip is different from the identifier of the target chip, the active routing node determines the target bridging routing node based on the identifier of the target chip and the connectivity relationship.

[0129] As one embodiment of this disclosure, the target transmission request may carry an "identifier" that can indicate the identity of its target chip. For example, the identifier may be the chip identity identifier (ChipID) of the target chip.

[0130] Correspondingly, each routing node of each chip also stores an "identifier" that indicates the identity of the chip it belongs to, as well as a preset "connectivity relationship". This connectivity relationship indicates which other chips each crossover routing node of the chip it belongs to is connected to. In other words, for different target chips, which crossover routing node should be selected as the target crossover routing node.

[0131] Therefore, each active routing node can compare the identifier of its own chip, which it stores, with the identifier of the target chip carried in the target transmission request to determine whether the two are the same:

[0132] (1) If they are the same, it means that the chip where the active routing node is located is the target chip, so the calculation of the first distance and other operations should continue.

[0133] (2) If they are different, it means that the chip where the active routing node is located is not the target chip. Therefore, the target bridging routing node should be found in the stored connectivity relationship according to the identifier of the target chip, and then the third distance should be calculated.

[0134] In some embodiments, the target transmission request further includes the location coordinates of the target routing node in the target chip. Each routing node also stores its own location coordinates in its own chip, as well as the location coordinates of the bridging routing node in its own chip. The location coordinates include first direction coordinates in a first direction and second direction coordinates in a second direction.

[0135] In some embodiments, the active routing node determines a first distance between itself and the target routing node in a first direction (S102A), including:

[0136] S102A2: The active routing node compares its own first direction coordinates with the first direction coordinates of the target routing node to determine the first distance.

[0137] In some embodiments, the active routing node determines its second distance from the target routing node in the second direction (S102AB), including:

[0138] S102AB2: The active routing node compares its own second-direction coordinates with the second-direction coordinates of the target routing node to determine the second distance.

[0139] In some embodiments, determining the third distance between the target bridging routing node in the second direction (S102B) includes:

[0140] S102B2: The active routing node compares its own second-direction coordinates with the second-direction coordinates of the target bridging routing node to determine the third distance.

[0141] In some embodiments, the active routing node determines a fourth distance (S102BB) between itself and the target bridging routing node in a first direction, including:

[0142] S102BB2: The active routing node compares its own first-direction coordinates with the first-direction coordinates of the target bridging routing node to determine the fourth distance.

[0143] As one embodiment of this disclosure, the target transmission request may also carry the "location coordinates" of its target routing node in the corresponding target chip.

[0144] Each routing node in each chip can also store its own location coordinates within the chip, as well as the location coordinates of each crossover routing node within the chip it belongs to.

[0145] In this embodiment of the disclosure, the location coordinates represent the positions of the routing node in the corresponding chip in the first direction and the second direction, respectively, that is, the first direction coordinates and the second direction coordinates, such as row coordinates and column coordinates, that is, X coordinates and Y coordinates respectively.

[0146] Therefore, the active routing node can determine the above distances in the following ways:

[0147] (1) Determine the first distance by comparing its own first direction coordinates with the first direction coordinates of the target routing node; determine the second distance by comparing its own second direction coordinates with the second direction coordinates of the target routing node.

[0148] (2) Determine the fourth distance by comparing its own first direction coordinates with the first direction coordinates of the target bridging routing node; determine the third distance by comparing its own second direction coordinates with the second direction coordinates of the target bridging routing node.

[0149] It should be understood that when an active routing node determines the above distances based on its location coordinates, in addition to determining the "value" of the distance, it can also determine the "direction" of the target routing node or the target bridging routing node relative to itself. For example, it can determine whether the target routing node or the target bridging routing node is located "to its left" or "to its right", or "to its top" or "to its bottom", so as to determine "which" first adjacent routing node or "which" second adjacent routing node should be transmitted to based on the distance.

[0150] Using the above method, each active routing node only needs to perform simple identifier comparison and coordinate comparison to determine how to process the target information, which is a simple implementation method.

[0151] It should be understood that it is also feasible for active routing nodes to determine whether their own chip is the target chip through other means, and to calculate the above distances through other means.

[0152] For example, refer to Figure 6 As one embodiment of this disclosure, each routing node may be equipped with a register and a routing control module. The register stores a "lookup table", which includes the identifier of the chip where the routing node is located, the connectivity relationship, the location coordinates of the routing node itself, and the location coordinates of each bridging routing node; and the routing control module can control the transmission of target information in accordance with the method of this disclosure embodiment according to the lookup table stored in the register.

[0153] For example, Figure 5 The contents of the lookup table for the routing node with location coordinates (2,0) in chip 0 are shown in Table 1 below.

[0154] Table 1. Examples of Search Representations

[0155]

[0156] For example, when Figure 5 When the routing node at position coordinates (2,0) in chip 0 receives a target transmission request from chip 1 via a connected bridging routing node, the corresponding target information can be transmitted in the following manner:

[0157] (1) If the target chip identifier carried in the target transmission request is "chip 0" and the location coordinates of the target routing node are "(1,3)", then:

[0158] The routing node at location coordinates (2,0) is the active routing node. It compares the identifier "chip 0" of the target chip with the stored identifier "chip 0" of its own chip, and determines that they are the same. Therefore, it determines that the target chip of the target information is its own chip. The routing node at location coordinates (2,0) further compares the X-coordinate "1" in the target routing node's location coordinates (1,3) with the X-coordinate "2" in its stored location coordinates (2,0), determining that the first distance is 1. Therefore, it refers to... Figure 5 The dashed line in the diagram transmits the target information along the negative X direction to the first adjacent routing node that can reduce the first distance, which is the routing node with location coordinates (1,0).

[0159] The routing node at location coordinates (1,0), acting as a "new" active routing node, also identifies the target chip of the target information as its own chip. It compares the X-coordinate "1" in the target routing node's location coordinates (1,3) with the stored X-coordinate "1" in its own location coordinates (1,0), determining the first distance to be 0. Therefore, the routing node at location coordinates (1,0) further compares the Y-coordinate "3" in the target routing node's location coordinates (1,3) with the stored Y-coordinate "0" in its own location coordinates (1,0), determining the second distance to be 3. Therefore, referring to... Figure 5 The dashed line in the diagram transmits the target information along the Y direction to the second adjacent routing node that can reduce the second distance, which is the routing node with location coordinates (1,1).

[0160] The routing nodes at coordinates (1,1) and (1,2) are designated as active routing nodes in sequence, referring to... Figure 5 The dashed line in the diagram transmits the target information to the target routing node at location coordinates (1,3).

[0161] The routing node at location coordinates (1,3) is an active routing node. The first distance and the second distance are both 0 as determined above. Therefore, it is determined that it is the target routing node. So, although it is a bridging routing node, it does not need to transmit the target information to other chips, but starts to process the target information.

[0162] (2) If the target chip identifier carried in the target transmission request is "chip 2" and the location coordinates of the target routing node are "(3,0)", then:

[0163] The routing node at location coordinates (2,0), acting as the active routing node, compares the identifier "Chip 2" of the target chip with the stored identifier "Chip 0" of its own chip, determining that they are different. Therefore, it is determined that the target chip of the target information is not its own chip. Consequently, the routing node at location coordinates (2,0) further searches the lookup table for the location coordinates of the bridging routing node corresponding to the target chip, "Chip 2," finding it to be (1,3). Therefore, it determines the bridging routing node at location coordinates (1,3) as the target bridging routing node. Then, the routing node at location coordinates (2,0) continues to compare the Y-coordinate "3" in the target bridging routing node's location coordinates (1,3) with the Y-coordinate "0" in its stored location coordinates (2,0), calculating a third distance of 3. Therefore, it refers to... Figure 5 The dotted line in the diagram transmits the target information along the Y direction to the second adjacent routing node that can reduce the third distance, which is the routing node with location coordinates (2,1).

[0164] The routing nodes at coordinates (2,1) and (2,2) are designated as active routing nodes in sequence, referring to... Figure 5 The dotted line in the diagram transmits the target information to the routing node at location coordinates (2,3).

[0165] The routing node at location coordinates (2,3) is the active routing node. After determining the target bridging routing node, the Y-coordinate "3" in the target bridging routing node's location coordinates (1,3) is compared with the Y-coordinate "3" in its stored location coordinates (2,3), determining the third distance to be 0. Therefore, the X-coordinate "1" in the target bridging routing node's location coordinates (1,3) is further compared with the X-coordinate "2" in its stored location coordinates (2,3), calculating the fourth distance to be 1. Therefore, referring to... Figure 5 The dotted line in the diagram transmits the target information along the negative X direction to the first adjacent routing node that can reduce the fourth distance, which is the routing node with location coordinates (1,3).

[0166] The location coordinates (1,3) are the active routing node. The third distance and the fourth distance are both 0. Therefore, it is determined that it is the target bridging routing node. The target information is transmitted to the bridging routing nodes of other chips, so as to continue to transmit the target information to the target routing node at location coordinates (3,0) in chip 2.

[0167] Secondly, referring to Figure 7 This disclosure provides a routing node, including a memory and a processor; the memory stores a computer program that can be executed by the processor, and when the computer program is executed by the processor, it implements any of the information transmission methods of this disclosure.

[0168] In this embodiment of the disclosure, the processor can be any device or structure with data processing capabilities, and the memory can be any device or structure with data storage capabilities.

[0169] Thirdly, referring to Figure 8 This disclosure provides a chip including a plurality of routing nodes interconnected along a first direction and a second direction intersecting the first direction to form a grid. At least some of the plurality of routing nodes are cross-connecting routing nodes, and the routing nodes are any type of routing node in this disclosure.

[0170] Fourthly, refer to Figure 9 This disclosure provides an on-chip interconnect network, including multiple chips, which can be any type of chip in this disclosure, and the cross-connection routing nodes of different chips are interconnected.

[0171] Fifthly, refer to Figure 10 This disclosure provides a computer-readable medium storing a computer program, which, when executed by a processor, implements any of the information transmission methods of this disclosure.

[0172] Sixthly, embodiments of this disclosure provide a computer program product, including a computer program, which, when executed by a processor, implements any of the information transmission methods of embodiments of this disclosure.

[0173] Those skilled in the art will understand that all or some of the steps, systems, and devices disclosed above, as functional modules / units, can be implemented as software, firmware, hardware, or suitable combinations thereof.

[0174] In hardware implementations, the division between functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be executed by several physical components working together.

[0175] Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit (CPU), digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit (ASIC). Such software may be distributed on a computer-readable medium, which may include computer storage media and communication media. In embodiments of this disclosure, computer storage media include volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information, and any other media that can be used to store desired information and can be accessed by a computer. In embodiments of this disclosure, communication media typically contain computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

Claims

1. A method for information transmission in an on-chip interconnect network, characterized in that, The on-chip interconnect network includes multiple routing nodes located in multiple chips, wherein the multiple routing nodes in each chip are connected in a mesh along intersecting first and second directions, and at least some of them are bridging routing nodes connected to bridging routing nodes of other chips; the method includes: The active routing node acquires the target transmission request from the target routing node to transmit the target information to the target chip; the active routing node can be any routing node, the target chip can be any chip, and the target routing node can be any routing node in the target chip; If an active routing node determines that its chip is the target chip, the active routing node determines a first distance between itself and the target routing node in a first direction. If the first distance is not zero, the active routing node transmits the target information to a first adjacent routing node that is closer to the target routing node in the first direction. The first adjacent routing node is the routing node adjacent to the active routing node in the first direction. If the first distance is zero, the active routing node determines a second distance between itself and the target routing node in a second direction. If the second distance is not zero, the active routing node transmits the target information to a second adjacent routing node that is closer to the target routing node in the second direction. The second adjacent routing node is the routing node adjacent to the active routing node in the second direction. If an active routing node determines that its chip is not the target chip, the active routing node determines the target bridging routing node in its chip that connects to the target chip, and determines the third distance between itself and the target bridging routing node in the second direction. If the third distance is not zero, the active routing node transmits the target information to the second adjacent routing node that is closer to the target bridging routing node in the second direction. If the third distance is zero, the active routing node determines the fourth distance between itself and the target bridging routing node in the first direction, and if the fourth distance is not zero, transmits the target information to the first adjacent routing node that is closer to the target routing node in the first direction.

2. The method according to claim 1, characterized in that, The active routing node acquires a target transmission request from the target routing node to transmit target information to the target chip, including at least one of the following: The active routing node receives the target transmission request; The active routing node generates the target transmission request.

3. The method according to claim 1, characterized in that, After the active routing node determines its second distance from the target routing node in the second direction, the process further includes: When the second distance is zero, the active routing node processes the target information.

4. The method according to claim 1, characterized in that, After the active routing node determines its fourth distance with the target bridging routing node in the first direction, the method further includes: When the fourth distance is zero, the active routing node transmits the target information to the bridging routing node of the other chip connected to it.

5. The method according to claim 1, characterized in that, The target transmission request includes the identifier of the target chip, and each routing node stores the identifier of its own chip, as well as the connectivity between the bridging routing node in its own chip and other chips. The step of determining a first distance between an active routing node and a target routing node in a first direction when the active routing node determines that its chip is the target chip includes: when the active routing node determines that the identifier of its chip is the same as the identifier of the target chip, the active routing node determines a first distance between its chip and the target routing node in the first direction. The step of determining the target bridging routing node in the active routing node that connects to the target chip when the active routing node determines that its chip is not the target chip includes: when the active routing node determines that the identifier of its chip is different from the identifier of the target chip, the active routing node determines the target bridging routing node based on the identifier of the target chip and the connectivity relationship.

6. The method according to claim 5, characterized in that, The target transmission request also includes the location coordinates of the target routing node in the target chip. Each routing node also stores its own location coordinates in its own chip, as well as the location coordinates of the bridging routing node in its own chip. The location coordinates include a first direction coordinate in the first direction and a second direction coordinate in the second direction. The active routing node determines its first distance from the target routing node in a first direction by comparing its own first direction coordinates with the first direction coordinates of the target routing node to determine the first distance. The active routing node determines its second distance from the target routing node in the second direction by comparing its own second direction coordinates with the second direction coordinates of the target routing node to determine the second distance. Determining the third distance between the active routing node and the target bridging routing node in the second direction includes: the active routing node comparing its own second-direction coordinates with the second-direction coordinates of the target bridging routing node to determine the third distance; The active routing node determines its fourth distance with the target bridging routing node in the first direction by comparing its own first direction coordinates with the first direction coordinates of the target bridging routing node to determine the fourth distance.

7. A routing node, characterized in that, It includes a memory and a processor; the memory stores a computer program that can be executed by the processor, and when the computer program is executed by the processor, it implements the information transmission method according to any one of claims 1 to 6.

8. A chip, characterized in that, It includes multiple routing nodes that are interconnected along a first direction and a second direction intersecting the first direction to form a grid, at least some of the multiple routing nodes are cross-connecting routing nodes, and the routing nodes are the routing nodes according to claim 7.

9. An on-chip interconnect network, characterized in that, It includes multiple chips, the chips according to claim 8, and the cross-connection routing nodes of different chips are interconnected.

10. A computer-readable medium, characterized in that, The device contains a computer program that, when executed by a processor, implements the information transmission method according to any one of claims 1 to 6.

11. A computer program product, characterized in that, Includes a computer program, which, when executed by a processor, implements the information transmission method according to any one of claims 1 to 6.

Images