Pin detection circuit and pin detection method

Abstract

The invention relates to a pin detection circuit and a pin detection method. The pin detection circuit and the pin detection method are used for detecting a plurality of first to-be-detected pins and a plurality of second to-be-detected pins of a connector. The pin detection circuit comprises a first switch assembly, a second switch assembly, a controller and a source meter. The first switch assembly is connected with the plurality of first to-be-tested pins. The second switch assembly is respectively connected with the plurality of second to-be-tested pins and the first switch assembly, so that the number of switch devices in the first switch assembly and the second switch assembly can be reduced; the controller is connected with the first switch assembly and the second switch assembly and used for controlling on-off of the first switch assembly and the second switch assembly. The source meter is used for connecting a plurality of first to-be-measured pins and a plurality of second to-be-measured pins, outputting power to the first to-be-measured pins and the second to-be-measured pins, and measuring electrical parameters between the first to-be-measured pins and the second to-be-measured pins; the electrical parameters are used for confirming the connection state of the first to-be-detected pin and the second to-be-detected pin, so that the detection efficiency of the pins is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of pin detection, in particular to a pin detection circuit and a pin detection method. BACKGROUND

[0002] In the whole process of packaging manufacturing, finished product inspection and application adaptation of semiconductor devices, semiconductor pins are the core interface components for realizing electrical connection, signal transmission and energy interaction between devices and external circuits. The reliability of the electrical connection performance directly determines the working stability of the semiconductor devices, and even the running life and safety of the entire electronic system.

[0003] With the rapid evolution of semiconductor technology towards high-density integration and miniaturized packaging, the number of semiconductor device pins is growing exponentially, and the pin pitch is continuously shrinking to microns. Precise detection of key electrical parameters such as pin contact impedance and conduction performance has become an indispensable core process to ensure device quality and avoid application risks.

[0004] On the one hand, semiconductor pins are prone to defects such as virtual connection, pin deformation, surface oxidation and corrosion during packaging welding, transportation and storage. Such defects can directly cause abnormal increase of pin contact impedance, and further cause signal transmission loss, energy waste and even circuit short circuit failure. On the other hand, in the scenario where semiconductor devices are connected to external circuits through high-density connectors, the contact impedance between the connector and the pin is a key indicator affecting the reliability of electrical connection. Especially in high-frequency high-speed signal transmission and large-current power supply applications, small fluctuations in contact impedance can cause signal distortion, rising error rate or local overheating. Therefore, precise and efficient detection of the contact impedance of semiconductor pins and high-density connectors is a necessary prerequisite for ensuring the quality of semiconductor devices leaving the factory and improving the overall reliability of electronic systems, and has important technical necessity and industrial application value in the fields of semiconductor manufacturing and electronic equipment assembly.

[0005] However, the current testing scheme for the contact impedance of high-density connectors and semiconductor pins generally has the technical defect of low testing efficiency, which is difficult to adapt to the current production needs of large-scale and high efficiency of the semiconductor industry. SUMMARY

[0006] Therefore, it is necessary to provide a pin detection circuit and a pin detection method capable of improving the detection efficiency of pin impedance in view of the above technical problems.

[0007] In a first aspect, the present application provides a pin detection circuit for detecting a plurality of first to-be-tested pins and a plurality of second to-be-tested pins of a connector; the pin detection circuit comprises:

[0008] a first switch assembly connected with the plurality of first to-be-tested pins respectively;

[0009] a second switch assembly connected with the plurality of second to-be-tested pins and the first switch assembly respectively;

[0010] a controller connected with the first switch assembly and the second switch assembly, for controlling the first switch assembly and the second switch assembly respectively.

[0011] a source table connected with the plurality of first to-be-tested pins and the plurality of second to-be-tested pins, for outputting power to the first to-be-tested pins and the second to-be-tested pins, and measuring electrical parameters between the first to-be-tested pins and the second to-be-tested pins; the electrical parameters are used to confirm the connection state of the first to-be-tested pins and the second to-be-tested pins.

[0012] In one of the embodiments, the device further comprises:

[0013] a connection module, for connecting the first switch assembly and the second switch assembly.

[0014] In one of the embodiments, the connection module comprises:

[0015] a shift register connected with the controller, the first switch assembly and the second switch assembly respectively, for receiving the control signal of the controller, and transmitting the control signal to the corresponding first switch assembly and the second switch assembly, so that the first switch assembly and the second switch assembly are turned on or turned off under the action of the control signal.

[0016] In one of the embodiments, the first switch assembly comprises:

[0017] a plurality of first relays, the plurality of first relays are connected with the plurality of first to-be-tested pins, the controller and the second switch assembly respectively, for turning on the conductive circuit between the first to-be-tested pins and the second switch assembly under the action of the controller.

[0018] In one of the embodiments, the second switch assembly comprises:

[0019] a plurality of second relays, the plurality of second relays are connected with the plurality of second to-be-tested pins and the plurality of first relays respectively, for turning on the conductive circuit between the first to-be-tested pins and the second to-be-tested pins together with the plurality of first relays under the action of the controller.

[0020] In one of the embodiments, the number of relays in the first switch assembly is greater than or equal to the number of the first to-be-tested pins; and / or,

[0021] The number of the relays in the second switch assembly is greater than or equal to the number of the second to-be-tested pins.

[0022] In one of the embodiments, the electrical parameter includes at least one of voltage, resistance, and current.

[0023] In one of the embodiments, the type of the source table includes a Kelvin four-wire source table.

[0024] In one of the embodiments, the controller is further configured to connect with a host computer, receive a detection instruction from the host computer, and control the on-off of the corresponding first switch assembly and second switch assembly according to the detection instruction.

[0025] In a second aspect, the application provides a pin detection method, which is implemented by the pin detection circuit as described above; the pin detection method includes:

[0026] The plurality of to-be-tested pins of the connector are divided into a plurality of rows of first to-be-tested pins and a plurality of columns of second to-be-tested pins;

[0027] One relay in the first switch assembly and one relay in the second switch assembly are controlled to be turned on one by one;

[0028] An electrical parameter between one first to-be-tested pin and one second to-be-tested pin is acquired;

[0029] The connection state of the first to-be-tested pin and the second to-be-tested pin is confirmed according to the electrical parameter.

[0030] The pin detection circuit and the pin detection method are used for detecting a plurality of first to-be-tested pins and a plurality of second to-be-tested pins of a connector. The pin detection circuit includes a first switch assembly, a second switch assembly, a controller, and a source table. The first switch assembly is connected with the plurality of first to-be-tested pins respectively. The second switch assembly is connected with the plurality of second to-be-tested pins and the first switch assembly respectively, which can reduce the number of switch devices in the first switch assembly and the second switch assembly. The controller is connected with the first switch assembly and the second switch assembly, and is used for controlling the on-off of the first switch assembly and the second switch assembly respectively. The source table is used for connecting the plurality of first to-be-tested pins and the plurality of second to-be-tested pins, and is used for outputting power to the first to-be-tested pins and the second to-be-tested pins, and measuring an electrical parameter between the first to-be-tested pins and the second to-be-tested pins. The electrical parameter is used for confirming the connection state of the first to-be-tested pins and the second to-be-tested pins, and improving the detection efficiency of the pins. BRIEF DESCRIPTION OF DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related art, the following will briefly introduce the drawings needed to be used in the description of the embodiments of the present application or the related art. Obviously, the drawings in the following description only some embodiments of the present application, and for those skilled in the art, other related drawings can be obtained without creative labor under the premise of not departing from the concept of the present application.

[0032] Figure 1 For one of the structure schematic diagrams of the pin detection circuit in an embodiment of the present application;

[0033] Figure 2 For the second structure schematic diagram of the pin detection circuit in an embodiment of the present application;

[0034] Figure 3 For the structure schematic diagram of the first switch assembly and the second switch assembly in an embodiment of the present application;

[0035] Figure 4 For the structure schematic diagram of the controller and the host computer connection in an embodiment of the present application;

[0036] Figure 5 For the flow schematic diagram of the pin detection method in an embodiment of the present application;

[0037] Figure 6 For the connection relationship schematic diagram of the 16 second relays and the 27 first relays in an embodiment of the present application;

[0038] Figure 7 For the voltage value table between the 16 second to-be-tested pins and the 27 first to-be-tested pins in an embodiment of the present application.

[0039] Explanation of reference signs:

[0040] 110: first switch assembly; 111: first relay; 120: second switch assembly; 121: second relay; 130: controller; 140: source table; 150: shift register; 210: first to-be-tested pin; 220: second to-be-tested pin; 230: host computer. DETAILED DESCRIPTION

[0041] In order to make the above-mentioned purposes, features and advantages of the present application more apparent and easy to understand, the specific embodiments of the present application will be described in detail below with reference to the drawings. In the following description, a lot of specific details are set forth in order to fully understand the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without departing from the concept of the present application, therefore the present application is not limited to the specific embodiments disclosed below.

[0042] In the description of the present application, it needs to be understood that if these terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like appear, the orientation or positional relationship indicated by these terms is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application.

[0043] In addition, if these terms "first", "second" appear, these terms are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features limited by "first", "second" can be explicitly or implicitly included at least one of the features. In the description of the present application, if the term "multiple" appears, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise explicitly specified.

[0044] In the present application, unless otherwise explicitly specified and limited, if the terms "mounting", "connection", "connection", "fixing" and the like appear, these terms should be understood in a broad sense. For example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements, unless otherwise explicitly limited. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0045] In the technical field of pin detection, detection can be achieved by independently connecting a switching device and a power supply to each pin and a test device. For example, in the case of a large number of pins, such as 432 pins, 864 switching devices need to be set up correspondingly. Obviously, this scheme has the problem of a large test system and difficult maintenance. In addition, there is also a technical scheme of measuring by manually contacting each point. However, manual point-by-point detection also has the problem of low efficiency. And because manual detection needs to be repeatedly plugged in and out, it also has the problem of easily causing damage to the pins.

[0046] Based on this, the present application provides a pin detection circuit and a pin detection method which can improve the efficiency of pin detection and avoid repeated plugging.

[0047] The pin detection circuit and the pin detection method in the embodiments of the present application can be used to detect a plurality of first to-be-detected pins and a plurality of second to-be-detected pins of a connector.

[0048] It can be understood that the connector in the embodiment of the present application can be a high-density connector, which includes a plurality of pins, and the plurality of pins can be electrically connected through contact points inside the connector. The first to-be-tested pin and the second to-be-tested pin in the embodiment of the present application can be artificially divided based on the plurality of pins connected. For example, the plurality of pins of the connector can be artificially divided into a plurality of first to-be-tested pins arranged in a row direction and a plurality of second to-be-tested pins arranged in a column direction, so as to facilitate accurate positioning of each pin and intuitive monitoring of the detection process and detection result of each pin. The number of the first to-be-tested pin and the second to-be-tested pin can be the same or different, and the present application does not make a specific limitation thereon.

[0049] In some embodiments, referring to Figure 1 , Figure 1 A structure schematic diagram of a pin detection circuit in an embodiment of the present application is shown. The pin detection circuit in the embodiment can include a first switch assembly 110, a second switch assembly 120, a controller 130 and a source table 140. The first switch assembly 110 is connected with a plurality of first to-be-tested pins 210 respectively; the second switch assembly 120 is connected with the plurality of second to-be-tested pins 220 and the first switch assembly 110 respectively; the controller 130 is connected with the first switch assembly 110 and the second switch assembly 120, and is used for controlling the on-off of the first switch assembly 110 and the second switch assembly 120 respectively; the source table 140 is used for connecting the plurality of first to-be-tested pins 210 and the plurality of second to-be-tested pins 220, and is used for outputting power to the first to-be-tested pins 210 and the second to-be-tested pins 220 and measuring an electrical parameter between the first to-be-tested pins 210 and the second to-be-tested pins 220; the electrical parameter is used for confirming the connection state of the first to-be-tested pins 210 and the second to-be-tested pins 220.

[0050] The first switch assembly 110 and the second switch assembly 120 can include a plurality of switch devices respectively. For example, the first switch assembly 110 includes a plurality of first switch devices, and the number of the first switch devices can be the same as or slightly greater than the number of the first to-be-tested pins 210, so as to provide a test channel for a connector including different numbers of pins. The second switch assembly 120 can include a plurality of second switch devices, and the number of the second switch devices can be the same as or slightly greater than the number of the second to-be-tested pins 220, so as to provide a test channel for a connector including different numbers of pins together with the first switch assembly 110.

[0051] The controller 130 can be any controller 130 capable of implementing logical control. Exemplarily, the controller 130 can be a microcontroller unit (MCU), for example, a microcontroller 130 of the STM32F427 series, without being limited thereto.

[0052] The source table 140 in the embodiment of the present application refers to a high-precision test device that can simultaneously output current and measure voltage.

[0053] Exemplarily, the source table 140 in the embodiment of the present application can include a constant-current source detection device for providing a stable current value power supply to the to-be-tested pins, and the detection device can detect the electrical parameters between the first to-be-tested pin 210 and the second to-be-tested pin 220. Exemplarily, the electrical parameters can refer to at least one of voltage, current, and resistance, without being limited thereto, as long as the connection state of the to-be-tested pins can be characterized.

[0054] The connection state between the first to-be-tested pin 210 and the second to-be-tested pin 220 can refer to normal connection or abnormal connection between the first to-be-tested pin 210 and the second to-be-tested pin 220. Exemplarily, when the electrical parameters between the first to-be-tested pin 210 and the second to-be-tested pin 220 are within a preset parameter range, the connection state between the first to-be-tested pin 210 and the second to-be-tested pin 220 is normal connection. When the electrical parameters between the first to-be-tested pin 210 and the second to-be-tested pin 220 are not within the preset parameter range, the connection state between the first to-be-tested pin 210 and the second to-be-tested pin 220 is abnormal connection.

[0055] In the embodiment, the pin detection circuit includes a first switching assembly 110, a second switching assembly 120, a controller 130, and a source table 140, wherein the first switching assembly 110 is connected with a plurality of first to-be-tested pins 210 respectively; the second switching assembly 120 is connected with the first switching assembly 110 and a plurality of second to-be-tested pins 220 respectively, which can reduce the number of switching devices in the first switching assembly 110 and the second switching assembly 120; the controller 130 is connected with the first switching assembly 110 and the second switching assembly 120, and is configured to control the on-off of the first switching assembly 110 and the second switching assembly 120 respectively; the source table 140 is configured to connect the plurality of first to-be-tested pins 210 and the second to-be-tested pins 220, output power to the first to-be-tested pins 210 and the second to-be-tested pins 220, and measure the electrical parameters between the first to-be-tested pins 210 and the second to-be-tested pins 220; the electrical parameters are configured to confirm the connection state of the first to-be-tested pins 210 and the second to-be-tested pins 220, and improve the detection efficiency of the pins.

[0056] In some embodiments, the pin detection circuit in the embodiments of the present application can further comprise a connection module. The connection module is used to connect the first switch assembly 110 and the second switch assembly 120.

[0057] In some embodiments, referring to the accompanying Figure 1 and the accompanying Figure 2 , the accompanying Figure 2 shows a structural schematic diagram of the pin detection circuit in an embodiment of the present application. The connection module in the embodiments of the present application can be a shift register 150. The shift register 150 is connected with the controller 130, the first switch assembly 110 and the second switch assembly 120 respectively. The shift register can be used to receive the control signal of the controller 130 and transmit the control signal to the corresponding first switch assembly 110 and second switch assembly 120, so that the first switch assembly 110 and the second switch assembly 120 are turned on or turned off under the action of the control signal.

[0058] Exemplarily, the shift register 150 in the embodiments of the present application can be a high-speed CMOS shift register 150 with a model number of 74HC595, which can realize the expansion of I / O (input / output interface) and the output of the access of the control signal.

[0059] Exemplarily, the shift register 150 can be in a serial input-parallel output mode. Through 1 data input pin and 1 clock pin, the multi-bit control signal is shifted into the shift register 150 bit by bit, and then output simultaneously through the parallel output end, realizing that 1 input port is expanded to N output ports. The N output ports can be connected with the first switch assembly 110 and the second switch assembly 120 respectively to control the on-off of the first switch assembly 110 and the second switch assembly 120.

[0060] In some embodiments, referring to the accompanying Figure 1 and the accompanying Figure 3 , the accompanying Figure 3 shows a structural schematic diagram of the first switch assembly 110 and the second switch assembly 120 in the embodiments of the present application. The first switch assembly 110 in the embodiments of the present application can comprise a plurality of first relays 111. The plurality of first relays 111 are connected with the plurality of first to-be-tested pins 210, the controller 130 and the second switch assembly 120 respectively, and are used to turn on the conductive circuit between the first to-be-tested pin 210 and the second switch assembly 120 under the action of the controller 130.

[0061] In some embodiments, continuing to refer to the accompanying Figure 1 and the accompanying Figure 3The second switch assembly 120 in the embodiments of the present applicationapplicationinclude a plurality of second relays 121, the plurality of second relays 121 are respectively connected with the plurality of second to-be-tested pins 220 and the plurality of first relays 111, and the plurality of second relays 121 are used to conduct the conductive circuit between the first to-be-tested pin 210 and the second to-be-tested pin 220 together with the plurality of first relays 111 under the action of the controller 130.

[0062] It can be understood that, in the process of controlling the first switch assembly 110 and the second switch assembly 120 by the controller 130, only one first relay 111 and one second relay 121 are turned on at a time, until the conductive circuit between each first to-be-tested pin 210 connected with the first relay 111 and each second to-be-tested pin 220 connected with the second relay 121 is formed, and the pin detection between each first to-be-tested pin 210 and each second to-be-tested pin 220 is realized.

[0063] Exemplarily, the plurality of first to-be-tested pins 210 are X11, X12, X13, X14, …, the plurality of first relays 111 are A11, A12, A13, A14, …, the plurality of second relays 121 are B11, B12, B13, B14, …, the plurality of second to-be-tested pins 220 are Y11, Y12, Y13, Y14, …, the first relay 111 and the second relay 121 are respectively connected with the controller 130, in addition, A11 is respectively connected with X11 and B11, A12 is respectively connected with X12 and B12, A13 is respectively connected with X13 and B13, A14 is respectively connected with X14 and B14, and so on. B11 is respectively connected with A11 and Y11, B12 is respectively connected with A12 and Y12, B13 is respectively connected with A13 and Y13, B14 is respectively connected with A14 and Y14, and so on. In the case that A11 and B11 are turned on by the controller 130, the electrical parameter between X11 and Y11 can be obtained through the source table 140, so as to determine the connection state between X11 and Y11 based on the electrical parameter. In the case that A11 and B12 are turned on by the controller 130, the electrical parameter between X11 and Y12 can be obtained through the source table 140, so as to determine the connection state between X11 and Y12 based on the electrical parameter, and so on. The connection state between each first to-be-tested pin 210 and each second to-be-tested pin 220 can be obtained.

[0064] In some embodiments, the number of relays in the first switch assembly is greater than or equal to the number of first to-be-tested pins; and / or, the number of relays in the second switch assembly is greater than or equal to the number of second to-be-tested pins.

[0065] In the embodiment, the number of relays in the first switch assembly is greater than or equal to the number of first to-be-tested pins, and / or the number of relays in the second switch assembly is greater than or equal to the number of second to-be-tested pins, which can provide redundant test points and provide test channels for connectors with different numbers of pins.

[0066] In some embodiments, the electrical parameter includes at least one of voltage, resistance, and current.

[0067] Optionally, the source table can obtain the voltage between the first to-be-tested pin and the second to-be-tested pin. The connection state between the first to-be-tested pin and the second to-be-tested pin can be determined based on the voltage between the first to-be-tested pin and the second to-be-tested pin, so as to realize detection of the first to-be-tested pin and the second to-be-tested pin.

[0068] In some embodiments, the type of the source table includes a Kelvin four-wire source table.

[0069] The Kelvin four-wire source table in the embodiment is a precision source measurement unit (SMU) integrated with Kelvin four-wire connection technology. Through the architecture of separating current excitation and voltage detection paths, the Kelvin four-wire source table can eliminate measurement errors introduced by wire resistance and contact resistance, and realize high-precision voltage / current output and measurement between the first to-be-tested pin and the second to-be-tested pin.

[0070] For example, the Kelvin four-wire source table in the embodiment can be configured with two independent channels to form a closed-loop control and measurement circuit, which are a current excitation channel and a voltage detection channel. The current excitation channel provides test current for the first to-be-tested pin and the second to-be-tested pin. The voltage detection channel collects the voltage between the first to-be-tested pin and the second to-be-tested pin. The voltage detection channel collecting the voltage between the first to-be-tested pin and the second to-be-tested pin is not disturbed by lead / contact resistance, which can improve detection accuracy.

[0071] In some embodiments, refer to Figure 1 and Figure 4 , attached Figure 4 Fig. 1 shows a structure schematic diagram of the controller 130 and the host computer 230 in the embodiment. The controller 130 in the embodiment can also be connected with the host computer 230 to receive detection instructions from the host computer 230, so as to control the on-off of the corresponding first switch assembly 110 and second switch assembly 120 according to the detection instructions.

[0072] For example, the host computer 230 can be a PC (Personal Computer), but is not limited thereto.

[0073] The host computer 230 can be communicatively connected with the controller 130. For example, the host computer 230 can communicate with the controller 130 through Ethernet.

[0074] In the embodiment, the controller 130 is connected with the host computer 230 to receive a detection instruction from the host computer 230, and then controls the on-off of the corresponding first switch assembly 110 and second switch assembly 120 according to the detection instruction. For example, the on-off of the plurality of first relays 111 in the first switch group and the plurality of second relays 121 in the second switch group can be controlled respectively, so as to realize the traversal detection of each first to-be-detected pin 210 and each second to-be-detected pin 220.

[0075] In some embodiments, referring to the accompanying drawings Figure 5 , the accompanying drawings Figure 5 show a flowchart of a pin detection method in an embodiment of the present application. The pin detection method in the embodiment can be realized by the pin detection circuit in any of the above embodiments. For example, the pin detection method can be realized by the controller in any of the above embodiments. Alternatively, the pin detection method can be realized by the host computer and the controller in any of the above embodiments, but is not limited thereto.

[0076] The pin detection method in the embodiment can include the following steps S501 to S504.

[0077] In step S501, a plurality of to-be-detected pins of a connector are divided into a plurality of rows of first to-be-detected pins and a plurality of columns of second to-be-detected pins.

[0078] For example, the plurality of to-be-detected pins can be numbered according to their positions in the connector, and then the plurality of to-be-detected pins can be divided into the first to-be-detected pins and the second to-be-detected pins according to the numbers. For example, the first to-be-detected pins can refer to the pins in the row direction, and the second to-be-detected pins can refer to the pins in the column direction, but are not limited thereto.

[0079] In step S502, one relay in the first switch group and one relay in the second switch group are controlled to be turned on one by one.

[0080] In step S503, an electrical parameter between one first to-be-detected pin and one second to-be-detected pin is acquired respectively.

[0081] In step S504, the connection state of the first to-be-detected pin and the second to-be-detected pin is confirmed according to the electrical parameter.

[0082] Exemplarily, the first switch group can include a plurality of first relays, and the second switch group can include a plurality of second relays. For example, the plurality of first to-be-tested pins are X11, X12, X13, X14,..., the plurality of first relays are A11, A12, A13, A14,..., the plurality of second relays are B11, B12, B13, B14,..., the plurality of second to-be-tested pins are Y11, Y12, Y13, Y14,..., the first relays and the second relays are respectively connected to the controller, in addition, A11 is respectively connected to X11 and B11, A12 is respectively connected to X12 and B12, A13 is respectively connected to X13 and B13, A14 is respectively connected to X14 and B14, and so on. B11 is respectively connected to A11 and Y11, B12 is respectively connected to A12 and Y12, B13 is respectively connected to A13 and Y13, B14 is respectively connected to A14 and Y14, and so on. In the case that the controller A11 and B11 are turned on, the electrical parameter between X11 and Y11 can be obtained through the source table, so as to determine the connection state between X11 and Y11 based on the electrical parameter. In the case that the controller controls A11 and B12 to be turned on, the electrical parameter between X11 and Y12 can be obtained through the source table, so as to determine the connection state between X11 and Y12 based on the electrical parameter. In this way, the connection state between each first to-be-tested pin and each second to-be-tested pin can be obtained.

[0083] For example, the voltage between each first to-be-tested pin and each second to-be-tested pin can be obtained respectively, in the case that the voltage between the first to-be-tested pin and the second to-be-tested pin satisfies the preset voltage range, it is considered that the connection state between the corresponding first to-be-tested pin and the corresponding second to-be-tested pin is a normal state. In the case that the voltage between the first to-be-tested pin and the second to-be-tested pin does not satisfy the preset voltage range, it is considered that the connection state between the corresponding first to-be-tested pin and the corresponding second to-be-tested pin is an abnormal state.

[0084] It should be understood that although the steps in the flowcharts involved in the above-described embodiments are shown in sequence according to the arrows, the steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, the steps are not strictly limited in sequence, and the steps can be executed in other sequences. Moreover, at least some of the steps in the flowcharts involved in the above-described embodiments can include multiple steps or multiple stages, which are not necessarily executed at the same time, but can be executed at different times, and the execution sequence of the steps or stages is not necessarily sequential, but can be executed alternately or alternately with at least some of the other steps or steps or stages in other steps. It can be understood that the steps in different embodiments can be freely combined as needed, and various non-contradictory schemes formed by the combination are within the scope of protection of the present application.

[0085] In some embodiments, the number of first test pins 210 is 27 (X1, X2, X3, X4, …, X27 respectively), and the number of second test pins 220 is 16 (Y1, Y2, Y3, Y4, …, Y16 respectively). The first switch assembly 110 includes at least 27 first relays 111, and the second switch assembly 120 includes at least 16 second relays 121. The 27 first relays 111 are connected to the controller 130 and are one-to-one connected to the 27 first test pins 210, and the 27 first relays 111 are connected to the 16 second relays 121. In the case where the number of first relays 111 in the first switch assembly 110 is more than 27, the excess first relays 111 are suspended. The 16 second relays 121 are connected to the controller 130, and the 16 second relays 121 are connected to the 27 first relays 111 and one-to-one connected to the 16 second test pins 220.

[0086] Referring to FIGS. 1 to 4, Figure 1 , FIG. 5 shows a schematic diagram of the connection relationship between the 16 second relays 121 and the 27 first relays 111 in the embodiments of the present application, Figure 6 and FIG. 6 shows a voltage value table between the 16 second test pins 220 and the 27 first test pins 210. Figure 7 Figure 6 In the process of obtaining the table shown in FIG. 6, one first relay 111 and one second relay 121 can be turned on at a time to obtain all the voltage values in the table. Figure 7

[0087] In the process of obtaining the table shown in FIG. 6, one first relay 111 and one second relay 121 can be turned on at a time to obtain all the voltage values in the table. Figure 7

[0088] ​​​Any combination of the technical features in the above-described embodiments can be made, and for the sake of brevity, not all possible combinations are described, however, it is to be understood that the application embraces all such possible combinations.

[0089] The above-described embodiments only express several implementation manners of the present application, and the description is relatively specific and detailed, but it should not be understood as a limitation on the patent scope of the application. It should be pointed out that for ordinary skilled persons in the art, some modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the patent protection scope of the present application should be subject to the appended claims.

Claims

1. A pin detection circuit, characterized in that, For detecting multiple first test pins and multiple second test pins of a connector; the pin detection circuit includes: The first switching assembly is connected to multiple first pins under test; The second switching assembly is connected to a plurality of second pins under test and the first switching assembly, respectively; A controller, connected to the first switch assembly and the second switch assembly, is used to control the on / off state of the first switch assembly and the second switch assembly, respectively; A source table is used to connect multiple first pins under test and second pins under test, to output power to the first pins under test and the second pins under test, and to measure the electrical parameters between the first pins under test and the second pins under test; the electrical parameters are used to confirm the connection status of the first pins under test and the second pins under test.

2. The pin detection circuit according to claim 1, characterized in that, Also includes: A connection module is provided for connecting the first switch assembly and the second switch assembly.

3. The pin detection circuit according to claim 2, characterized in that, The connection module includes: A shift register is connected to the controller, the first switch assembly, and the second switch assembly, respectively, for receiving control signals from the controller and transmitting the control signals to the corresponding first switch assembly and second switch assembly, so that the first switch assembly and the second switch assembly are turned on or off under the action of the control signals.

4. The pin detection circuit according to claim 1, characterized in that, The first switching component includes: Multiple first relays are respectively connected to multiple first pins under test, the controller, and the second switching assembly, and are used to conduct the conductive line between the first pins under test and the second switching assembly under the action of the controller.

5. The pin detection circuit according to claim 4, characterized in that, The second switching assembly includes: Multiple second relays are connected to multiple second pins under test and multiple first relays respectively, and are used to conduct the conductive line between the first pins under test and the second pins under test together with the multiple first relays under the action of the controller.

6. The pin detection circuit according to claim 5, characterized in that, The number of relays in the first switching assembly is greater than or equal to the number of the first pins under test; and / or, The number of relays in the second switching assembly is greater than or equal to the number of the second pins under test.

7. The pin detection circuit according to claim 1, characterized in that, The electrical parameters include at least one of voltage, resistance, and current.

8. The pin detection circuit according to claim 1, characterized in that, The source table type includes Kelvin four-line source tables.

9. The pin detection circuit according to claim 1, characterized in that, The controller is also used to connect to a host computer and receive detection commands from the host computer to control the on / off state of the corresponding first switch assembly and second switch assembly according to the detection commands.

10. A pin detection method, characterized in that, Implemented by the pin detection circuit as described in any one of claims 1 to 9; the pin detection method includes: The connector's multiple pins under test are divided into multiple rows of first pins under test and multiple columns of second pins under test; One relay in the first switch group and one relay in the second switch group are turned on one by one; Obtain the electrical parameters between a first pin under test and a second pin under test; The connection status of the first pin under test and the second pin under test is confirmed based on the electrical parameters.

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