Automatic test method of isolation amplifier

Abstract

The invention discloses an automatic test method of an isolation amplifier. The automatic test method comprises the following steps: step 1) building a peripheral test circuit of the isolation amplifier; the method for testing the linearity of the isolation amplifier based on the peripheral test circuit can greatly improve efficiency and data stability. The method for testing the linearity of the isolation amplifier based on the peripheral test circuit can be used for testing the linearity of the isolation amplifier based on the peripheral test circuit.

Description

Technical Field

[0001] This invention relates to the field of electronic technology, specifically an automatic testing method for isolation amplifiers. Background Technology

[0002] Analog ICs are circuits used to generate, amplify, and process various analog signals. They have a high degree of integration, integrating multiple analog circuit components onto a single chip, thereby reducing size, lowering power consumption, and improving reliability.

[0003] Analog IC manufacturing involves a series of steps and technologies that collectively determine the performance and reliability of the final product. In analog IC layout design, strict adherence to process characteristics is crucial for physical device placement and routing to minimize performance degradation caused by process deviations. However, the manufacturing process, especially circuit design, requires highly matched components, and perfect matching is difficult to guarantee during fabrication.

[0004] As is currently known, various testing methods are complex and diverse, and have limitations to varying degrees, restricting testing accuracy, manufacturing costs, and testing efficiency. To better address this issue of balancing design accuracy, cost, and efficiency, an automatic testing method for adjusting isolation amplifiers is proposed. Summary of the Invention

[0005] The purpose of this invention is to provide an automated testing method for isolation amplifiers, comprising the following steps:

[0006] Step 1) Construct the peripheral test circuit for the isolation amplifier;

[0007] Step 2) Based on the external test circuit, perform offset testing on the isolation amplifier to obtain the offset voltage test results;

[0008] Step 3) Based on the external test circuit, perform a linearity test on the isolation amplifier and obtain the linearity test results.

[0009] Furthermore, if the offset voltage test result is within the range of [-7.5 mV, 17.5 mV] and the linearity test result is within the range of [-25 mV, 25 mV], then the isolation amplifier is qualified.

[0010] Furthermore, the peripheral test circuit includes a power supply Power1, a power supply Power2, a relay, and a test board.

[0011] Furthermore, Power1 and Power2 provide power to the transmitter and receiver of the isolation amplifier, respectively.

[0012] Furthermore, the test board is used to control the relay switch;

[0013] Furthermore, the relay is used to control the signal path, power connection, and test point switching.

[0014] Furthermore, the test points include the isolation amplifier signal input test point, the isolation amplifier signal output test point, the input reference voltage test point, and the output reference voltage test point.

[0015] Furthermore, in step 2), the offset test of the isolation amplifier includes:

[0016] Step 2.1) Set the input voltage to 0V and turn on the relay switch;

[0017] Step 2.2) Measure the actual input voltage and actual output voltage of the isolation amplifier, and calculate the offset voltage = actual output voltage - actual input voltage.

[0018] Furthermore, in step 3), the linearity test of the isolation amplifier includes:

[0019] Step 3.1) Set the input voltage of the isolation amplifier in a step manner so that the input voltage of the isolation amplifier varies within the range of -10V to +10V;

[0020] After each adjustment of the input voltage, the actual input voltage and actual output voltage of the isolation amplifier are measured and written into the measurement input array and measurement output array respectively.

[0021] Step 3.2) Read the maximum voltage difference Vmax and the minimum real voltage difference Vmin of the measurement input sequence;

[0022] Step 3.3) Calculate the linearity INL = Vmax - Vmin.

[0023] Furthermore, the actual input voltage and actual output voltage are obtained by measuring with a multimeter.

[0024] The technical effects of this invention are undeniable. This invention includes an offset testing method and a linearity testing method. The offset testing method mainly uses a fully automatic testing machine programmed to control the signal source and peripheral circuit switches for testing. The linearity testing method calculates the linearity through data integration.

[0025] The present invention employs a fully automated chip parameter testing method, which can greatly improve efficiency and data stability. Attached Figure Description

[0026] Figure 1 This is the external test circuit diagram;

[0027] Figure 2 This is a front view of the test circuit PCB.

[0028] Figure 3 This is a view of the back of the PCB for the test circuit.

[0029] Figure 4 3D view of the back of the PCB for the test circuit;

[0030] Figure 5 3D view of the front side of the test circuit PCB;

[0031] Figure 6 This is a picture of the actual circuit board.

[0032] Figure 7 This is a schematic diagram of chip test data. Detailed Implementation

[0033] The present invention will be further described below with reference to embodiments, but it should not be construed that the scope of the present invention is limited to the following embodiments. Various substitutions and modifications made based on ordinary technical knowledge and common practices in the art without departing from the above-described technical concept of the present invention should be included within the scope of protection of the present invention.

[0034] Example 1:

[0035] See Figures 1 to 7 An automated testing method for an isolation amplifier includes the following steps:

[0036] Step 1) Construct the peripheral test circuit for the isolation amplifier;

[0037] Step 2) Based on the external test circuit, perform offset testing on the isolation amplifier to obtain the offset voltage test results;

[0038] Step 3) Based on the external test circuit, perform a linearity test on the isolation amplifier and obtain the linearity test results.

[0039] Example 2:

[0040] An automatic testing method for an isolation amplifier, with the same technical content as in Embodiment 1, further wherein if the offset voltage test result is within the range of [-7.5 mV, 17.5 mV] and the linearity test result is within the range of [-25 mV, 25 mV], then the isolation amplifier is qualified.

[0041] Example 3:

[0042] An automatic testing method for an isolation amplifier, with the same technical content as any one of Embodiments 1-2, further comprising a peripheral testing circuit including a power supply Power1, a power supply Power2, a relay, and a test board.

[0043] Example 4:

[0044] An automatic testing method for an isolation amplifier, with the same technical content as any one of embodiments 1-3, further wherein power supply Power1 and power supply Power2 provide power to the transmitting end and receiving end of the isolation amplifier, respectively.

[0045] Example 5:

[0046] An automatic testing method for an isolation amplifier, with the same technical content as any one of embodiments 1-4, further wherein the test board is used to control a relay switch;

[0047] Example 6:

[0048] An automatic testing method for an isolation amplifier, with the same technical content as any one of embodiments 1-5, further wherein the relay is used to control the signal path, power connection and test point switching.

[0049] Example 7:

[0050] An automatic testing method for an isolation amplifier, with the same technical content as any one of embodiments 1-6, further comprising the following test points: isolation amplifier signal input test point, isolation amplifier signal output test point, input terminal reference voltage test point, and output terminal reference voltage test point.

[0051] Example 8:

[0052] An automatic testing method for an isolation amplifier, with the same technical content as any one of embodiments 1-7, further comprising, in step 2), the step of performing offset testing on the isolation amplifier, including:

[0053] Step 2.1) Set the input voltage to 0V and turn on the relay switch;

[0054] Step 2.2) Measure the actual input voltage and actual output voltage of the isolation amplifier, and calculate the offset voltage = actual output voltage - actual input voltage.

[0055] Example 9:

[0056] An automatic testing method for an isolation amplifier, with the same technical content as any one of embodiments 1-8, further comprising, in step 3), the step of performing a linearity test on the isolation amplifier, including:

[0057] Step 3.1) Set the input voltage of the isolation amplifier in a step manner so that the input voltage of the isolation amplifier varies within the range of -10V to +10V;

[0058] After each adjustment of the input voltage, the actual input voltage and actual output voltage of the isolation amplifier are measured and written into the measurement input array and measurement output array respectively.

[0059] Step 3.2) Read the maximum voltage difference Vmax and the minimum real voltage difference Vmin of the measurement input sequence;

[0060] Step 3.3) Calculate the linearity INL = Vmax - Vmin.

[0061] Example 10:

[0062] An automatic testing method for an isolation amplifier, with technical content identical to any one of Embodiments 1-9, further wherein the actual input voltage and actual output voltage are obtained by measuring with a multimeter. Embodiment 11:

[0063] An automatic testing method for an isolation amplifier, using the following peripheral testing circuit:

[0064] like Figure 1 As shown, Power1 and Power2 are power sources. A3, D3, A4, H4, A1, B1, C1, and D1 are power supply meters, controlled by QVC and OVC boards respectively. The URX type is a relay control port, controlled by the TMU board of the testing machine, which controls the relay switches on the test board to achieve automated testing. AGND and AGND2 are two independent power grounds used to prevent interference. C22, 23, 14, 15, 16, 17, 18, 19, 20, and 21 are independent filter capacitors; different capacitors can be soldered as needed for filtering. The KX type represents a relay, used to control the connection to the test circuit for flexible operation. U1, 3, 6, 7, and 8 are BNC connectors; signal and power lines from these interfaces experience less interference and have a shielding effect.

[0065] like Figure 1As shown in the diagram, Power1 contains a signal source, a power supply, and a relay control interface. VCC_5V is a 5V power supply, used to control the relay's on / off state due to its limited load capacity, controlling the relay's engagement via a coil. VCC_15V and VCC_-15V enable one power supply to output +15V and the other -15V. A3 and D3 are resources from the original power supply's QVC, while A4 and H4 are resources from the original power supply's DVC. A1, B1, C1, and D1 are resources from the original power supply's OVC. A3 is used to supply the input pin signal; a 100nF capacitor is added nearby for filtering and stabilizing the input signal. UR1, UR2, UR3, UR4, UR5, UR6, UR7, UR8, UR9, UR10, UR11, UR12, UR13, UR14, UR15, UR16, UR17, UR18, UR19, and UR20 are relay control pins, which can be used to build test circuits. The TMU1_HIZ port is the interface of the DD32 digital board, which can be used to measure time parameters such as time and frequency during testing. DGND and AGND are the analog ground and digital ground, respectively; connecting them together forms the reference terminal GND for one of the power supplies. Power2 in the diagram contains a signal source, power supply, and a relay control interface. VCC_5V is a 5V power supply; due to its relatively small load capacity, it is used to control the on / off state of the relay, controlling the relay's engagement via a coil. VCC_15V and VCC_-15V enable one power supply to output +15V and the other to output -15V. E3 and H3 are resources from the original power supply QVC. These two original power supply interfaces serve as the positive and negative power supply interfaces for the transmitter chip. E3 outputs +15V as the positive power supply and H3 outputs -15V as the negative power supply. Connect C1, C2 and C3, C4 respectively, with two 100nF capacitors for power supply filtering to simulate the inaccurate data caused by power supply fluctuations at the transmitter. E1, F1, G1, and H1 are resources from the original power supply OVC. UR21, UR22, UR23, UR24, UR25, UR26, UR27, UR28, UR29, UR30, UR31, UR32, UR33, UR34, UR35, UR36, UR37, UR38, UR39, and UR40 are relay control pins, which can be used to build test circuits. The TMU2_HIZ port is the interface of the DD32 digital board, which can be used to measure time parameters such as frequency during testing. DGND and AGND are the analog ground and digital ground, respectively; connecting them together forms the reference terminal GND for one of the power supplies. U2 is the transmitter chip fixture; C20 and C18 are the negative power supply filters for the fixture, and C21 and C19 are the positive power supply filters. U4 is the receiver chip fixture; C14 and C16 are the negative power supply filters for the fixture, and C15 and C17 are the positive power supply filters.U5 is a sample test fixture used to test for sample abnormalities and determine if there are errors in the program or circuit board. C7 and C23 are positive power supply filter capacitors, and C8 and C22 are negative power supply filter capacitors. H1 and H2 are jumpers, used to connect or disconnect the capacitors between the transmitter and receiver. C5 and C6 are the two 3pF capacitors used for signal transmission. Terminal H3 is a wafer interface; the 20-pin connector connects to the pin header on the pin header card to achieve signal transmission. Because it is a direct-insertion type, interference is minimal and data is stable. U6 is the external negative power supply. U7 is the external positive power supply, and U8 is GND2. These three ports enable independent power supply for the receiver chip. U1 is for connecting the positive probe of a multimeter, and U3 is for connecting the negative probe. The negative power supply to the receiver is connected by controlling relay K8 via signal UR39, and the positive power supply to the receiver is connected by controlling relay K9 via signal UR40. The external input signal is connected for testing by controlling relay K1 via signal UR14. The UR20 signal controls relay K2, connecting the output terminal to a multimeter to measure the output voltage. The UR8 signal controls relay K3, connecting the signal source of POWER1 to output the signal to the transmitter chip. The UR38 signal controls relay K4, connecting the output terminal to the time parameter measurement port of POWER2. The UR16 signal controls relay K5, connecting the input terminal to the positive input terminal of the multimeter to measure the actual value of the input signal, ensuring data accuracy. The UR6 signal controls relay K6, connecting the input terminal's ground to the negative input terminal of the multimeter as a reference voltage. The UR8 signal controls relay K7, connecting the output terminal's ground to the negative input terminal of the multimeter as a reference voltage.

[0066] like Figure 1 As shown, the transmitter and receiver of the isolation amplifier are powered by two independent power supplies to avoid interference. U7 and U6 are the positive and negative power supplies for the receiver, respectively. K8 and K9 control the connection of the receiver power supply to prevent the receiver chip from being powered on when the transmitter chip is not working, thus avoiding damage to the chip. The signal sources E3 and H3 of the test instrument are used as the positive and negative power supplies for the transmitter. To keep the power supply clean, filter capacitors are added at both the positive and negative power supplies. The presence of H1 and H2 in the figure is mainly for receiving signals at closer distances. They can be removed when capacitors are not needed, making the test more flexible. K3 is used as an input relay. The input signal enters the transmitter chip through this relay, with port A3 as the input signal source. To ensure data accuracy, this product uses a 6.5-digit multimeter for measurement. K2 and K5 are used to switch between measuring input and output. Since two independent power supplies are designed, K6 and K7 are designed to measure the voltages of the different grounds of the transmitter chip and the receiver chip, respectively.

[0067] Working mechanism of the present invention: Since the power supply of the isolation amplifier is ±15V, the input at the emitter end is 0 when measuring the input offset. However, due to possible deviations in the values input by the signal source, it is necessary to measure the input voltage first and then the output voltage, and thus the difference between them, i.e., the offset voltage, can be obtained.

[0068] For the test signal source of linearity INL, the output voltage needs to range from -10V to +10V to measure the input and output and put them into an array, and based on this data, the difference between the maximum value and the minimum value is accurately calculated.

[0069] Calculation of the data DATE: Using double type, subtract the maximum difference and the minimum difference. According to the characteristics of the chip, it is found that the maximum and minimum outputs are the 5th and 17th elements of the array respectively. The formula is: DATE = ((voutn10_10

[16] - vinn10_10

[16] ) - (voutn10_10[4] - vinn10_10[4])) * 1000;

[0070] Design of the automation program: Based on C language, communicate with the multimeter through NI's standard VISA library. The transmission method uses the RS232 interface, which has strong anti-interference ability and data will not be lost. At the same time, it is a full-duplex transmission method with fast transmission speed. It is encapsulated as a collection function in the VISA library for convenient calling, and attention is paid to the maintainability and portability of the program. The program design of linearity uses an array to save data, which provides great convenience in the debugging of the program. It is possible to clearly see the output corresponding to each voltage to find problems, and the algorithm simplifies the operation, making the program not look cumbersome.

[0071] Such as Figure 2 、 Figure 3 As shown: The PCB is designed using professional EDA design tools, which can ensure the quality of the test board and the accuracy of data at the same time. For signal lines, avoid via holes during design, which can avoid parasitic capacitance or inductance introduced by improper via hole design and thus interfere with high-speed signals. Keep a certain distance between signal lines and power lines to avoid interference.

[0072] Such as Figure 4 、 Figure 5 As shown: The physical test board matches the position and size of the probe station and can be directly connected through pin headers without connecting signal lines through the way of Dupont wires, further ensuring the accuracy and stability of data.

Claims

1. An automatic testing method for an isolation amplifier, characterized in that, Includes the following steps: Step 1) Construct the peripheral test circuit for the isolation amplifier; Step 2) Based on the external test circuit, perform offset testing on the isolation amplifier to obtain the offset voltage test results; Step 3) Based on the external test circuit, perform a linearity test on the isolation amplifier and obtain the linearity test results.

2. The automatic testing method for an isolation amplifier according to claim 1, characterized in that, If the offset voltage test result is within the range of [-7.5 mV, 17.5 mV] and the linearity test result is within the range of [-25 mV, 25 mV], then the isolation amplifier is qualified.

3. The automatic testing method for an isolation amplifier according to claim 1, characterized in that, The peripheral test circuit includes power supply Power1, power supply Power2, relays, and test boards.

4. The automatic testing method for an isolation amplifier according to claim 3, characterized in that, Power1 and Power2 provide power to the transmitter and receiver of the isolation amplifier, respectively.

5. The automatic testing method for an isolation amplifier according to claim 3, characterized in that, The test board is used to control the relay switch.

6. The automatic testing method for an isolation amplifier according to claim 3, characterized in that, The relay is used to control signal paths, power connections, and test point switching.

7. The automatic testing method for an isolation amplifier according to claim 6, characterized in that, The test points include the isolation amplifier signal input test point, the isolation amplifier signal output test point, the input reference voltage test point, and the output reference voltage test point.

8. The automatic testing method for an isolation amplifier according to claim 1, characterized in that, Step 2) involves performing offset testing on the isolation amplifier, including: Step 2.1) Set the input voltage to 0V and turn on the relay switch; Step 2.2) Measure the actual input voltage and actual output voltage of the isolation amplifier, and calculate the offset voltage = actual output voltage - actual input voltage.

9. The automatic testing method for an isolation amplifier according to claim 1, characterized in that, Step 3) involves performing a linearity test on the isolation amplifier, including: Step 3.1) Set the input voltage of the isolation amplifier in a step manner so that the input voltage of the isolation amplifier varies within the range of -10V to +10V; After each adjustment of the input voltage, the actual input voltage and actual output voltage of the isolation amplifier are measured and written into the measurement input array and measurement output array respectively. Step 3.2) Read the maximum voltage difference Vmax and the minimum real voltage difference Vmin of the measurement input sequence; Step 3.3) Calculate the linearity INL = Vmax - Vmin.

10. An automatic testing method for an isolation amplifier according to claim 7 or 8, characterized in that: The actual input voltage and actual output voltage are obtained by measuring with a multimeter.

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