Processor starting method and system, chip and electronic equipment
By configuring a backup bootloader in a multi-core processor system, the target boot core processor obtains and executes the backup program from Flash, thus solving the boot failure problem caused by BootROM corruption and improving the stability and applicability of the processor.
Patent Information
- Application Number
- CN202511571678.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-30
- Publication Date
- 2026-02-13
AI Technical Summary
Existing processors cannot boot when the boot read-only memory (BootROM) is damaged, resulting in poor stability and limited applicability.
By pre-configuring a backup bootloader in a multi-core processor system, the target boot core processor retrieves and executes the backup bootloader from the Flash memory to complete the boot process.
Even if the BootROM is damaged, it can still ensure that the processor starts normally, improving stability and expanding its applicability.
Smart Images
Figure CN121523744A_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of chip technology, and in particular relates to a processor startup method, system, chip, electronic device, and computer-readable storage medium. Background Technology
[0002] Currently, most processors are multi-core processors. When the processor starts up, a pre-designated boot core retrieves the boot loader from the boot read-only memory (BootROM) and executes it to complete the boot process.
[0003] However, because the Remoteboot ROM (BootROM) is a read-only memory, the boot loader stored within it cannot be modified. Therefore, if the BootROM is damaged, the entire processor will fail to boot. It is evident that improving the stability and applicability of the processor is a pressing issue that needs to be addressed in this field. Summary of the Invention The purpose of this application is to provide a processor boot method, system, chip, electronic device, and computer-readable storage medium, aiming to provide a processor boot scheme with higher stability and wider applicability.
[0004] A first aspect of this application provides a processor startup method, applied to an embedded system including a multi-core processor, the processor startup method comprising: In response to the preset boot operation of the embedded system, the first boot core processor retrieves and executes the preset bootloader from the boot read-only memory BootROM to perform the boot boot operation; If the first boot core processor fails to execute the preset bootloader, a backup bootloader is retrieved from the preset flash memory; wherein the backup bootloader describes the same boot operation as the preset bootloader. The bootloader is executed by the target boot kernel processor, which is any one of multiple kernel processors.
[0005] This application provides a processor boot method that, in response to a preset boot operation of an embedded system, retrieves and executes a preset boot loader from the BootROM via a first boot core processor to perform the boot process. If the first boot core processor fails to execute the preset boot loader, a backup boot loader is retrieved from Flash memory. Since both the backup boot loader and the preset boot loader are used to implement the boot operation of the embedded system, any one of multiple core processors can be designated as the target boot core processor, and the backup boot loader can be executed by that target core processor to complete the boot process. Therefore, even if the BootROM is damaged and the boot loader cannot be retrieved for booting, a backup boot loader can still be retrieved from Flash memory to complete the boot process, providing a foundation for normal processor booting and offering a processor boot solution with higher stability and wider applicability.
[0006] A second aspect of this application provides a processor boot system applied to an embedded system including multiple core processors. The processor boot system includes: The first execution unit is used to respond to the preset boot operation of the embedded system by obtaining and executing a preset bootloader from the boot read-only memory (BootROM) through the first boot core processor to perform the boot operation. The acquisition unit is used to acquire a backup bootloader from a preset memory Flash when the first boot core processor fails to execute the preset bootloader; wherein, both the backup bootloader and the preset bootloader are used to implement the boot operation of the embedded system. The second execution unit is used to execute the backup bootloader through the target boot kernel processor to complete the boot process; wherein the target boot kernel processor is any one of multiple kernel processors.
[0007] A third aspect of this application provides a processor startup device, comprising: Memory, used to store computer programs; An execution device, used to execute a computer program, implement the steps of the processor startup method provided in the first aspect above.
[0008] A fourth aspect of this application provides a chip for performing the steps of the processor startup method provided in the first aspect.
[0009] A fifth aspect of this application provides an electronic device, including: a memory, a processor, and a computer program stored in the memory and executable on the electronic device, wherein the processor executes the computer program to implement the steps of the processor startup method provided in the first aspect above.
[0010] A sixth aspect of this application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the processor startup method provided in the first aspect above.
[0011] It is understood that the beneficial effects of the second to sixth aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here. Attached Figure Description
[0012] Figure 1 A flowchart illustrating the implementation of a processor startup method provided in this application embodiment; Figure 2 This is a schematic diagram of a specific structure of the embedded system in an embodiment of this application; Figure 3 A flowchart illustrating the implementation of a processor startup method according to another embodiment of this application; Figure 4 This application provides a schematic diagram of a processor boot system structure. Figure 5 This is a structural block diagram of an electronic device provided in an embodiment of this application. Detailed Implementation
[0013] The embodiments of this application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.
[0014] To enable those skilled in the art to better understand the solutions of this application, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0015] In the embodiments of this application, "at least one" refers to one or more; "multiple" refers to two or more. In the description of this application, the terms "first," "second," "third," etc., are used only for the purpose of distinguishing descriptions and should not be construed as indicating or implying relative importance, nor should they be construed as indicating or implying order.
[0016] References such as “one embodiment” or “some embodiments” described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the terms “comprising,” “including,” “having,” and variations thereof, in this specification, mean “including but not limited to,” unless otherwise specifically emphasized.
[0017] It should be noted that in the embodiments of this application, "and / or" describes the relationship between associated objects, indicating that there can be three kinds of relationships. For example, A and / or B can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone.
[0018] Currently, most processors are multi-core processors. When the processor starts up, a pre-designated boot core retrieves the boot loader from the boot read-only memory (BootROM) and executes it to complete the boot process.
[0019] For example, since the BootROM is a read-only memory, the bootloader stored in it cannot be changed after the chip is fabricated. Therefore, if the BootROM is damaged after the chip is manufactured, the entire processor will be unable to boot.
[0020] For example, during the processor chip manufacturing process, a bootloader is written into the BootROM. After the tape-out process, the contents of the BootROM cannot be modified. Suppose that during the processor chip manufacturing process, due to electromagnetic inversion or other reasons, the data in the BootROM changes, preventing the processor from reading the bootloader from the BootROM during startup, resulting in processor boot failure. In this case, the processor chip must be scrapped. Therefore, improving the stability and applicability of processors is a pressing problem that needs to be solved in this field.
[0021] To address the aforementioned technical problems, this application provides a processor boot method. Upon responding to a preset boot operation of an embedded system, a first boot core processor retrieves and executes a preset bootloader from the BootROM to perform the boot process. If the first boot core processor fails to execute the preset bootloader, a backup bootloader is retrieved from Flash. Since both the backup bootloader and the preset bootloader are used to implement the embedded system boot operation, any one of multiple core processors can be designated as the target boot core processor, and the backup bootloader can be executed by that target core processor to complete the boot process. Therefore, even if the BootROM is damaged and the bootloader cannot be retrieved for booting, a backup bootloader can still be retrieved from Flash to complete the boot process, providing a foundation for normal processor booting and offering a more stable and widely applicable processor boot solution.
[0022] This embodiment provides a processor startup method applied to an embedded system including a multi-core processor. In all embodiments of this application, unless otherwise specified, the processor may be a dual-core processor, a tri-core processor, or a multi-core processor; no limitation is made herein.
[0023] See Figure 1 , Figure 1 A flowchart illustrating the implementation of a processor startup method according to an embodiment of this application is shown. Figure 1 As shown, the processor's startup methods include: Step 110: In response to the preset boot operation of the embedded system, the preset bootloader is obtained from the BootROM and executed by the first boot core processor to perform the boot operation.
[0024] In step 110, the first boot core processor is one of a plurality of core processors.
[0025] In all embodiments of this application, BootROM can be understood as a read-only memory space embedded in the processor, storing a preset bootloader program. Here, the preset bootloader program is used to implement hardware initialization, system image loading, and other boot operations. The boot kernel processor executes the bootloader program to complete the corresponding boot operations.
[0026] It's easy to understand that the preset startup operation generally refers to the operation that triggers a cold start of an embedded system. Here, a cold start is the process of powering on the chip after it has been completely powered off. That is, before a cold start of an embedded system with multiple core processors, all hardware such as core processors, memory, buses, and peripheral controllers are placed in an initial reset state, such as registers being cleared and caches being invalidated.
[0027] For example, taking a multi-core processor applied to an electronic device as an example, the preset startup operation may specifically be the power-on operation of the electronic device, the power-on operation, etc.
[0028] For example, when an electronic device is completely powered off, a preset boot operation is triggered when the user manually turns on the electronic device or triggers the power switch of the electronic device. At this time, the embedded system responds to the preset boot operation and executes the preset boot loader program obtained from the BootROM by the first boot core processor to perform the boot boot operation.
[0029] In all embodiments of this application, the first boot core processor is a pre-designated boot core among multiple core processors. It is readily understood that, to avoid multiple core processors starting simultaneously and causing chaos, competing for embedded system resources, or repeatedly performing initialization operations, the first core processor to start can be designated to execute the master boot. That is, the first core processor to start is the first boot core processor.
[0030] In practical implementation, when the embedded system responds to the embedded system's preset boot operation, the reset control unit in the embedded system can first force a reset of all core processors based on a general reset handler, at which point all core processors are in a standby state. Subsequently, the reset control unit can, according to a pre-configured or declared configuration, first release the pre-specified boot core processor, that is, start the first boot core processor to retrieve and execute the preset bootloader from the BootROM to perform the boot operation.
[0031] As one embodiment, step 110 above may specifically include: writing a preset bootloader stored in the BootROM into the first tightly coupled memory (TCM) of the first boot core processor via the first boot core processor. The preset bootloader cached in the first TCM is then executed by the first boot core processor to perform the boot operation.
[0032] It's important to note that for multi-core processors, each core has its own tightly coupled memory (TCM). This TCM can be understood as the core processor's private storage space, and its physical location is integrated next to the core processor. Therefore, each core processor can directly access its own TCM. This not only eliminates the unpredictability caused by the cached bootloader but also reduces the system resources required for bus contention and cache synchronization. Other core processors can access their respective TCMs via the bus.
[0033] In this embodiment, the first boot core processor writes the preset bootloader stored in the BootROM into the first TCM, and then performs the boot operation by executing the preset bootloader cached in the first TCM.
[0034] For example, in a specific implementation, the first TCM is empty by default, meaning that no data is stored in the first TCM when the first boot core processor starts. After the first boot core processor reads the preset bootloader from the BootROM, it writes it into the first TCM in a data transfer manner. Specifically, the preset bootloader read from the first TCM can be written to the default address of the first TCM. Correspondingly, when the first boot core processor executes the preset bootloader cached in the first TCM, it can also execute the preset bootloader at the default address of the first TCM to perform the boot operation.
[0035] In practical use, the first boot core processor executes a pre-defined bootloader to complete the pre-boot process. This can be understood as the first boot core processor executing the pre-defined bootloader to set up the processor's boot environment so that the processor can start and run smoothly. In specific implementations, this pre-defined bootloader can describe all or part of the pre-boot process. For example, it may initialize global hardware, the global interrupt controller, set up the C language execution environment, and prepare at least one of the following: the kernel environment. In practice, because the pre-defined bootloader is written to the BootROM during the processor's chip manufacturing process, the contents of the BootROM cannot be changed after the tape-out process. Therefore, if the data in the BootROM changes due to electromagnetic flips or other reasons during chip manufacturing, the pre-defined bootloader obtained by the first boot core processor from the BootROM will not be executed by the first boot core processor, leading to the failure of the first boot core processor to execute the pre-defined bootloader.
[0036] In this embodiment, to avoid the processor failing to boot due to the failure of the first boot core processor to execute the preset bootloader, a backup bootloader is pre-configured in the preset memory Flash. In this way, when the first boot core processor fails to execute the preset bootloader, the backup bootloader can be retrieved from the Flash and executed, that is, step 120 is executed to perform the boot operation again with the backup bootloader.
[0037] Step 120: If the first boot core processor fails to execute the preset bootloader, retrieve the backup bootloader from the preset memory Flash.
[0038] In step 120, both the backup bootloader and the preset bootloader are used to implement the boot operation of the embedded system.
[0039] In this embodiment, Flash refers to the on-chip Flash of the embedded system. In specific implementation, the preset bootloader configured in the BootROM can be backed up to the Flash as a backup bootloader, or the same preset bootloader can be configured in the Flash as a backup bootloader while configuring the preset bootloader in the BootROM. There is no limitation here.
[0040] It is understood that since the first boot core processor is the first core processor to boot, it can be regarded as the main core. Unless otherwise specified, the Flash in all embodiments of this application refers to the preset Flash in step 120, that is, the on-chip Flash of the embedded system.
[0041] As an example, if the first boot core processor fails to execute the preset bootloader, the first boot core processor, as the main core, can retrieve a backup bootloader from Flash and execute it. That is, the first boot core processor retrieves the backup bootloader from Flash and writes it into the first TCM.
[0042] As another example, if the first boot core processor fails to execute the preset bootloader, the first boot core processor, acting as the main core, can retrieve a backup bootloader from Flash and write it into the TCM of other boot core processors, instructing the other core processors to execute the backup bootloader. Here, "other core processors" refers to processors other than the first boot core processor.
[0043] As another example, when the first boot core processor fails to execute the preset bootloader, a backup bootloader is retrieved from Flash. This can be done by the first boot core processor instructing another boot core processor to actively retrieve the backup bootloader, or by the first boot core processor writing the backup bootloader from Flash into the TCM of another core processor.
[0044] Step 130: Execute the backup bootloader through the target boot kernel processor to complete the boot process.
[0045] In step 130, the target boot kernel processor is any one of the multiple kernel processors.
[0046] In this embodiment, the target boot core processor generally refers to the boot core processor that executes the backup bootloader to perform the boot operation again. In specific implementations, the target boot core processor can be the first boot core processor, or another boot core processor specified by the first boot core processor; there is no limitation here.
[0047] The above solution, by configuring a backup bootloader in Flash, allows the backup bootloader to be retrieved from Flash if the first boot core fails to execute the preset bootloader. The target boot core then executes this backup bootloader. Therefore, even if the preset bootloader in the BootROM is corrupted, the target boot core can still execute the backup bootloader to complete the boot process. This provides a foundation for normal processor startup and offers a more stable and widely applicable processor boot solution.
[0048] As an example, step 120 may specifically include step A1, specifically: Step A1: Write the backup bootloader in Flash into the first TCM of the first boot core processor via the first boot core processor.
[0049] Accordingly, step 130 may specifically include step B1, specifically: Step B1: Using the first boot kernel as the target boot kernel, execute the backup bootloader in the first TCM to complete the boot process.
[0050] In this embodiment, if the first boot core processor fails to execute the preset bootloader, the first boot core processor writes the backup bootloader in Flash into its own TCM, that is, the first TCM. At this time, the original preset bootloader in the first TCM is overwritten by the backup bootloader.
[0051] For example, in some scenarios, if the reason why the first boot core processor fails to execute the preset bootloader is that the preset bootloader in the BootROM is corrupted, the first boot core processor may also be unable to obtain the preset bootloader from the BootROM. That is, the first TCM may not have stored any program before writing the backup bootloader.
[0052] Therefore, regardless of whether the first TCM contains program content, after the first boot core processor writes the backup bootloader from Flash into the first TCM, the first TCM contains only the backup bootloader. In this way, the first boot core processor can be used as the target boot core processor to execute the backup bootloader in the first TCM to complete the processor boot operation.
[0053] In other scenarios, assuming that the failure of the first boot core processor to execute the preset bootloader is due to a fault in the first boot core processor, then writing the backup bootloader in Flash to the first TCM through the first boot core processor, and using the first boot core processor as the target boot core processor to execute the backup bootloader in the first TCM, there is still a risk that the execution of the backup bootloader will fail, which may result in the inability to perform or complete the boot process.
[0054] Therefore, as a possible implementation, before step A1 above, a step of initiating the first boot core processor can be included. This reduces the risk that the first boot core processor may fail to perform or complete the boot process when executing the backup bootloader.
[0055] As an example, step 120 may specifically include step A2, specifically: Step A2: Write the backup bootloader in Flash to the second TCM of the second boot core processor through the first boot core processor.
[0056] Accordingly, step 130 may specifically include step B2, specifically: Step B2: Using the second boot kernel as the target boot kernel, execute the backup bootloader in the second TCM to complete the boot process.
[0057] In this embodiment, the second boot core processor is any core processor other than the first boot core processor among the plurality of core processors. Accordingly, the second TCM specifically refers to the TCM of the second boot core processor.
[0058] In a practical implementation, the first boot core processor can use a data transfer method to read the backup bootloader in Flash and write it into the second TCM of the second boot core processor.
[0059] Figure 2 A schematic diagram of a specific structure of an embedded system according to an embodiment of this application is shown. For example... Figure 2 As shown, in practical implementation, the embedded system is configured with an AXI bus interface. Since the AXI bus protocol declares / defines AXI Slave, the AXI Slave interface allows the first boot core processor to act as the master device and communicate with the slave device through the AXI bus to perform data read and write operations. The slave device can be understood as any core processor in a multi-core processor.
[0060] Based on this, in the specific implementation, the first boot core processor enables the AXI bus interface, allowing it to access the BootROM. That is, the first boot core processor reads a preset bootloader from the BootROM via the AXI bus interface. The first boot core processor can also read a spare bootloader from Flash via the AXI bus interface, and then write the read spare bootloader into the TCM of the second boot core processor via data transfer.
[0061] In any of the above embodiments, since the first boot core processor is the first core processor to boot, it can also be regarded as the main core. Therefore, the first boot core processor can serve as the master device defined in the AXI bus protocol. Thus, when the backup bootloader in Flash is written to the first TCM or the second TCM through the first boot core processor, the first boot core processor can access Flash through the AXI Master interface and read the backup bootloader from Flash. That is, the backup bootloader can be written to the first TCM or the second TCM through the AXI Master interface.
[0062] It is understood that in other embodiments, the embedded system may also be configured with other bus interfaces. For example, the bus interface may specifically include any one of the following: AXI bus interface, ACE / ACE-Lite bus interface, CHI bus interface, OCP bus interface, AMBA AXI4-Stream bus interface, Wishbone bus interface, and TileLink bus interface; no limitation is made here. Accordingly, in a specific implementation, the first boot core processor may also enable other bus interfaces, allowing the first boot core processor to access the BootROM through other bus interfaces.
[0063] As one possible implementation, step A2 above may specifically include: instructing a second boot core processor to start via a first boot core processor; and instructing the second boot core processor via the first boot core processor to write the backup bootloader from Flash to a second TCM.
[0064] Here, the second boot core processor can actively read the spare bootloader from Flash via the AXI bus interface and write it into the second TCM.
[0065] Combination Figure 2 In the example shown, after the second boot core processor is started by instructing the first boot core processor, the second boot core processor can access the Flash through the AXI Slave interface and read the backup bootloader from the Flash. That is, the backup bootloader can be written into the second TCM through the AXI Slave interface.
[0066] As an example, if step 120 specifically includes step A1 in the above embodiments, then correspondingly, step 130 may specifically include steps B1, B1.5, and B2, specifically: Step B1: Using the first boot kernel as the target boot kernel, execute the backup bootloader in the first TCM.
[0067] Step B1.5: If the backup bootloader fails to execute in the first boot core processor, the backup bootloader in Flash is written into the second TCM of the second boot core processor through the first boot core processor.
[0068] Step B2: Using the second boot kernel as the target boot kernel, execute the backup bootloader in the second TCM to complete the boot process.
[0069] In this embodiment, step B1.5 differs from step A2 in the above embodiment in that, before writing the backup bootloader from Flash to the second TCM of the second boot processor by the first boot processor, it is necessary to consider whether the first boot processor has failed to execute the backup bootloader. That is, in step B1.5, the failure of the first boot processor to execute the backup bootloader is a prerequisite for writing the backup bootloader from Flash to the second TCM of the second boot processor by the first boot processor. Here, the failure of the first boot processor to execute the backup bootloader can also be understood as a prerequisite for executing step A2.
[0070] It is easy to understand that in this embodiment, the first boot core processor is used as the target boot core processor to execute the backup bootloader in the first TCM. This allows for restarting the boot process by executing the backup bootloader without replacing the boot core. If the first boot core processor fails to execute the backup bootloader, it indicates that the first boot core processor may be faulty or corrupted. In this case, to ensure the processor can boot as much as possible, the first boot core processor writes the backup bootloader from Flash into the second TCM. Then, the boot process can be completed by instructing the second boot core processor to execute the backup bootloader. That is, the second boot core processor is used as the target boot core processor, replacing the first boot core processor, to execute the backup bootloader again to complete the boot process.
[0071] In this way, whether the preset bootloader in the BootROM is forced or the first boot core processor fails or is damaged, the backup bootloader stored in Flash can still be executed by the second boot core processor, thus ensuring the completion of the boot process and avoiding the inability to start normally due to damage to some units in the embedded system.
[0072] Based on any of the above embodiments, as one example, step B2 may specifically include: The second boot core processor instructs the first boot core processor to enter a reset state. While the first boot core processor is in a reset state, the second boot core processor executes a backup bootloader to complete the boot process.
[0073] In this embodiment, the backup bootloader is executed by the second boot core processor, which can be understood as using the second boot core processor to replace the first boot core processor for booting operations.
[0074] Here, since the first boot core is the main core and is the first core to start during the processor boot process, to avoid confusion, resource contention, or redundant initialization operations caused by the simultaneous startup of the second and first boot cores, the second boot core can be designated to execute the main bootloader when executing the backup bootloader. That is, by instructing the first boot core to enter a reset state via the second boot core, the first boot core can be reset first, and then released after the boot process is complete. In this way, with the first boot core in a reset state, the boot process can be successfully completed by executing the backup bootloader via the second boot core.
[0075] As one possible implementation, the embedded system also includes a reset control unit. Accordingly, the above step of instructing the first boot core processor to enter a reset state via the second boot core processor may include: instructing the reset control unit to output a reset signal to the first boot core processor via the second boot core processor, so that the first boot core processor enters a reset state.
[0076] Here, the reset control unit in the embedded system can send reset signals to all core processors. When the second boot core processor is executing the backup bootloader, it can first instruct the reset control unit to output a reset signal to the first boot core processor, which can put the first boot core processor into a reset state, that is, put the first boot core processor into a low-power standby state.
[0077] In this way, not only can the first boot core processor and the second boot core processor be prevented from competing for system resources, but the overall power consumption of the embedded system during startup can also be reduced.
[0078] Based on any of the above embodiments, as one embodiment, after step B2, step C may be included, specifically: Step C: Configure the second boot core processor as the new first boot core processor.
[0079] In step C, the new first boot core processor is used to respond to the preset boot operation of the embedded system.
[0080] It is easy to understand that after executing step B2, it indicates that the second boot core processor is used as the target boot core processor, and the backup bootloader in the second TCM is executed, which can complete the boot process. Therefore, it can be said that the second boot core processor has the ability to complete the boot process. That is, it means that the second boot core processor can replace the first boot core processor as the main core.
[0081] For example, in a specific implementation, the second boot core processor is configured as the new first boot core processor. Specifically, the reset control unit in the embedded system can release the second boot core processor first after forcing all core processors to reset, so that the second boot core processor can be started first and thus become the new first boot core processor.
[0082] As one possible implementation method, step C may specifically include: Configure the identification information of the second boot core processor in the boot core flag bit of Flash, so as to indicate the second boot core processor as the new first boot core processor through the boot core flag bit.
[0083] In this embodiment, the boot core flag in Flash is used to indicate the main core, that is, to indicate the first booted core processor. By configuring the identification information of the second boot core processor into the boot core flag in Flash, the second boot core processor can be indicated as the first booted core processor next time, that is, the second boot core processor can be indicated as the new first boot core processor, so that when the preset boot operation of the embedded system is triggered next time, the new first boot core processor can respond.
[0084] The above scheme, after executing the backup bootloader in the second TCM to complete the boot process using the second boot core processor as the target boot core processor, indicates that the second boot core processor is now the target boot core processor. Based on this, by configuring the second boot core processor as the new first boot core processor, and making it the first core processor to boot next time, the time taken for the next boot processor can be shortened, thus speeding up the boot process.
[0085] Figure 3 A flowchart illustrating the implementation of a processor startup method according to another embodiment of this application is shown. Figure 1 The difference in the embodiments is that, Figure 3 In the illustrated embodiment, step 310 is included after step 110. Specifically: Step 310: When the preset bootloader is executed by the first boot core processor, monitor the execution of the preset bootloader by the first boot core processor.
[0086] In this embodiment, the situation where the first boot core processor executes the preset bootloader refers to the situation where the first boot core processor executes the preset bootloader to perform the boot operation.
[0087] It should be noted that since the contents of the preset bootloader and the tasks / contents of the boot operation are known when the first boot core processor executes the bootloader, the execution time required for the preset bootloader can be determined. Therefore, in practical applications, when the processor boots successfully overall, the execution of the preset bootloader by the first boot core processor is considered successful. If the execution time of the preset bootloader by the first boot core processor exceeds the required time, the execution of the preset bootloader by the first boot core processor is considered a failure.
[0088] As one implementation method, step 310 may specifically include: When the preset bootloader is executed by the first boot core processor, a preset watchdog timer is used to monitor the execution time of the preset bootloader. If the execution time exceeds the preset duration of the watchdog timer, the execution of the preset bootloader by the first boot core processor is deemed to have failed.
[0089] A watchdog timer (WDT) is a hardware timer designed to monitor the operating status of a system and reset it in the event of a system malfunction or deadlock to ensure that the system can operate normally or safely enter recovery mode.
[0090] In this embodiment, an independent watchdog timer is configured for the first boot core processor. During the execution of the preset bootloader by the first boot core processor, the system triggers the timing parameters of the watchdog timer, i.e., the preset duration. It is understood that this preset duration is typically set by the system designer based on application requirements and performance considerations to ensure that the timer resets on time under normal operating conditions. That is, the watchdog timer is reset with the execution of the preset bootloader by the first boot core processor as the trigger cycle. Here, the purpose of resetting the watchdog timer is to inform the embedded system that the watchdog timer is still running normally. If the core processor does not reset the timer within the preset time, the watchdog timer will time out and trigger. The embedded system determines whether the execution of the preset bootloader by the first boot core processor was successful or failed by monitoring whether it successfully resets its watchdog timer within the preset duration.
[0091] The above solution improves the utilization rate of the watchdog timer by reusing it to monitor the execution of the preset bootloader by the first boot core processor. This is because the watchdog timer is an essential hardware counter in embedded systems.
[0092] See Figure 4 , Figure 4 This illustration shows a schematic diagram of a processor boot system according to an embodiment of this application. The boot system of this processor in this embodiment includes units used for execution... Figures 1 to 3 The steps in the corresponding embodiments. Please refer to the details. Figures 1 to 3 The relevant descriptions in the corresponding embodiments are shown below. For ease of explanation, only the parts relevant to this embodiment are shown. See also... Figure 4 The processor's boot system includes: a first execution unit 401, a fetching unit 402, and a second execution unit 403. Specifically: The first execution unit 401 is used to respond to the preset boot operation of the embedded system by obtaining and executing a preset bootloader from the boot read-only memory BootROM through the first boot core processor to perform the boot boot operation.
[0093] The acquisition unit 402 is used to acquire a backup bootloader from a preset memory Flash when the first boot core processor fails to execute the preset bootloader; wherein, both the backup bootloader and the preset bootloader are used to implement the boot operation of the embedded system.
[0094] The second execution unit 403 is used to execute the backup bootloader through the target boot kernel processor to complete the boot process; wherein the target boot kernel processor is any one of multiple kernel processors.
[0095] As one embodiment, the second execution unit 403 includes: An instruction unit is used to instruct the first boot core processor to enter a reset state via the second boot core processor.
[0096] The execution unit is used to execute the backup bootloader through the second boot core processor when the first boot core processor is in a reset state, so as to complete the boot process.
[0097] As one embodiment, the processor's boot system also includes: A configuration unit is used to configure the second boot core processor as a new first boot core processor, which is used to respond to the preset boot operation of the embedded system.
[0098] As one embodiment, the processor's boot system also includes: The monitoring unit is used to monitor the execution of the preset bootloader by the first boot core processor when the preset bootloader is executed by the first boot core processor.
[0099] It is understandable that the improvements and specific implementation methods related to this application have already been... Figures 1 to 3 The corresponding embodiments are described in detail. In specific implementation, it can be... Figures 1 to 3 Based on the corresponding embodiments, let Figure 4 The unit of the processor's boot system provided in the embodiment executes the steps in the above method embodiment, so they will not be repeated here.
[0100] On the other hand, this application provides a processor startup apparatus, comprising: a memory for storing a computer program; and a processing apparatus for implementing the steps of the processor startup method provided in any of the above embodiments when executing the computer program. Further details regarding the processor startup apparatus are provided in the above embodiments and will not be repeated here.
[0101] This application also provides a chip, which may be, but is not limited to, a System on Chip (SOC) chip or a System in Package (SIP) chip. Since the chip of this application has the ability to execute the boot method steps of the processor provided in any of the above embodiments, it possesses all the beneficial effects of the processor boot method in the above embodiments, and will not be repeated here.
[0102] Figure 5 This is a structural block diagram of an electronic device provided in an embodiment of this application. For example... Figure 5 As shown, the electronic device 5 of this embodiment includes: a processor 50, a memory 51, and a computer program 52 stored in the memory 51 and executable on the processor 50, such as a program for a processor startup method. When the processor 50 executes the computer program 52, it implements the steps of the various embodiments of the processor startup method described above, for example... Figures 1 to 3 The steps shown. Alternatively, the processor 50 may implement the above when executing the computer program 52. Figure 4 The functions of each unit in the corresponding embodiments are described. Please refer to the following for details. Figure 4 The relevant descriptions in the corresponding embodiments are not repeated here.
[0103] Electronic devices can be, but are not limited to, weighing scales, body fat scales, nutrition scales, infrared electronic thermometers, pulse oximeters, body composition analyzers, power banks, wireless chargers, fast chargers, car chargers, adapters, displays, USB (Universal Serial Bus) docking stations, styluses, true wireless earbuds, car infotainment screens, automobiles, smart wearable devices, mobile terminals, and smart home devices. Smart wearable devices include, but are not limited to, smartwatches, smart bracelets, and neck massagers. Mobile terminals include, but are not limited to, smartphones, laptops, tablets, and POS (point-of-sales terminal) machines. Smart home devices include, but are not limited to, smart sockets, smart rice cookers, smart robot vacuums, and smart lights.
[0104] The electronic device may include, but is not limited to, a processor 50 and a memory 51. Those skilled in the art will understand that... Figure 5This is merely an example of electronic device 5 and does not constitute a limitation on electronic device 5. It may include more or fewer components than shown, or combine certain components, or different components. For example, the electronic device may also include input / output devices, network access devices, buses, etc.
[0105] The processor 50 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.
[0106] The memory 51 can be an internal storage unit of the electronic device 5, such as a hard drive or memory. The memory 51 can also be an external storage device of the electronic device 5, such as a plug-in hard drive, Smart Media Card (SMC), Secure Digital (SD) card, or Flash Card. Furthermore, the memory 51 can include both internal and external storage units of the electronic device 5. The memory 51 is used to store the computer program and other programs and data required by the electronic device. The memory 51 can also be used to temporarily store data that has been output or will be output.
[0107] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.
Claims
1. A method for starting a processor, characterized in that, For use in embedded systems including multiple core processors, the startup method of the processor includes: In response to the preset startup operation of the embedded system, the first boot core processor retrieves and executes a preset bootloader from the boot read-only memory (BootROM) to perform the startup boot operation; When the first boot core processor fails to execute the preset bootloader, a backup bootloader is retrieved from the preset flash memory; wherein, both the backup bootloader and the preset bootloader are used to implement the boot operation of the embedded system. The backup bootloader is executed by the target boot processor to complete the boot process; wherein the target boot processor is any one of the plurality of core processors.
2. The processor startup method as described in claim 1, characterized in that, The process of retrieving the backup bootloader from the preset Flash memory includes: The backup bootloader in the Flash is written into the first tightly coupled memory (TCM) of the first boot core processor through the first boot core processor; The step of executing the backup bootloader through the target boot kernel processor to complete the boot process includes: Using the first boot core processor as the target boot core processor, the backup bootloader in the first TCM is executed to complete the boot process.
3. The processor startup method as described in claim 1, characterized in that, The process of retrieving the backup bootloader from the preset Flash memory includes: The backup bootloader in the Flash is written into the second TCM of the second boot core processor through the first boot core processor; The step of executing the backup bootloader through the target boot kernel processor to complete the boot process includes: Using the second boot core processor as the target boot core processor, the backup bootloader in the second TCM is executed to complete the boot process.
4. The processor startup method as described in claim 1, characterized in that, The process of retrieving the backup bootloader from the preset Flash memory includes: The backup bootloader in the Flash is written into the first TCM of the first boot core processor through the first boot core processor; The step of executing the backup bootloader through the target boot kernel processor to complete the boot process includes: Using the first boot kernel processor as the target boot kernel processor, the backup bootloader in the first TCM is executed; When the first boot core processor fails to execute the backup bootloader, the backup bootloader in the Flash is written into the second TCM of the second boot core processor by the first boot core processor. Using the second boot core processor as the target boot core processor, the backup bootloader in the second TCM is executed to complete the boot process.
5. The processor startup method according to any one of claims 1 to 4, characterized in that, In response to the preset boot operation of the embedded system, the first boot core processor retrieves and executes a preset bootloader from the boot read-only memory (BootROM) to perform the boot boot operation, including: The preset bootloader stored in the BootROM is written into the first TCM of the first boot core processor by the first boot core processor; The first boot core processor executes the preset bootloader cached in the first TCM to perform the boot process.
6. The processor startup method as described in claim 3 or 4, characterized in that, The step of using the second boot core processor as the target boot core processor and executing the backup bootloader in the second TCM to complete the boot process includes: The second boot core processor instructs the first boot core processor to enter a reset state; While the first boot core processor is in the reset state, the backup bootloader is executed by the second boot core processor to complete the boot process.
7. The processor startup method as described in claim 6, characterized in that, The embedded system also includes a reset control unit; The step of instructing the first boot core processor to enter a reset state via the second boot core processor includes: The second boot core processor instructs the reset control unit to output a reset signal to the first boot core processor, so that the first boot core processor enters a reset state.
8. The processor startup method as described in claim 3 or 4, characterized in that, After the step of using the second boot core processor as the target boot core processor and executing the backup bootloader in the second TCM to complete the boot process, the method further includes: The second boot core processor is configured as a new first boot core processor, which is used to respond to a preset boot operation of the embedded system.
9. The processor startup method as described in claim 8, characterized in that, The step of configuring the second boot core processor as the new first boot core processor includes: Configure the identification information of the second boot core processor in the boot core flag bit of the Flash, so as to indicate the second boot core processor as the new first boot core processor through the boot core flag bit.
10. The processor startup method according to any one of claims 1 to 4, characterized in that, After the step of retrieving and executing a preset bootloader from the boot read-only memory (BootROM) via the first boot core processor in response to a preset boot operation of the embedded system, the method further includes: When the preset bootloader is executed by the first boot core processor, the execution status of the preset bootloader by the first boot core processor is monitored.
11. The processor startup method as described in claim 10, characterized in that, The step of monitoring the execution of the preset bootloader by the first boot core processor during execution includes: When the preset bootloader is executed by the first boot core processor, a preset watchdog timer is used to monitor the duration of the preset bootloader execution by the first boot core processor. If the duration exceeds the preset duration of the watchdog timer, it is determined that the first boot core processor has failed to execute the preset bootloader.
12. A processor boot system, characterized in that, For use in embedded systems including multi-core processors, the boot system of the processor includes: The first execution unit is configured to respond to a preset startup operation of the embedded system by retrieving and executing a preset bootloader from the boot read-only memory (BootROM) through the first boot core processor to perform a startup boot operation. The acquisition unit is used to acquire a backup bootloader from a preset memory Flash when the first boot core processor fails to execute the preset bootloader; wherein, both the backup bootloader and the preset bootloader are used to implement the boot operation of the embedded system. The second execution unit is used to execute the backup bootloader through the target boot core processor to complete the boot process; wherein the target boot core processor is any one of the plurality of core processors.
13. A chip, characterized in that, The chip is used to perform the steps of the processor startup method according to any one of claims 1 to 11.
14. An electronic device, characterized in that, include: A memory, a processor, and a computer program stored in the memory and executable on the electronic device, wherein the processor, when executing the computer program, implements the steps of the processor startup method as described in any one of claims 1 to 11.