Energy storage battery management system, control method and energy storage system

Abstract

The application relates to the technical field of energy storage, in particular to an energy storage battery management system, a control method and an energy storage system. The energy storage battery management system comprises an ADC chip and a control unit MCU, the ADC chip is arranged in a first region, and the MCU is arranged in a second region; the ADC chip obtains a sampling signal of an energy storage battery by executing high-voltage sampling, and sends the obtained sampling signal to the MCU, the high-voltage sampling comprises current sampling, voltage sampling and insulation detection; the first region and the second region are isolated through a power supply isolation circuit and a signal isolation circuit. According to the application, a plurality of core functions of high-voltage sampling of the energy storage BMS are synchronously completed in a single chip, the overall cost is reduced, the sampling precision and temperature stability of key parameters such as current, voltage and insulation resistance are significantly improved, and the overall service life of the battery system is prolonged.

Description

Technical Field

[0001] This application relates to the field of energy storage technology, and in particular to an energy storage battery management system, control method and energy storage system. Background Technology

[0002] In energy storage devices, a Battery Management System (BMS) is required to monitor and manage the energy storage batteries, maintaining their overall capacity and extending their lifespan. High-voltage sampling plays a crucial role in this monitoring. Typically, the energy storage battery is located in the high-voltage area, while control circuits such as the Microcontroller Unit (MCU) are located in the low-voltage area. High-voltage sampling acquires information about the energy storage battery in the high-voltage area and sends it to the control circuits in the low-voltage area for analysis and processing. This allows for real-time monitoring and acquisition of the battery's total voltage and current, providing critical data support for battery state estimation, charge / discharge control, and fault diagnosis.

[0003] Furthermore, it is essential to ensure reliable isolation between high-voltage and low-voltage areas to prevent high-voltage intrusion into the low-voltage area and protect personnel and equipment safety. This is typically achieved by using isolation devices, such as optocouplers, to maintain sufficient creepage distance between the high-voltage and low-voltage areas, ensuring proper insulation between them. Therefore, during high-voltage sampling, insulation sampling is also necessary to continuously monitor the insulation relationship between the high-voltage and low-voltage areas. Summary of the Invention

[0004] This invention provides an energy storage battery management system, control method, and energy storage system to solve problems in existing technologies such as limited sampling accuracy and large temperature drift, insufficient isolation effect and system reliability, high hardware cost and large physical volume in high-voltage sampling of BMS.

[0005] In a first aspect, embodiments of the present invention provide an energy storage battery management system, the energy storage battery management system BMS including: an ADC chip and an MCU, the ADC chip being disposed in a first region and the MCU being disposed in a second region;

[0006] The ADC chip obtains the sampling signal of the energy storage battery by performing high-voltage sampling, and sends the obtained sampling signal to the MCU. The high-voltage sampling includes current sampling, voltage sampling and insulation detection.

[0007] The first region and the second region are isolated by power isolation circuit and signal isolation circuit.

[0008] Optionally, the system further includes a current sampling circuit:

[0009] The current sampling circuit includes a first resistor and the ADC chip;

[0010] The ADC chip converts the voltage signal across the first resistor into a target current signal through its internal analog-to-digital converter, and then sends the target current signal to the MCU through the signal isolation circuit.

[0011] Optionally, the first resistor is connected in series with the ADC chip, and the resistance of the first resistor is 1mΩ-10mΩ, the accuracy is ±0.1%, and the temperature drift is not higher than 25ppm / ℃.

[0012] Optionally, the system further includes a voltage sampling circuit:

[0013] The voltage sampling circuit includes a high-voltage divider and the ADC chip;

[0014] The high-voltage divider linearly reduces the voltage of the energy storage battery to the safe input range of the ADC chip;

[0015] The ADC chip converts the voltage value after being stepped down by the high voltage divider into a target voltage signal through its internal analog input channel, and sends the target voltage signal to the MCU through the signal isolation circuit.

[0016] Optionally, the high-voltage divider is composed of multiple second resistors connected in series;

[0017] The resistance of the second resistor is 1 mΩ-5 mΩ, the accuracy is ±0.1%, and the temperature drift is no higher than 25 ppm / ℃.

[0018] Optionally, the system further includes an insulation detection circuit, which is used to achieve isolation between the first region and the second region;

[0019] The insulation detection circuit includes a first isolation optocoupler, a second isolation optocoupler, a first optocoupler relay, and a second optocoupler relay;

[0020] The first isolation optocoupler and the first optocoupler relay are connected in series and disposed in the positive terminal detection circuit of the battery; the second isolation optocoupler and the second optocoupler relay are connected in series and disposed in the negative terminal detection circuit of the battery.

[0021] The first isolation optocoupler and the second isolation optocoupler receive the control signal output by the MCU, and transmit the control signal to the ADC chip through the first optocoupler relay and the second optocoupler relay;

[0022] The first optocoupler relay and the second optocoupler relay receive the drive signal sent by the ADC chip based on the control signal, and turn on or off based on the drive signal, thereby realizing the time-division multiplexing of the battery positive electrode detection circuit or the battery negative electrode detection circuit.

[0023] Optionally, the insulation detection circuit further includes: a detection resistor;

[0024] The detection resistors are respectively connected to the positive electrode detection circuit and the negative electrode detection circuit of the battery;

[0025] The ADC chip acquires the leakage signals under the positive and negative detection circuits of the battery, respectively, and transmits the leakage signals to the MCU.

[0026] Optionally, the signal isolation circuit includes: a digital isolator;

[0027] The digital isolator enables communication between the second-region MCU and the first-region ADC chip via an SPI interface.

[0028] Optionally, the power isolation circuit includes: an isolation power module;

[0029] The isolated power supply module supplies power to the first area through the low-voltage power supply of the second area.

[0030] Optionally, the ADC chip, the first isolation optocoupler, the second isolation optocoupler, the first optocoupler relay, the second optocoupler relay, the digital isolator, and the isolation power supply module are integrated on the motherboard, and the high voltage divider is integrated on the daughterboard.

[0031] The motherboard and the daughterboard are connected via an SPI interface;

[0032] The number of sub-boards and the configuration of the high-voltage dividers on the sub-boards are determined based on the number of voltage sampling channels on the motherboard.

[0033] Optionally, the first region is a high-pressure region, and the second region is a low-pressure region.

[0034] Secondly, embodiments of the present invention provide a control method for an energy storage battery management system, the method comprising:

[0035] High-voltage sampling is performed using an ADC chip, which includes current sampling, voltage sampling, and insulation detection.

[0036] The high-voltage sampling result is sent to the MCU via the ADC chip;

[0037] The ADC chip is located in the first region, and the MCU is located in the second region. The first region and the second region are isolated by a power isolation circuit and a signal isolation circuit.

[0038] Optionally, current sampling can be performed using an ADC chip, including:

[0039] The voltage signal across the first resistor is obtained through the ADC chip;

[0040] The voltage signal is converted into the target current signal using an analog-to-digital converter;

[0041] The target current signal is sent to the MCU through a signal isolation circuit.

[0042] Optionally, voltage sampling can be performed using an ADC chip, including:

[0043] The voltage value after being stepped down by the high-voltage divider is obtained through the ADC chip;

[0044] The voltage value is converted into a target voltage signal through an analog input channel;

[0045] The target voltage signal is sent to the MCU through a signal isolation circuit.

[0046] Optionally, insulation detection can be performed using an ADC chip, including:

[0047] When the ADC chip receives the control signal output by the MCU through the first isolation optocoupler and the second isolation optocoupler, it sends a drive signal to the first optocoupler relay and the second optocoupler relay.

[0048] The driving signal controls the time-division conduction of the first optocoupler relay and the second optocoupler relay, thereby realizing the time-division conduction or cutoff of the battery positive electrode detection circuit and the battery negative electrode detection circuit.

[0049] When the positive electrode detection circuit of the battery is turned on, the first leakage signal of the detection resistor is obtained through the ADC chip;

[0050] When the battery negative terminal detection circuit is turned on, the second leakage signal of the detection resistor is obtained through the ADC chip;

[0051] The first leakage signal and the second leakage signal are sent to the MCU through a signal isolation circuit.

[0052] Optionally, the first region is a high-pressure region, and the second region is a low-pressure region.

[0053] Thirdly, embodiments of the present invention provide an energy storage system, including:

[0054] The energy storage battery management system as described in any of the first aspects;

[0055] At least one processor; and

[0056] At least one memory communicatively connected to the processor, wherein:

[0057] The memory stores program instructions that can be executed by the processor, which can invoke the program instructions to execute the energy storage battery management system control method as described in any of the second aspects.

[0058] Unlike related technologies that use multiple discrete chips to process current, voltage, and insulation signals separately, this invention selects and fully utilizes the internal resources of a highly integrated ADC chip to simultaneously complete multiple core functions of high-voltage sampling for energy storage BMS within a single chip. This replaces several discrete components in traditional solutions, reducing overall cost and decreasing PCB board area by 30%, directly lowering the module's hardware material costs. The simplified circuit structure and optimized PCB layout design result in a significantly smaller module size, increased power density, and easier integration into space-constrained energy storage battery compartments, battery cluster management units, or compact industrial and commercial energy storage cabinets.

[0059] This invention employs a highly integrated ADC chip, achieving integrated sampling processing for current sampling, voltage sampling, and insulation detection in high-voltage sampling using a single chip, replacing the structure of multiple discrete chips. Furthermore, by selecting passive components with appropriate parameters and optimizing the signal chain design, the sampling accuracy and temperature stability of key parameters such as current, voltage, and insulation resistance are significantly improved. This provides a solid data foundation for battery management systems to achieve high-precision SOC estimation, SOH assessment, and reliable overvoltage, overcurrent, and insulation fault protection, contributing to extending the overall lifespan of the battery system.

[0060] Using a highly integrated single ADC chip not only reduces the number of chips but also eliminates the losses and interference from signal interconnections between discrete chips. Experimental tests show that, under the same electromagnetic interference test conditions, the signal-to-noise ratio of the signal chain in this invention can reach 65dB, which is 15dB higher than that of traditional discrete solutions, and the fluctuation range of the sampled values ​​is reduced by more than 60%.

[0061] To address the timing asynchrony issue associated with multi-optocoupler isolation, this invention employs a two-stage series isolation architecture combined with time-division multiplexing of GPIOs to achieve insulation detection. First, primary isolation is achieved through isolation optocouplers, then optocoupler relays are driven to time-division switch the battery positive / negative detection circuit. The isolation optocouplers isolate the control signal from the high-voltage side, while the dedicated optocoupler relays handle circuit switching, creating dual isolation redundancy. Compared to traditional solutions that require more than four optocouplers for current isolation, voltage isolation, signal isolation, and insulation detection switching (requiring two optocouplers for switching and isolating the positive and negative circuits), and where multiple optocouplers used for insulation detection switching suffer from asynchronous isolation links and susceptibility to interference, resulting in high device redundancy and large cost and size, this solution uses four optocouplers to achieve time-division multiplexing of the battery positive and negative detection circuits. This achieves a higher level of safety protection, completely avoiding the risks of timing inconsistencies among multiple devices and electrical clearance risks in high-altitude environments.

[0062] By using SPI addressing and stacked daughterboards, the number of sampling channels can be flexibly, quickly, and easily expanded without modifying the core design of the motherboard, significantly improving the adaptability to energy storage systems of different scales. This greatly enhances the adaptability and flexibility to energy storage devices of different scales (e.g., from energy storage devices of tens of kWh to power plant-level energy storage devices of 10 MWh or more), and can significantly shorten the development cycle of new products or the delivery time of customized projects. Attached Figure Description

[0063] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0064] Figure 1 The diagram shown is a structural schematic of an energy storage battery management system provided in an embodiment of this application;

[0065] Figure 2 The diagram shown is a structural schematic of a specific energy storage battery management system provided in an embodiment of this application;

[0066] Figure 3 The diagram shown is a flowchart of a control method for an energy storage battery management system provided in an embodiment of this application;

[0067] Figure 4 The diagram shown is a structural schematic of an energy storage system provided in an embodiment of this application. Detailed Implementation

[0068] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0069] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0070] Current high-voltage sampling technology in energy storage devices' battery management systems (BMS) requires separate current sampling, voltage sampling, and insulation detection. However, current high-voltage sampling technology for energy storage BMS primarily relies on a discrete chip architecture combined with multi-optical-coupler isolation. This current approach suffers from the following significant problems:

[0071] (1) Limited sampling accuracy and significant impact of temperature drift: Due to the temperature drift characteristics of discrete sampling chips (such as current sampling chips and high-voltage sampling chips) and voltage divider resistors, the current and voltage sampling accuracy is difficult to stably meet the requirements of high-precision battery state estimation and accurate charge and discharge protection within the wide operating temperature range (-20℃~60℃) of the energy storage system. The error further increases under extreme temperatures, posing a risk of battery overcharging or over-discharging. Actual measurement data shows that the accuracy fluctuation can reach ±2.5%~±3% over the temperature range.

[0072] (2) Insufficient isolation effect and system reliability: The scheme relying on multiple discrete optocouplers for signal isolation poses serious hidden dangers in environments with high common-mode voltage (>2kV) and strong electromagnetic interference common in energy storage systems, such as near large inverters and power conversion systems (PCS). Inconsistencies in switching speed, transmission delay, and current transfer ratio among different optocoupler devices can easily lead to signal timing disorders, waveform distortion, and increased signal transmission error rate. The reliability of the insulation detection circuit also decreases as a result. At the same time, the increase in the number of devices directly introduces more potential single-point failure points, reducing the overall reliability of the system.

[0073] (3) High hardware cost and large physical size: Discrete chip solutions require multiple dedicated chips (current sampling chips, voltage sampling chips, insulation detection chips, isolators, etc.) and a large number of passive components such as resistors and capacitors. This results in the total number of components in a single module usually exceeding 30, and the hardware cost accounts for too high a proportion in the BMS. At the same time, the complex circuits also require a large printed circuit board (PCB) layout area, making it difficult to embed in the compact energy storage battery compartment or battery cluster management unit.

[0074] (4) Poor channel scalability and long development cycle: The number of sampling channels in a module is usually fixed. When the scale of the battery system changes (such as an increase in the number of series batteries) and it is necessary to expand the sampling channels, the voltage divider resistor network must be redesigned, the power distribution capability must be considered, and a new PCB layout and routing must be carried out. This process is time-consuming and it is difficult to quickly respond to the flexible configuration requirements of different projects or energy storage battery packs of different capacity levels.

[0075] In this embodiment of the invention, to address the aforementioned problems, a highly integrated analog-to-digital converter (ADC) chip is employed to achieve integrated sampling processing of current sampling, voltage sampling, and insulation detection in high-voltage sampling using a single chip, replacing the structure of multiple discrete chips. At the same time, by selecting passive devices with appropriate parameters and optimizing the signal chain design, the sampling accuracy and temperature stability of key parameters such as current, voltage, and insulation resistance are significantly improved.

[0076] During insulation detection, a two-stage series isolation architecture is used, combined with the general purpose input / output (GPIO) interface of the ADC chip, to achieve time-division multiplexing of insulation detection. First, primary isolation is achieved through an isolation optocoupler, and then the optocoupler relay is driven to switch the battery positive / negative terminal detection circuit in a time-division manner. The isolation optocoupler isolates the control signal from the high-voltage side, and the optocoupler relay is dedicated to circuit switching, forming double isolation redundancy.

[0077] like Figure 1 The diagram shown is a structural schematic of an energy storage battery management system provided in an embodiment of the present invention. (See also...) Figure 1 The battery management system (BMS) includes an ADC chip and an MCU. The ADC chip is located in the first area, and the MCU is located in the second area. The first and second areas are isolated by power isolation circuits and signal isolation circuits. Generally, the first area is the high-voltage area, and the second area is the low-voltage area.

[0078] In this embodiment of the invention, the power isolation circuit includes an isolation power supply module. The isolation power supply module is used to supply power to the first region through the low-voltage power supply of the second region.

[0079] In this embodiment of the invention, the signal isolation circuit includes a digital isolator. The digital isolator is used to implement a communication connection between the MCU in the second region and the ADC chip in the first region via a Serial Peripheral Interface (SPI).

[0080] The ADC chip is used to perform high-voltage sampling and send the acquired sampled signals to the MCU. The high-voltage sampling performed by the ADC chip includes current sampling, voltage sampling, and insulation detection. The MCU is used to receive the sampled signals sent by the ADC chip.

[0081] When an ADC chip performs current sampling, it does so through a current sampling circuit. This current sampling circuit includes, in addition to the ADC chip, a first resistor. This first resistor is a sampling resistor; the voltage signal across it can be used to calculate the target current signal to be acquired.

[0082] The ADC chip converts the voltage signal across the first resistor into a target current signal through its internal analog-to-digital converter, and then sends the target current signal to the MCU through a signal isolation circuit.

[0083] The first resistor is connected in series with the ADC chip. The resistance of the first resistor is 1mΩ-10mΩ, the accuracy is ±0.1%, and the temperature drift is no higher than 25ppm / ℃.

[0084] The ADC chip performs voltage sampling through a voltage sampling circuit. This voltage sampling circuit includes not only the ADC chip but also a high-voltage divider.

[0085] The high-voltage divider linearly steps down the battery voltage to within the safe input range of the ADC chip. The ADC chip then converts the voltage value stepped down by the high-voltage divider into a target voltage signal through its internal analog input channel, and sends the target voltage value to the MCU through a signal isolation circuit.

[0086] The high-voltage divider consists of multiple second resistors connected in series. The resistance of each second resistor is 1 mΩ-5 mΩ, with an accuracy of ±0.1% and a temperature drift not exceeding 25 ppm / ℃. These second resistors act as voltage divider resistors, used to reduce the voltage of the battery's high-voltage circuit after a suitable high-voltage divider has been constructed.

[0087] The ADC chip performs insulation detection through an insulation detection circuit. This circuit is used to achieve isolation between the first and second regions. Specifically, the insulation detection circuit includes a first isolation optocoupler, a second isolation optocoupler, a first optocoupler relay, and a second optocoupler relay.

[0088] The first isolation optocoupler and the first optocoupler relay are connected in series and are set in the positive terminal detection circuit of the battery; the second isolation optocoupler and the second optocoupler relay are connected in series and are set in the negative terminal detection circuit of the battery.

[0089] The first and second isolation optocouplers receive control signals output by the MCU and transmit these signals to the ADC chip via first and second optocoupler relays. The first and second optocoupler relays receive drive signals sent by the ADC chip based on the control signals and turn the circuit on or off based on these drive signals, thereby achieving time-division multiplexing of the battery positive and negative electrode detection circuits.

[0090] The insulation detection circuit also includes detection resistors. These resistors are connected to both the positive and negative battery detection circuits. Leakage signals from the positive and negative battery detection circuits are acquired based on these resistors and transmitted to the MCU.

[0091] Unlike related technologies that use multiple discrete chips to process current, voltage, and insulation signals separately, this invention selects and fully utilizes the internal resources of a highly integrated battery monitoring ADC chip to simultaneously complete multiple core functions of high-voltage sampling for energy storage BMS within a single chip. This replaces several discrete components in traditional solutions, reducing overall cost and shrinking the PCB area by 30%, directly lowering the module's hardware material costs. The simplified circuit structure and optimized PCB layout design result in a significantly smaller module size, increased power density, and easier integration into space-constrained energy storage battery compartments, battery cluster management units, or compact commercial and industrial energy storage cabinets.

[0092] By employing a highly integrated, high-precision ADC chip, carefully selecting low-temperature drift, high-precision passive components, and optimizing the signal chain design, the sampling accuracy and temperature stability of key parameters such as current, voltage, and insulation resistance have been significantly improved. This provides a solid data foundation for the battery management system to achieve high-precision SOC estimation, SOH assessment, and reliable overvoltage, overcurrent, and insulation fault protection, thus helping to extend the overall lifespan of the battery system.

[0093] Using a highly integrated single ADC chip not only reduces the number of chips but also eliminates signal losses and interference points from the interconnections between discrete chips. Experimental tests show that, under the same electromagnetic interference test conditions, the signal-to-noise ratio of the signal chain in this invention can reach 65dB, which is 15dB higher than that of traditional discrete solutions, and the fluctuation range of the sampled values ​​is reduced by more than 60%.

[0094] To address the timing asynchrony issue associated with multi-optocoupler isolation, this invention employs a two-stage series isolation architecture combined with time-division multiplexing of GPIOs to achieve insulation detection. First, primary isolation is achieved through isolation optocouplers, then the optocoupler relays are driven to time-division switch the battery positive / negative terminal detection circuit. The isolation optocouplers isolate the control signal from the high-voltage side, while the dedicated optocoupler relays handle circuit switching, creating dual isolation redundancy. Compared to traditional solutions requiring 4-6 optocouplers, this solution uses only 4 optocouplers to achieve a higher level of safety protection, completely avoiding the risk of timing inconsistencies among multiple devices and the electrical clearance risks in high-altitude environments.

[0095] The following is a specific embodiment provided by the present invention.

[0096] like Figure 2 The diagram shown is a structural schematic of a specific energy storage battery management system provided in an embodiment of the present invention. See also... Figure 2 In this embodiment, the ADC chip is specifically an ADC MC33772 chip, and the MCU is specifically an MCU S32K314. The first region is the high-voltage region, and the second region is the low-voltage region.

[0097] In this embodiment of the invention, the MC33772 chip integrates a 16-bit high-precision analog-to-digital converter (integral nonlinearity INL≤±1 LSB), which can simultaneously support voltage and current measurement of the energy storage battery in the energy storage device, enabling low-cost single-chip BMS construction in the energy storage device. The MC33772 chip has multiple GPIO interfaces, which can be used to control the on / off state of external optocoupler relays connected to it, thereby controlling the on / off state of the positive and negative detection circuits, and thus constructing and controlling the insulation detection circuit.

[0098] In addition, the MC33772 chip supports high-speed SPI communication via the SPI interface to realize data transmission between the ADC chip and the MCU, i.e., between the high-voltage region and the low-voltage region.

[0099] The MC33772 chip also has a wide operating temperature range, capable of operating from -40°C to 125°C. It can function normally even when energy storage devices are deployed in harsh environments.

[0100] In this embodiment, the power isolation circuit includes an isolated DC-DC converter (DC-DC) as an isolated power supply module to supply power to the ADC chip and its peripheral circuits in the high-voltage area via an isolated DC-DC converter, based on the 12V low-voltage power supply from the low-voltage area. See also Figure 2The 24V DC power supply is stepped down to 12V via a DC-DC converter. In the low-voltage area, the system base chip (SBC), such as the SBC MC33FS6523, performs power management before supplying power to the MCU. The stepped-down 12V power supply is then isolated by an isolation DC-DC converter before supplying power to the MC33772 chip in the high-voltage area. This power isolation circuit ensures that even if a fault occurs in the high-voltage area, high voltage will not enter the low-voltage area, effectively preventing the risk of electric shock to personnel. It also protects core chips such as the MCU in the low-voltage area from damage.

[0101] The signal isolation circuit utilizes the highly reliable, high-isolation-level digital isolator NSi8241 to achieve signal isolation between high-voltage and low-voltage areas. (See also...) Figure 2 The NSi8241 is specifically connected between the SPI interface of the ADC chip and the SPI interface of the MCU. The ADC chip in the high-voltage region and the MCU in the low-voltage region communicate through the SPI interface. The signal to be sent is transmitted to the other end through the digital isolator NSi8241 via the SPI interface. The digital isolator NSi8241 provides high common-mode transient rejection ratio and strong isolation capability for the signal isolation circuit.

[0102] like Figure 2 The current sampling circuit in the energy storage battery management system shown has a high-precision, low-temperature-coefficient first resistor (accuracy ±0.1%, temperature drift ≤25ppm / ℃) connected in series with the ADC chip in the main circuit of the high-voltage region. The resistance value of the first resistor is typically small, in the milliohm range, for example, 1 mΩ to 10 mΩ, to improve detection accuracy and reduce heat loss. The power of the first resistor is 1 to 0.1W, thus ensuring a detection accuracy of ±0.1%. The voltage signal across the first resistor is used as the sampled current, which is then filtered by an RC low-pass filter circuit to remove high-frequency interference before being input to the ADC chip. The RC low-pass filter circuit can have a resistor R of 1 to 10 kΩ, a capacitor C of 47 to 470 nF, and a cutoff frequency of 1 to 2 kHz (for example, in this embodiment, R = 1 kΩ, C = 100 nF, and cutoff frequency = 1.6 kHz).

[0103] The filtered differential voltage signal is input to the high-precision instrumentation amplifier inside the ADC chip. The amplified signal is then converted by the chip's internal 16-bit analog-to-digital converter. The resulting digital signal is transmitted as the target current signal via the SPI interface and the NSi8241 digital isolator to the MCU in the low-voltage region.

[0104] The gain of the high-precision instrumentation amplifier inside the ADC chip can be configured, for example, it can be set to 100 times. The sampling rate of the analog-to-digital converter can be configured, for example, it can be 1kHz.

[0105] This design utilizes the high-performance ADC and low-temperature drift first resistor of the integrated chip, combined with reasonable filtering and gain settings, to achieve current sampling within the entire operating temperature range of -25℃ to 85℃, with an error ≤ ±0.5%.

[0106] like Figure 2 The voltage sampling circuit in the energy storage battery management system shown uses a voltage divider network consisting of multiple second resistors connected in series (total resistance, for example, 10mΩ). The second resistors can have a resistance of 1~5mΩ, an accuracy of ±0.1%, and a temperature drift ≤25ppm / ℃. For example, the high-voltage divider could be a 10mΩ high-voltage divider composed of ten 1mΩ resistors connected in series. This is used to linearly step down the voltage of a battery cell or module (e.g., 0~100V / cell, total voltage 0~1000V) to the safe input range of the ADC (e.g., 0~3.3V, voltage division ratio approximately 3.3:1000).

[0107] The stepped-down voltage signal is connected to a specific analog input channel (ANx) of the ADC chip. The signal can first be properly conditioned by the chip's internal programmable gain amplifier (PGA) (e.g., gain = 1), and then converted to digital with high precision by the internal 16-bit ADC.

[0108] This design achieves voltage sampling across the entire temperature range with an error of <±1% by integrating the high linearity of the ADC and the low temperature drift characteristics of the precision voltage divider resistor network.

[0109] like Figure 2 The insulation detection circuit in the energy storage battery management system shown can specifically be an HPL6W147 optocoupler for the first and second isolation optocouplers, and an AQV2007DR2G optocoupler relay for the first and second optocoupler relays. An HPL6W147 isolation optocoupler and an AQV258HAXC79 optocoupler relay are connected in series in the positive and negative detection circuits, respectively.

[0110] The MCU outputs control signals, which are subjected to primary high-voltage isolation by the HPL6W147 optocoupler. After increasing the electrical clearance and creepage distance, the signals are transmitted to the ADC chip through the optocoupler relay AQV258HAXC79.

[0111] The two GPIO ports of the ADC chip output drive signals to the corresponding AQV258HAXC79 optocoupler relays to control their on / off states, thereby switching the positive and negative detection circuits of the battery.

[0112] In this embodiment, a detection resistor is also connected in series in the insulation detection circuit to detect leakage signals on the positive and negative detection circuits. The leakage signal is collected by the ADC chip through the positive and negative high-voltage sampling points via the detection resistor.

[0113] In the embodiments of the present invention, an operational amplifier and a comparator are connected in series on the positive and negative detection circuits to linearly amplify the differential pressure signal.

[0114] In this design, a complete isolation path is formed by connecting the isolation optocoupler HPL6W147 and the optocoupler relay AQV258HAXC79 in series. The isolation optocoupler HPL6W147 ensures a safe distance, and the optocoupler relay AQV258HAXC79 is used for circuit switching. Both comply with the IEC62477-1 standard, realizing time-division multiplexing of positive and negative detection.

[0115] In the above embodiments, considering that the MC33772 chip integrates a 16-bit high-precision digital-to-analog converter (integral nonlinearity INL≤±1 LSB), a high input impedance instrumentation amplifier (gain programmable 1~1000 times), multiple analog inputs (supporting multi-channel voltage sampling), multiple GPIO ports (supporting insulation detection control), a wide operating temperature range (-40℃~125℃), and supports daisy-chain or address-addressable SPI communication, meeting the sampling requirements of BMS high-voltage area integration, the MC33772 chip was selected as the ADC chip.

[0116] Considering that the NSi8241 is a 4-channel digital isolator with a high data transmission rate (≥1Mbps), ultra-high common-mode transient immunity (CMTI) (≥80kV / μs), high isolation withstand voltage (maximum peak isolation voltage VIORM is 1414Vpeak), and wide operating temperature (-40℃~125℃), it can ensure the absolute reliability of core SPI communication under high voltage difference and strong interference. Therefore, the NSi8241 was selected as the digital isolator.

[0117] Considering that the optocoupler relay AQV258HAXC79 has low on-resistance (≤50Ω), ultra-high isolation withstand voltage (5000Vrms), fast switching time (≤1ms) and high reliability, meeting the requirements of high-frequency and high-voltage safe switching of the insulation detection circuit, AQV258HAXC79 was selected as the first optocoupler relay and the second optocoupler relay.

[0118] Considering that the HPL6W147 isolation optocoupler has an electrical clearance of 15mm and a creepage distance of 15mm, meets the requirements of an altitude of 4000m and the 1500V requirement of IEC62477-1 standard, and has an isolation withstand voltage of ≥5kVrms, which can improve the reliability of control signal isolation, the HPL6W147 was selected as the first isolation optocoupler and the second isolation optocoupler.

[0119] In the above embodiments, the other passive components include a first resistor of 0.001Ω / 1W with an accuracy of ±0.1% and a temperature drift of ≤25ppm / ℃ (e.g., a BVR series resistor); a second resistor of 1MΩ with an accuracy of ±0.1% and a temperature drift of ≤25ppm / ℃ (e.g., a metal film resistor); and a filter capacitor of 100nF / 16V X7R ceramic capacitor with a temperature drift of ±15%, used for signal filtering and decoupling.

[0120] The design of printed circuit boards for energy storage battery management systems needs to be standardized in terms of layer structure, safety distance, wiring rules, and grounding.

[0121] For a stacked structure: a top layer (for electrical components), inner layer 1 (for a complete ground plane), inner layer 2 (for a power plane), and a bottom layer (for electrical components) are required. This ensures strict physical isolation between high-voltage and low-voltage areas.

[0122] Regarding safety clearances: Sufficient electrical clearances and creepage distances must be maintained between high-voltage and low-voltage areas. The spacing between traces in high-voltage areas must meet withstand voltage requirements. Generally, electrical clearances are set at 8mm, and creepage distances at 10mm. Creepage distances can be calculated according to standards based on actual operating voltage and pollution levels. Regarding wiring rules: High-current paths in high-voltage areas must be sufficiently wide (≥2mm) and short to reduce impedance and parasitic inductance, and improve current carrying capacity and surge resistance. Critical analog signal lines need to be sufficiently short (<5cm) to avoid crossing digital areas; grounding or routing on inner layers should be used to reduce interference. Protective routing should be used when necessary. High-speed digital signal lines should be impedance matched, length matched, and sharp angles avoided.

[0123] For grounding: The high-voltage area ground (GND_HV) and the low-voltage area ground (GND_LV) must be strictly isolated. For the high-voltage area, a star-connected single-point grounding or zoned grounding should be used to ensure that the analog ground and digital ground are connected at a single point on the high-voltage side; the same applies to the low-voltage side. The PCB area below the isolation device should be cut out.

[0124] Optionally, in this embodiment of the invention, an expansion architecture combining a motherboard and a daughterboard is adopted based on a standardized SPI interface. The core circuitry and chips for common, independent channels are integrated on the motherboard, while a modular voltage divider resistor network related to the channels is integrated on the daughterboard.

[0125] Specifically, the ADC chip, the first isolation optocoupler, the second isolation optocoupler, the first optocoupler relay, the second optocoupler relay, the digital isolator, and the isolation power supply are all integrated on the motherboard, while the high voltage divider is integrated on the daughterboard.

[0126] The motherboard provides a standardized SPI interface. The motherboard connects to each daughterboard via the SPI interface. The number of daughterboards and the configuration of the high-voltage dividers on the daughterboards are determined by the number of voltage sampling channels on the motherboard.

[0127] By leveraging the inherent addressing capability of the ADC chip, or through simple address decoding logic on the motherboard, combined with modular daughterboard design, when additional voltage sampling channels are needed, it is only necessary to design or select a daughterboard containing the required number of voltage divider networks, and then stack it onto the motherboard via standard connectors.

[0128] In other words, by using SPI addressing and stacking daughterboards, the number of sampling channels can be flexibly, quickly, and easily expanded without modifying the core design of the motherboard, significantly improving adaptability to energy storage systems of different scales. This greatly enhances the adaptability and flexibility to energy storage battery systems of different scales (e.g., from residential energy storage of tens of kWh to power plant-level energy storage of several MWh or even more than 10 MWh), and can significantly shorten the development cycle of new products or the delivery time of customized projects.

[0129] In one specific embodiment, expanding a 16-channel (base motherboard + daughterboard) module to 32 channels requires only the addition of two 8-channel daughterboards. Hardware modifications are less than 10%, and the development cycle is shortened from weeks to days.

[0130] Optionally, in this embodiment of the invention, it is also necessary to complete the debugging and calibration of the battery management system in advance.

[0131] Specifically, it is necessary to perform accuracy calibration on the current, voltage, and insulation detection circuits separately, and to conduct reliability verification tests.

[0132] When calibrating the current sampling circuit, a high-precision programmable current source (range 0~±500A) is injected into the first resistor to read the output value of the ADC chip. The offset and gain calibration registers inside the ADC chip are then used. Calibration is performed at different temperature points (e.g., -40℃, 25℃, 85℃) to compensate for zero drift and gain errors.

[0133] When calibrating the voltage sampling circuit, a high-precision programmable voltage source (range 0~1000V or calculated according to the voltage division ratio) needs to be applied to the input of the voltage divider network to read the ADC value of the corresponding channel of the ADC chip. Similarly, multi-point temperature calibration is performed using the internal calibration register.

[0134] When calibrating the insulation detection circuit, a high-precision resistance box (range 10kΩ~100MΩ) is needed to simulate the leakage resistance between the positive and negative terminals of the battery. The detection loop is switched via control software, and the obtained insulation resistance value is read and calculated. Parameters in the calibration software algorithm, such as the detection resistance value and voltage scaling factor, are adjusted, and an accurate alarm threshold, such as ≤500kΩ, is set. Temperature drift compensation is also performed using an ADC chip.

[0135] When performing reliability verification tests, high and low temperature cycling tests, temperature and humidity storage tests, vibration tests, and electromagnetic compatibility tests (EMC tests) need to be performed separately.

[0136] High and low temperature cycling tests are conducted by performing multiple (e.g., 100) cycles within a temperature range of -40℃ to 85℃ (or -40℃ to 125℃) to verify parameter stability.

[0137] Temperature and humidity storage test, which involves storing the product under high temperature and high humidity conditions (e.g., 85℃ / 85%RH) for a specified time (e.g., 500h).

[0138] Vibration testing is conducted through random vibration (e.g., 10-2000Hz, power spectral density according to standards) and sinusoidal sweep vibration tests.

[0139] Electromagnetic compatibility testing verifies anti-interference capabilities by conducting tests such as electrostatic discharge, electrical fast transient / burst, and surge.

[0140] like Figure 3 The image shows a control method for an energy storage battery management system provided in an embodiment of the present invention. See also... Figure 3 The specific steps of this method include:

[0141] S301 performs high-voltage sampling through an ADC chip, which includes current sampling, voltage sampling, and insulation detection.

[0142] Specifically, current sampling is performed using an ADC chip, including: acquiring the voltage signal across the first resistor using the ADC chip; converting the voltage signal into a target current signal using an analog-to-digital converter; and sending the target current signal to the MCU using a signal isolation circuit.

[0143] Voltage sampling via an ADC chip includes: acquiring the voltage value after being stepped down by a high-voltage divider via the ADC chip; converting the voltage value into a target voltage signal via an analog input channel; and sending the target voltage signal to the MCU via a signal isolation circuit.

[0144] Insulation detection using an ADC chip includes: when a control signal output from the MCU is received through the first and second isolation optocouplers, the ADC chip sends a drive signal to the first and second optocoupler relays. The drive signal is used to control the time-division conduction of the first and second optocoupler relays, thereby realizing the time-division conduction or cutoff of the battery positive detection circuit and the battery negative detection circuit. When the battery positive detection circuit is on, the ADC chip obtains the first leakage signal of the detection resistor; when the battery negative detection circuit is on, the ADC chip obtains the second leakage signal of the detection resistor; and the first and second leakage signals are sent to the MCU through a signal isolation circuit.

[0145] S302 sends the high-voltage sampling results to the MCU via the ADC chip.

[0146] The ADC chip is located in the first region, and the MCU is located in the second region. The first region and the second region are isolated by power isolation circuits and signal isolation circuits. In this embodiment of the invention, the first region is a high-voltage region, and the second region is a low-voltage region.

[0147] Figure 4 This is a schematic diagram of the structure of an energy storage system provided in an embodiment of the present invention. Figure 4 As shown, the above-mentioned energy storage system may include, for example: Figure 1 or Figure 2 The energy storage battery management system shown includes: at least one processor; and at least one memory communicatively connected to the processor, wherein the memory stores program instructions executable by the processor, and the processor can execute the energy storage battery management system control method provided in this embodiment by calling the program instructions.

[0148] The energy storage system described above can be a device capable of intelligent dialogue with users, such as a cloud server. This specification does not limit the specific form of the energy storage system in the embodiments. It is understood that the energy storage system here refers to the machine mentioned in the method embodiments.

[0149] Figure 4 A block diagram of an exemplary energy storage system suitable for implementing embodiments of this specification is shown. Figure 4 The energy storage system shown is merely an example and should not be construed as limiting the functionality and scope of use of the embodiments described in this specification.

[0150] like Figure 4As shown, the energy storage system is represented in the form of a general-purpose computing device. Components of the energy storage system may include, but are not limited to: one or more processors 410, a communication interface 420, a memory 430, and a communication bus 440 connecting different system components (including the memory 430, the communication interface 420, and the processor 410). The energy storage system also includes energy storage batteries.

[0151] Communication bus 440 represents one or more of several bus architectures, including a memory bus or memory controller, a peripheral bus, a graphics acceleration port, a processor, or a local bus using any of the various bus architectures. For example, these architectures include, but are not limited to, Industry Standard Architecture (ISA) buses, Micro Channel Architecture (MAC) buses, Enhanced ISA buses, Video Electronics Standards Association (VESA) local buses, and Peripheral Component Interconnect (PCI) buses.

[0152] Energy storage systems typically include a variety of computer-readable media. These media can be any available media that can be accessed by the energy storage system, including volatile and non-volatile media, and portable and non-portable media.

[0153] Memory 430 may include computer system readable media in the form of volatile memory, such as random access memory (RAM) and / or cache memory. The energy storage system may further include other removable / non-removable, volatile / non-volatile computer system storage media. Memory 430 may include at least one program product having a set (e.g., at least one) of program modules configured to perform the functions of the embodiments described herein.

[0154] A program / utility having a set (at least one) of program modules may be stored in memory 430. Such program modules include, but are not limited to, an operating system, one or more application programs, other program modules, and program data. Each or some combination of these examples may include an implementation of a network environment. The program modules typically perform the functions and / or methods described in the embodiments of this specification.

[0155] The processor 410 executes various functional applications and data processing by running programs stored in the memory 430, such as implementing the energy storage battery management system control method provided in the embodiments shown in this specification.

[0156] This specification provides a non-transitory computer-readable storage medium that stores computer instructions that cause the computer to execute the energy storage battery management system control method provided in the embodiments shown in this specification.

[0157] The aforementioned non-transitory computer-readable storage medium may be any combination of one or more computer-readable media. A computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), or flash memory, optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this document, a computer-readable storage medium may be any tangible medium containing or storing a program that may be used by or in connection with an instruction execution system, apparatus, or device.

[0158] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media may also be any computer-readable medium other than computer-readable storage media, capable of sending, propagating, or transmitting programs for use by or in connection with an instruction execution system, apparatus, or device.

[0159] Program code contained on a computer-readable medium may be transmitted using any suitable medium, including but not limited to wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0160] Computer program code for performing the operations described herein can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, as well as conventional procedural programming languages ​​such as "C" or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or it can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0161] The foregoing has described specific embodiments of this specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims may be performed in a different order than that shown in the embodiments and may still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require the specific or sequential order shown to achieve the desired result. In some embodiments, multitasking and parallel processing are possible or may be advantageous.

[0162] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this specification, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0163] Any process or method described in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing custom logic functions or processes, and the scope of the preferred embodiments of this specification includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as will be understood by those skilled in the art to which the embodiments of this specification pertain.

[0164] Depending on the context, the word "if" as used here can be interpreted as "when," "when," "in response to determination," or "in response to detection." Similarly, depending on the context, the phrase "if determination" or "if detection (of the stated condition or event)" can be interpreted as "when determination," "in response to determination," "when detection (of the stated condition or event)," or "in response to detection (of the stated condition or event)."

[0165] It should be noted that the terminals involved in the embodiments of this specification may include, but are not limited to, personal computers (PCs), personal digital assistants (PDAs), wireless handheld devices, tablet computers, mobile phones, MP3 players, MP4 players, etc.

[0166] In the embodiments provided in this specification, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0167] Furthermore, the functional units in the various embodiments of this specification can be integrated into a single processor, or each unit can exist physically separately, or two or more units can be integrated into a single unit. The integrated units described above can be implemented in hardware or in a combination of hardware and software functional units.

[0168] The integrated units implemented as software functional units described above can be stored in a computer-readable storage medium. These software functional units, stored in a storage medium, include several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute some steps of the methods described in the various embodiments of this specification.

[0169] The above description is merely a preferred embodiment of this specification and is not intended to limit this specification. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this specification should be included within the scope of protection of this specification.

Claims

1. An energy storage battery management system, characterized in that, The energy storage battery management system includes an ADC chip and an MCU, wherein the ADC chip is disposed in a first region and the MCU is disposed in a second region; The ADC chip acquires the sampling signal of the energy storage battery by performing high-voltage sampling and sends the acquired sampling signal to the MCU. The high-voltage sampling includes current sampling, voltage sampling and insulation detection. The first region and the second region are isolated by power isolation circuit and signal isolation circuit; The system also includes an insulation detection circuit, which is used to achieve isolation between the first region and the second region; The insulation detection circuit includes a first isolation optocoupler, a second isolation optocoupler, a first optocoupler relay, and a second optocoupler relay; The first isolation optocoupler and the first optocoupler relay are connected in series and disposed in the positive terminal detection circuit of the battery; the second isolation optocoupler and the second optocoupler relay are connected in series and disposed in the negative terminal detection circuit of the battery. The first isolation optocoupler and the second isolation optocoupler receive the control signal output by the MCU, and transmit the control signal to the ADC chip through the first optocoupler relay and the second optocoupler relay; The first optocoupler relay and the second optocoupler relay receive the drive signal sent by the ADC chip based on the control signal, and turn on or off based on the drive signal, thereby realizing the time-division multiplexing of the battery positive electrode detection circuit or the battery negative electrode detection circuit; The first region is a high-pressure region, and the second region is a low-pressure region; The insulation detection circuit further includes: a detection resistor; The detection resistors are respectively connected to the positive electrode detection circuit and the negative electrode detection circuit of the battery; The ADC chip acquires the leakage signals under the positive electrode detection circuit and the negative electrode detection circuit of the battery respectively, and transmits the leakage signals to the MCU; Insulation detection is performed using an ADC chip, including: When the ADC chip receives the control signal output by the MCU through the first isolation optocoupler and the second isolation optocoupler, it sends a drive signal to the first optocoupler relay and the second optocoupler relay. The driving signal controls the time-division conduction of the first optocoupler relay and the second optocoupler relay, thereby realizing the time-division conduction or cutoff of the battery positive electrode detection circuit and the battery negative electrode detection circuit. When the positive electrode detection circuit of the battery is turned on, the first leakage signal of the detection resistor is obtained through the ADC chip; When the battery negative terminal detection circuit is turned on, the second leakage signal of the detection resistor is obtained through the ADC chip; The first leakage signal and the second leakage signal are sent to the MCU through a signal isolation circuit.

2. The energy storage battery management system according to claim 1, characterized in that, The system also includes a current sampling circuit: The current sampling circuit includes a first resistor and the ADC chip; The ADC chip converts the voltage signal across the first resistor into a target current signal through its internal analog-to-digital converter, and then sends the target current signal to the MCU through the signal isolation circuit.

3. The energy storage battery management system according to claim 2, characterized in that, The first resistor is connected in series with the ADC chip. The resistance of the first resistor is 1mΩ-10mΩ, the accuracy is ±0.1%, and the temperature drift is no higher than 25ppm / ℃.

4. The energy storage battery management system according to claim 1, characterized in that, The system also includes a voltage sampling circuit: The voltage sampling circuit includes a high-voltage divider and the ADC chip; The high-voltage divider linearly reduces the voltage of the energy storage battery to the safe input range of the ADC chip; The ADC chip converts the voltage value after being stepped down by the high voltage divider into a target voltage signal through its internal analog input channel, and sends the target voltage signal to the MCU through the signal isolation circuit.

5. The energy storage battery management system according to claim 4, characterized in that, The high-voltage divider is composed of multiple second resistors connected in series; The resistance of the second resistor is 1 mΩ-5 mΩ, the accuracy is ±0.1%, and the temperature drift is no higher than 25 ppm / ℃.

6. The energy storage battery management system according to claim 4, characterized in that, The signal isolation circuit includes: a digital isolator; The digital isolator enables communication between the second-region MCU and the first-region ADC chip via an SPI interface.

7. The energy storage battery management system according to claim 6, characterized in that, The power isolation circuit includes: an isolation power module; The isolated power supply module supplies power to the first area through the low-voltage power supply of the second area.

8. The energy storage battery management system according to claim 7, characterized in that, The ADC chip, the first isolation optocoupler, the second isolation optocoupler, the first optocoupler relay, the second optocoupler relay, the digital isolator, and the isolation power module are integrated on the motherboard, and the high voltage divider is integrated on the daughterboard. The motherboard and the daughterboard are connected via an SPI interface; The number of sub-boards and the configuration of the high-voltage dividers on the sub-boards are determined based on the number of voltage sampling channels on the motherboard.

9. A control method for an energy storage battery management system, characterized in that, The method includes: High-voltage sampling is performed using an ADC chip, which includes current sampling, voltage sampling, and insulation detection. The high-voltage sampling result is sent to the MCU via the ADC chip; The ADC chip is located in the first region, and the MCU is located in the second region. The first region and the second region are isolated by a power isolation circuit and a signal isolation circuit. Insulation detection is performed using an ADC chip, including: When the ADC chip receives the control signal output by the MCU through the first isolation optocoupler and the second isolation optocoupler, it sends a drive signal to the first optocoupler relay and the second optocoupler relay. The driving signal controls the time-division conduction of the first optocoupler relay and the second optocoupler relay, thereby realizing the time-division conduction or cutoff of the battery positive electrode detection circuit and the battery negative electrode detection circuit. When the positive electrode detection circuit of the battery is turned on, the first leakage signal of the detection resistor is obtained through the ADC chip; When the battery negative terminal detection circuit is turned on, the second leakage signal of the detection resistor is obtained through the ADC chip; The first leakage signal and the second leakage signal are sent to the MCU through a signal isolation circuit; The first region is a high-pressure region, and the second region is a low-pressure region; An insulation detection circuit for performing insulation testing includes: a detection resistor; The detection resistors are respectively connected to the positive electrode detection circuit and the negative electrode detection circuit of the battery; The ADC chip acquires the leakage signals under the positive and negative detection circuits of the battery, respectively, and transmits the leakage signals to the MCU.

10. The control method for an energy storage battery management system according to claim 9, characterized in that, Current sampling via an ADC chip includes: The voltage signal across the first resistor is obtained through the ADC chip; The voltage signal is converted into the target current signal using an analog-to-digital converter; The target current signal is sent to the MCU through a signal isolation circuit.

11. The control method for an energy storage battery management system according to claim 9, characterized in that, Voltage sampling via an ADC chip includes: The voltage value after being stepped down by the high-voltage divider is obtained through the ADC chip; The voltage value is converted into a target voltage signal through an analog input channel; The target voltage signal is sent to the MCU through a signal isolation circuit.

12. An energy storage system, characterized in that, include: The energy storage battery management system as described in any one of claims 1 to 8; At least one processor; as well as At least one memory communicatively connected to the processor, wherein: The memory stores program instructions that can be executed by the processor, and the processor can execute the energy storage battery management system control method as described in any one of claims 9 to 11 by calling the program instructions.

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