Battery device and operating method thereof

Abstract

The present disclosure relates to a battery device and an operation method thereof, and a technical problem to be solved is to detect a condition in which a battery pack is detached and a condition in which a battery is charged through a discharge path, and to perform a protection operation that occurs subsequently to secure the safety of the battery pack. To this end, the present disclosure provides a sub-processor that monitors a voltage of a battery in a sleep state of a main processor and awakens the main processor depending on a monitoring result, and determines a current state of a battery pack with the main processor in which the sleep state is switched to the awakened state, and then performing a configuration of the protection operation depending on the determination result.

Description

TECHNICAL FIELD

[0001] The disclosure relates to a battery device having a battery protection function and an operating method thereof. BACKGROUND

[0002] A secondary battery is a battery that can be charged and discharged, unlike a primary battery that cannot be recharged. Low-capacity secondary batteries are used for small portable electronic devices such as smartphones, multifunctional mobile phones, laptop computers, digital cameras, and camcorders, and high-capacity secondary batteries are widely used as a motor driving power source in hybrid electric vehicles, electric vehicles, etc., a power storage battery, etc. These secondary batteries include an electrode assembly including a positive electrode and a negative electrode, a case accommodating the electrode assembly, and an electrode terminal connected to the electrode assembly.

[0003] The above-described information disclosed in this BACKGROUND section is for enhancing the understanding of the background of the disclosure, and therefore, it can include information that does not constitute the related (or prior) art. SUMMARY

[0004] Recently, cases in which a finished battery pack is arbitrarily disassembled and a battery cell is replaced, or a battery management system (BMS) installed on the battery pack is separated and the BMS is installed on another battery pack to be recycled are increasing. Since disassembly, modification, and reassembly of such a battery pack can directly lead to problems such as battery pack malfunction and subsequent fire, it is necessary to strictly prohibit disassembly, modification, and reassembly of the battery pack.

[0005] In addition, a charging path through which a charging current supplied to the battery pack flows and a discharging path through which a discharging current drawn from the battery pack flows are separated depending on a product group to which the battery pack is applied. When the battery pack is turned off, the BMS is also in an off state (or a sleep state), and thus, since the BMS cannot recognize charging of the battery pack through the discharging path in the off state of the battery pack, a phenomenon of overcharging of the battery can occur, and this can lead to a safety accident such as a fire of the battery pack.

[0006] The disclosure aims to provide a battery device and an operating method thereof for detecting a condition of disassembly, modification, and reassembly of a battery pack performed in an off state of the battery pack and a condition of charging of the battery pack through a discharging path, and performing a protection operation occurring therefrom to secure safety of the battery pack.

[0007] However, the objects that the disclosure aims to achieve are not limited to the above-described objects, and other objects not described can be clearly understood by those skilled in the art from the following description.

[0008] A battery device according to the present disclosure for solving the above-described technical problem includes a main processor which monitors a voltage of a battery in a wake-up state, and performs a protection operation of a battery pack depending on a monitoring result, and a sub-processor which monitors the voltage of the battery in a sleep state of the main processor, and forms a wake-up signal for waking up the main processor when it is determined that an abnormality has occurred in the voltage of the battery depending on a monitoring result, wherein the main processor is woken up by the wake-up signal, monitors the voltage of the battery, determines a current state of the battery pack depending on the monitored voltage of the battery, and then performs the protection operation depending on a determination result. BRIEF DESCRIPTION OF DRAWINGS

[0009] The following accompanying drawings attached to the specification illustrate embodiments of the present disclosure and, together with the detailed description of the present disclosure given below, further describe aspects and features of the present disclosure. Accordingly, the present disclosure should not be construed as being limited to the drawings, in which:

[0010] Figure 1 An example of a battery management system (BMS) circuit structure of a battery device to which an embodiment according to the present disclosure can be applied is illustrated;

[0011] Figure 2 A circuit structure of a battery device according to an embodiment of the present disclosure is illustrated; and

[0012] Figure 3 is a flowchart of a method of operating a battery device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0013] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. The terms or words used in the specification and claims should not be interpreted as being limited to generally or dictionary meanings but should be interpreted in the context of the technical ideas of the present disclosure based on the concept that the inventor can appropriately define the terms in order to best explain his / her own invention. Accordingly, the terms such as "include" or "has" used herein should be interpreted as including but not limited to the meaning set forth typically or accordingly.

[0014] The embodiments described in the specification and the configurations shown in the drawings are only some embodiments of the present disclosure and do not represent all technical ideas, aspects and features of the present disclosure. Therefore, it should be understood that there can be various equivalents and modifications of the embodiments described herein which can be substituted or modified at the time of filing the present application.

[0015] It will be understood that when an element or layer is referred to as being “on” or “connected to” or “coupled to” another element or layer, it can be directly on, connected or coupled to the other element or layer, or one or more intervening elements or layers can also be present. In contrast, when an element or layer is referred to as being “directly on,” “directly connected to,” or “directly coupled to” another element or layer, there are no intervening elements or layers present. For example, when a first element is described as being “coupled” or “connected” to a second element, the first element can be directly coupled or connected to the second element or the first element can be indirectly coupled or connected to the second element via one or more intervening elements.

[0016] In the drawings, the size of various elements, layers, etc. can be exaggerated for clarity. Like reference numbers signify like elements. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. In addition, use of “may” when describing embodiments of the present disclosure relates to “one or more embodiments of the present disclosure.” Expressions such as “at least one of,” and “any one of,” when preceding a list of two or more items, cover all of the individual items in the list, as well as any one of the individual items. When a phrase such as “at least one of,” “at least one of A, B, and C,” “at least one of A, B, or C,” “at least one of a group of A, B, and C,” or “at least one of a group of A, B, and C” is used, it is intended to cover A alone, B alone, C alone, A and B together, A and C together, B and C together, or A and B and C together. As used herein, the term “use” can be considered synonymous with the term “utilize.” As used herein, the terms “substantially,” “approximately,” and similar terms are used as terms of approximation and not as terms of degree, and are intended to account for the inherent variations in a measurement or calculation that would be recognized by those of ordinary skill in the art.

[0017] It will be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of example embodiments.

[0018] For ease of description, this document uses spatially relative terms such as “below,” “under,” “lower,” “above,” “upper,” etc., to describe the relationship between one element or feature and another element or feature as shown in the figures. It should be understood that, in addition to the orientations shown in the figures, the spatially relative terms are intended to cover different orientations of the device in use or operation. For example, if the device in the figure is flipped, an element described as “below” or “under” other elements or features will be oriented as “above” or “above” other elements or features. Therefore, the term “below” can encompass both above and below orientations. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein should be interpreted accordingly.

[0019] The terminology used herein is for the purpose of describing embodiments of this disclosure and is not intended to limit this disclosure. As used herein, the singular forms “a” and “an” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that, when used in this specification, the terms “comprising” and / or “including” specify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0020] Furthermore, any numerical ranges disclosed and / or enumerated herein are intended to include all subranges containing the same numerical precision within the enumerated range. For example, the range “1.0 to 10.0” is intended to include all subranges between (and including) the enumerated minimum value of 1.0 and the enumerated maximum value of 10.0, i.e., all subranges having a minimum value equal to or greater than 1.0 and a maximum value equal to or less than 10.0, such as, for example, 2.4 to 7.6. Any maximum numerical limit enumerated herein is intended to include all lower numerical limits contained therein, and any minimum numerical limit enumerated in this specification is intended to include all higher numerical limits contained therein. Therefore, the applicant reserves the right to amend this specification (including the claims) to expressly enumerate any subranges contained within the range expressly enumerated herein.

[0021] Referring to two compared elements, features, etc., as “identical” can mean that they are “substantially identical.” Therefore, the phrase “substantially identical” can include cases with deviations considered low in the art, such as 5% or less. Furthermore, when a particular parameter is said to be uniform in a given region, it can mean that it is uniform in terms of average value.

[0022] Throughout this specification, unless otherwise stated, each element may be singular or plural.

[0023] When it is stated that an arbitrary element is disposed (or located or placed) "on" or "over" a component, it can mean that the arbitrary element is placed in contact with the upper (or lower) surface of the component, and it can also mean that another component can be interposed between the component and any arbitrary element disposed (or located or placed) on (or under) the component.

[0024] Furthermore, it will be understood that when an element is referred to as being "coupled" or "linked" or "connected" to another element, it can be directly coupled or linked or connected to the other element or intervening elements can be present. In addition, when a component is referred to as being "electrically coupled" to another component, the component can be directly connected to the other component or intervening components can be present such that the component and the other component are indirectly connected to each other.

[0025] Throughout the specification, when it is stated that "A and / or B", it means A, B, or A and B, unless otherwise stated. That is, "and / or" includes any or all combinations of the listed items. When it is stated that "C to D", it means C or more and D or less, unless otherwise stated.

[0026] 1. Battery management system (BMS) circuit structure

[0027] Figure 1 is an exemplary diagram of a BMS circuit structure to which a battery device according to one embodiment of the disclosure can be applied. To help understand the embodiments, reference will first be made to Figure 1 A BMS circuit structure to which the embodiments can be applied will be described. Figure 1 The circuit diagram in FIG. 1 corresponds to a BMS circuit structure that is a prerequisite for a battery device for implementing the embodiments to be described below, and constitutes a part of the embodiments. For reference, a battery BAT indicated below can mean a battery cell or a battery module, and a voltage of the battery BAT monitored by the main processor 100 and the sub-processor 600 can mean a voltage of the battery cell or a voltage of the battery module.

[0028] Figure 1 The illustrated BMS can include a main processor 100, a charge / discharge path 200, a charge path 300, a discharge path 400, a shunt resistor SR, and a switch driver 500 (in the embodiments, the term "path" is defined to include elements (e.g., switches, fuses, resistors, and diodes) connected to the corresponding path).

[0029] The main processor 100 can monitor the state of the battery (BAT) and perform individual battery cell control operations based on the monitoring results. For example, the main processor 100 can be configured to monitor the battery's voltage, current, temperature, and state of charge (SOC), and perform control operations (such as battery balancing control, temperature control, and charge / discharge control) or protection operations (such as switch control) to prevent over-discharge or over-charge based on the monitoring results. The main processor 100 can be configured to include a microcontroller unit (MCU) of the battery management system (BMS) and an analog front-end integrated circuit (AFE IC). Figure 1 The diagram shows an example in which the BMS MCU and AFE IC are integrated into a single main processor 100; however, in some embodiments, the AFE IC and MCU may be implemented as two separate processors.

[0030] The charging / discharging path 200 can be used as a path to supply charging current to the battery and draw discharging current from the battery. That is, when the battery is charging, charging current is supplied to the battery via the charging / discharging path 200, and when the battery is discharging, discharging current is supplied to the load via the charging / discharging path 200. For clarity in categorizing the terminology, connections will be made to... Figure 1 The path of the first node N1, the first protection element F1, the battery, the shunt resistor SR, and the second node N2 is defined as charging / discharging path 200. Here, the first node N1 and the second node N2 correspond to the nodes to which charging path 300 and discharging path 400, which will be described below, are jointly connected.

[0031] like Figure 1 As shown, the charging / discharging path 200 may include a first protection element F1, and the first protection element F1 may be implemented as a self-controlled protector (SCP) fuse for blocking the flow of current on the charging / discharging path 200. The main processor 100 described above may operate (blow out) the first protection element F1 in the event of an anomaly in the battery pack (e.g., when the internal wiring of the battery pack short-circuits due to excessive power consumption of the battery pack, and thus an overvoltage occurs in a battery cell), so that the flow of current on the charging / discharging path 200 can be blocked (in the following, the term "operation of the protection element" is defined as "disconnection of the path including the protection element" or "blowing of the fuse").

[0032] Charging path 300 can be formed by branching from the aforementioned charging / discharging path 200, and can correspond to the path through which charging current flows to the battery cells for charging the battery cells. For clarity of terminology, the path connecting the positive charging terminal C+ to the first node N1 (not shown) and the path connecting the negative charging terminal C- to the second node N2 (not shown) are defined as follows: Figure 1The signal path P1 branched from the node of the charging positive electrode terminal C+ on the charging path 300 and connected to the main processor 100 can be provided in the BMS, and thus the main processor 100 in a sleep state in an off state of the battery pack can be configured to be woken up based on a charging voltage signal received through the above-described signal path P1 when an external charger is connected.

[0033] As shown in Figure 1 , a charging control switch SW_C, a diode D7, and a second protection element F2 can be provided in the charging path 300. The charging control switch SW_C can be implemented as an FET for regulating the flow of a charging current on the charging path 300 by performing on / off operations under the control of the main processor 100 and the switch driver 500, and the second protection element F2 can be implemented as an SCP fuse for blocking the flow of the charging current on the charging path 300 when a defect (e.g., FET short circuit) occurs in the charging control switch SW_C. The above-described main processor 100 can control the on / off of the charging control switch SW_C by the switch driver 500 to regulate the flow of the charging current on the charging path 300, and can operate (fuse) the second protection element F2 by a blocking signal SIG3 to block the current flow on the charging path 300 when short circuit detection of the charging control switch SW_C occurs.

[0034] The discharging path 400 can be formed by being branched from the above-described charging / discharging path 200, and can correspond to a path in which a discharging current drawn from the battery flows. For the sake of clearly classifying the terms, in Figure 1 , a path connecting the positive electrode terminal P+ of the battery pack with the first node N1 and a path connecting the negative electrode terminal P- of the battery pack with the second node N2 are defined as Figure 1 the discharging path 400 in

[0035] As shown in Figure 1 , a discharging control switch SW_D can be provided in the discharging path 400. The discharging control switch SW_D can be implemented as an FET for regulating the flow of a discharging current on the discharging path 400 by performing on / off operations under the control of the main processor 100 and the switch driver 500. The above-described main processor 100 can control the on / off of the discharging control switch SW_D by the switch driver 500 to regulate the flow of the discharging current on the discharging path 400.

[0036] The shunt resistor SR can function as a resistor element connected to the charge / discharge path 200 to detect overcurrent flowing in the battery, and the switch driver 500 can correspond to a gate driver that controls the on-off operation of the charge control switch SW_C and the discharge control switch SW_D under the control of the main processor 100. Accordingly, the main processor 100 can operate to prevent damage to the battery due to overcurrent by detecting a state in which overcurrent flows in the battery through the shunt resistor SR and controlling the switch driver 500 to turn off the charge control switch SW_C or the discharge control switch SW_D.

[0037] The shutdown mode is applied to a battery pack of a BMS to which the above-described circuit structure is applied. Specifically, when the battery pack is not used for a long period of time, since the battery cells applied to the battery pack are self-discharged due to the self-consumption current of the BMS, use limitation of the battery pack can be caused. To prevent such limitation of future use due to self-discharge of the battery pack, when a predefined limit time elapses from the last use time of the battery pack or when the voltage of the battery pack is formed to be lower than a predefined limit voltage, the battery pack enters a shutdown state, and the main processor 100 of the BMS also enters a sleep state, so that the operation of the battery pack is stopped. In the shutdown state of the battery pack, all operations of the BMS are stopped, for example, a monitoring operation for the voltage, current, temperature, and SOC of the battery cells, a control operation such as balancing control, temperature control, and charge / discharge control of the battery cells, and a protection operation such as switch control and fuse control for preventing over-discharge or over-charge. In the shutdown state of the battery pack, the above-described switch and protection elements also maintain an off state.

[0038] Since all operations of the BMS are stopped in the shutdown state of the battery pack, when the battery pack is disassembled and reassembled in the shutdown state of the battery pack and then the battery pack is switched to the active state again, the battery pack becomes usable. When it is assumed that the BMS is recycled by extracting only the BMS and transferring the BMS to another battery pack after disassembling the battery pack in the shutdown state, when the available current applied to new battery cells of a new battery pack is less than the available current applied to original battery cells of an original battery pack, since the BMS can not normally perform an overcurrent protection (OCP) operation on the new battery pack, the new battery cells can not be protected from serious damage, so that a safety accident such as a fire of the new battery pack can be caused.

[0039] In addition, in Figure 1In the case of the battery pack shown, in which the charging path 300 and the discharging path 400 are independently configured, in the wake-up state of the main processor 100 of the BMS, when the main processor 100 turns off the discharging control switch SW_D or operates the first protection element F1 by recognizing the condition in which the battery pack is charged through the discharging path 400, it is possible to prevent the battery pack from being charged through the discharging path 400. However, since the main processor 100 is in the sleep state in the off state of the battery pack, the charging of the battery pack through the discharging path 400 in the off state of the battery pack can not be recognized by the main processor 100, and thus the condition of overcharging of the battery can occur, and thus, a safety accident such as a fire of the battery pack can occur.

[0040] In the off state of the battery pack and the sleep state of the main processor 100, the embodiment focuses on a configuration that allows the main processor 100 to recognize i) the detached condition of the battery pack and ii) the condition in which the battery pack is charged through the discharging path 400 and perform a subsequent protection operation, and will be described below with reference to Figure 2 DETAILED DESCRIPTION.

[0041] 2. Battery device

[0042] Figure 2 The circuit structure of the battery device according to one embodiment of the present disclosure is shown in FIG. 1. Figure 1 and Figure 2 The same reference numerals are used for the same components in FIGS. 1 through 4.

[0043] In the embodiment according to Figure 2 , a sub-processor 600 can be provided, which functions as a secondary IC for waking up the main processor 100 in the sleep state (assuming the off state of the battery pack). The sub-processor 600 can be implemented as having the same internal processor structure and input / output terminals as the main processor 100, which can be implemented as an AFE IC, but considering that the sub-processor 600 functions as an auxiliary processor for waking up the main processor 100, the sub-processor 600 can be preferably implemented as an IC to which a low-consumption component is applied. The sub-processor 600 can always remain in the wake-up state independently of the state of the main processor 100, and a low-capacity built-in battery for supporting the operation of the sub-processor 600, which will be described below, can be applied to the sub-processor 600.

[0044] The main processor 100 woken up by the sub-processor 600 can be configured to substantially operate the first protection element F1 when performing the protection operation to be described below, and can include a first switch SW1 as a driving element for operating the first protection element F1. In an example in which the first switch SW1 is implemented as a field effect transistor (FET), the main processor 100 can turn on the first switch SW1 by applying a voltage signal to a gate terminal of the first switch SW1, and thus, the first protection element F1 can operate since a current flows to the first protection element F1 connected to a drain terminal of the first switch SW1.

[0045] The signal transmitted from the sub-processor 600 to the main processor 100 can include a wake-up signal SIG1 for waking up the main processor 100 and an abnormal state signal SIG2 indicating that the voltage of the battery BAT is in an abnormal state, and a signal arbitration circuit 700 can be provided to arbitrate the input of the wake-up signal SIG1 and the abnormal state signal SIG2 from the sub-processor 600 to the main processor 100.

[0046] As Figure 2 illustrated, the signal arbitration circuit 700 can include base paths 710 and 720 and first to third branch paths 701 to 703. For the sake of clearly classifying the terms, a current flowing in the base paths 710 and 720 is defined as a base current Ib, and currents flowing in the first to third branch paths 701 to 703 are defined as first to third branch currents I1 to I3, respectively.

[0047] The base paths 710 and 720 can be configured such that the base current Ib output from the sub-processor 600 flows to form the wake-up signal SIG1 and the abnormal state signal SIG2. Figure 2 A structure in which two base paths 710 and 720 are connected to output terminals of the sub-processor 600 to secure redundancy is illustrated, but in some embodiments, only one base path can be provided. The base paths 710 and 720 can include connection resistors R1 and R2 and diodes D1 and D2.

[0048] The first branch path 701 can be configured to branch from the base paths 710 and 720, and thus, the first branch current I1 branched from the base current Ib can be configured to flow in the first branch path 701. A diode D3 and a connection resistor R3 can be provided in the first branch path 701, and a voltage formed in the connection resistor R3 by the first branch current I1 can be transmitted to the main processor 100 as the wake-up signal SIG1.

[0049] The second branch path 702 can be configured to branch from the base paths 710 and 720, and thus, a second branch current I2 branched from the base current Ib can be configured to flow in the second branch path 702. A diode D4 can be provided in the second branch path 702. A second switch SW2 for forming an abnormal state signal SIG2 can be provided at an end of the second branch path 702 based on a direction in which the second branch current I2 flows. In an example in which the second switch SW2 is implemented as an FET, a gate terminal of the second switch SW2 can be connected to the second branch path 702, a source terminal can be grounded, and a drain terminal can be connected to an internal power source V CC (For example, a BMS internal power source, 3.3 V). Also, the gate terminal of the second switch SW2 can be connected to the source terminal through a connection resistor R5. Thus, since a gate-source voltage having a value greater than a threshold voltage of the second switch SW2 is formed by the second branch current I2 and the connection resistor R5, the second switch SW2 can be turned on, a current can flow from the drain terminal to the source terminal, and a voltage formed at the drain terminal (i.e., a voltage from the internal power source minus a voltage across the connection resistor R4) can be transmitted to the main processor 100 as the abnormal state signal SIG2.

[0050] The third branch path 703 can be configured to branch from the base paths 710 and 720, and thus, a third branch current I3 branched from the base current Ib can be configured to flow in the third branch path 703. A diode D5 can be provided in the third branch path 703. As Figure 2 indicated, the third branch current I3 can be configured to be synthesized at the same node N3 with a blocking signal SIG3 output from the main processor 100 to operate a second protection element F2. When a path in which the blocking signal SIG3 is input from the main processor 100 to the second protection element F2 is defined as a blocking signal path P2, a connection resistor R6 and a diode D6 can be provided in the blocking signal path P2, and a third switch SW3 for operating the second protection element F2 can be provided at an end of the blocking signal path P2 based on a direction in which the blocking signal SIG3 is applied to the second protection element F2. In an example in which the third switch SW3 is implemented as an FET, a gate terminal of the third switch SW3 can be connected to the blocking signal path P2, a source terminal can be grounded, and a drain terminal can be connected to the second protection element F2. Also, the gate terminal of the third switch SW3 can be connected to the source terminal through a connection resistor R7. Thus, when a gate-to-source voltage is formed by a current flowing through the blocking signal path P2 and the connection resistor R7 and the third switch SW3 is turned on, a current can flow to the second protection element F2, and thus the second protection element F2 can operate.

[0051] Based on the above-described circuit structure, a configuration that allows the main processor 100 to recognize the detached state of the battery pack and the charging state of the battery through the discharging path 400 to perform a subsequent protection operation will be described in detail.

[0052] In the off state of the battery pack, that is, in the sleep state of the main processor 100, the sub-processor 600 can monitor the voltage of the battery, and determine whether an abnormality has occurred in the voltage of the battery based on the monitoring result. When the monitoring target is a battery cell, when the monitored current voltage of the battery cell and the rated voltage (i.e., the design voltage) of the battery cell are different, the sub-processor 600 can determine that an abnormality has occurred in the voltage of the battery cell. The operation of the sub-processor 600 to monitor the voltage of the battery can serve as a preliminary operation for waking up the main processor 100, and the type of abnormality in the battery voltage can be designated by the main processor 100.

[0053] When it is determined that an abnormality has occurred in the voltage of the battery, the sub-processor 600 can form a wake-up signal SIG1 for waking up the main processor 100 and an abnormal state signal SIG2 indicating that the voltage of the battery is in an abnormal state. In this case, the sub-processor 600 can operate to output the base current Ib to the base paths 710 and 720 (having the same meaning as the operation of forming a set voltage at the output terminal of the sub-processor 600 to allow the base current Ib to flow in the base paths 710 and 720), and as the base current Ib branches through the first branch path 701 to the third branch path 703, the first branch current I1 to the third branch current I3 can flow in the first branch path 701 to the third branch path 703, respectively.

[0054] When the first branch current I1 flows in the first branch path 701, the voltage formed in the connection resistor R3 provided in the first branch path 701 can be transmitted to the main processor 100 as the wake-up signal SIG1.

[0055] When the second branch current I2 flows in the second branch path 702, a gate-source voltage is formed by the second branch current I2 and the connection resistor R5, and thus the second switch SW2 can be turned on, the current can flow from the drain terminal to the source terminal, and the voltage formed at the drain terminal can be transmitted to the main processor 100 as the abnormal state signal SIG2.

[0056] The third branch path 703 can be configured to be synthesized with the blocking signal path P2 at the node N3. Hereinafter, the third branch path 703 and the third branch current I3 will be described.

[0057] The wake-up signal SIG1 and the abnormal state signal SIG2 formed by the sub-processor 600 and the signal arbitration circuit 700 can be transmitted to the main processor 100 in the sleep state. The main processor 100 can be awakened by the wake-up signal SIG1 and operate to monitor the voltage of the battery by specifying the abnormal type of the battery voltage to determine the current state of the battery pack after recognizing that the voltage of the battery is in an abnormal state through the abnormal state signal SIG2. The abnormal type in the battery voltage can be classified into a voltage abnormality due to disassembly of the battery pack and a voltage abnormality caused by charging the battery through the discharge path 400.

[0058] First, when the monitored current voltage of the battery satisfies the first voltage condition related to the voltage change, the main processor 100 can determine that the battery pack is in a disassembly process (the operation of the BMS itself assumes that the battery pack is in a state that can be disassembled).

[0059] To determine the above-described "first voltage condition related to the voltage change", the amount of change in the voltage of the battery that can be formed in the process of replacing the battery cell or the battery module can be pre-defined in the main processor 100. For example, the amount of change in the voltage caused in other battery cells or other battery modules when one or more battery cells or one or more battery modules are separated from the battery pack can be pre-defined in the main processor 100, and the value of the above-described amount of change in the voltage can be designed based on the experimental results of the designer for the disassembly of the battery pack.

[0060] Therefore, when the current voltage of the battery (the current voltage of the battery cell or the current voltage of the battery module) is in a state changed by the above-described amount of change in the voltage or a state corresponding to the current voltage of the battery being different from the rated voltage by the above-described amount of change in the voltage, the main processor 100 can determine that the first voltage condition is satisfied and can determine that the battery pack is in a disassembly state.

[0061] When it is determined that the battery pack is in a disassembly state, the main processor 100 can substantially operate the first protection element F1 to block the flow of current on the charge / discharge path 200, and thus, the reuse of the battery pack and the BMS can be prevented.

[0062] In this case, the above-described first voltage condition can be satisfied even in the initial manufacturing process of the battery pack, and in order to prevent a situation in which the use of the battery pack is prohibited by operating the first protection element F1 in the initial manufacturing process of the battery pack, when it is determined that the first voltage condition is satisfied and thus the battery pack is in a disassembly state, the main processor 100 can not immediately operate the first protection element F1, but can first verify the risk of the battery pack in a disassembly state (i.e., when the current state of the battery pack in a disassembly state does not correspond to the initial manufacturing process), and then determine whether to perform the protection operation of the battery depending on the verification result.

[0063] In an embodiment, battery management information can be employed as information for verifying the risk of the battery pack, and the battery management information can include manufacturing date information of the battery pack that is generally stored in the main processor 100 (or a memory installed in the main processor 100) in an initial manufacturing process of the battery pack. When the battery management information has been stored, the main processor 100 can determine that the battery pack in the disassembled state is in a dangerous state (i.e., a state in which the battery pack has been disassembled after the battery pack is initially manufactured) and perform a protection operation of the battery pack. On the other hand, when the battery management information is not stored, the main processor 100 can be configured to determine that the current state of the battery pack is the disassembled state in the initial manufacturing process of the battery pack and not perform the protection operation of the battery pack. When the protection operation of the battery pack is performed as described above, the main processor 100 can operate the first protection element F1 to block the flow of current on the charge / discharge path 200, and thus, the reuse of the battery pack and the BMS can be prevented.

[0064] Next, when the monitored current voltage of the battery satisfies a second voltage condition related to an overcharge state of the battery, the main processor 100 can determine that the battery is being charged by the charging current supplied through the discharge path 400. This configuration corresponds to a situation in which the battery is detected as being charged by the charging current supplied through the discharge path 400 in the "off state of the battery pack", rather than a situation in which the battery is detected as being charged by the charging current supplied through the discharge path 400 in the activated state of the battery pack (i.e., a normal operation state in which the main processor 100 is awakened).

[0065] To determine the above-described "second voltage condition related to an overcharge state of the battery", a threshold voltage of a battery cell or a threshold voltage of a battery module for determining an overcharge state of the battery cell or the battery module can be predefined in the main processor 100. Accordingly, when the current voltage of the battery (the current voltage of the battery cell or the current voltage of the battery module) is greater than or equal to the above-described threshold voltage, the main processor 100 can determine that the battery is in an overcharge state when the battery is being charged by the charging current supplied through the discharge path 400 and block the flow of current on the charge / discharge path 200 through the first protection element F1.

[0066] Meanwhile, independently of the operation of determining the overcharge state of the battery according to the above-described second voltage condition, the main processor 100 can be configured to detect the overcharge state of the battery in the activated state of the battery pack. Referring to the above-described Figure 1When the battery is overcharged in a state in which the charging current is supplied through the charging path 300 and the battery is charged, the main processor 100 can turn off the charging control switch SW_C to block the flow of the charging current on the charging path 300, and when a short defect occurs in the charging control switch SW_C, the main processor 100 can operate the second protection element F2 by blocking the signal SIG3 to block the current flow on the charging path 300.

[0067] In an embodiment according to Figure 2 , the signal arbitration circuit 700 is applied, and the third branch path 703 and the third branch current I3 of the signal arbitration circuit 700 can provide a topology in which the blocking signal SIG3 output from the main processor 100 can be implemented as a low current signal or a low voltage signal (thus, the power consumption of the main processor 100 can be reduced).

[0068] Specifically, the third branch path 703 can be configured to be synthesized with the blocking signal path P2 at the node N3. Thus, the synthesized current formed by the current of the blocking signal SIG3 (i.e., the current flowing through the connection resistor R6 and the diode D6) and the third branch current I3 at the node N3 flows toward the gate terminal of the third switch SW3. Since the gate-source voltage having a value greater than or equal to the threshold voltage of the third switch SW3 is formed by the above-mentioned synthesized current and the connection resistor R7, the third switch SW3 is turned on, and thus, the second protection element F2 can be operated to block the current flow on the charging path 300.

[0069] That is, the topology capable of reducing the power consumption of the main processor 100 can be provided by implementing the current required to operate the second protection element F2 with the synthesized current of the current of the blocking signal SIG3 output from the main processor 100 and the third branch current I3 employed in the embodiment to reduce the size of the blocking signal SIG3 output from the main processor 100 to the size of the third branch current I3 to operate the second protection element F2. Thus, the signal arbitration circuit 700 including the first branch path 701 to the third branch path 703 can perform the function of arbitrating the signal transmission between the main processor 100 and the sub-processor 600 and the function of reducing the power consumption of the main processor 100.

[0070] 3. Method of operating a battery device

[0071] Figure 3 is a flowchart of a method of operating a battery device according to one embodiment of the disclosure. Referring to Figure 3 The method of operating the battery device of the embodiment is explained, and the detailed description of the configuration repeated from the above is omitted, and the description will focus on the time sequence configuration.

[0072] First, the sub-processor 600 monitors the voltage of the battery in the sleep state of the main processor 100 (S100).

[0073] Next, the sub-processor 600 determines whether an abnormality has occurred in the monitored voltage of the battery (S200). In operation S200, the sub-processor 600 determines that an abnormality has occurred in the voltage of the battery when the monitored voltage of the battery is different from the rated voltage of the battery.

[0074] When it is determined in operation S200 that an abnormality has occurred in the voltage of the battery, the sub-processor 600 forms a wake-up signal SIG1 for waking up the main processor 100, and an abnormal state signal SIG2 indicating that the voltage of the battery is in an abnormal state (S300).

[0075] Subsequently, the main processor 100 is woken up by the wake-up signal SIG1, and monitors the voltage of the battery after recognizing that the voltage of the battery is in an abnormal state through the abnormal state signal SIG2 (S400).

[0076] Subsequently, the main processor 100 determines the current state of the battery pack depending on the monitored voltage of the battery (S500). The current state of the battery pack determined in operation S500 corresponds to a detached state of the battery pack, and a charging state of the battery through the discharging path 400.

[0077] In operation S500, when the monitored current voltage of the battery satisfies a first voltage condition related to a voltage change, the main processor 100 determines that the battery pack is in a detached state, and when the monitored current voltage of the battery satisfies a second voltage condition related to an overcharge state of the battery, the main processor 100 determines that the battery is being charged by a charging current supplied through the discharging path 400.

[0078] After operation S500, the main processor 100 performs a protection operation depending on the determination result of the current state of the battery pack (S600).

[0079] When it is determined that the battery pack is in a detached state because the current voltage of the battery satisfies the first voltage condition, in operation S600, the main processor 100 verifies the risk that the battery pack is in a detached state using battery management information for managing the battery pack. The battery management information can include manufacturing date information of the battery pack, and thus, when the battery management information has been stored, the main processor 100 determines that the battery pack in a detached state is in a dangerous state, and blocks the flow of current on the charging / discharging path 200 through the first protection element F1.

[0080] When it is determined that the battery is being charged by the charging current supplied through the discharging path 400 because the current voltage of the battery satisfies the second voltage condition, the main processor 100 immediately blocks the current flow on the charging / discharging path 200 through the first protection element F1 in operation S600.

[0081] Independently of operations S100 to S600, when the main processor 100 is in the overcharge state because of a short defect in the charging control switch SW_C and the battery is in the overcharge state, an operation of operating the second protection element F2 to block the current flow on the charging path 300 through the blocking signal SIG3 can be provided.

[0082] Accordingly, based on the structure in which a main processor that monitors the voltage of a battery in a wake-up state and performs a protection operation of the battery pack depending on the monitoring result and a sub-processor configured to monitor the voltage of the battery in a sleep state of the main processor and wake up the main processor depending on the monitoring result are provided in a battery pack, because a configuration in which the main processor switched from the sleep state to the wake-up state determines the current state of the battery and then performs a protection operation depending on the determination result is adopted, a safety accident of the battery pack due to disassembly, modification, and reassembly of the battery pack and charging of the battery pack through a discharging path can be effectively prevented.

[0083] Embodiments described herein can be implemented as, for example, a method or procedure, an apparatus, a software program, a data stream, or a signal. Even though discussed in the context of a single type of implementation (for example, discussed only as a method), features discussed herein can also be implemented in other forms (for example, an apparatus or program). An apparatus can be implemented by suitable hardware, software, firmware, etc. A method can be implemented on an apparatus, such as a processor generally referring to a processing device including a computer, a microprocessor, an integrated circuit, a programmable logic device, etc. The processor includes a communication apparatus, such as a computer, a cellular phone, a personal digital assistant (PDA), and other apparatuses that facilitate communication of information between the apparatus and an end user.

[0084] According to the present disclosure, based on the structure in which a main processor (for example, an analog front end integrated circuit (AFE IC)) that monitors the voltage of a battery in a wake-up state and performs a protection operation of the battery pack depending on the monitoring result and a sub-processor configured to monitor the voltage of the battery in a sleep state of the main processor and wake up the main processor depending on the monitoring result are provided in a battery pack, a configuration in which the main processor switched from the sleep state to the wake-up state determines the current state of the battery pack (for example, a situation of disassembly, modification, and reassembly of the battery pack, or a situation of charging of the battery pack through a discharging path), and then performs a protection operation depending on the determination result is adopted, and thus a safety accident of the battery pack due to disassembly, modification, and reassembly of the battery pack and charging of the battery pack through a discharging path can be effectively prevented.

[0085] However, the effects achievable by the present application are not limited to the above-mentioned effects, and other effects not described can be clearly understood by those skilled in the art from the detailed description.

[0086] Although the present disclosure has been described with reference to the embodiments illustrating aspects of the present disclosure and the accompanying drawings, the present disclosure is not limited thereto. Those skilled in the art to which the present disclosure belongs can make various modifications and changes within the technical spirit of the present disclosure and the claims and equivalents thereof.

Claims

1. A battery device comprising: a main processor which monitors a voltage of a battery in a wake-up state, and performs a protection operation of a battery pack depending on a result of the monitoring; and a sub-processor which monitors the voltage of the battery in a sleep state of the main processor, and forms a wake-up signal for waking up the main processor when it is determined that an abnormality has occurred in the voltage of the battery depending on a result of the monitoring, wherein the main processor is woken up by the wake-up signal, monitors the voltage of the battery, determines a current state of the battery pack depending on the monitored voltage of the battery, and then performs the protection operation depending on a result of the determination. 2.The battery device according to claim 1, wherein: the sub-processor forms an abnormal state signal indicating that the voltage of the battery is in an abnormal state and the wake-up signal when it is determined that an abnormality has occurred in the voltage of the battery; and the main processor is woken up by the wake-up signal, and monitors the voltage of the battery after recognizing that the voltage of the battery is in the abnormal state by the abnormal state signal.

3. The battery device of claim 2, wherein, the main processor determines that the battery pack is in a disassembly state when a monitored current voltage of the battery satisfies a first voltage condition related to a voltage change.

4. The battery device of claim 3, wherein, the main processor first verifies a risk that the battery pack is in the disassembly state using battery management information for managing the battery pack, and then determines whether to perform the protection operation of the battery depending on a result of the verification when it is determined that the battery pack is in the disassembly state due to the current voltage of the battery satisfying the first voltage condition. 5.The battery device according to claim 4, wherein: the battery management information includes manufacturing date information of the battery pack; and the main processor determines that the battery pack in the disassembly state is in a dangerous state, and performs the protection operation of the battery pack when the battery management information is stored. 6.The battery device according to claim 5, further comprising a charge / discharge path which serves as a path for supplying a charge current to the battery and drawing a discharge current from the battery, and includes a first protection element for blocking a current flow, wherein the main processor blocks the current flow on the charge / discharge path by the first protection element when the protection operation of the battery pack is performed. 7.The battery device according to claim 6, further comprising: a charge path which branches from the charge / discharge path so that the charge current supplied to the battery flows; and a discharge path which branches from the charge / discharge path so that the discharge current drawn from the battery flows. wherein, after identifying that the voltage of the battery is in the abnormal state through the abnormal state signal, the main processor monitors the voltage of the battery, and determines that the battery is being charged by the charging current supplied through the discharging path when the monitored current voltage of the battery satisfies a second voltage condition related to an overcharge state of the battery.

8. The battery device of claim 7, wherein, When it is determined that the battery is being charged by the charging current supplied through the discharging path due to the current voltage of the battery satisfying the second voltage condition, the main processor blocks the current flow on the charging / discharging path through the first protection element.

9. The battery apparatus of claim 2, further comprising a signal arbitration circuit that arbitrates transmission of the wake-up signal and the abnormal state signal from the sub-processor to the main processor.

10. The battery apparatus of claim 9, wherein: the signal arbitration circuit includes a base path and first and second branch paths branching from the base path; a base current output from the sub-processor flows through the base path to form the wake-up signal and the abnormal state signal; the wake-up signal is formed by a first branch current branching from the base current and flowing in the first branch path; and the abnormal state signal is formed by a second branch current branching from the base current and flowing in the second branch path.

11. The battery apparatus of claim 10, further comprising a charging path configured to have a charging current supplied to the battery flow, and the charging path includes a charging control switch to regulate the flow of the charging current and a second protection element to block the flow of the charging current when a defect occurs in the charging control switch, wherein when the defect has occurred in the charging control switch, i.e., the battery is in an overcharge state, the main processor operates the second protection element by a blocking signal to block the current flow on the charging path in the wake-up state.

12. The battery apparatus of claim 11, wherein: the signal arbitration circuit further includes a third branch path branching from the base path, wherein the third branch path is configured to have a third branch current branching from the base current flow; and the blocking signal and the third branch current are synthesized at a same node to operate the second protection element.

13. A method of operating a battery apparatus including a sub-processor and a main processor, the method comprising: monitoring, by the sub-processor, a voltage of a battery when the main processor is in a sleep state; forming, by the sub-processor, a wake-up signal to wake up the main processor upon determining that an abnormality has occurred in the monitored voltage of the battery; monitoring, by the main processor, the voltage of the battery after being woken up by the wake-up signal; determining, by the main processor, a current state of the battery pack from the monitored voltage of the battery; and performing, by the main processor, a protection operation depending on a result of the determination of the current state of the battery pack. ​ 14. The method according to claim 13, wherein: in the forming, the sub-processor forms an abnormal state signal indicating that the voltage of the battery is in an abnormal state and the wake-up signal when it is determined that an abnormality has occurred in the voltage of the battery; and in the monitoring performed by the main processor, the main processor is woken up by the wake-up signal and monitors the voltage of the battery after recognizing that the voltage of the battery is in the abnormal state by the abnormal state signal.

15. The method of claim 14, wherein, in the determining, the main processor determines that the battery pack is in a detached state when a monitored current voltage of the battery satisfies a first voltage condition related to a voltage change.

16. The method of claim 15, wherein, in the performing, when it is determined that the battery pack is in the detached state because the current voltage of the battery satisfies the first voltage condition, the main processor first verifies a risk that the battery pack is in the detached state using battery management information for managing the battery pack, and then determines whether to perform the protection operation of the battery depending on a verification result.

17. The method according to claim 16, wherein: the battery management information includes manufacturing date information of the battery pack; and in the performing, the main processor determines that the battery pack in the detached state is in a dangerous state, and performs the protection operation of the battery pack when the battery management information is stored.

18. The method according to claim 17, wherein: the battery device further includes a charge / discharge path that functions as a path for supplying a charge current to the battery and drawing a discharge current from the battery, and includes a first protection element for blocking current flow; and in the performing, the main processor blocks current flow on the charge / discharge path by the first protection element.

19. The method according to claim 18, wherein: the battery device further includes a charge path that branches from the charge / discharge path so that the charge current supplied to the battery flows, and a discharge path that branches from the charge / discharge path so that the discharge current drawn from the battery flows; and in the determining, after recognizing that the voltage of the battery is in the abnormal state by the abnormal state signal, the main processor monitors the voltage of the battery, and determines that the battery is being charged by the charge current supplied through the discharge path when a monitored current voltage of the battery satisfies a second voltage condition related to an overcharge state of the battery.

20. The method of claim 19, wherein, in the performing, when it is determined that the battery is being charged by the charge current supplied through the discharge path because the current voltage of the battery satisfies the second voltage condition, the main processor blocks the current flow on the charge / discharge path by the first protection element.

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