A high-density multi-channel Ku-band radio frequency channel integrated micro module

Abstract

The application discloses a high-density multi-channel Ku-band radio frequency channel integrated micro module, and belongs to the technical field of radio frequency micro systems. The micro module adopts a three-dimensional stacking architecture, and comprises a four-channel transceiving front end IP, a transceiving frequency conversion IP, a local oscillator source IP and a high-density integrated PCB substrate, and the three IPs are silicon-based packages; a received input signal enters the four-channel transceiving front end IP, is subjected to amplitude and phase control, is transmitted to the transceiving frequency conversion IP through the high-density integrated PCB substrate, is subjected to radio frequency frequency gating filtering, is mixed and frequency-converted to an intermediate frequency output. A transmitted input signal enters the transceiving frequency conversion IP, is subjected to frequency mixing and up-conversion, is subjected to radio frequency frequency gating filtering, is transmitted to the four-channel transceiving front end IP through the high-density integrated PCB substrate, is subjected to amplitude and phase control, and is amplified and output through a power amplifier chip. The application adopts a chip preset grounding ring, a silicon substrate independent cavity and an IP shielding cavity, and solves the complex electromagnetic compatibility problem during communication.

Description

Technical Field

[0001] This invention relates to the field of radio frequency microsystems technology, and in particular to a high-density multi-channel Ku-band radio frequency channel integrated micro-module. Background Technology

[0002] As electronic information systems evolve towards higher integration, performance, and operating frequencies, the physical limits of Moore's Law make traditional packaging technologies insufficient to meet the demands of new system integration. Three-dimensional heterogeneous integration has become a key path to continue and surpass Moore's Law, with radio frequency (RF) microsystems as its core carrier. RF microsystem integration technology is a crucial advanced packaging technology that aligns with the trend of electronic system miniaturization. This technology primarily serves the urgent needs of cutting-edge fields such as 5G communication and the Internet of Things for high integration (miniaturization, lightweighting), and multifunctionality of integrated RF front-ends, active arrays, and other components. Its core lies in using microelectronics, optoelectronics, MEMS, and other diverse electronic components as a foundation, relying on advanced processing techniques to achieve heterogeneous integration, and through deep integration of structural design, software, and algorithms, realizing three-dimensional high-density integration of RF, digital, optoelectronic, and energy electronic systems.

[0003] Relay communication radio frequency channels are mainly composed of a series of compound semiconductor chips, Si CMOS chips, and MEMS chips. These devices are typically manufactured on different substrates using different processing techniques, which greatly limits the possibility of integrating these devices through a single processing flow. Existing technologies generally employ multi-chip modules (MCMs) or similar micro-assembly methods, which significantly restrict the integration density and application flexibility of the radio frequency channel and can no longer meet the needs of next-generation UAV relay communication microsystems. Summary of the Invention

[0004] Purpose of the invention: The purpose of this invention is to provide a high-density multi-channel Ku-band radio frequency channel integrated micro-module to solve the problems of high-frequency signal leakage and coupling interference between adjacent units in relay communication radio frequency channels. By adopting a miniaturized and compact layout, it realizes the integrated integration of sixteen channels for transceiver and achieves electromagnetic compatibility and signal transmission isolation between adjacent components in a high-density miniaturized three-dimensional integrated manner.

[0005] Technical solution: A high-density multi-channel Ku-band radio frequency channel integrated micro-module, including a four-channel transceiver front-end IP, a local oscillator IP, and a transceiver frequency conversion IP arranged horizontally on a high-density integrated PCB substrate; wherein, all three IPs are silicon-based packages, and the local oscillator IP is a POP architecture;

[0006] The received input signal enters the four-channel transceiver front-end IP through the high-density integrated PCB substrate. After being amplified by the transceiver amplifier circuit, the received input signal undergoes amplitude and phase adjustment by the 3D heterogeneous multi-functional chip. Then, it enters the transceiver frequency conversion IP through the internal interconnection traces of the high-density integrated PCB substrate. After the frequency band is selected by the switching filter group in the transceiver frequency conversion IP, the intermediate frequency signal is output through the down-conversion of the mixer circuit and finally output through the high-density integrated PCB substrate.

[0007] The transmit input signal enters the transceiver frequency conversion IP through the high-density integrated PCB substrate, is up-converted by the mixer circuit, and after the radio frequency band is selected, it enters the four-channel transceiver front-end IP. The transmit input signal is amplitude and phase adjusted by the 3D heterogeneous multi-functional chip, and then amplified by the transceiver amplifier circuit before being output through the high-density integrated PCB substrate.

[0008] The local oscillator source IP generates both the receive and transmit local oscillator signals. A switching amplifier circuit selects between receiving and transmitting the local oscillator signal, and a power divider network provides four signal inputs to the transceiver IP.

[0009] Furthermore, the four-channel transceiver front-end IP consists of a 3D heterogeneous multifunctional chip and transceiver amplifier circuits integrated inside the silicon-based housing of the four-channel transceiver front-end IP.

[0010] The four-channel transceiver front-end IP silicon substrate consists of a four-channel transceiver front-end IP silicon substrate and a four-channel transceiver front-end IP silicon cap with a cavity. The four-channel transceiver front-end IP silicon cap is assembled on top of the four-channel transceiver front-end IP silicon substrate by wafer-level bonding. BGA solder balls are integrated under the four-channel transceiver front-end IP silicon substrate for interconnection with a high-density integrated PCB substrate.

[0011] The four-channel transceiver front-end IP silicon substrate serves as the input terminal for receiving and the output terminal for transmitting in the four-channel transceiver front-end IP: in the receiving state, it receives the input signal from the high-density integrated PCB substrate and transmits it to the transceiver amplifier circuit; in the transmitting state, it outputs the transmitting signal to the high-density integrated PCB substrate and performs the final output.

[0012] Furthermore, the transceiver frequency conversion IP consists of a mixer circuit, a local oscillator signal amplification circuit, and an RF band gating circuit integrated within the silicon-based housing of the transceiver frequency conversion IP.

[0013] The transceiver frequency conversion IP silicon substrate is composed of a transceiver frequency conversion IP silicon substrate and a transceiver frequency conversion IP silicon cap with a cavity. The transceiver frequency conversion IP silicon cap is assembled on top of the transceiver frequency conversion IP silicon substrate by wafer-level bonding. BGA solder balls are integrated under the transceiver frequency conversion IP silicon substrate for interconnection with a high-density integrated PCB substrate.

[0014] In the receiving state, the transceiver frequency conversion IP silicon substrate receives the amplitude and phase modulated signals of the four-channel transceiver front-end IP, and after being down-converted by the mixer circuit, the intermediate frequency signal is output through the transceiver frequency conversion IP silicon substrate; the received local oscillator signal output by the local oscillator source is amplified by the local oscillator signal amplifier circuit and then enters the mixer circuit.

[0015] In the transmit state, the transceiver conversion IP silicon substrate serves as the input terminal for the transmit signal. The transmit signal is up-converted by the mixer circuit and selected by the RF band selection circuit, and the RF signal is output to the four-channel transceiver front-end IP. The transmit local oscillator signal output by the local oscillator source is amplified by the local oscillator signal amplifier circuit and then enters the mixer circuit.

[0016] Chip bonding pads are provided on the mixing circuit, local oscillator signal amplification circuit, and radio frequency band selection circuit. The chip bonding pads are connected to the bonding area of ​​the silicon substrate through wire bonding.

[0017] Furthermore, the radio frequency band gating circuit adopts a GaAs integrated switching filter bank chip, which selects the filters by switching to ensure that the filters are isolated from each other.

[0018] Furthermore, the local oscillator IP includes: a control unit disposed within a silicon-based housing of the control unit and a phase-locked loop unit disposed within a silicon-based housing of the phase-locked loop unit;

[0019] The control unit includes a control circuit and a power divider network. The control circuit controls the receiving phase-locked loop and the transmitting phase-locked loop in the phase-locked loop unit, and amplifies or power divides the received local oscillator signal or the transmitting local oscillator signal output by the phase-locked loop unit before outputting it to the transceiver inverter IP. The power divider network provides four signals.

[0020] The phase-locked loop unit includes a phase-locked loop circuit and a switching amplifier circuit;

[0021] The silicon-based housing of the control unit consists of a bottom silicon substrate, a middle frame, and a top silicon cover plate arranged from bottom to top.

[0022] The bottom silicon substrate of the control unit outputs a local oscillator signal for receiving or transmitting. The middle layer frame of the control unit divides the control unit into cavities to isolate the receiving frequency source and the transmitting frequency source. The control signal is transmitted to the top silicon substrate cover plate of the control unit through the middle layer frame of the control unit.

[0023] The phase-locked loop unit silicon-based housing consists of a phase-locked loop unit silicon substrate and a phase-locked loop unit silicon cap with compartments. The phase-locked loop unit silicon cap is arranged above the phase-locked loop unit silicon substrate. BGA solder balls are integrated below the phase-locked loop unit silicon substrate for interconnection between the phase-locked loop unit and the top silicon-based cover plate of the control unit.

[0024] The control circuit, phase-locked loop circuit, and switching amplifier circuit are all equipped with chip bonding pads, which are connected to the bonding area of ​​the silicon substrate via wire bonding.

[0025] Furthermore, 200:30 TSV blind vias are integrated inside the bottom silicon substrate of the control unit, the middle layer frame of the control unit, and the top silicon cover plate of the control unit to achieve vertical signal transmission.

[0026] Furthermore, the 3D heterogeneous multifunctional chip includes: a Si-based wave control chip, micro-bumps, and an integrated GaAs low-noise amplifier / amplitude-shifting chip;

[0027] The integrated GaAs low-noise amplifier / amplitude phase shifter chip has a chip bonding PAD, and the Si-based wave controller chip is flip-chip mounted on the integrated GaAs low-noise amplifier / amplitude phase shifter chip through micro-bumps.

[0028] One end of the wire bond is connected to the chip bonding PAD on the integrated GaAs low-noise amplifier / amplitude phase shifter chip, and the other end is connected to the silicon substrate bonding area; the silicon substrate bonding area is located on the four-channel transceiver front-end IP silicon substrate and is electrically interconnected with the four-channel transceiver front-end IP silicon substrate.

[0029] Furthermore, BGA solder balls are integrated under the high-density integrated PCB substrate for interconnection with the antenna; each chip arranged in the four-channel transceiver front-end IP, local oscillator IP, and transceiver frequency converter IP has a preset on-chip low-impedance grounding ring.

[0030] Compared with the prior art, the significant advantages of this invention are as follows:

[0031] 1. The local oscillator IP of this invention consists of a control unit and a phase-locked loop (PLL) unit stacked together. The bottom silicon substrate of the control unit is interconnected with a high-density integrated PCB substrate via BGA balls, and the top silicon substrate is interconnected with the PLL unit via BGA balls. This two-layer stacked structure offers the advantages of simultaneous assembly and layered testing, improving production efficiency and yield. Simultaneously, the layered structure enhances the isolation between the receiving PLL and the transmitting PLL, preventing stray interference during dual-loop operation.

[0032] 2. Each chip in this invention features a pre-set on-chip low-impedance ground loop as a fundamental design element. This structure effectively provides a low-impedance loop for internal chip noise, minimizing on-chip coupling. Chip isolation is used for power and microwave paths to address crosstalk between low-frequency signals and microwave paths. Each IP functional unit incorporates a silicon-based micro-shielded cavity. This structure utilizes silicon-based TSVs to construct a local electromagnetic isolation barrier around critical functional circuits, effectively suppressing high-frequency signal leakage and coupling interference between adjacent units, thereby addressing the unique electromagnetic compatibility challenges brought about by three-dimensional integration.

[0033] 3. Each IP of the present invention is provided with a self-shielding shell. The shielding shell provides the Faraday cage effect, which can not only effectively block the intrusion interference of the external complex electromagnetic environment to the sensitive circuit inside the micro-module, but also strongly suppress the electromagnetic noise generated by the high-speed digital circuit and radio frequency circuit inside the micro-module to radiate outward, ensuring that the micro-module can still meet the electromagnetic compatibility requirements of the overall system after board-level integration.

[0034] 4. The RF band selection circuit of this invention employs an integrated switch filter bank, integrating the switch and multiple filters onto the same chip. Filter selection is achieved through switch switching, and a rational layout ensures isolation between filters, reducing chip area. The integrated chip design for antenna polarization mode switching and bidirectional amplifiers cascades and matches the polarization switch and transceiver amplifiers, further reducing insertion loss, chip noise, and improving efficiency and transmitter output power. Attached Figure Description

[0035] Figure 1 This is a three-dimensional stacking diagram of the present invention;

[0036] Figure 2 These are schematic diagrams of the various IPs of this invention;

[0037] Figure 3 This is a schematic diagram of the silicon substrate of the phase-locked loop unit;

[0038] Figure 4 This is a schematic diagram of the structure of a four-channel transceiver front-end IP;

[0039] Figure 5 This is a schematic diagram illustrating the principle of a four-channel transceiver front-end IP.

[0040] Figure 6 This is a schematic diagram illustrating the principle of transmitting and receiving frequency conversion IP.

[0041] Figure 7 This is a schematic diagram of the structure of the local oscillator source IP;

[0042] Figure 8 This is a schematic diagram of the control unit;

[0043] Figure 9 This is a schematic diagram of the phase-locked loop unit;

[0044] Figure 10 This is a schematic diagram showing the placement of BGA solder balls;

[0045] Figure 11 This is a schematic diagram of heterogeneous integration of multi-material chips;

[0046] Figure 12 This is a schematic diagram of radio frequency signal transmission between different IPs.

[0047] Among them, 1-high-density integrated PCB substrate, 2-four-channel transceiver front-end IP silicon substrate, 3-control unit bottom silicon substrate, 4-transceiver frequency converter IP silicon substrate, 5-control unit middle layer frame, 6-control unit top silicon base cover plate, 7-phase-locked loop unit silicon substrate, 8-four-channel transceiver front-end IP silicon cap, 9-transceiver frequency converter IP silicon cap, 10-phase-locked loop unit silicon cap, 11-BGA solder ball, 12-InP integrated frequency multiplier amplifier chip, 13-Si base wave controller chip, 14-integrated GaAs low-noise amplifier / amplitude modulation phase shifter chip, 15-wire bonding, 16-microbump, 17-GaAs bidirectional amplifier chip. 18-Mixer / amplifier integrated chip, 19-GaAs filter chip, 20-GaAs integrated switch filter bank chip, 21-Si control microprocessor, 22-Power divider network, 23-Si phase-locked loop chip, 24-Si ultra-low noise linear regulator chip, 25-TSV blind via, 26-Chip bonding PAD, 27-Silicon substrate bonding area, 28-First GaAs switch chip, 29-Second GaAs switch chip, 30-GaAs amplifier chip, 31-Si microprocessor monitoring circuit, E01-Four-channel transceiver front-end IP, E02-Local oscillator IP, E03-Transceiver frequency converter IP. Detailed Implementation

[0048] In this invention, various aspects of the invention are described with reference to the accompanying drawings, which illustrate illustrative embodiments. Embodiments of the invention are not limited to those shown in the drawings. It should be understood that the invention is implemented through any of the various concepts and embodiments described above, as well as the concepts and embodiments described in detail below, because the concepts and embodiments disclosed in this invention are not limited to any particular implementation. Furthermore, some aspects of the invention disclosed can be used alone or in any suitable combination with other aspects of the invention disclosed.

[0049] This invention proposes a high-density, multi-channel Ku-band RF channel integrated micro-module. Its purpose is to address the shortcomings of existing technologies by employing silicon-based packaging and three-dimensional stacking on a high-density integrated PCB substrate. This achieves high-density three-dimensional integration using silicon-based packaging, resulting in an integrated sixteen-channel relay communication RF transceiver system. The three-dimensional stacking of this micro-module significantly reduces the package size, improves performance, and has engineering practicality. Figure 1 , Figure 2 As shown, the micro-module of the present invention uses three-dimensional silicon-based packaging as the package body, and is divided into a four-channel transceiver front-end IP E01, a local oscillator IP E02, and a transceiver frequency converter IP E03. Each IP is electrically interconnected through three-dimensional stacking with the high-density integrated PCB substrate 1. Among them, all three IPs are silicon-based packages, and the local oscillator IP is a POP (Packaging on Packaging) architecture.

[0050] like Figure 1 As shown, this invention provides a high-density multi-channel Ku-band RF channel integrated micro-module, including a high-density integrated PCB substrate 1, a four-channel transceiver front-end IP silicon substrate 2, a control unit bottom silicon substrate 3, a transceiver frequency converter IP silicon substrate 4, a control unit middle layer frame 5, a control unit top silicon base plate 6, a phase-locked loop unit silicon substrate 7, a four-channel transceiver front-end IP silicon cap 8, a transceiver frequency converter IP silicon cap 9, a phase-locked loop unit silicon cap 10, BGA solder balls 11, an InP integrated frequency multiplier amplifier chip 12, a Si-based wave controller chip 13, an integrated GaAs low-noise amplifier / amplitude modulation phase shifter chip 14, wire bonding 15, micro-bumps 16, a GaAs bidirectional amplifier chip 17, a mixer / amplifier integrated chip 18, a GaAs filter chip 19, a GaAs integrated switching filter bank chip 20, a Si control microprocessor 21, a power divider network 22, a Si phase-locked loop chip 23, a Si ultra-low noise linear regulator chip 24, a TSV blind via 25, and a chip bonding PAD. 26, silicon substrate bonding area; 27, first GaAs switch chip; 28, second GaAs switch chip; 29, GaAs amplifier chip; 30, Si microprocessor monitoring circuit; 31.

[0051] The four-channel transceiver front-end IP silicon substrate 2 and the four-channel transceiver front-end IP silicon cap 8 with a partitioned cavity constitute the four-channel transceiver front-end IP silicon-based housing. The transceiver frequency converter IP silicon substrate 4 and the transceiver frequency converter IP silicon cap 9 with a partitioned cavity constitute the transceiver frequency converter IP silicon-based housing. The control unit bottom silicon substrate 3, the control unit middle layer frame 5, and the control unit top silicon-based cover plate 6 constitute the control unit silicon-based housing; the phase-locked loop unit silicon substrate 7 and the phase-locked loop unit silicon cap 10 with a partitioned cavity constitute the phase-locked loop unit silicon-based housing.

[0052] The transceiver circuit includes: a GaAs bidirectional amplifier chip 17 and a first GaAs switch chip 28, the first GaAs switch chip 28 being used for switching between circular polarization and linear polarization modes;

[0053] The mixing circuit includes: a mixer / amplifier integrated chip 18 and a GaAs filter chip 19;

[0054] The local oscillator signal amplification circuit includes: an InP integrated frequency multiplier amplifier chip 12;

[0055] The radio frequency band gating circuit includes: GaAs integrated switching filter bank chip 20;

[0056] The control unit includes: a Si control microprocessor 21, a Si microprocessor monitoring circuit 31, and a power divider network 22. The Si control microprocessor 21 and the Si microprocessor monitoring circuit 31 constitute the control circuit.

[0057] The phase-locked loop circuit includes: a Si phase-locked loop chip 23 and its peripheral circuits, and a Si ultra-low noise linear regulator chip 24;

[0058] The switching amplifier circuit includes a second GaAs switch chip 29 and a GaAs amplifier chip 30.

[0059] Chip bonding pads 26 are provided on the GaAs bidirectional amplifier chip 17, the first GaAs switch chip 28, the mixer / amplifier integrated chip 18, the GaAs filter chip 19, the InP integrated frequency multiplier amplifier chip 12, the GaAs integrated switch filter bank 20, the Si control microprocessor 21, the Si microprocessor monitoring circuit 31, the Si phase-locked loop chip 23 and its peripheral circuits, and the Si ultra-low noise linear regulator chip 24. The chip bonding pads 26 are connected to the silicon substrate bonding area 27 through wire bonding 15, respectively realizing the electrical interconnection between the transceiver amplifier circuit, the mixer circuit, the local oscillator signal amplifier circuit, the RF band gating circuit, the control circuit, the phase-locked loop circuit, the switch amplifier circuit and the silicon substrate.

[0060] The Si-based wave controller chip 13, microbumps 16, and the integrated GaAs low-noise amplifier / amplitude phase shifter chip 14 constitute a 3D heterogeneous multifunctional chip. Chip bonding pads 26 are disposed on the integrated GaAs low-noise amplifier / amplitude phase shifter chip 14. The Si-based wave controller chip 13 is flip-chip mounted on the integrated GaAs low-noise amplifier / amplitude phase shifter chip 14 via microbumps 16. One end of a wire bond 15 is connected to the chip bonding pad 26 on the integrated GaAs low-noise amplifier / amplitude phase shifter chip 14, and the other end is connected to the silicon substrate bonding region 27. The silicon substrate bonding region 27 is disposed on the four-channel transceiver front-end IP silicon substrate 2, ultimately realizing the electrical interconnection between the 3D heterogeneous multifunctional chip and the four-channel transceiver front-end IP silicon substrate 2.

[0061] The received input signal enters the four-channel transceiver front-end IP E01 through the high-density integrated PCB substrate 1. After power amplification by the transceiver amplifier circuit, the received signal undergoes amplitude and phase adjustment by the 3D heterogeneous multi-functional chip. Then, it enters the transceiver frequency converter IP E03 through the internal interconnection traces of the high-density integrated PCB substrate 1. After frequency band selection by the switching filter bank in the transceiver frequency converter IP E03, the intermediate frequency signal is output through the down-conversion of the mixer circuit and finally output through the high-density integrated PCB substrate 1.

[0062] The transmit input signal enters the transceiver frequency conversion IP E03 through the high-density integrated PCB substrate 1. After being upconverted by the mixer circuit and selected by the RF band selection circuit, it enters the four-channel transceiver front-end IP E01. The transmit signal undergoes amplitude and phase adjustment by the 3D heterogeneous multi-functional chip, and then is amplified by the transceiver amplifier circuit. Finally, it is output through the high-density integrated PCB substrate 1.

[0063] In the local oscillator source IP E02, the phase-locked loop circuit in the phase-locked loop unit generates the local oscillator signal for receiving and transmitting. One of them is selected by the switching amplifier circuit, and then the power divider network 22 in the control unit provides four signal inputs to the transceiver frequency converter IP E03.

[0064] BGA solder balls 11 are integrated below the four-channel transceiver front-end IP silicon substrate 2, the control unit bottom silicon substrate 3, and the transceiver frequency conversion IP silicon substrate 4 for interconnection between each silicon substrate and the high-density integrated PCB substrate 1; BGA solder balls 11 are integrated below the phase-locked loop unit silicon substrate 7 for interconnection between the phase-locked loop unit and the top silicon substrate cover plate 6 of the control unit; BGA solder balls 11 are integrated below the high-density integrated PCB substrate 1 for interconnection between the micro-module and the antenna.

[0065] The micro-module of this invention also integrates a power management module and an SPI (Serial Peripheral Interface) control module to realize pulse operation control for receiving and transmitting pulses and frequency hopping control for the frequency source.

[0066] The micromodule of this invention uses silicon-based materials as the medium for the substrate and cover plate, breaking through the limitations of traditional packaging that can only use ceramic and metal materials, reducing size and cost, while ensuring high density and high reliability of the micromodule.

[0067] like Figure 3 As shown, on the silicon substrate 7 of the phase-locked loop unit, a cavity design is adopted for the two Si phase-locked loop chips 23, the second GaAs switch chip 29 and the GaAs amplifier chip 30, which increases the isolation between the receiving frequency source and the transmitting frequency source, thereby ensuring that the spectrum of the two frequency sources is clean.

[0068] like Figure 4 As shown, the four-channel transceiver front-end IP E01 is a three-dimensional heterogeneous integration of a four-channel transceiver front-end IP silicon substrate 2, a Si-based wave controller chip 13, and an integrated GaAs low-noise amplifier / amplitude modulation phase shifter chip 14. The port is directly connected to the GaAs bidirectional amplifier chip 17 and the first GaAs switch chip 28, thus reducing transition losses and maximizing the saving of micro-module size.

[0069] like Figure 5As shown, the received input signal enters the four-channel transceiver front-end IP E01. After power amplification by the transceiver amplifier circuit, the received signal undergoes amplitude and phase adjustment by the 3D heterogeneous amplitude-phase multifunction chip, and then enters the transceiver frequency converter IP through the internal interconnection traces of the high-density integrated PCB substrate 1. RF1H to RF4H are circular polarization ports, RF1V to RF4V are linear polarization ports, the LNA is a low-noise amplifier, and the PA is a power amplifier. The first GaAs switching chip 28 switches between circular and linear polarization outputs. Each channel also has a coupler to couple the RF signal output for self-testing.

[0070] like Figure 6 As shown, the received input signal enters the transceiver converter IP E03 via the COM port. After being selected and filtered by the RF band selection circuit (GaAs integrated switching filter chip 20 is used in this embodiment), it is down-converted to output the IF (Intermediate Frequency) signal by the mixer circuit (mixer / amplifier integrated chip 18 and GaAs filter chip 19 are used in this embodiment). At the same time, the LO (Local Oscillator Signal) output by the local oscillator source is amplified by the local oscillator signal amplifier circuit and also enters the mixer circuit.

[0071] like Figure 7 As shown, the local oscillator IP E02 consists of a control unit and a phase-locked loop unit. It adopts a POP architecture and is connected by BGA solder balls 11 for three-dimensional stacking.

[0072] like Figure 8 As shown, the silicon-based housing of the control unit consists of a bottom silicon substrate 3, a middle frame 5, and a top silicon cover 6. It integrates a solid TSV blind via 25 to achieve vertical signal transmission.

[0073] like Figure 9 As shown, the silicon-based housing of the phase-locked loop (PLL) unit consists of a PLL unit silicon substrate 7 and a PLL unit silicon cap 10 with compartments. Figure 10 As shown, the control signal generated by the control unit is transmitted to the silicon substrate 7 of the phase-locked loop unit through the top silicon cover plate 6 of the control unit and then through the BGA solder balls 11, thereby realizing the register control of the Si phase-locked loop chip 23.

[0074] like Figure 10 As shown, in order to achieve integrated sixteen-channel transceiver, this invention adopts a three-dimensional stacking method:

[0075] The local oscillator IP E02 consists of a control unit and a phase-locked loop (PLL) unit stacked in a POP configuration. The bottom silicon substrate 3 of the control unit is interconnected with the high-density integrated PCB substrate 1 via BGA solder balls 11, and the top silicon cover plate 6 of the control unit is interconnected with the PLL unit via BGA solder balls 11. This two-layer stacked structure offers the advantages of simultaneous assembly and layered testing, improving production efficiency and yield. Simultaneously, the layered configuration enhances the isolation between the receiving and transmitting PLLs, preventing stray interference during dual-loop operation.

[0076] like Figure 11 As shown, the 3D heterogeneous multifunctional chip in the four-channel transceiver front-end IP E01 adopts an integrated GaAs low-noise amplifier / amplitude / phase shifter chip 14 and a Si-based wave controller chip 13, which fully leverages the microwave performance advantages of GaAs chips and the multifunctional advantages of digital circuits of silicon-based CMOS chips. The Si-based wave controller chip 13 is stacked three-dimensionally on the GaAs chip using a gold ball inverted overlay method, significantly reducing the chip area. The circuit units of the 3D heterogeneous amplitude and phase multifunctional chip are based on miniaturization design, further reducing the chip area.

[0077] The micromodule of this invention adopts an IP-based design concept, with layout from four dimensions: devices, chips, modules, and modules. In terms of circuit architecture, it uses a 4-channel T / R subarray unit corresponding to one frequency conversion transceiver channel, with four frequency conversion channels sharing a single local oscillator. Therefore, the micromodule of this invention includes four four-channel transceiver front-end IPs, four transceiver frequency conversion IPs, and one local oscillator IP. Each module is also formed as an IP, connected to a high-density integrated PCB substrate 1 via BGA solder balls 11. Trace routing is performed inside the high-density integrated PCB substrate 1 to achieve interconnection and transmission between the various IPs.

[0078] like Figure 12 As shown, the RF signal transmission relationship between various IPs is illustrated. This invention treats the chip as a whole, first performing the structure and reconstruction of functional blocks. CH1 to CH4 represent the four channels of RF signals of the four-channel transceiver front-end IP, where RF1H to RF4H represent four circularly polarized RF signals, and RF1V to RF4V represent four linearly polarized RF signals. ，IF and LO represent the intermediate frequency signal and the local oscillator signal, respectively. Through collaborative design and global optimization across functional blocks, optimal overall chip performance is achieved. Simultaneously, close integration of front-end chip design and back-end process implementation ensures the most compact chip physical size while meeting peak performance specifications: The RF band selection circuit uses a GaAs integrated switch filter bank chip 20, integrating switches and multiple filters onto the same chip. Filter selection is achieved through switch switching, and a reasonable layout ensures isolation between various filter channels, reducing chip area. An integrated antenna polarization mode switching and bidirectional amplifier chip design is adopted. By cascading and matching the first GaAs switch chip 28 and the GaAs bidirectional amplifier chip 17, insertion loss is reduced, chip noise is reduced, efficiency is improved, and the output power of the transmitter is increased. The local oscillator source IP uses a mixer / amplifier integrated chip 18, integrating the InP mixer chip and GaAs local oscillator amplifier into a single design. Conventional mixer chips typically require 13dBm of drive power at their local oscillator ports; this invention further reduces the size of the micro-module using the integrated mixer / amplifier chip 18 design.

[0079] The micromodule of this invention employs a silicon-based three-dimensional architecture, a heterogeneous material fusion architecture, an integrated chip design method, and multi-layer electromagnetic shielding technology to achieve integrated sixteen-channel transceiver functionality. By combining a silicon substrate, cavity-type silicon caps, TSV blind vias, wire bonding, micro-bumps, and BGA solder balls, multiple functions are achieved.

[0080] Both the substrate and cover of the micro-module are made of silicon-based materials, breaking through the limitation that traditional packaging can only use ceramic and metal materials;

[0081] The phase-locked loop unit adopts a cavity-splitting design, which increases the isolation between the receiving frequency source and the transmitting frequency source, ensuring that the spectrum of the two sources is clean;

[0082] Employing a POP architecture and connecting via BGA solder balls to achieve three-dimensional stacking, this allows for individual testing of each package module before assembly, thereby reducing manufacturing costs and increasing yield. Solid TSV blind vias are integrated within the silicon substrate and silicon-based cavity to enable vertical signal transmission; this three-dimensional integration significantly reduces the size of the micromodule.

[0083] Based on customized integration technology, the micro-module of this invention integrates semiconductor devices of different material systems such as silicon-based and compound-based at the chip level, realizing the synergistic effect of the excellent performance of compound-based devices at microwave high frequency and the multi-functional advantages of silicon-based devices in complex digital circuit integration.

[0084] Treating the chip as a whole, the first step is to structure and restructure the functional blocks. Through collaborative design and global optimization across functional blocks, the optimal overall chip performance is achieved. Simultaneously, close integration with front-end chip design and back-end process implementation ensures the most compact chip physical size while meeting peak performance targets.

[0085] By coordinating the layout of each chip and directly connecting multiple chip ports, the transient loss is reduced and the micro-module size is saved to the greatest extent.

[0086] Each chip features a pre-installed low-impedance ground loop as a fundamental design element. This ground loop effectively provides a low-impedance path for internal chip noise, minimizing on-chip coupling. Power and microwave paths utilize chip isolation technology to address crosstalk between low-frequency signals and the microwave path.

[0087] Each IP functional unit is designed with a silicon-based micro-shielded cavity. This silicon-based micro-shielded cavity uses silicon-based TSV technology to build a local electromagnetic isolation barrier around the critical functional circuits, effectively suppressing high-frequency signal leakage and coupling interference between adjacent units, thereby solving the unique electromagnetic compatibility challenges brought about by three-dimensional integration. A self-shielded shell is set at the micro-module level. This shielding shell provides the Faraday cage effect, which can not only effectively block the intrusion interference of the complex external electromagnetic environment to the sensitive circuits inside the micro-module, but also strongly suppress the electromagnetic noise generated by the high-speed digital circuits and radio frequency circuits inside the micro-module to radiate outward, ensuring that the micro-module can still meet the electromagnetic compatibility requirements of the overall system after board-level integration.

[0088] While the present invention has been described above with reference to preferred embodiments, it is not intended to limit the invention. Those skilled in the art can make various modifications and refinements without departing from the spirit and scope of the invention, and all such modifications and refinements fall within the protection scope of the invention.

Claims

1. A high-density multi-channel Ku-band radio frequency channel integrated micro-module, characterized in that, It includes a four-channel transceiver front-end IP (E01), a local oscillator IP (E02), and a transceiver frequency converter IP (E03) arranged horizontally on a high-density integrated PCB substrate (1); among them, all three IPs are silicon-based packages, and each IP is electrically interconnected with the high-density integrated PCB substrate (1) through three-dimensional stacking. The local oscillator IP (E02) is a POP architecture. The received input signal enters the four-channel transceiver front-end IP (E01) through the high-density integrated PCB substrate (1). After being amplified by the transceiver amplifier circuit, the received input signal is amplitude and phase adjusted by the 3D heterogeneous multi-functional chip. Then, it enters the transceiver frequency converter IP (E03) through the internal interconnection traces of the high-density integrated PCB substrate (1). After the frequency band of the switching filter group is selected in the transceiver frequency converter IP (E03), the intermediate frequency signal is output through the down-conversion of the mixer circuit. Finally, it is output through the high-density integrated PCB substrate (1). The transmit input signal enters the transceiver frequency conversion IP (E03) through the high-density integrated PCB substrate (1). After upconversion and RF band selection, it enters the four-channel transceiver front-end IP (E01). The transmit input signal is amplitude and phase adjusted by the 3D heterogeneous multi-functional chip, and then amplified by the transceiver amplifier circuit before being output through the high-density integrated PCB substrate (1). The local oscillator source IP (E02) generates the local oscillator signal for receiving and transmitting. The receiving local oscillator signal or the transmitting local oscillator signal is selected by the switching amplifier circuit, and then the four-channel signal input to the transceiver frequency converter IP (E03) is provided by the power divider network (22). The four-channel transceiver front-end IP (E01) consists of a 3D heterogeneous multi-functional chip and transceiver amplifier circuits integrated inside the silicon-based housing of the four-channel transceiver front-end IP. The four-channel transceiver front-end IP silicon substrate is composed of a four-channel transceiver front-end IP silicon substrate (2) and a four-channel transceiver front-end IP silicon cap (8) with a cavity. The four-channel transceiver front-end IP silicon cap (8) is assembled on top of the four-channel transceiver front-end IP silicon substrate (2) by wafer-level bonding. BGA solder balls (11) are integrated below the four-channel transceiver front-end IP silicon substrate (2) for interconnection with the high-density integrated PCB substrate (1). The transceiver frequency conversion IP (E03) consists of a mixer circuit, a local oscillator signal amplification circuit, and an RF band gating circuit integrated within the silicon-based housing of the transceiver frequency conversion IP. The transceiver frequency conversion IP silicon base shell is composed of a transceiver frequency conversion IP silicon substrate (4) and a transceiver frequency conversion IP silicon cap (9) with a cavity. The transceiver frequency conversion IP silicon cap (9) is assembled on top of the transceiver frequency conversion IP silicon substrate (4) by wafer-level bonding. BGA solder balls (11) are integrated under the transceiver frequency conversion IP silicon substrate (4) for interconnection with the high-density integrated PCB substrate (1). Chip bonding PADs (26) are provided on the mixing circuit, the local oscillator signal amplification circuit and the radio frequency band selection circuit. The chip bonding PADs (26) are connected to the bonding area (27) of the silicon substrate through wire bonding (15).

2. The high-density multi-channel Ku-band radio frequency channel integrated micro-module according to claim 1, characterized in that, The four-channel transceiver front-end IP silicon substrate (2) serves as the input terminal for receiving and the output terminal for transmitting the four-channel transceiver front-end IP (E01): In the receiving state, the input signal received from the high-density integrated PCB substrate (1) is transmitted to the transceiver amplifier circuit, and then the amplitude and phase are adjusted by the 3D heterogeneous multifunctional chip. In the transmission state, the transmission signal is output to the high-density integrated PCB substrate (1) and then the final output is performed.

3. The high-density multi-channel Ku-band radio frequency channel integrated micro-module according to claim 1, characterized in that, In the receiving state, the transceiver frequency conversion IP silicon substrate (4) receives the amplitude and phase modulated signal from the four-channel transceiver front-end IP (E01), and after down-conversion by the mixer circuit, outputs the intermediate frequency signal through the transceiver frequency conversion IP silicon substrate (4). The received local oscillator signal output by the local oscillator source is amplified by the local oscillator signal amplifier circuit and then enters the mixer circuit; In the transmitting state, the transceiver frequency conversion IP silicon substrate (4) serves as the input terminal of the transmitting signal. The transmitting signal is up-converted by the mixing circuit and selected by the radio frequency band selection circuit, and the radio frequency signal is output to the four-channel transceiver front-end IP (E01). The transmitting local oscillator signal output by the local oscillator source is amplified by the local oscillator signal amplifier circuit and then enters the mixing circuit.

4. The high-density multi-channel Ku-band radio frequency channel integrated micro-module according to claim 3, characterized in that, The radio frequency band selection circuit uses a GaAs integrated switch filter bank chip (20) to select the filter by switching, ensuring that each filter is isolated from the others.

5. The high-density multi-channel Ku-band radio frequency channel integrated micro-module according to claim 1, characterized in that, The local oscillator IP (E02) includes: a control unit disposed in a silicon-based housing of the control unit and a phase-locked loop unit disposed in a silicon-based housing of the phase-locked loop unit; The control unit includes a control circuit and a power divider network (22). The control circuit controls the receiving phase-locked loop and the transmitting phase-locked loop in the phase-locked loop unit, and amplifies and power divides the receiving local oscillator signal or the transmitting local oscillator signal output by the phase-locked loop unit before outputting it to the transceiver inverter IP (E03). The power divider network (22) provides four signals. The phase-locked loop unit includes a phase-locked loop circuit and a switching amplifier circuit. The switching amplifier circuit amplifies, filters, and switches the local oscillator signal output from the phase-locked loop circuit. The silicon-based housing of the control unit is composed of the bottom silicon substrate (3), the middle frame (5), and the top silicon cover (6) of the control unit, from bottom to top. The bottom silicon substrate (3) of the control unit outputs a local oscillator signal for receiving or transmitting. The middle layer frame (5) of the control unit divides the control unit into cavities to isolate the receiving frequency source and the transmitting frequency source. The control signal is transmitted to the top silicon substrate cover plate (6) of the control unit through the middle layer frame (5). The phase-locked loop unit silicon-based housing is composed of a phase-locked loop unit silicon substrate (7) and a phase-locked loop unit silicon cap (10) with a cavity. The phase-locked loop unit silicon cap (10) is arranged above the phase-locked loop unit silicon substrate (7). BGA solder balls (11) are integrated below the phase-locked loop unit silicon substrate (7) for interconnection between the phase-locked loop unit and the top silicon-based cover plate (6) of the control unit. Chip bonding PADs (26) are provided on the control circuit, phase-locked loop circuit and switching amplifier circuit. The chip bonding PADs (26) are connected to the bonding area (27) of the silicon substrate through wire bonding (15).

6. The high-density multi-channel Ku-band radio frequency channel integrated micro-module according to claim 5, characterized in that, The bottom silicon substrate (3) of the control unit, the middle layer frame (5) of the control unit, and the top silicon substrate cover plate (6) of the control unit all integrate 200:30 TSV blind vias (25) to realize vertical signal transmission.

7. The high-density multi-channel Ku-band radio frequency channel integrated micro-module according to any one of claims 1-6, characterized in that, The 3D heterogeneous multifunctional chip includes: a Si-based wave controller chip (13), micro-bumps (16), and an integrated GaAs low-noise amplifier / amplitude-shifting chip (14). A chip bonding PAD (26) is provided on the integrated GaAs low noise amplifier / amplitude phase shifter chip (14), and the Si-based wave controller chip (13) is flip-chip mounted on the integrated GaAs low noise amplifier / amplitude phase shifter chip (14) through microbumps (16). One end of the wire bond (15) is connected to the chip bonding PAD (26) on the integrated GaAs low noise amplifier / amplitude phase shifter chip (14), and the other end is connected to the silicon substrate bonding area (27); the silicon substrate bonding area (27) is disposed on the four-channel transceiver front-end IP silicon substrate (2) and is electrically interconnected with the four-channel transceiver front-end IP silicon substrate (2).

8. The high-density multi-channel Ku-band radio frequency channel integrated micro-module according to any one of claims 1-6, characterized in that, The high-density integrated PCB substrate (1) has BGA solder balls (11) integrated underneath for interconnection with the antenna; each chip arranged in the four-channel transceiver front-end IP (E01), local oscillator IP (E02) and transceiver frequency conversion IP (E03) has a preset on-chip low impedance grounding ring.

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