Photoelectric detection structure and manufacturing method thereof, photoelectric sensor and manufacturing method thereof

Abstract

The invention discloses a photoelectric detection structure and a manufacturing method thereof, and a photoelectric sensor and a manufacturing method thereof. The photoelectric detection structure comprises a substrate structure, wherein the surface of the substrate structure is a doped germanium layer with a first doping type; the stacked structure is located on the surface of the doped germanium layer and comprises an intrinsic absorption layer and a doped germanium-silicon layer with a second doping type, the intrinsic absorption layer and the doped germanium-silicon layer are sequentially arranged in the direction away from the substrate structure, the second doping type is different from the first doping type, the content of silicon in the doped germanium-silicon layer is gradually increased in the direction away from the substrate structure, and the content of silicon in the doped germanium-silicon layer is gradually increased in the direction away from the substrate structure. Therefore, the germanium-silicon layer with gradient components can be introduced to the top of the intrinsic absorption layer, a continuous energy band barrier and a slowly-changing built-in electric field are constructed, the dark noise characteristic, breakdown voltage and response efficiency of the photoelectric detection structure are remarkably improved, and the performance of the photoelectric detection structure is further improved.

Description

Technical Field

[0001] This application relates to the field of optoelectronic technology, and in particular to a photoelectric detection structure and its fabrication method, as well as a photoelectric sensor and its fabrication method. Background Technology

[0002] Short-wave infrared (SWIR, with a wavelength range of 1.0μm–1.7μm) spectral region, with its excellent atmospheric transmittance, low Rayleigh scattering and good imaging contrast, can achieve clear and stable imaging and detection under complex environmental conditions. It is widely used in high-end fields such as laser communication, night vision imaging, remote sensing monitoring, precision ranging, industrial inspection and biomedical imaging.

[0003] With the rapid development of demand for low-power, highly integrated, and multifunctional optoelectronic detection modules from intelligent sensing terminals, wearable devices, and artificial intelligence systems, the development of high-performance, low-noise, and easily integrated image sensors for the SWIR band has become an important development direction in the field of optoelectronics.

[0004] Among the available material systems, germanium (Ge), with its bandgap of 0.66 eV, has become one of the ideal materials for SWIR detection due to its efficient absorption in the 1.0 μm–1.7 μm wavelength range. Especially on CMOS platforms, germanium is not only non-toxic and environmentally friendly, but also epitaxially grown and possesses good compatibility with silicon electronic systems. In particular, the germanium-on-insulator (GOI) structure, by growing a high-quality Ge thin film on an oxide layer, achieves excellent thermal isolation and low noise characteristics, and can be integrated with silicon readout circuits (ROICs) on a single chip, greatly reducing system complexity and manufacturing costs, making it an important platform for building high-performance short-wave infrared detection systems. Therefore, how to further improve the performance of GOI detectors has become a research direction for those skilled in the art. Summary of the Invention

[0005] In view of the above problems, this application provides a photoelectric detection structure and its fabrication method, as well as a photoelectric sensor and its fabrication method, to improve the performance of photoelectric detection. The specific solutions are as follows:

[0006] A photoelectric detection structure, comprising:

[0007] A substrate structure, wherein the surface of the substrate structure is a doped germanium layer having a first doping type;

[0008] A stacked structure located on the surface of the substrate structure having the doped germanium layer, the stacked structure comprising an intrinsic absorption layer and a doped germanium-silicon layer having a second doping type arranged sequentially in a direction away from the substrate structure, the second doping type being different from the first doping type, and the silicon content in the doped germanium-silicon layer gradually increasing in a direction away from the substrate structure.

[0009] A groove located in the stacked structure, the groove exposing a portion of the germanium-doped layer;

[0010] A passivation layer covers the surface of the stacked structure away from the substrate structure and the surface of the groove. The passivation layer has a first via and a second via. The first via exposes a portion of the germanium-doped layer, and the second via exposes a portion of the germanium-silicon-doped layer.

[0011] A first electrode located in the first through hole and a second electrode located in the second through hole.

[0012] Optionally, the doped germanium-silicon layer includes a plurality of sub-doped germanium-silicon layers, wherein the silicon content in the plurality of sub-doped germanium-silicon layers gradually increases along the direction away from the substrate structure, and the silicon content in each sub-doped germanium-silicon layer is a fixed value.

[0013] Optionally, the proportion of germanium in each sub-doped germanium silicon layer in the doped germanium silicon layer ranges from 0.5 to 0.9, including the endpoint values, and the proportion of silicon ranges from 0.1 to 0.5, including the endpoint values.

[0014] Optionally, the germanium-silicon doped layer includes a first sub-doped germanium-silicon layer, a second sub-doped germanium-silicon layer, a third sub-doped germanium-silicon layer, a fourth sub-doped germanium-silicon layer, and a fifth sub-doped germanium-silicon layer arranged along a direction away from the substrate structure; wherein, in the first sub-doped germanium-silicon layer, germanium accounts for 0.9% and silicon accounts for 0.1%; in the second sub-doped germanium-silicon layer, germanium accounts for 0.8% and silicon accounts for 0.2%; in the third sub-doped germanium-silicon layer, germanium accounts for 0.7% and silicon accounts for 0.3%; in the fourth sub-doped germanium-silicon layer, germanium accounts for 0.6% and silicon accounts for 0.4%; and in the fifth sub-doped germanium-silicon layer, germanium accounts for 0.5% and silicon accounts for 0.5%.

[0015] Optionally, the total thickness of the doped germanium-silicon layer ranges from 100nm to 200nm; the thickness of each sub-doped germanium-silicon layer ranges from 10nm to 50nm.

[0016] Optionally, the intrinsic absorption layer is an intrinsic germanium layer, or an intrinsic germanium-tin layer, or a quantum well layer comprising an interleaved intrinsic germanium layer and an intrinsic germanium-silicon layer, or a quantum well layer comprising an interleaved intrinsic germanium layer and an intrinsic germanium-tin layer, or a quantum well layer comprising an intrinsic germanium layer and an intrinsic silicon-germanium-tin layer, or a quantum well layer comprising stacked intrinsic germanium-tin layers and intrinsic silicon-germanium-tin layers.

[0017] Optionally, the substrate structure includes a buried oxide layer and a doped germanium layer having a first doping type located on the surface of the buried oxide layer.

[0018] Optionally, the substrate structure further includes a substrate located on the side of the buried oxide layer away from the doped germanium layer, wherein the substrate is a silicon substrate, a glass substrate, or a sapphire substrate.

[0019] A photoelectric sensor, comprising:

[0020] The photodetector structure described in any of the preceding claims, and a readout circuit located on the side of the passivation layer in the photodetector structure away from the substrate structure, wherein the readout circuit is electrically connected to the first electrode and the second electrode.

[0021] A method for fabricating a photoelectric detection structure, used to fabricate the photoelectric detection structure described in any one of the above claims, the method comprising:

[0022] A substrate structure is fabricated, wherein the surface of the substrate structure is a doped germanium layer having a first doping type;

[0023] A stacked structure is fabricated on the surface of the substrate structure having the doped germanium layer. The stacked structure includes an intrinsic absorption layer and a doped germanium-silicon layer having a second doping type arranged sequentially in a direction away from the substrate structure. The second doping type is different from the first doping type, and the silicon content in the doped germanium-silicon layer gradually increases in a direction away from the substrate structure.

[0024] A groove is formed in the stacked structure, the groove exposing a portion of the germanium-doped layer;

[0025] A passivation layer is fabricated covering the surface of the stacked structure away from the substrate structure and the surface of the groove. The passivation layer has a first via and a second via. The first via exposes a portion of the germanium-doped layer, and the second via exposes a portion of the germanium-silicon-doped layer.

[0026] A first electrode is fabricated in the first through hole and a second electrode is fabricated in the second through hole.

[0027] Optionally, fabricating a stacked structure on the surface of the substrate structure having the doped germanium layer includes:

[0028] An intrinsic absorption layer is deposited on the surface of the substrate structure having the doped germanium layer;

[0029] Multiple sub-doped germanium-silicon layers are sequentially grown on the side of the intrinsic absorption layer away from the substrate structure. The silicon content in the multiple sub-doped germanium-silicon layers increases layer by layer, and the multiple sub-doped germanium-silicon layers constitute a doped germanium-silicon layer.

[0030] Optionally, fabricating a stacked structure on the surface of the substrate structure having the doped germanium layer includes:

[0031] Using Ge2H6 or Ge3H8 as the germanium source, an intrinsic absorption layer is deposited on the surface of the substrate structure having the doped germanium layer within a process temperature range of 400℃-500℃.

[0032] Using Ge2H6 or Ge3H8 as the germanium source and Si2H6 or Si3H8 as the silicon source, multiple sub-doped germanium-silicon layers are sequentially grown on the side of the intrinsic absorption layer away from the substrate structure within a process temperature range below 450°C.

[0033] Optionally, fabricating the substrate structure includes:

[0034] Provide a base;

[0035] An oxide layer is formed on the substrate;

[0036] An intrinsic germanium layer is formed on the side of the buried oxide layer away from the substrate;

[0037] The intrinsic germanium layer is subjected to ion doping of a first doping type to form a doped germanium layer having the first doping type.

[0038] Optionally, it may also include: removing part or all of the substrate.

[0039] A method for fabricating a photoelectric sensor, comprising:

[0040] Method for fabricating the photoelectric detection structure described in any of the above items;

[0041] In the photodetector structure, a readout circuit is fixed on the side of the passivation layer away from the substrate structure, and the readout circuit is electrically connected to the first electrode and the second electrode.

[0042] In the photodetector structure provided in this application embodiment, the silicon content in the doped germanium-silicon layer gradually increases along the direction away from the substrate structure, thereby introducing a germanium-silicon layer with a compositional gradient change on the top of the intrinsic absorption layer, constructing a continuous band barrier and a slowly varying built-in electric field, significantly improving the dark noise characteristics, breakdown voltage and response efficiency of the photodetector structure, and thus improving the performance of the photodetector structure. Attached Figure Description

[0043] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. Throughout the drawings, the same or similar reference numerals denote the same or similar elements. It should be understood that the drawings are schematic, and the originals and elements are not necessarily drawn to scale.

[0044] Figure 1 A schematic diagram of a photoelectric detection structure provided in this application;

[0045] Figure 2 A schematic diagram of another photoelectric detection structure provided in this application;

[0046] Figure 3 This application provides a schematic diagram of the structure of a photoelectric sensor;

[0047] Figure 4 A flowchart illustrating a method for fabricating a photoelectric detection structure provided in this application;

[0048] Figures 5-13 This is a schematic diagram of some of the structural components involved in the fabrication process of the photoelectric detection structure and photoelectric sensor provided in this application. Detailed Implementation

[0049] The embodiments of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0050] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the implementation methods provided in the embodiments of this application can be combined with each other without contradiction.

[0051] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0052] As described in the background section, how to further improve the performance of GOI detectors has become a research direction for those skilled in the art.

[0053] Currently, most GOI detectors employ traditional homogeneous PIN structures (P-Ge / I-Ge / N-Ge), constructing basic pixel units as vertically incident PIN photodiodes. This type of structure boasts high material uniformity, excellent epitaxial continuity, and high photoelectric conversion efficiency, and can be mass-produced using mature Ge growth and doping techniques. However, with increasingly demanding device performance requirements, traditional homogeneous GOI detectors are gradually revealing bottlenecks in device performance, structural controllability, and functional scalability, specifically including:

[0054] 1. Dark current is limited by surface thermal leakage mechanisms and is difficult to suppress further. This is because in pure Ge structures, the top P-type (or N-type) germanium layer is in direct contact with the metal electrode, lacking effective bandgap modulation to block the leakage channels of thermally excited charge carriers. As a result, charge carriers generated by surface thermal excitation easily leak through the interface in the vertical direction, forming vertical leakage paths. Consequently, the device still exhibits dark currents in the nA range or even higher under dark conditions, severely affecting low-light imaging and high signal-to-noise ratio applications. Since this mechanism is independent of material defects, even with high-quality epitaxial layers or optimized device packaging, the dark current is still difficult to reduce below nA, becoming a major obstacle to improving the low-light signal-to-noise ratio of the device.

[0055] 2. Abrupt changes in the junction electric field pose a risk of breakdown. This is because the abrupt structural changes at the doping interfaces between the P-region and I-region, and between the I-region and N-region, lead to a discontinuous and sharp change in the electric field distribution within the PIN. This can easily create local electric field peaks at the interfaces, and the concentration of these local electric fields can induce early breakdown and avalanche instability, especially under strong bias or high light flux conditions. Under high bias or strong light incidence conditions, this electric field concentration effect can induce early breakdown, avalanche gain instability, and even device damage, limiting the device's operating voltage range and reliability.

[0056] 3. Limited Structural Uniqueness and Functional Expansion: The fixed intrinsic band structure of Ge materials means that pure Ge homogeneous structures lack tunable bandgap gradients or built-in potentials. This limits the flexibility of pure Ge homogeneous structures in bandgap design, carrier manipulation, and functional expansion. It is difficult to achieve additional functions such as bandgap manipulation, polarization detection, broadband response, or electric field shaping through device structure. In other words, it cannot achieve functional expansions such as polarization selection, multi-band response, and charge control, making it difficult to meet the requirements of intelligent sensing and multi-modal detection. This restricts the application extension capabilities of devices in intelligent sensing systems and complex environment imaging. Furthermore, existing structures mainly rely on post-processing circuitry to complete complex functions, limiting the overall system's compactness and energy efficiency.

[0057] 4. Narrow process window limits device consistency and large-scale array fabrication. This is because traditional GOI detectors have strict requirements for Ge epitaxial quality and doping control, and poor structural tunability. As a result, there are significant performance fluctuations and limited yields between arrays during large-scale fabrication, which in turn affects the uniformity and robustness of the overall imaging system and restricts its promotion in high-resolution SWIR image sensors.

[0058] Therefore, current GOI shortwave infrared photodetectors face significant challenges in dark current control, electric field modulation, structural diversity, and array consistency. To meet the growing demands for SWIR high dynamic range imaging and intelligent sensing, there is an urgent need to develop a novel shortwave infrared photodetector with bandgap engineering capabilities, flexible structural control, dark current suppression mechanisms, functional expansion potential, and fabrication feasibility.

[0059] In view of this, embodiments of this application provide a photoelectric detection structure and its fabrication method, enabling the photoelectric detection structure to possess bandgap engineering capabilities, flexible structural control, dark current suppression mechanisms, functional expansion space, and mass production capability. It should be noted that, in embodiments of this application, the photoelectric detection structure includes at least one photodetector. If the photoelectric detection structure includes one photodetector, then the photoelectric detection structure is a single photodetector; if the photoelectric detection structure includes at least two photodetectors, then the photoelectric detection structure is a photodetector array.

[0060] Specifically, such as Figure 1 As shown, the photoelectric detection structure provided in this application embodiment includes:

[0061] Substrate structure 10, the surface of which is a doped germanium layer 12 having a first doping type;

[0062] A stacked structure 20 is located on the surface of the substrate structure 10 having the doped germanium layer 12. The stacked structure 20 includes an intrinsic absorption layer 21 arranged sequentially in a direction away from the substrate structure 10 and a doped germanium silicon layer 22 having a second doping type. The second doping type is different from the first doping type, and the silicon content in the doped germanium silicon layer 22 gradually increases in a direction away from the substrate structure 10.

[0063] A groove located in the stacked structure 20, the groove exposing a portion of the germanium-doped layer 12;

[0064] A passivation layer 30 covers the surface of the stacked structure 20 away from the substrate structure 10 and the surface of the groove. The passivation layer 30 has a first through hole and a second through hole. The first through hole exposes a portion of the germanium-doped layer 12, and the second through hole exposes a portion of the germanium-doped silicon layer 22.

[0065] A first electrode 41 located in the first through hole and a second electrode 42 located in the second through hole.

[0066] Based on the above embodiments, in one embodiment of this application, the intrinsic absorber layer 21 is an intrinsic germanium layer, or an intrinsic germanium-tin layer, or a quantum well layer comprising alternating intrinsic germanium and intrinsic germanium-silicon layers, or a quantum well layer comprising alternating intrinsic germanium and intrinsic germanium-tin layers, or a quantum well layer comprising intrinsic germanium and intrinsic silicon-germanium-tin layers, or a group IV semiconductor material structure comprising stacked intrinsic germanium-tin and intrinsic silicon-germanium-tin layers. The intrinsic absorber layer 21 comprising stacked intrinsic germanium-tin and intrinsic silicon-germanium-tin layers can be: a quantum well layer comprising alternating intrinsic germanium-tin and intrinsic silicon-germanium-tin layers, or it can consist of only these two layers; this application does not limit this, and it depends on the specific circumstances.

[0067] It should be noted that, in this embodiment, the thickness of the intrinsic absorption layer 21 should match the absorption depth of the SWIR light to maximize quantum efficiency. Optionally, the thickness of the intrinsic absorption layer 21 can range from 1000nm to 3000nm, but this application does not limit it and the specific value depends on the circumstances.

[0068] The photoelectric detection structure provided in the embodiments of this application will be described below, taking the intrinsic absorption layer 21 as an intrinsic germanium layer as an example.

[0069] Optionally, in one embodiment of this application, the first doping type is N-type and the second doping type is P-type, that is, the doped germanium layer 12 is an N-type doped germanium layer and the doped germanium silicon layer 22 is a P-type doped germanium silicon layer, so that the doped germanium silicon layer 22, the intrinsic absorption layer 21 and the doped germanium layer 12 form a PIN structure; in another embodiment of this application, the first doping type is P-type and the second doping type is N-type, that is, the doped germanium layer 12 is a P-type doped germanium layer and the doped germanium silicon layer 22 is an N-type doped germanium silicon layer, so that the doped germanium silicon layer 22, the intrinsic absorption layer 21 and the doped germanium layer 12 form a NIP structure. This application does not limit this, as long as the first doping type and the second doping type are different to form a complete photoelectric junction configuration.

[0070] In the photodetector structure provided in this application embodiment, the silicon content in the doped germanium-silicon layer 22 gradually increases along the direction away from the substrate structure 10, thereby introducing a germanium-silicon layer with a compositional gradient change on the top of the intrinsic absorption layer 21, constructing a continuous band barrier and a slowly varying built-in electric field, significantly improving the dark noise characteristics, breakdown voltage and response efficiency of the photodetector structure, and thus improving the performance of the photodetector structure.

[0071] It should be noted that in the photoelectric detection structure provided in this application embodiment, the performance of the photoelectric detection structure is improved by setting a doped germanium-silicon layer 22 with the silicon content gradually increasing along the direction away from the substrate structure 10. It has the scalability potential of bandgap modulation, self-shielding and polarization sensitive design. Specifically, the target function can be flexibly achieved by adjusting the number of sub-doped germanium-silicon layers, the composition ratio, thickness and doping concentration. It provides a structural support platform for multi-band detectors, polarization sensitive pixels and self-shielding structures. If combined with polarization selection structures or multicolor filters, it can be further extended to multi-band imaging, polarization detection or intelligent sensing chip integration, and has good system designability and application adaptability.

[0072] Based on the above embodiments, in one embodiment of this application, the doped germanium-silicon layer 22 includes a plurality of sub-doped germanium-silicon layers, the silicon content in the plurality of sub-doped germanium-silicon layers gradually increases along the direction away from the substrate structure 10, and the silicon content in each sub-doped germanium-silicon layer is a fixed value.

[0073] In the photoelectric detection structure provided in this application embodiment, the doped germanium-silicon layer 22 includes multiple sub-doped germanium-silicon layers. The silicon content in the multiple sub-doped germanium-silicon layers gradually increases along the direction away from the substrate structure 10, so that the tilted potential field formed by the multiple sub-doped germanium-silicon layers can guide the charge carriers under the action of the electric field, causing electrons or holes to drift rapidly into the intrinsic absorption layer 21, reducing recombination loss, improving the carrier drift efficiency, enhancing the response speed and sensitivity, and improving the photoelectric conversion efficiency, especially in weak light and high-speed response scenarios, it has significant advantages.

[0074] Optionally, in one embodiment of this application, the proportion of germanium in each sub-doped germanium-silicon layer of the germanium-doped silicon layer 22 ranges from 0.5 to 0.9, including the endpoints, and the proportion of silicon ranges from 0.1 to 0.5, including the endpoints. However, this application does not limit this, and it depends on the specific circumstances.

[0075] Specifically, in one embodiment of this application, the following continues... Figure 1As shown, the germanium-silicon doped layer 22 includes a first sub-doped germanium-silicon layer 221, a second sub-doped germanium-silicon layer 222, a third sub-doped germanium-silicon layer 223, a fourth sub-doped germanium-silicon layer 224, and a fifth sub-doped germanium-silicon layer 225 arranged along a direction away from the substrate structure 10; wherein, in the first sub-doped germanium-silicon layer 221, germanium accounts for 0.9% and silicon accounts for 0.1%; in the second sub-doped germanium-silicon layer 222, germanium accounts for 0.8% and silicon accounts for 0.2%; the third sub-doped germanium-silicon layer 224... In silicon layer 223, germanium accounts for 0.7% and silicon accounts for 0.3%; in the fourth sub-doped germanium-silicon layer 224, germanium accounts for 0.6% and silicon accounts for 0.4%; in the fifth sub-doped germanium-silicon layer 225, germanium accounts for 0.5% and silicon accounts for 0.5%, thus forming a multilayer GeSi buffer structure with silicon composition decreasing progressively along the direction towards the substrate structure 10. In this embodiment, the PIN structure in the photodetector structure, from top to bottom, is: P (or N)-Ge 0.5 Si 0.5 / Ge 0.6 Si 0.4 / Ge 0.7 Si 0.3 / Ge 0.8 Si 0.2 / Ge 0.9 Si 0.1 The / I-Ge (i.e., intrinsic absorption layer 21) / N (or P)-Ge heterostructure, while maintaining overall platform and process compatibility, introduces a continuous bandgap modulation mechanism, effectively constructing a multi-level barrier electric field region, thereby achieving several innovative breakthroughs in device performance, specifically including:

[0076] (1) Constructing a vertical barrier to effectively suppress surface thermally excited dark current: Specifically, the band gap in the germanium-silicon doped layer 22 increases with the increase of its silicon content, and the conduction band and valence band energy levels rise synchronously, thereby forming a continuous barrier region on the surface of the intrinsic absorption layer 21, forming an "uphill structure" in the band diagram, forming a physical carrier barrier on the top layer of the stacked structure 20, which can effectively prevent thermally excited electrons or holes at the P / N electrode interface from migrating to the intrinsic absorption layer, effectively suppressing surface hot carrier injection from a physical perspective, significantly weakening the surface-dominated hot leakage channel, and achieving a significant reduction in dark current. Compared with the traditional pure Ge homogeneous structure, the photoelectric detection structure provided in this application embodiment can achieve a lower dark current level without introducing an external passivation layer, thereby improving the detection sensitivity and image signal-to-noise ratio of the device under weak illumination conditions.

[0077] (2) Built-in gradually changing electric field, smooth potential transition, and suppress electric field spikes. Specifically, by changing the silicon composition gradient in the germanium-silicon layer 22, a gradually changing energy band is introduced in the stacked structure 20. Combined with doping transition control, the built-in electric field can achieve a spatially gradual distribution in the vertical direction, thereby making the electric field distribution between PIN structures continuously transition, eliminating the electric field spike phenomenon caused by abrupt interface in traditional PIN structures, significantly improving the device breakdown voltage threshold and voltage operating window, enhancing the device's breakdown resistance, and thus enhancing the long-term operating stability and electrical robustness of the device.

[0078] (3) Improve carrier drift efficiency and enhance response speed and sensitivity. Specifically, the multi-level doped germanium-silicon layer provides an additional potential slope in the band structure, forming a tilted potential field that guides the carriers, allowing photogenerated electrons or holes to obtain higher drift potential energy in the vertical direction and quickly drift into the intrinsic absorption layer 21, thereby improving the injection efficiency of photogenerated electrons or holes into the intrinsic region and reducing recombination losses. It should be noted that this structure not only reduces carrier recombination losses on the surface or buffer zone, but also shortens the transmission time and improves the transient response speed, quantum efficiency, and photoelectric conversion efficiency of the device. It has significant advantages, especially in weak light and high-speed response scenarios, and is particularly suitable for high frame rate imaging and fast optical communication scenarios.

[0079] Optionally, in one embodiment of this application, the total thickness of the germanium-silicon doped layer 22 ranges from 100nm to 200nm; the thickness of each sub-doped germanium-silicon layer ranges from 10nm to 50nm. However, this application does not limit this, and the specific thickness depends on the circumstances.

[0080] Based on any of the above embodiments, in one embodiment of this application, the substrate structure 10 includes a buried oxide layer 11 and a doped germanium layer 12 having a first doping type located on the surface of the buried oxide layer 11. Optionally, in one embodiment of this application, as... Figure 2 As shown, the substrate structure 10 further includes a substrate 13 located on the side of the buried oxide layer 11 away from the doped germanium layer 122. In one embodiment of this application, the substrate 13 is a silicon substrate, that is, the substrate structure 10 is a GOI structure; in another embodiment of this application, the substrate 13 is a glass substrate, that is, the substrate structure 10 further includes a glass substrate located on the side of the buried oxide layer 11 away from the doped germanium layer 12, in which case the substrate structure 10 is a GOG structure; in yet another embodiment of this application, the substrate 13 is a sapphire substrate, and the substrate structure 10 further includes a sapphire substrate located on the side of the buried oxide layer 11 away from the doped germanium layer 12, that is, the substrate structure 10 is a GOS structure. This application does not limit this, and it depends on the specific circumstances.

[0081] Based on the above embodiments, in one embodiment of this application, the buried oxide layer 11 is a silicon dioxide layer with a thickness ranging from 0.5 μm to 1.5 μm; the thickness of the doped germanium layer 12 ranges from 0.5 μm to 2 μm, but this application does not limit this and it depends on the specific circumstances.

[0082] Optionally, in one embodiment of this application, the passivation layer 30 is made of Si3N. x Al2O3, SiO2, or other dielectric materials may be used. However, this application does not limit the choice of dielectric materials; the specific choice depends on the circumstances. It should be noted that, in this embodiment, the passivation layer 30 helps to suppress the existence of surface states and interface recombination centers, reduce surface leakage current, and improve the device's dark current control capability and long-term stability.

[0083] Optionally, in one embodiment of this application, the first electrode 41 is a metal electrode. Further, the first electrode 41 includes a stacked Ti electrode layer, a Pt electrode layer, and an Au electrode layer to achieve ohmic contact between the first electrode 41 and the germanium-doped layer 12. However, this application is not limited to this. In other embodiments of this application, the first electrode 41 can also be made of other materials, as long as the first electrode 41 has good adhesion and low contact resistance.

[0084] Optionally, in one embodiment of this application, the second electrode 42 is a metal electrode. Further, the second electrode 42 may include a stacked Ni electrode layer and an Au electrode layer, or a stacked Pt electrode layer and an Au electrode layer, etc., to improve the electrical contact performance of the second electrode 42.

[0085] In another embodiment of this application, the second electrode 42 is at least partially transparent to minimize the obstruction of light flux, so that the photodetector structure can support back-illuminated incident light. Optionally, the second electrode 42 is a transparent electrode, such as an ITO electrode, but this application does not limit it and it depends on the specific circumstances.

[0086] Accordingly, this application also provides a photoelectric sensor, which includes the photoelectric detection structure provided in any of the above embodiments. Optionally, in this embodiment, as... Figure 3 As shown, the photoelectric sensor further includes a readout circuit 50 located on the side of the passivation layer 30 away from the stacked structure 20 in the photoelectric detection structure, and the readout circuit 50 is electrically connected to the first electrode 41 and the second electrode 42.

[0087] Specifically, in one embodiment of this application, the readout circuit 50 is provided with a protruding electrode 51 on the side facing the passivation layer 30, so as to realize a fixed electrical connection between the readout circuit 50 and the photoelectric detection structure through the bonding of the protruding electrode 51 with the first electrode 41 and the second electrode 42. However, this application does not limit this, and it depends on the specific situation.

[0088] Since the photoelectric sensor includes the photoelectric detection structure provided in any of the above embodiments, the photoelectric sensor also possesses the advantages of the photoelectric detection structure. Specifically, the photoelectric detection structure and photoelectric sensor provided in the embodiments of this application have significant advantages in terms of material design, bandgap control, device performance, and process compatibility, which are specifically reflected in the following aspects:

[0089] 1. Significantly reduces dark current and improves low-light performance. Specifically, by introducing a multi-level GeSi barrier structure with gradually increasing Si composition at the top of the intrinsic absorption layer 21, a continuously rising barrier ladder is constructed in the band structure. This multi-level structure is equivalent to forming multiple "anti-potential traps" for thermally excited carriers in the band diagram, which can effectively prevent thermally excited electrons or holes from being injected or leaking from the second electrode on the surface into the absorption region, thereby significantly suppressing the surface-dominated thermal leakage current. This further compresses the nA-level dark current in traditional GOI detectors to a lower order of magnitude, making it particularly suitable for imaging conditions with low light and long integration times, thus improving the system's signal-to-noise ratio and imaging quality.

[0090] 2. Optimizing the junction electric field distribution improves breakdown voltage and device stability. Specifically, by combining the gradual transition of GeSi composition with doping control, a gradual transition of the longitudinal potential is achieved, thus avoiding the electric field spike problem caused by abrupt doping changes in traditional PIN structures. This structure significantly improves the uniformity of the built-in electric field of the device, effectively avoiding premature breakdown and avalanche discharge phenomena caused by local electric field enhancement, increasing the upper limit of the device's operating voltage, and enhancing the device's operating stability and long-term reliability.

[0091] 3. Improve response speed and carrier collection efficiency. Specifically, by introducing a multi-level GeSi barrier structure with gradually increasing Si composition at the top of the intrinsic absorption layer 21, not only is surface hot carrier injection suppressed, but also a drift-assisting field is introduced into the band structure. The band tilt caused by the band gap difference of different levels of GeSi barrier structure can help accelerate the entry of carriers into the intrinsic absorption layer 21, which helps to shorten the response time, reduce recombination loss, and improve the detector (D*) and responsivity (R) of the device.

[0092] 4. Achieving a CMOS-compatible process path reduces process complexity and cost. Specifically, the photodetector structure provided in this application is entirely built on a traditional GOI platform. Both the Ge and GeSi material systems used can be epitaxially grown using low-temperature CVD or MBE processes, eliminating the need for external materials, wafer bonding, or non-CMOS-compatible high-temperature processes. Therefore, it exhibits excellent process integrability and low thermal budget characteristics. Furthermore, this structure can be integrated and bonded to mature CMOS readout circuits (ROIC) using standard microbump technology, facilitating large-scale fabrication and system-level integration, and possessing high engineering feasibility.

[0093] 5. The structure has strong scalability, which is conducive to functional expansion and array integration. Specifically, by introducing a multi-level GeSi barrier structure with gradually increasing Si composition at the top of the intrinsic absorption layer 21, it has high tunability in terms of composition ratio, doping type, number of layers and thickness, and has good structural flexibility. It provides a physical basis for subsequent expansion of functions such as polarization detection, bandgap control and multicolor response. The band structure and photoelectric properties can be adjusted according to different application requirements, which is particularly suitable for complex application scenarios such as wearable smart sensing and high-resolution short-wave infrared imaging.

[0094] 6. Applicable to back-illuminated structures, enhancing short-wave infrared coupling efficiency. Specifically, when the substrate structure 10 does not include the substrate, a back-illuminated structure can be formed, allowing incident light to directly pass through the buried oxide layer from the back side and reach the absorption region, effectively improving the device's coupling efficiency for short-wave infrared. This structure is particularly suitable for high-resolution imaging arrays and miniaturized systems.

[0095] 7. Significantly optimized optical coupling and quantum efficiency: From an optical performance perspective, the photoelectric detection structure possesses the following optical advantages:

[0096] (1) Effectively suppressing surface reflection and enhancing light absorption efficiency. This is because the refractive index of the multi-level GeSi layer is between Si and Ge, forming a refractive index transition structure. Equivalent gradient refractive index matching is achieved in the light incident path, thereby significantly reducing Fresnel reflection at the interface between Ge and air (or medium), increasing the number of short-wave infrared photons that can effectively penetrate the absorption layer, and enhancing the external quantum efficiency (EQE) of the device.

[0097] (2) The basis for forming a resonant cavity / interference enhancement structure is that the thickness control of the multilayer GeSi layer can be introduced in the subsequent structure to realize the "interference cavity" or "enhanced absorption cavity". The optical path design enhances the light absorption capability of a specific wavelength range, improves the spectral selectivity and detection sensitivity, and is beneficial to target band enhancement or background suppression.

[0098] (3) Reduced free carrier absorption and light scattering loss. This is because the increase in Si composition will lead to an increase in band gap, which reduces the probability of high-energy photons being absorbed by surface free carriers, helps to suppress surface layer parasitic absorption and light scattering, and improves the device's net optical response capability in the near-infrared band.

[0099] (4) It is conducive to polarization control and integrated grating design (expandable). This is because the multi-level GeSi structure provides a physical basis for the future introduction of grating polarization filtering, surface plasmon structure, etc. on the top, which can be expanded into new optical functional devices such as on-chip polarization sensitive detectors and bandpass filter type SWIR sensors.

[0100] In summary, the photoelectric detection structure and photoelectric sensor provided in this application, by introducing a GeSi layer with multi-level silicon composition decreasing near the substrate structure direction, effectively shields against surface thermally excited carrier leakage, significantly reducing dark current density (from 10). -9 A / cm 2 Reduced to 10 -11 A / cm 2 (The following) At the same time, a built-in gradually changing electric field region is constructed to suppress the electric field spike in the junction region and improve the breakdown voltage and device stability. In addition, the multi-level silicon composition decreasing GeSi layer can also improve optical coupling, enhance external quantum efficiency, and has good process compatibility and functional expansion potential, showing significant advantages in short-wave infrared low noise and high sensitivity detection.

[0101] Furthermore, this application also provides a method for fabricating a photoelectric detection structure, used to fabricate the photoelectric detection structure provided in any of the above embodiments. For example... Figure 4 As shown, the manufacturing method includes:

[0102] S1: Fabricate a substrate structure, wherein the surface of the substrate structure is a doped germanium layer having a first doping type.

[0103] Optionally, in one embodiment of this application, such as Figure 5 As shown, fabricating the substrate structure 10 includes: providing a substrate 13; forming a buried oxide layer 11 on the substrate 13; forming an intrinsic germanium layer on the side of the buried oxide layer 11 away from the substrate 13; and performing ion doping of the intrinsic germanium layer with a first doping type to form a doped germanium layer 12 having the first doping type.

[0104] Optionally, in one embodiment of this application, the substrate 13 is a silicon substrate and the substrate structure 10 is a GOI substrate structure; in another embodiment of this application, the substrate 13 is a glass substrate and the substrate structure 10 is a GOG substrate structure; in yet another embodiment of this application, the substrate 13 is a sapphire substrate and the substrate structure 10 is a GOS substrate structure. The following description uses a silicon substrate as an example to illustrate the fabrication method of the photoelectric detection structure provided in the embodiments of this application.

[0105] It should be noted that, in this embodiment, the structure formed by the substrate, the buried oxide layer, and the intrinsic germanium layer is a GOI wafer. Since the GOI platform has good CMOS compatibility, optically transparent bottom structure, and insulation characteristics, in an optional embodiment of this application, a high-quality Ge-on-Insulator (GOI) wafer is selected as the starting substrate for the device to provide the basic conditions for the subsequent back-illuminated imaging structure.

[0106] Based on the above embodiments, in one embodiment of this application, the buried oxide layer is a silicon dioxide layer with a thickness ranging from 0.5 μm to 1.5 μm; the thickness of the intrinsic germanium layer ranges from 0.5 μm to 2 μm. This application does not limit this, and the specific thickness depends on the circumstances.

[0107] Optionally, in one embodiment of this application, performing ion doping of the intrinsic germanium layer with a first doping type to form a doped germanium layer 12 with the first doping type includes: using ion implantation or doping diffusion process (preferably ion implantation) to perform N-type ion doping or P-type ion doping (e.g., using phosphorus, arsenic, or boron ions) on the intrinsic germanium layer to form a doped germanium layer 12 with the first doping type, thereby forming a contact region of an electrode in the device structure, providing a doping basis for subsequent PIN or NIP structures. It should be noted that in this embodiment, when performing ion doping of the intrinsic germanium layer with the first doping type, the doping energy and dosage need to be precisely controlled according to the required junction depth and conductivity, and combined with appropriate annealing treatment to restore crystal integrity.

[0108] S2: A stacked structure is formed on the surface of the substrate structure having the doped germanium layer. The stacked structure includes an intrinsic absorption layer and a doped germanium-silicon layer having a second doping type arranged sequentially in a direction away from the substrate structure. The second doping type is different from the first doping type, and the silicon content in the doped germanium-silicon layer 22 gradually increases in a direction away from the substrate structure.

[0109] Optionally, in one embodiment of this application, such as Figure 6 As shown, fabricating a stacked structure 20 on the surface of the substrate structure 10 having the doped germanium layer 12 includes:

[0110] An intrinsic absorption layer 21 is deposited on the surface of the substrate structure 10 having the germanium-doped layer 12;

[0111] Multiple sub-doped germanium-silicon layers are sequentially grown on the side of the intrinsic absorption layer 21 away from the substrate structure 10, with the silicon content in the multiple sub-doped germanium-silicon layers increasing layer by layer, and the multiple sub-doped germanium-silicon layers constitute the doped germanium-silicon layer 22.

[0112] Based on the above embodiments, in one embodiment of this application, depositing an intrinsic absorption layer 21 on the surface of the substrate structure 10 having the doped germanium layer 12 includes:

[0113] Using Ge2H6 or Ge3H8 as the germanium source, an intrinsic absorption layer 21 is deposited on the surface of the substrate structure 10 having the doped germanium layer 12 within a process temperature range of 400℃-500℃ to ensure crystal quality and interface continuity.

[0114] Specifically, in one embodiment of this application, a low-temperature chemical vapor deposition (CVD) or molecular beam epitaxy (MBE) method is used, employing Ge2H6 or Ge3H8 as the germanium source, to deposit an intrinsic absorption layer 21 on the surface of the substrate structure 10 having the doped germanium layer 12, serving as the main light absorption region, within a process temperature range of 400℃-500℃. It should be noted that in this embodiment, the thickness of the intrinsic absorption layer 21 should match the absorption depth of the SWIR light to maximize quantum efficiency. Optionally, the thickness of the intrinsic absorption layer 21 can range from 1000nm to 3000nm, but this application does not limit this value; it depends on the specific circumstances.

[0115] Based on any of the above embodiments, in one embodiment of this application, the sequential growth of multiple sub-doped germanium-silicon layers on the side of the intrinsic absorption layer 21 away from the substrate structure 10 includes: using Ge2H6 or / and Ge3H8 as the germanium source and Si2H6 or / and Si3H8 as the silicon source, and sequentially growing multiple sub-doped germanium-silicon layers on the side of the intrinsic absorption layer 21 away from the substrate structure 10 within a process temperature range below 450°C.

[0116] Specifically, in one embodiment of this application, a low-temperature heteroepitaxial technique is used, employing Ge2H6 or / and Ge3H8 as the germanium source and Si2H6 or / and Si3H8 as the silicon source. Within a process temperature range below 450°C, multiple Si composition increment-doped germanium-silicon layers are sequentially grown on the side of the intrinsic absorber layer 21 away from the substrate structure 10, so as not to affect the interface quality between the germanium-doped layer 12 and the buried oxide layer 11 in the substrate structure 10, and to ensure the integrity and functionality of the heterolayer.

[0117] In the method for fabricating the photodetector structure provided in this application embodiment, the silicon content in the doped germanium-silicon layer 22 gradually increases along the direction away from the substrate structure 10, thereby introducing a germanium-silicon buffer with a compositional gradient change at the top of the intrinsic absorption layer 21, constructing a continuous band barrier and a slowly varying built-in electric field, significantly improving the dark noise characteristics, breakdown voltage and response efficiency of the photodetector structure, and thus improving the performance of the photodetector structure.

[0118] Moreover, in the method for fabricating the photoelectric detection structure provided in this application embodiment, the formation process of the doped germanium-silicon layer 22 is compatible with the existing low-temperature GeSi epitaxial technology, thereby avoiding the introduction of high-temperature or heterogeneous bonding processes during the fabrication process. The process path is clear and highly controllable, making it suitable for large-scale array fabrication and improving system reliability and industrial feasibility.

[0119] Based on the above embodiments, in one embodiment of this application, the doped germanium-silicon layer 22 includes a plurality of sub-doped germanium-silicon layers, the silicon content in the plurality of sub-doped germanium-silicon layers gradually increases along the direction away from the substrate structure 10, and the silicon content in each sub-doped germanium-silicon layer 12 is a fixed value.

[0120] Optionally, in one embodiment of this application, the thickness of each of the sub-doped germanium-silicon layers ranges from 10nm to 50nm, and the total thickness of the doped germanium-silicon layers 22 ranges from 100nm to 200nm. However, this application does not limit this and the specific thickness depends on the circumstances.

[0121] Based on any of the above embodiments, in one embodiment of this application, the first doping type is N-type and the second doping type is P-type, that is, the doped germanium layer 12 is an N-type doped germanium layer and the doped germanium silicon layer 22 is a P-type doped germanium silicon layer, so that the doped germanium silicon layer 22, the intrinsic absorption layer 21 and the doped germanium layer 12 form a PIN structure; in another embodiment of this application, the first doping type is P-type and the second doping type is N-type, that is, the doped germanium layer 12 is a P-type doped germanium layer and the doped germanium silicon layer 22 is an N-type doped germanium silicon layer, so that the doped germanium silicon layer 22, the intrinsic absorption layer 21 and the doped germanium layer 12 form a NIP structure. This application does not limit this, as long as the first doping type and the second doping type are different to form a complete photoelectric junction configuration.

[0122] Optionally, in one embodiment of this application, the proportion of germanium in each sub-doped germanium-silicon layer of the germanium-doped silicon layer 22 ranges from 0.5 to 0.9, including the endpoints, and the proportion of silicon ranges from 0.1 to 0.5, including the endpoints. However, this application does not limit this, and it depends on the specific circumstances.

[0123] Specifically, in one embodiment of this application, the germanium-silicon doped layer 22 includes a first sub-doped germanium-silicon layer 221, a second sub-doped germanium-silicon layer 222, a third sub-doped germanium-silicon layer 223, a fourth sub-doped germanium-silicon layer 224, and a fifth sub-doped germanium-silicon layer 225 arranged along a direction away from the substrate structure 10; wherein, in the first sub-doped germanium-silicon layer 221, germanium accounts for 0.9% and silicon accounts for 0.1%; in the second sub-doped germanium-silicon layer 222, germanium accounts for 0.8% and silicon accounts for 0.2%. In the third sub-doped germanium-silicon layer 223, germanium accounts for 0.7% and silicon accounts for 0.3%; in the fourth sub-doped germanium-silicon layer 224, germanium accounts for 0.6% and silicon accounts for 0.4%; in the fifth sub-doped germanium-silicon layer 225, germanium accounts for 0.5% and silicon accounts for 0.5%, thus forming a multilayer GeSi buffer structure with silicon composition decreasing progressively along the direction towards the substrate structure 10. In this embodiment, the PIN structure in the photodetector structure, from top to bottom, is: P (or N)-Ge 0.5 Si 0.5 / Ge 0.6 Si 0.4 / Ge 0.7 Si 0.3 / Ge 0.8 Si 0.2 / Ge 0.9 Si 0.1 / I-Ge (i.e., intrinsic absorption layer 21) / N (or P)-Ge.

[0124] It should be noted that, in this embodiment, the silicon composition in the germanium-silicon doped layer 22 gradually increases along the direction away from the substrate structure 10. This not only widens the band gap of the germanium-silicon doped layer 22 and forms a "multi-level energy barrier" within it, with the energy band gradually rising to effectively prevent thermally excited electrons / holes from migrating vertically from the electrode to the absorption region, but also allows for a gradual transition in potential through the gradual change in silicon composition, achieving a uniform electric field distribution, avoiding electric field spikes in the junction region, and improving the breakdown voltage. Furthermore, the gradual increase in silicon composition in the germanium-silicon doped layer 22 along the direction away from the substrate structure 10 also enhances the drift field, thereby increasing carrier migration speed and improving response speed and quantum efficiency.

[0125] It should also be noted that, in this embodiment, the fabrication method of the photoelectric detection structure can further support functional structural expansion such as multicolor detection, polarization response control and bandgap engineering by adjusting the number of sub-doped germanium silicon layers, the rate of change of composition and the doping strategy in the doped germanium silicon layer 22, so that the photoelectric detection structure has highly scalable system integration potential.

[0126] S3: A groove is formed in the stacked structure, the groove exposing a portion of the germanium-doped layer.

[0127] Optionally, in one embodiment of this application, such as Figure 7 As shown, the process of creating the groove 23 in the stacked structure 20 includes: using standard photolithography and dry etching techniques (such as ICP or RIE) to define the pattern of the stacked structure 20 and form the groove 23, so that the bottom of the groove 23 with different heights and the surface of the stacked structure 20 form a mesa structure of the pixel unit and the groove 23 is used as an isolation trench to ensure electrical isolation and optical integrity between array pixels.

[0128] S4: Fabricate a passivation layer covering the surface of the stacked structure away from the substrate structure and the surface of the groove. The passivation layer has a first via and a second via. The first via exposes a portion of the germanium-doped layer, and the second via exposes a portion of the germanium-silicon-doped layer.

[0129] Optionally, in one embodiment of this application, such as Figure 8 and Figure 9 As shown, a passivation layer 30 is fabricated covering the surface of the stacked structure 20 away from the substrate structure 10 and the surface of the groove. The passivation layer 30 has a first through-hole 31 and a second through-hole 32, including:

[0130] like Figure 8 As shown, a high-quality passivation layer 30 is deposited on the surface of the stacked structure 20 away from the substrate structure 10 and on the surface of the groove using a deposition process. Optionally, the deposition process can be atomic layer deposition (ALD) or plasma-enhanced CVD (PECVD). This application does not limit this process and it depends on the specific circumstances.

[0131] like Figure 9 As shown, the portion of the passivation layer 30 located at the bottom of the groove and the portion of the passivation layer 30 located on the surface of the stacked structure 20 are etched to form a first via 31 and a second via 32. The first via 31 exposes a portion of the germanium-doped layer 12, and the second via 32 exposes a portion of the germanium-silicon-doped layer 22.

[0132] It should be noted that in the embodiments of this application, the first through hole 31 and the second through hole 32 can be formed by the same etching process to simplify the process flow of the photoelectric detection structure. However, this application does not limit this. In other embodiments of this application, the first through hole 31 and the second through hole 32 can also be formed by different etching processes, depending on the specific circumstances.

[0133] Optionally, in one embodiment of this application, the passivation layer 30 is made of Si3N. x Al2O3, SiO2, or other dielectric materials. However, this application does not limit this to any particular type; the choice depends on the specific circumstances.

[0134] It should be noted that, in this embodiment, the passivation layer 30 helps to suppress the existence of surface states and interface recombination centers, reduce surface leakage current, and improve the device's dark current control capability and long-term stability.

[0135] S5: Fabricate a first electrode in the first through hole and a second electrode in the second through hole.

[0136] Specifically, in one embodiment of this application, such as Figure 10 As shown, fabricating the first electrode 41 within the first through-hole includes: forming a first electrode 41 that fills the first through-hole through a deposition process. Optionally, in one embodiment of this application, the first electrode 41 may further extend to cover a portion of the surface of the passivation layer 30 to increase the electrical contact area between the first electrode 41 and the back-end circuit. This application does not limit this, and it depends on the specific circumstances.

[0137] Optionally, in one embodiment of this application, the first electrode 41 is a metal electrode. Further, the first electrode 41 includes a stacked Ti electrode layer, a Pt electrode layer, and an Au electrode layer to achieve ohmic contact between the first electrode 41 and the germanium-doped layer 12. However, this application is not limited to this. In other embodiments of this application, the first electrode 41 can also be made of other materials, as long as the first electrode 41 has good adhesion and low contact resistance.

[0138] Based on any of the above embodiments, in one embodiment of this application, the following continues... Figure 10 As shown, fabricating a second electrode 42 within the second via includes forming a second electrode 42 that fills the second via in the area of ​​the germanium-doped layer 12 exposed by the second via. Optionally, in one embodiment of this application, the second electrode 42 may extend to cover a portion of the surface of the passivation layer 30 to increase the contact area between the second electrode 42 and the back-end circuit. This application does not limit this, and it depends on the specific circumstances.

[0139] Specifically, in one embodiment of this application, the second electrode 42 is fabricated within the second via using a lift-off or post-etch deposition method to define the pattern of the second electrode 42. It should be noted that the lift-off process is a commonly used technique in semiconductor manufacturing and other applications. The specific steps include: coating a photoresist onto a substrate and exposing it to form the desired pattern; depositing metal or other materials on the photoresist; and removing the photoresist using a stripper or mechanical method, thereby leaving a metal structure consistent with the pattern. The advantage of this process is that it eliminates the etching step.

[0140] Optionally, in one embodiment of this application, the second electrode 42 is a metal electrode. Further, the second electrode 42 may include a stacked Ni electrode layer and an Au electrode layer, or a stacked Pt electrode layer and an Au electrode layer, etc., to improve the electrical contact performance of the second electrode 42.

[0141] In another embodiment of this application, the second electrode 42 is at least partially transparent to minimize the obstruction of light flux, so that the photodetector structure can support back-illuminated incident light. Optionally, the second electrode 42 is a transparent electrode, such as an ITO electrode, but this application does not limit it and it depends on the specific circumstances.

[0142] Optionally, in one embodiment of this application, the manufacturing method includes:

[0143] like Figure 11 As shown, the passivation layer 30 located at the bottom of the groove is etched to expose the germanium-doped layer 12, forming a first through hole, and a first electrode 41 is formed in the first through hole, so that the first through hole and the first electrode 41 can use the same mask, thereby reducing the process cost of the photoelectric detection structure.

[0144] Continue as Figure 10 As shown, the portion of the passivation layer 30 located on the surface of the stacked structure 20 is etched to expose the doped germanium-silicon layer 22, forming a second via. A second electrode 42 is formed within the second via, allowing the second via and the second electrode 42 to utilize the same mask, thus reducing the manufacturing cost of the photodetector structure. Specifically, in this embodiment, the first and second vias are formed in two etching steps. The first via and the first electrode 41 are formed using the same mask, and the second via and the second electrode 42 are formed using the same mask. Specifically, after etching to form the first via, the first electrode 41 is formed directly using the same mask; then, a different mask is used to etch to form the second via; after forming the second via, the second electrode 42 is formed directly using the same mask. However, this application does not limit this process; the specific method depends on the circumstances.

[0145] As can be seen from the above, the method for fabricating the photoelectric detection structure provided in the embodiments of this application can be realized on the GOI platform using conventional low-temperature epitaxy technology. It does not require the introduction of additional complex bonding, peeling, or heterogeneous material transfer processes, and has good CMOS process compatibility and thermal budget friendliness. Thus, this fabrication method can be naturally embedded into the existing optoelectronic device fabrication process, with high process feasibility and scalability. It is easy to extend to the fabrication of high-density two-dimensional arrays, improve array consistency and mass production yield, and provide systematic technical support for building a new generation of high-performance, low-power, multifunctional short-wave infrared image sensors. It has broad engineering application prospects and industrialization value.

[0146] Accordingly, this application also provides a method for fabricating a photoelectric sensor, which includes: the method for fabricating the photoelectric detection structure provided in any of the above embodiments. Optionally, in this embodiment, as... Figure 12 As shown, the fabrication method further includes fixing a readout circuit 50 on the side of the passivation layer 30 away from the stacked structure 20 in the photoelectric detection structure, wherein the readout circuit 50 is electrically connected to the first electrode 41 and the second electrode 42.

[0147] Specifically, in one embodiment of this application, the following continues... Figure 12 As shown, the readout circuit 50 has a protruding electrode 51 on the side facing the passivation layer 30, so as to realize the fixed electrical connection between the readout circuit 50 and the photoelectric detection structure through the bonding of the protruding electrode 51 with the first electrode 41 and the second electrode 42. However, this application does not limit this, and it depends on the specific situation.

[0148] Optionally, in one embodiment of this application, fixing the readout circuit on the side of the passivation layer 30 away from the stacked structure 20 includes: bonding the aforementioned photodetector structure and the CMOS readout circuit (ROIC) together via microbumps (such as In or Cu). It should be noted that in this embodiment, the bonding structure supports high-density array connections and can be used to complete chip-level interconnection using hot-pressing or reflow soldering processes, making it suitable for high frame rate infrared imaging applications.

[0149] Based on any of the above embodiments, in one embodiment of this application, such as Figure 13 As shown, the manufacturing method further includes: removing at least a portion of the substrate.

[0150] Optionally, in one embodiment of this application, to enable the photodetector structure to support back-illuminated incident light, the method includes removing the substrate in the substrate structure 10 by mechanical grinding, chemical mechanical polishing (CMP), or selective etching (such as TMAH, XeF2). However, this application is not limited to this. In other embodiments of this application, the fabrication method may also retain part of the substrate according to the device support strength and transmittance requirements, optimize the incident window performance, and ultimately form a detector structure that can support high-sensitivity short-wave infrared back-illuminated imaging.

[0151] It should be noted that, in this embodiment, the process of removing at least a portion of the substrate can be incorporated into the fabrication method of the photoelectric sensor or the fabrication method of the photoelectric detection structure. This application does not limit this, and it depends on the specific circumstances.

[0152] As can be seen from the above, the photoelectric detection structure fabricated by the method for fabricating the photoelectric detection structure and the photoelectric sensor fabricated by the method for fabricating the photoelectric sensor provided in this application have significant improvements and practical application value in multiple dimensions such as materials engineering, structural design, electrical performance and process implementation. Without sacrificing platform compatibility, it can effectively overcome the technical bottlenecks of existing GOI detectors in terms of dark current control, electric field distribution, structural tunability and array consistency. It systematically solves the multi-objective contradiction between dark current, electric field control and response efficiency, and exhibits excellent comprehensive performance indicators and controllability. It provides a stable, low-noise and low-power solution for the next generation of high-performance shortwave infrared detectors and has broad engineering application prospects and industrialization potential.

[0153] The various embodiments in this specification are described in a progressive, parallel, or combined manner. Each embodiment focuses on its differences from other embodiments, and similar or identical parts between embodiments can be referred to interchangeably. For the apparatuses disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple, and relevant parts can be referred to the method section.

[0154] It should be noted that, in the description of this application, the accompanying drawings and embodiments are illustrative rather than restrictive. The same reference numerals throughout the embodiments identify the same structures. It should also be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or device comprising a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or device. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in an article or device comprising the aforementioned element.

[0155] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A photoelectric detection structure, characterized in that, include: A substrate structure, wherein the surface of the substrate structure is a doped germanium layer having a first doping type; A stacked structure located on the surface of the substrate structure having the doped germanium layer, the stacked structure comprising an intrinsic absorption layer and a doped germanium-silicon layer having a second doping type arranged sequentially in a direction away from the substrate structure, the second doping type being different from the first doping type, and the silicon content in the doped germanium-silicon layer gradually increasing in a direction away from the substrate structure. A groove located in the stacked structure, the groove exposing a portion of the germanium-doped layer; A passivation layer covers the surface of the stacked structure away from the substrate structure and the surface of the groove. The passivation layer has a first via and a second via. The first via exposes a portion of the germanium-doped layer, and the second via exposes a portion of the germanium-silicon-doped layer. A first electrode located in the first through hole and a second electrode located in the second through hole.

2. The photoelectric detection structure according to claim 1, characterized in that, The doped germanium-silicon layer includes multiple sub-doped germanium-silicon layers, wherein the silicon content in the multiple sub-doped germanium-silicon layers gradually increases along the direction away from the substrate structure, and the silicon content in each sub-doped germanium-silicon layer is a fixed value.

3. The photoelectric detection structure according to claim 2, characterized in that, The proportion of germanium in each sub-doped germanium silicon layer in the doped germanium silicon layer ranges from 0.5 to 0.9, including the endpoint values, and the proportion of silicon ranges from 0.1 to 0.5, including the endpoint values.

4. The photoelectric detection structure according to claim 3, characterized in that, The germanium-silicon doped layer includes a first sub-doped germanium-silicon layer, a second sub-doped germanium-silicon layer, a third sub-doped germanium-silicon layer, a fourth sub-doped germanium-silicon layer, and a fifth sub-doped germanium-silicon layer arranged along a direction away from the substrate structure; wherein, in the first sub-doped germanium-silicon layer, germanium accounts for 0.9% and silicon accounts for 0.1%; in the second sub-doped germanium-silicon layer, germanium accounts for 0.8% and silicon accounts for 0.2%; in the third sub-doped germanium-silicon layer, germanium accounts for 0.7% and silicon accounts for 0.3%; in the fourth sub-doped germanium-silicon layer, germanium accounts for 0.6% and silicon accounts for 0.4%; and in the fifth sub-doped germanium-silicon layer, germanium accounts for 0.5% and silicon accounts for 0.5%.

5. The photoelectric detection structure according to claim 4, characterized in that, The total thickness of the doped germanium-silicon layer ranges from 100nm to 200nm; the thickness of each sub-doped germanium-silicon layer ranges from 10nm to 50nm.

6. The photoelectric detection structure according to claim 1, characterized in that, The intrinsic absorption layer is an intrinsic germanium layer, or an intrinsic germanium-tin layer, or a quantum well layer comprising an interleaved intrinsic germanium layer and an intrinsic germanium-silicon layer, or a quantum well layer comprising an interleaved intrinsic germanium layer and an intrinsic germanium-tin layer, or a quantum well layer comprising an intrinsic germanium layer and an intrinsic silicon-germanium-tin layer, or a quantum well layer comprising stacked intrinsic germanium-tin layers and intrinsic silicon-germanium-tin layers.

7. The photoelectric detection structure according to claim 1, characterized in that, The substrate structure includes a buried oxide layer and a doped germanium layer with a first doping type located on the surface of the buried oxide layer.

8. The photoelectric detection structure according to claim 7, characterized in that, The substrate structure also includes a substrate located on the side of the buried oxide layer away from the doped germanium layer, wherein the substrate is a silicon substrate, a glass substrate, or a sapphire substrate.

9. A photoelectric sensor, characterized in that, include: The photodetector structure according to any one of claims 1-8, and a readout circuit located on the side of the passivation layer away from the substrate structure in the photodetector structure, the readout circuit being electrically connected to the first electrode and the second electrode.

10. A method for fabricating a photoelectric detection structure, characterized in that, The method for fabricating the photoelectric detection structure according to any one of claims 1-8 comprises: A substrate structure is fabricated, wherein the surface of the substrate structure is a doped germanium layer having a first doping type; A stacked structure is fabricated on the surface of the substrate structure having the doped germanium layer. The stacked structure includes an intrinsic absorption layer and a doped germanium-silicon layer having a second doping type arranged sequentially in a direction away from the substrate structure. The second doping type is different from the first doping type, and the silicon content in the doped germanium-silicon layer gradually increases in a direction away from the substrate structure. A groove is formed in the stacked structure, the groove exposing a portion of the germanium-doped layer; A passivation layer is fabricated covering the surface of the stacked structure away from the substrate structure and the surface of the groove. The passivation layer has a first via and a second via. The first via exposes a portion of the germanium-doped layer, and the second via exposes a portion of the germanium-silicon-doped layer. A first electrode is fabricated in the first through hole and a second electrode is fabricated in the second through hole.

11. The manufacturing method according to claim 10, characterized in that, Fabricating a stacked structure on the surface of the substrate structure having the germanium-doped layer includes: An intrinsic absorption layer is deposited on the surface of the substrate structure having the doped germanium layer; Multiple sub-doped germanium-silicon layers are sequentially grown on the side of the intrinsic absorption layer away from the substrate structure. The silicon content in the multiple sub-doped germanium-silicon layers increases layer by layer, and the multiple sub-doped germanium-silicon layers constitute a doped germanium-silicon layer.

12. The manufacturing method according to claim 11, characterized in that, Fabricating a stacked structure on the surface of the substrate structure having the germanium-doped layer includes: Using Ge2H6 or Ge3H8 as the germanium source, an intrinsic absorption layer is deposited on the surface of the substrate structure having the doped germanium layer within a process temperature range of 400℃-500℃. Using Ge2H6 or Ge3H8 as the germanium source and Si2H6 or Si3H8 as the silicon source, multiple sub-doped germanium-silicon layers are sequentially grown on the side of the intrinsic absorption layer away from the substrate structure within a process temperature range below 450°C.

13. The manufacturing method according to claim 10, characterized in that, Fabrication of the substrate structure includes: Provide a base; An oxide layer is formed on the substrate; An intrinsic germanium layer is formed on the side of the buried oxide layer away from the substrate; The intrinsic germanium layer is subjected to ion doping of a first doping type to form a doped germanium layer having the first doping type.

14. The manufacturing method according to claim 13, characterized in that, Also includes: Remove part or all of the substrate.

15. A method for manufacturing a photoelectric sensor, characterized in that, include: Method for fabricating the photoelectric detection structure according to any one of claims 10-14; In the photodetector structure, a readout circuit is fixed on the side of the passivation layer away from the substrate structure, and the readout circuit is electrically connected to the first electrode and the second electrode.

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