Ceramic heat dissipation carrier plate, preparation method thereof and power semiconductor device

Abstract

The invention relates to the technical field of heat dissipation of power semiconductor devices, in particular to a ceramic heat dissipation carrier plate, a preparation method thereof and a power semiconductor device. The ceramic heat dissipation carrier plate of the present invention comprises: a ceramic substrate; the first bonding layer is arranged on one side of the ceramic substrate; the metal circuit layer is arranged on the first bonding layer; the second bonding layer is arranged on the other side of the ceramic substrate; the metal heat dissipation layer is arranged on the second bonding layer; a porous structure is arranged in the metal heat dissipation layer; the first bonding layer and the second bonding layer are formed in a magnetron sputtering mode. According to the ceramic heat dissipation carrier plate, the porous structure is arranged in the metal heat dissipation layer, the ultrathin combination layer is formed through magnetron sputtering, thermal expansion mismatch between metal and ceramic is remarkably reduced, residual stress and warping are effectively restrained, meanwhile, the heat conduction path is shortened, the cavity defect is eliminated, and the heat dissipation efficiency is improved. Therefore, collaborative improvement of high heat dissipation efficiency and long-term reliability is realized in a high-voltage, high-temperature and high-vibration environment.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power semiconductor device heat dissipation, and particularly relates to a ceramic heat dissipation carrier plate, a preparation method thereof and a power semiconductor device. BACKGROUND

[0002] With the rapid development of electric vehicles, renewable energy systems and industrial motors, power semiconductor devices are evolving towards high voltage (800V~1200V), high current, and high temperature working conditions. Traditional silicon (Si) based power devices have been difficult to meet the demand of new generation systems for high efficiency and high power density. Silicon carbide (SiC) power semiconductor becomes the core solution to replace silicon devices because it can still maintain low conduction loss and fast switching characteristics under high temperature (>250℃), high frequency and high voltage conditions. However, the heat generated by SiC devices during operation is significantly higher than that of traditional devices (chip junction temperature can reach more than 250℃), which puts higher requirements on the thermal conductivity, thermal shock reliability and long-term stability of the heat dissipation carrier plate.

[0003] At present, the heat dissipation carrier plates widely used in power modules mainly include three technical routes of direct copper cladding (DBC), direct copper plating (DPC) and active metal brazing (AMB). The DBC process brazes copper foil and ceramic (such as Al2O3, AlN) at high temperature (about 1060℃), but the insufficient strength of ceramic material limits the thickness of copper layer (usually <0.4 mm), otherwise residual stress easily leads to ceramic cracking; the DPC process can realize fine lines, but it needs to thicken the copper layer by electroplating, which is complex and has limited bonding strength. The AMB technology uses Ag-Cu-Ti based filler metal (BFM) to bond high-strength ceramics such as silicon nitride (Si3N4) and copper at about 850℃, which significantly improves the mechanical reliability, but still has the following key defects: (1) Residual stress and warping problem: the thermal expansion coefficient (CTE≈17 ppm / ℃) of copper is about 6 times that of ceramic (such as Si3N4 CTE≈3 ppm / ℃), and the residual stress generated after high-temperature brazing cooling easily causes ceramic micro-cracks or interface delamination, leading to device failure under long-term thermal cycling. The existing technology attempts to alleviate the CTE mismatch through ceramic substrate via filling (KR10-2318538) or multi-layer structure design (KR10-2022-0012506), but the process is complex and the cost is high.

[0004] (2) Uniformity and void defects of the filler metal layer: the traditional AMB process uses screen printing to apply Ag-Cu-Ti solder paste on the surface of the ceramic, and the thickness of the solder paste is difficult to control accurately (usually >10μm), and the volatilization of organic solvents easily forms voids, which reduces the bonding strength and heat dissipation efficiency. In addition, the excessive thickness of the solder layer will prolong the heat dissipation path and increase the thermal resistance.

[0005] (3) Silver migration risk: In high-voltage, high-temperature and high-humidity environments, Ag in the solder is prone to migrate and deposit, causing short circuits in chips, which has become a potential threat to the reliability of high-power modules. Holley, Toshiba and other institutions have carried out research on silver-free solder, but the bonding strength and process compatibility still need to be verified. +

[0006] (4) Process efficiency and cost: AMB requires vacuum soldering (Ar atmosphere), and the solder paste printing-drying-soldering process is time-consuming and has a high waste rate, which restricts large-scale production.

[0007] Recent studies have shown that by replacing solder paste printing with physical vapor deposition (PVD) such as sputtering process, a nanoscale Ti / Ag / Cu multilayer film can be deposited on the ceramic surface (e.g., H. Tatsume et al., Materials & Design, 2024), achieving precise control of the solder layer thickness (<5 μm) and reducing voids and IMC generation. However, existing technologies do not fully address the problem of residual stress caused by CTE mismatch, and lack a systematic optimization scheme for high-power SiC device thermal shock conditions.

[0008] South Korean Patent KR1020210112594 proposes using a porous copper substrate (pore size 50-300 μm vertical channel structure) to reduce the effective CTE, but it still has the defects of process complexity and uneven pore filling by traditional solder. Therefore, there is an urgent need for a new technology for manufacturing heat dissipation carriers that takes into account low residual stress, high heat dissipation efficiency, high bonding reliability, and strong process compatibility, to address the application challenges of SiC power modules in extreme environments such as electric vehicles and rail transportation. SUMMARY

[0009] The present application provides a ceramic heat dissipation carrier plate and a preparation method thereof and a power semiconductor device, to solve the problem that the existing ceramic heat dissipation carrier plate cannot simultaneously have low residual stress, high heat dissipation efficiency and high bonding reliability.

[0010] According to a first aspect of the present application, the present application provides a ceramic heat dissipation carrier plate, comprising: a ceramic substrate; a first bonding layer disposed on one side of the ceramic substrate; a metal circuit layer disposed on the first bonding layer; a second bonding layer disposed on the other side of the ceramic substrate; a metal heat dissipation layer disposed on the second bonding layer; wherein the metal heat dissipation layer has a porous structure inside; and the first bonding layer and the second bonding layer are formed by a magnetron sputtering method.

[0011] ​The ceramic heat dissipation carrier plate of the application significantly reduces the thermal expansion mismatch between the metal and the ceramic, effectively suppresses residual stress and warping, and at the same time shortens the heat conduction path and eliminates the void defects, thereby realizing the synergistic improvement of high heat dissipation efficiency and long-term reliability in a high-voltage, high-temperature and high-vibration environment, and is especially suitable for SiC power semiconductors and other extreme working conditions.

[0012] Further, the metal heat dissipation layer has one or more one-way tubular holes, which are formed in a direction perpendicular to the ceramic heat dissipation carrier plate.

[0013] The above technical solution realizes the double optimization of directional heat conduction path and thermal expansion coefficient regulation by introducing one-way tubular hole structure in the metal heat dissipation layer perpendicular to the direction of the carrier plate. On the one hand, these micropores can significantly enhance the convective heat transfer capacity as microchannels, reduce thermal resistance, and make the heat generated by the chip quickly guide to the heat sink along the hole; on the other hand, the hole structure reduces the effective cross-sectional area of the copper material, reduces the overall thermal expansion coefficient (CTE), and effectively alleviates the CTE mismatch between the ceramic substrate, reduces residual stress and warping deformation. Compared with the traditional solid copper layer, this structure greatly improves the thermal shock reliability and long-term stability without sacrificing the thermal conductivity, and is especially suitable for SiC power modules in high-power and high-vibration environments such as electric vehicles and rail transit.

[0014] Preferably, the diameter of the hole is 10-1000 μm, more preferably 50-500 μm.

[0015] Limiting the diameter of the one-way tubular hole to 10-1000 μm and preferably 50-500 μm can achieve the best balance between heat dissipation and mechanical reliability: this size range is large enough to form efficient microchannels, significantly reduce thermal resistance and quickly guide chip heat, and small enough to ensure the overall stiffness and thermal conductivity continuity of the copper layer; at the same time, the reduction of the hole wall spacing reduces the effective cross-sectional area, and the CTE further approaches the ceramic, and the residual stress and warping are suppressed to the lowest level, thereby ensuring the long-term stable operation of high-power SiC devices at a junction temperature of 250 ℃ or higher and severe thermal shock cycles.

[0016] With the increase of the thickness of the metal layer, the heat dissipation efficiency will be improved, but at the same time, due to the difference in the thermal expansion coefficient between the ceramic member and the metal member, the risk of damage to the ceramic member or the bonding layer will also increase, so it is desirable to select a thickness suitable for the product physical property requirements. Further, the thickness of the metal circuit layer and the metal heat dissipation layer is independently 0.2-1mm. This thickness interval can achieve the best balance of "heat dissipation efficiency-mechanical reliability-manufacturing cost" in high-power SiC device applications: this thickness interval not only provides sufficient cross-sectional area to reduce thermal resistance, but also avoids the problems of residual stress, warping and rising processing costs caused by excessive thickness; at the same time, when matched with a 0.2-0.6mm ceramic substrate, it can effectively suppress CTE mismatch and ensure long-term reliability in high-vibration scenarios such as electric vehicles.

[0017] Preferably, the material of the metal circuit layer and the metal heat dissipation layer is independently selected from silver, copper, gold, aluminum, iron or an alloy thereof.

[0018] Further, the thickness of the first bonding layer and the second bonding layer is independently 1-20μm; this ultra-thin scale can significantly shorten the heat conduction path of the ceramic-metal interface, thereby improving the heat dissipation efficiency.

[0019] Preferably, the first bonding layer and the second bonding layer are independently formed of at least one element including titanium, zirconium, silver, copper, aluminum, chromium, nickel, niobium, zinc. Active elements such as titanium, zirconium, and niobium form nanoscale transition layers such as TiC, ZrN, and NbN in situ, significantly reducing interface energy and improving wettability, significantly improving bonding strength; silver, copper, and aluminum filler metals form a dense diffusion layer in the eutectic reaction at 850-900℃, with a thickness of only 1-20μm, which not only shortens the heat path but also avoids traditional solder paste voids, significantly reducing thermal resistance; the addition of chromium, nickel, and zinc can inhibit the excessive growth of intermetallic compounds, maintain interface toughness, and improve high-temperature oxidation resistance / silver migration resistance, thereby ensuring long-term reliable operation of the SiC power module at 250℃ junction temperature and thermal shock cycling.

[0020] Further, the thickness of the ceramic substrate is 0.2-0.6mm; the thickness of the ceramic substrate varies depending on the type of ceramic. Silicon nitride, which has high strength, is preferably 0.2-0.3mm thick, while aluminum nitride has lower strength than silicon nitride, so it is generally used in the range of 0.3-0.6mm. If the thickness of the ceramic is too thin, it is easily affected by thermal shock, and if it is too thick, it is not conducive to heat dissipation.

[0021] The ceramic material has excellent thermal conductivity and strength, which are necessary characteristics for use as a heat dissipation carrier plate for power semiconductors. Preferably, the ceramic substrate is made of alumina, aluminum nitride, zirconia-reinforced alumina, or silicon nitride. These four materials are mainly used as ceramic members, and the most suitable ceramic member is selected and used according to the requirements of the semiconductor-recognized power / current and heat generation level, working environment, and the like. In particular, the strength of silicon nitride is very excellent compared to other materials, and is very suitable for high heat generation and high vibration use environments such as electric vehicles and railways. In order to be applicable to other industries, ceramic substrates can be formed using alumina, aluminum nitride, ZTA, or the like.

[0022] According to a second aspect of the present application, the present application also provides a method for manufacturing the above-mentioned ceramic heat dissipation carrier plate, comprising: sputtering first and second bonding layer materials on both sides of the ceramic substrate by a magnetron sputtering method; laminating a metal circuit layer on the side of the ceramic substrate sputtered with the first bonding layer material; and laminating a metal heat dissipation layer on the side of the ceramic substrate sputtered with the second bonding layer material; combining the metal circuit layer, the ceramic substrate, and the metal heat dissipation layer together by a high-temperature vacuum brazing process; forming a circuit pattern on the surface of the metal circuit layer; bonding a semiconductor chip according to the circuit pattern to complete the ceramic heat dissipation carrier plate.

[0023] The existing AMB heat dissipation carrier plate is a BFM composed of a ternary system of Ag-Cu-Ti mixed solder paste printed on the surface of the ceramic, and then a copper substrate is aligned and the substrate is manufactured by a molten bonding method. The manufacturing method of the present application takes "magnetron sputtering deposition of an ultrathin bonding layer + high-temperature vacuum brazing" as the core process chain, replaces the traditional solder paste printing with dry sputtering, realizes an active metal transition layer of 1-5 μm in thickness, uniformity, and without cavities, significantly reduces the thermal resistance of the ceramic-metal interface, significantly improves the bonding strength, and significantly suppresses residual stress and warping; then forms a dense bonding layer in a vacuum brazing process at 850-900 ℃, ensures long-term reliability at a junction temperature of 250 ℃ or above and under thermal shock cycles; and finally completes the fine circuit pattern by photolithography / etching, shortens the overall process time, and reduces material waste, thereby providing a high heat dissipation, high reliability, and low-cost carrier plate solution for high-power SiC modules.

[0024] Further, the conditions of the magnetron sputtering method are as follows: deposition is continuously performed in a sputtering chamber, the deposition speed is 20-50 nm / sec, the pressure is 1x10 -5 Torr or below (preferably 1x10 -6 ~1x10 -5Torr). By optimizing the magnetron sputtering method, a dense, non-cavity, thickness precisely controllable active metal transition layer can be obtained on the surface of the ceramic substrate or the porous metal heat dissipation layer. At the same time, the generation of unnecessary intermetallic compounds can be minimized, which contributes to improving the bonding strength, realizes high wetting, low porosity, and low residual stress bonding during subsequent 850-900 ℃ vacuum brazing, and ultimately reduces the thermal resistance and improves the bonding strength of the ceramic heat dissipation carrier, and significantly suppresses the warping and cracking under thermal shock, meeting the needs of long-term reliable operation of high-power SiC devices.

[0025] The mass of the second bonding layer material on the ceramic substrate is 2-5 times the sputtering mass of the first bonding layer material on the ceramic substrate, which can form an active metal transition layer with sufficient thickness on the surface of the porous metal heat dissipation layer, ensuring that the sputtered atoms can fully cover and penetrate into the pores, so that during 850-900 ℃ vacuum brazing, the molten filler metal is uniformly filled in the pores by capillary action, the effective contact area and bonding strength of metal-ceramic are improved, the effect of increasing the surface area due to the porous structure is compensated, and the cavities or weak interfaces caused by insufficient filler are avoided.

[0026] Further, the high-temperature vacuum brazing process is first heated to 850-900 ℃ at a heating rate of 5-10 ℃ / min, then kept at 850-900 ℃ for 10-60 min, then cooled to below 300 ℃ at a cooling rate of 5-10 ℃ / min, and finally taken out at 80-120 ℃.

[0027] The high-temperature vacuum brazing process by "5-10 ℃ / min slow heating-slow cooling" combined with 850-900 ℃, 10-60 min precise holding is beneficial to inhibit the thermal stress generated by the CTE difference between ceramic / metal, avoid micro-cracks and warping, make the active filler fully melt and uniformly wet the interface, and form a dense and non-cavity metallurgical bond; slow cooling below 300 ℃ and low-temperature out of furnace at 80-120 ℃ further reduces the residual stress, significantly improves the joint shear strength and long-term thermal fatigue reliability.

[0028] Preferably, the high-temperature vacuum brazing process is carried out under inert gas. High-temperature vacuum brazing under inert gas (such as argon, nitrogen) protection can completely isolate air, prevent oxidation of filler metal and base material, significantly reduce the risk of oxide inclusions and pore generation; at the same time, the low oxygen partial pressure environment of inert atmosphere enhances the wetting and capillary filling ability of the molten filler metal, making the joint structure dense, the interface strength high, and the thermal stress and deformation caused by temperature difference small, thereby ensuring the long-term reliable operation of the ceramic-metal heat dissipation carrier under high temperature and high power conditions.

[0029] Preferably, the high-temperature vacuum brazing process is carried out at a pressure of (0.5-1.5) × 10 -4at 0.1 torr.

[0030] at (0.5-1.5) x 10 -4 High-temperature vacuum brazing under high vacuum of 0.1-1 torr can significantly reduce the residual O2, H2O and other oxidizing gases in the furnace, effectively inhibit the formation of oxidation films on the ceramic and metal surfaces, thereby improving the wetting performance of the active filler metal on both surfaces, avoiding oxidation-induced voids, cracks and strength reduction; at the same time, the extremely low oxygen partial pressure environment makes the molten filler metal flow more uniformly, can fully fill the micro-gaps under capillary action, and form a dense, defect-free metallurgical joint, ensuring that the ceramic heat spreader still has high thermal conductivity, high bonding strength and long-term thermal fatigue reliability after brazing at 850-900℃.

[0031] The ceramic heat spreader of the present application is widely used in electric vehicles, railway industries, electronic machines, medical devices, electric vehicle charging related equipment, and all industrial fields such as industrial and general household appliances that operate in harsh environments of high voltage / high current / high vibration.

[0032] According to a third aspect of the present application, the present application also provides a power semiconductor device comprising the above-mentioned ceramic heat spreader or the ceramic heat spreader prepared by the above-mentioned preparation method, and further comprising a packaging structure for packaging the ceramic heat spreader.

[0033] Advantages of the present application: The present application can significantly reduce the thermal resistance of the ceramic heat spreader by the synergistic design of the magnetron sputtering ultra-thin bonding layer and the porous metal heat dissipation layer, while the residual stress and warping deformation caused by CTE mismatch are inhibited to the minimum; the obtained ceramic heat spreader can work stably in extreme working conditions of 250℃ junction temperature, 800-1200V high voltage and repeated thermal shock, and has high heat dissipation efficiency, high bonding reliability, low process cost and large-scale production compatibility, fully meeting the high power density requirements of new generation SiC power modules for electric vehicles, rail transportation and renewable energy systems. BRIEF DESCRIPTION OF DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the present application or prior art, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are some embodiments of the present application, and those skilled in the art can also obtain other drawings according to these drawings without creative labor.

[0035] Figure 1 A structure schematic diagram of a ceramic heat spreader provided for the present application embodiment 1.

[0036] Figure 2A flowchart of a preparation method of a ceramic heat dissipation carrier plate provided for Embodiment 1 of the present application is shown.

[0037] The reference signs: 100: ceramic substrate; 110: metal circuit layer; 120: metal heat dissipation layer; 130: first bonding layer; 130': second bonding layer. DETAILED DESCRIPTION

[0038] In order to make the objectives, technical solutions and advantages of the present application clearer, the technical solutions in the present application will be described clearly and completely below in combination with the drawings in the present application. Obviously, the described embodiments are some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative labor fall within the protection scope of the present application.

[0039] Embodiment 1 The present embodiment provides a ceramic heat dissipation carrier plate, as shown in the figure, comprising a ceramic substrate 100, a first bonding layer 130, a metal circuit layer 110, a second bonding layer 130' and a metal heat dissipation layer 120, the first bonding layer 130 is arranged on one side of the ceramic substrate 100, the metal circuit layer 110 is arranged on the first bonding layer 130, the second bonding layer 130' is arranged on the other side of the ceramic substrate 100, and the metal heat dissipation layer 120 is arranged on the second bonding layer 130'. Figure 1 The metal heat dissipation layer 120 has a porous structure 140 inside; the first bonding layer 130 and the second bonding layer 130' are formed by a magnetron sputtering method.

[0040] The thickness of the ceramic substrate 100 is 0.32 mm, and the ceramic substrate 100 is made of silicon nitride.

[0041] The metal heat dissipation layer 120 is a porous copper substrate in Korean Patent No. KR1020210112594A, which has a plurality of one-way tubular holes, the holes are formed in a direction perpendicular to the ceramic heat dissipation carrier plate, and the average diameter of the holes is 100 pm. The thickness of the metal heat dissipation layer 120 is 0.5 mm.

[0042] The thickness of the metal circuit layer 110 is 0.3 mm, and the material is oxygen-free copper.

[0043] The thickness of the first bonding layer 130 is 7 pm, and the first bonding layer 130 is formed of a compound composed of BFM metal Ag-Cu-Ti.

[0044] The thickness of the second bonding layer 130' is 18 pm, and the second bonding layer 130' is formed of a compound composed of BFM metal Ag-Cu-Ti.

[0045] The embodiment also provides a preparation method of the ceramic heat-dissipation carrier plate, a process flow of which is shown in Figure 2 and includes the following steps: Step S1, preparing a ceramic substrate 100.

[0046] Step S2, sputtering first and second bonding layer materials by a magnetron sputtering method: sputtering the first and second bonding layer materials on both sides of the ceramic substrate 100 by a magnetron sputtering method. The conditions of the magnetron sputtering method are as follows: The BFM deposition on the ceramic substrate 100 is performed by a PVD equipment DC magnetron plasma sputtering process. The upper and lower surfaces of the ceramic substrate should be deposited under the same conditions, and the deposition of the upper and lower surfaces should be performed continuously in a sputtering chamber for the purpose of not being exposed to air. At this time, the deposition speed is 30 nm / sec, the pressure is 1x10 -5 Torr, the deposition temperature is 130°C, and the bias voltage is 300V.

[0047] The sputtering quality of the second bonding layer material on the ceramic substrate 100 is 3 times that of the first bonding layer material.

[0048] Step S3, stacking a metal circuit layer 110 on the side of the ceramic substrate 100 on which the first bonding layer material is sputtered, and stacking a metal heat-dissipation layer 120 on the side of the ceramic substrate 100 on which the second bonding layer material is sputtered; After the BFM deposition on both sides of the ceramic substrate 100, a high-temperature vacuum brazing process is performed, the product is loaded into a vacuum chamber, Ar gas is injected, and the vacuum level is 1.0x10 -4 Torr. Then, the temperature is raised at a speed of 10°C / min, and maintained at 870°C for 45 minutes. Then, the cooling is started at a speed of 10°C / min, and finally, the chamber is opened at 100°C to take out the product to complete the brazing process.

[0049] Step S4, preparation of an electronic circuit pattern: using a photomask to form a pattern on the metal circuit layer 110, and according to the circuit pattern, semiconductor chips are bonded to manufacture a semiconductor designed for a specific purpose. On the metal heat-dissipation layer 120, in order to discharge the high heat generated during the driving of the semiconductor chips, an effective heat-dissipation function is performed by inserting a TIM and installing a heat-dissipation needle fin, etc. A photolithography process is performed to complete the electronic circuit pattern by sequentially performing a metal layer etching and an active metal layer etching.

[0050] Step S5, cutting according to the circuit pattern: cutting by a laser cutting device, etc. according to the circuit pattern, and through appropriate post-processing, the ceramic heat-dissipation carrier plate is finally manufactured.

[0051] Embodiment 2 The embodiment provides a ceramic heat dissipation carrier plate, which is different from the embodiment 1 in that the thickness of the ceramic substrate 100 is 0.25 mm, the thickness of the metal heat dissipation layer 120 is 1 mm, the average diameter of the hole is 300 microns, the thickness of the metal circuit layer 110 is 0.8 mm, the thickness of the first bonding layer 130 is 5 microns, and the thickness of the second bonding layer 130' is 20 microns.

[0052] Embodiment 3 The embodiment provides a ceramic heat dissipation carrier plate, which is different from the embodiment 1 in that the thickness of the ceramic substrate 100 is 0.6 mm, the thickness of the metal heat dissipation layer 120 is 0.2 mm, the average diameter of the hole is 50 microns, the thickness of the metal circuit layer 110 is 0.2 mm, the thickness of the first bonding layer 130 is 5 microns, and the thickness of the second bonding layer 130' is 10 microns.

[0053] The ceramic heat dissipation carrier plate can be used for long-term stable work in the extreme working conditions of 250 DEG C junction temperature, 800-1200 V high voltage and repeated thermal shock, and has high heat dissipation efficiency, high bonding reliability, low process cost and large-scale production compatibility, and fully meets the high power density demand of a new generation of SiC power module for electric vehicles, rail transit and renewable energy systems.

[0054] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement to part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A ceramic heat dissipation carrier plate, characterized in that, include: Ceramic substrate; A first bonding layer is disposed on one side of the ceramic substrate; A metal circuit layer is disposed on the first bonding layer; A second bonding layer is disposed on the other side of the ceramic substrate; A metal heat dissipation layer is disposed on the second bonding layer; The metal heat dissipation layer has a porous structure; the first bonding layer and the second bonding layer are formed by magnetron sputtering.

2. The ceramic heat dissipation carrier plate according to claim 1, characterized in that, The metal heat dissipation layer has one or more unidirectional tubular holes formed in a direction perpendicular to the ceramic heat dissipation carrier plate; Preferably, the diameter of the hole is 10-1000 μm, more preferably 50-500 μm.

3. The ceramic heat dissipation carrier plate according to claim 1 or 2, characterized in that, The thickness of the metal circuit layer and the metal heat dissipation layer are each independently 0.2-1 mm; Preferably, the materials of the metal circuit layer and the metal heat dissipation layer are each independently selected from silver, copper, gold, aluminum, iron, or their alloys.

4. The ceramic heat dissipation carrier plate according to any one of claims 1-3, characterized in that, The thickness of the first bonding layer and the second bonding layer are each independently 1-20 μm; Preferably, the first bonding layer and the second bonding layer are each independently formed from at least one element selected from titanium, zirconium, silver, copper, aluminum, chromium, nickel, niobium, and zinc.

5. The ceramic heat dissipation carrier plate according to any one of claims 1-4, characterized in that, The thickness of the ceramic substrate is 0.2-0.6 mm; Preferably, the ceramic substrate is made of alumina, aluminum nitride, zirconium oxide-reinforced alumina, or silicon nitride.

6. The method for preparing the ceramic heat dissipation carrier plate according to any one of claims 1-5, characterized in that, include: A first bonding layer material and a second bonding layer material are sputtered onto both sides of a ceramic substrate by magnetron sputtering. A metal circuit layer is stacked on the side of the ceramic substrate sputtered with the first bonding layer material; a metal heat dissipation layer is stacked on the side of the ceramic substrate sputtered with the second bonding layer material. The metal circuit layer, the ceramic substrate, and the metal heat dissipation layer are bonded together using a high-temperature vacuum brazing process. The surface of the metal circuit layer is etched to form a circuit pattern; Based on the circuit pattern, semiconductor chips are joined together to complete the ceramic heat sink.

7. The method for preparing the ceramic heat dissipation carrier plate according to claim 6, characterized in that, The conditions for the magnetron sputtering method are: continuous deposition within the sputtering chamber at a deposition rate of 20–50 nm / sec and a pressure of 1 x 10⁻⁶. -5 Torr below.

8. The method for preparing the ceramic heat dissipation carrier plate according to claim 6 or 7, characterized in that, The sputtering mass of the second bonding layer material on the ceramic substrate is 2-5 times that of the sputtering mass of the first bonding layer material on the ceramic substrate.

9. The method for preparing the ceramic heat dissipation carrier plate according to any one of claims 6-8, characterized in that, The high-temperature vacuum brazing process involves first heating the temperature to 850-900℃ at a heating rate of 5-10℃ / min, then holding it at 850-900℃ for 10-60 minutes, then cooling it to below 300℃ at a cooling rate of 5-10℃ / min, and finally removing it at 80-120℃. Preferably, the high-temperature vacuum brazing process is performed under an inert gas atmosphere; Preferably, the high-temperature vacuum brazing process is performed at a temperature of (0.5-1.5) × 10⁻⁶. -4 Performed under torr.

10. A power semiconductor device, characterized in that, The ceramic heat dissipation carrier plate as described in any one of claims 1-5 or the ceramic heat dissipation carrier plate prepared by the preparation method described in any one of claims 6-9 further includes an encapsulation structure that encapsulates the ceramic heat dissipation carrier plate therein.

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