Semiconductor-based measuring device

Abstract

The measurement device (100) comprises: a substrate (104); a plurality of integrated circuits (102), each integrated circuit having a plurality of electrodes (902), and the plurality of integrated circuits being positioned on the substrate in a two-dimensional array comprising n rows and m columns; a communication interface (106) connected to each of the plurality of integrated circuits (102) such that each integrated circuit is addressable through the interface; and a data output interface characterized by a plurality of data output lines (1326) connected to the communication interface, where in each of the n rows of the array, the integrated circuit is connected to the common data line, and the measurement device can be configured to transmit measurement information through the data output interface in response to a control signal, in one or more of the n rows of the array, measurement information is selectively transmitted from one of the integrated circuits connected to the common data line of the row to the data output interface.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to U.S. Provisional Application No. 63 / 467,595, filed May 18, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to semiconductor-based devices for measuring electrical parameters and responses in biological samples, systems including such devices, and methods associated with such devices and systems. Background Technology

[0004] Optical methods have been used to image cell proliferation and death to characterize the efficacy of various therapeutic substances and methods. Recently, electrical and electrochemical measurements have been used to elucidate cellular responses to stimuli that cannot be conveniently measured optically, such as cell adhesion. Intracellular and extracellular measurements of membrane potential and other parameters of electrogenic cell networks have been performed using CMOS-based microelectrode arrays and planar patch-clamp arrays. Sensitivity limitations have constrained the ability of such arrays to detect certain cellular responses, and bandwidth limitations have limited the resolution of electrical and electrochemical measurements performed with such arrays. Summary of the Invention

[0005] This disclosure features a measuring apparatus and system for measuring the electro-inductive response from individual cells and cell networks. The measuring apparatus includes multiple integrated circuits, each comprising a measuring electrode, a reference electrode amplifier, peripheral circuitry, and other circuitry configurable to perform various measurement methods. Voltage and current signals can be selectively applied to individual electrodes of the integrated circuits to stimulate a variety of different cellular responses. An electrode group can be selectively scanned to measure the response induced by the applied voltage and current signals. The electrodes are integrated into a substrate, and the cells and cell networks are typically located on or near the substrate. By controlling the nature and spatial distribution of the signals applied to specific electrodes, the electric field geometry at and above the substrate surface can be controlled. Furthermore, by controlling the location where voltage and current signals are applied by the electrodes and the location where the cellular response is measured by the electrodes, various physiological cellular parameters can be queried.

[0006] In one aspect, the present disclosure features a measurement device comprising: a substrate; a plurality of integrated circuits, each having a plurality of electrodes, and the plurality of integrated circuits being positioned on the substrate in a two-dimensional array comprising n rows and m columns; a communication interface connected to each of the plurality of integrated circuits such that each integrated circuit is addressable via the interface; and a data output interface, characterized by a plurality of data output lines connected to the communication interface, wherein, in each of the n rows of the array, integrated circuits are connected to a common data line, and the measurement device can be configured to, in response to a control signal, transmit measurement information through the data output interface in one or more of the n rows of the array by selectively transmitting measurement information from one of the integrated circuits connected to the common data line of that row to the data output interface, and disabling one or more of the other integrated circuits connected to the common data line of that row.

[0007] In another aspect, this disclosure is characterized by a method comprising the steps of: providing a measurement apparatus comprising a substrate, a plurality of integrated circuits, a communication interface, and a data output interface, each integrated circuit being characterized by a plurality of electrodes, and the plurality of integrated circuits being positioned on the substrate in a two-dimensional array comprising n rows and m columns, the communication interface being connected to each of the plurality of integrated circuits such that each integrated circuit is addressable through the interface, the data output interface being characterized by a plurality of data output lines connected to the communication interface, wherein, in each of the n rows of the array, an integrated circuit is connected to a common data line; selectively transmitting measurement information from one of the integrated circuits connected to the common data line of the row to the data output interface; and disabling one or more of the other integrated circuits connected to the common data line of that row.

[0008] In another aspect, this disclosure features a system comprising: a measurement device, characterized by a substrate, a plurality of integrated circuits on the substrate, wherein each integrated circuit includes a plurality of electrodes and at least one analog-to-digital converter (ADC), and a data output interface connected to the at least one ADC and characterized by a plurality of data output lines, wherein the at least one ADC is configured to receive measurement signals from one or more of the plurality of electrodes and generate one or more data signals including measurement information derived from the measurement signals; a host controller, the host controller including a host interface configured to be connected to the data output interface of the measurement device; and instructions, when executed by the host controller, causing the host controller to obtain measurement information from the measurement device by: determining the rate at which measurement information in one or more data signals will be transmitted from the data output interface to the host interface, selectively activating a plurality of data output lines of the data output interface such that the data transmission capacity of the activated data output lines is at least as large as the rate at which measurement information in one or more data signals will be transmitted from the data output interface to the host interface, and receiving the measurement information in one or more data signals on the activated data output lines of the data output interface.

[0009] In another aspect, this disclosure features a method comprising: providing a measurement apparatus including a substrate, a plurality of integrated circuits on the substrate, wherein each integrated circuit is characterized by a plurality of electrodes and at least one analog-to-digital converter (ADC), and a data output interface connected to at least one ADC and characterized by a plurality of data output lines, wherein the at least one ADC is configured to receive measurement signals from one or more of the plurality of electrodes and generate one or more data signals including measurement information derived from the measurement signals; determining the rate at which the measurement information in the one or more data signals will be transmitted from the data output interface; selectively activating the plurality of data output lines of the data output interface such that the data transmission capacity of the activated data output lines is at least as large as the rate at which the measurement information in the one or more data signals will be transmitted from the data output interface; and receiving the measurement information in the one or more data signals on the activated data output lines of the data output interface.

[0010] In another aspect, this disclosure features a measurement apparatus comprising a substrate and a plurality of integrated circuits on the substrate, wherein each integrated circuit comprises: a plurality of electrodes; a plurality of peripheral circuits (PCs), wherein each of the peripheral circuits is connected to the plurality of electrodes of the integrated circuit; a plurality of analog-to-digital converters (ADCs), wherein each of the ADCs is connected to the plurality of PCs via a multiplexer; a data aggregation unit connected to each of the ADCs; and a data output interface comprising a plurality of data output lines, wherein the plurality of data output lines are connected to the data aggregation unit, and wherein, in each integrated circuit, the total number of PCs exceeds the total number of ADCs, the data output interface is configured to transmit a data clock signal, and the data output interface is configured to transmit measurement information generated by the ADCs based on measurement signals detected at the electrodes of the integrated circuit in a plurality of sequential cycles synchronized with the data clock signal.

[0011] On another aspect, this disclosure is characterized by a method comprising: providing a measurement apparatus including a substrate and a plurality of integrated circuits on the substrate, wherein each integrated circuit is characterized by a plurality of electrodes, a plurality of peripheral circuits (PCs), wherein each of the peripheral circuits is connected to the plurality of electrodes of the integrated circuit, a plurality of analog-to-digital converters (ADCs), wherein each of the ADCs is connected to the plurality of PCs via a multiplexer, a data aggregation unit connected to each ADC, and a data output interface characterized by a plurality of data output lines, wherein the plurality of data output lines are connected to the data aggregation unit, and wherein, in each integrated circuit, the total number of PCs exceeds the total number of ADCs; transmitting a data clock signal via the data output interface; and transmitting measurement information generated by the ADCs from measurement signals detected at the electrodes of the integrated circuits via the data output interface in a plurality of sequential cycles synchronized with the data clock signal.

[0012] In another aspect, the present disclosure features a measurement device including a substrate and a plurality of integrated circuits on the substrate, each integrated circuit being characterized by a plurality of electrodes and connected to pixel circuits capable of independently switching between a plurality of operating modes, wherein the measurement device can be configured to, in response to a control signal,: operate in a first mode by adjusting the pixel circuits connected to one or more electrodes to deliver a stimulation signal to the outside of the measurement device using one or more electrodes; and detect a measurement signal at one or more electrodes by adjusting the pixel circuits to operate in a second mode different from the first mode.

[0013] In another aspect, the present disclosure is characterized by a method comprising: providing a measuring device, the measuring device being characterized by a substrate and a plurality of integrated circuits on the substrate, each integrated circuit including a plurality of electrodes and connected to pixel circuits capable of independently switching between a plurality of operating modes; delivering a stimulation signal to the outside of the measuring device using the one or more electrodes by adjusting the pixel circuits connected to one or more electrodes to operate in a first mode; and detecting a measuring signal at one or more electrodes by adjusting the pixel circuits to operate in a second mode different from the first mode.

[0014] In another aspect, the invention is characterized by a measurement device comprising a substrate and a plurality of integrated circuits on the substrate, each integrated circuit containing a plurality of electrodes positioned in a two-dimensional array on the substrate, and each electrode being connected to an independent pixel circuit, wherein, for each of one or more of the plurality of integrated circuits, the measurement device can be configured in response to a control signal to: receive information from the control signal regarding the effective electrode spacing of a specified measurement electrode; and configure pixel circuits connected to an electrode set of integrated circuits such that the electrodes of the set operate as a regularly spaced array of measurement electrodes, at which measurement signals are detectable, and wherein the electrode spacing of the array of measurement electrodes matches the effective electrode spacing.

[0015] On another aspect, this disclosure is characterized by a method comprising: providing a measurement apparatus including a substrate and a plurality of integrated circuits on the substrate, each integrated circuit being characterized by a plurality of electrodes positioned in a two-dimensional array on the substrate, and each electrode being connected to an independent pixel circuit; and for each of one or more of the plurality of integrated circuits: receiving information from a control signal specifying an effective electrode spacing of a measurement electrode; and configuring pixel circuits connected to an electrode set of integrated circuits such that the electrode set operates as a regularly spaced array of measurement electrodes at which a measurement signal is detectable, wherein the electrode spacing of the array of measurement electrodes matches the effective electrode spacing.

[0016] In another aspect, this disclosure features a measurement apparatus comprising a substrate and a plurality of integrated circuits on the substrate, wherein each integrated circuit includes a plurality of electrodes, a plurality of peripheral circuits, a plurality of reference electrode amplifiers, and at least one digital-to-analog converter (DAC) configured to selectively connect to one or more of the plurality of peripheral circuits and one or more of the reference electrode amplifiers in response to a control signal, and the peripheral circuits, the reference electrode amplifiers, and the at least one DAC configured to control an electric field distribution adjacent to the substrate in response to a control signal by: delivering one or more drive signals to a first subset of the plurality of electrodes; delivering one or more reference signals to a second subset of the plurality of electrodes, the second subset being different from the first subset; and delivering one or more shielding signals to a third subset of the plurality of electrodes, the third subset being different from the first and second subsets.

[0017] In another aspect, the present disclosure is characterized by a method comprising: providing a measurement apparatus characterized by a substrate and a plurality of integrated circuits on the substrate, wherein each integrated circuit includes a plurality of electrodes, a plurality of peripheral circuits, a plurality of reference electrode amplifiers, and at least one digital-to-analog converter (DAC), the DAC being configurable to selectively connect to one or more of the plurality of peripheral circuits and one or more of the reference electrode amplifiers in response to a control signal; and controlling an electric field distribution adjacent to the substrate by delivering one or more drive signals to a first subset of the plurality of electrodes, delivering one or more reference signals to a second subset of the plurality of electrodes, the second subset being different from the first subset, and delivering one or more shielding signals to a third subset of the plurality of electrodes, the third subset being different from the first and second subsets.

[0018] In another aspect, the present disclosure features a measurement apparatus comprising a substrate and a plurality of integrated circuits on the substrate, wherein each integrated circuit comprises a plurality of electrodes, at least one digital-to-analog converter (DAC), a plurality of peripheral circuits and a plurality of reference electrode amplifiers, and wherein each peripheral circuit and reference electrode amplifier is configurable to be selectively connected to at least one DAC; and the at least one DAC is configurable to generate, in response to a control signal, a drive signal comprising a plurality of frequency components for one or more of the plurality of electrodes.

[0019] In another aspect, the present disclosure is characterized by a method comprising: providing a measurement apparatus including a substrate and a plurality of integrated circuits on the substrate, wherein each integrated circuit is characterized by a plurality of electrodes, at least one digital-to-analog converter (DAC), a plurality of peripheral circuits and a plurality of reference electrode amplifiers, and wherein each peripheral circuit and reference electrode amplifier is configurable to be selectively connected to at least one DAC; and using at least one DAC to generate a drive signal comprising a plurality of frequency components for one or more of the plurality of electrodes.

[0020] Unless otherwise specifically stated, any embodiment of a measuring device, system, and method may include any feature described herein, including any combination of features described individually in conjunction with different embodiments.

[0021] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. While similar or equivalent methods and materials to those described herein may be used in the practice or testing of the subject matter, suitable methods and materials are described below. All publications, patent applications, patents, and other references mentioned herein are incorporated herein by reference in their entirety. In the event of conflict, this specification (including definitions) shall prevail. Furthermore, materials, methods, and examples are illustrative only and are not intended to be limiting.

[0022] Details of one or more embodiments are set forth in the accompanying drawings and the following description. Other features and advantages will be apparent from the specification, drawings, and claims. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of an example measuring device.

[0024] Figure 2 This is a schematic cross-sectional view of an example part of the measuring device.

[0025] Figure 3 This is a schematic diagram of an example of a casing.

[0026] Figure 4 This is a schematic diagram of another example of a casing.

[0027] Figure 5A This is a schematic diagram of an example of a hole on the substrate of a measuring device.

[0028] Figure 5B This is a schematic diagram of an example of four holes on the substrate of a measuring device.

[0029] Figure 5C This is a schematic diagram of an example of 16 holes on the substrate of the measuring device.

[0030] Figure 6 This is a schematic diagram illustrating an example of multiple holes on the substrate of a measuring device.

[0031] Figure 7A This is a schematic diagram of an example housing and interface used for measuring equipment.

[0032] Figure 7B This is a schematic diagram of an example of a housing array used for measuring equipment.

[0033] Figures 8A to 8D This is a schematic cross-sectional view of different methods for attaching integrated circuit chips to the substrate of a measuring device.

[0034] Figure 9 This is a schematic diagram of an example integrated circuit for a measuring device.

[0035] Figure 10A This is a schematic diagram of an example pixel circuit for a measuring device.

[0036] Figure 10B This is a schematic diagram of an example D latch for a pixel circuit.

[0037] Figure 10C This is a schematic diagram of an example pixel circuit for a measuring device.

[0038] Figure 11A yes Figure 10C A schematic diagram of an example configuration of the pixel circuit.

[0039] Figure 11B It is shown that it is used for Figure 10C A graph illustrating two clock signals for an example of a current injector in a pixel circuit.

[0040] Figures 11C to 11I yes Figure 10C A schematic diagram of other example configurations of pixel circuits.

[0041] Figures 12A to 12D This is a schematic diagram of a portion of an electrode array configured to define a measurement array of electrodes with different electrode spacings.

[0042] Figure 13 This is a schematic diagram of an example of an integrated circuit with multiple functional groups.

[0043] Figure 14 This is a schematic diagram of an example of an analog-to-digital converter (ADC) connected to a multiplexer.

[0044] Figure 15 This is a schematic diagram of an example of the peripheral circuitry of a measuring device.

[0045] Figures 16A to 16F yes Figure 15 A schematic diagram of an example configuration of the peripheral circuitry.

[0046] Figure 17 This is a schematic diagram of an example of a digital-to-analog converter (DAC) for a measuring device.

[0047] Figure 18A yes Figure 17 A schematic diagram of an example resistor string module for a DAC.

[0048] Figure 18B yes Figure 17 A schematic diagram illustrating an example of the current source for a DAC.

[0049] Figure 18C yes Figure 17 A schematic diagram of an example of a transimpedance amplifier (TIA) for a DAC.

[0050] Figure 19 This is a schematic diagram of an example measuring device.

[0051] Figure 20 This is another schematic diagram of the example measuring device.

[0052] Figure 21 This is a flowchart illustrating a series of example steps for measuring the response of one or more samples to electrical stimulation.

[0053] Figure 22 This is a schematic diagram illustrating an exemplary measuring device with multiple samples located on the device.

[0054] Figure 23 This is a schematic cross-sectional view of an example measurement configuration, in which the sample is queried in response to an electric field oriented vertically.

[0055] Figure 24 It is shown in Figure 23 A schematic diagram of two measurement frames used in the configuration to measure the sample response to electrical stimulation.

[0056] Figure 25 This is a schematic cross-sectional view of an example measurement configuration, in which the sample is queried in response to an electric field in a lateral orientation.

[0057] Figure 26 It is shown in Figure 25 A schematic diagram of two measurement frames used in the configuration to measure the sample response to electrical stimulation.

[0058] Figure 27AThis is a set of schematic diagrams illustrating the vertical and transverse field configurations used to measure the sample response, as well as the results of calculations for sample fusion and root mean square (RMS) frame-to-frame shift. An example of the measured electric field lines is shown between the stimulating electrode (dark gray) and the return electrode (light gray), with the potential distribution shown in blue. At low frequencies (250 Hz), the cell membrane blocks the electric field, while at higher frequencies (16 kHz), the electric field becomes more sensitive. Fusion and RMS are calculated from the impedance image.

[0059] Figure 27B This is a set of graphs showing the measured and calculated parameter values ​​of MDCK cells obtained from canine kidneys. Cells were seeded at a density of 40,000 cells / well at time t=0 h and measured for 40 h. The culture medium was changed 24 h after seeding. The traces represent the mean ± sd across 88 wells of the measurement apparatus. For each measurement, the most representative biological parameters were labeled, but the blend of biological parameters contributes collectively to each measurement.

[0060] Figure 27C This is a set of impedance images of MDCK cells from a single well at multiple time points. Images were generated using the reciprocals of VF 250 Hz, VF 16 kHz, and LF 16 kHz.

[0061] Figure 28A This is a set of graphs showing live-cell impedance measurements for eleven cell types. The MDCK cell variant is canine, and the rest are human. Violin plots of three parameters show differences in tissue barrier (VF 250 Hz), cell-matrix attachment (LF 16 kHz), and morphological movement / dynamic changes (RMS).

[0062] Figure 28B This is a set of immunofluorescence images (left) and impedance images (right) for various cell types, revealing a range of epithelial tissue characteristics. Cells were stained for E-cadherin (a cell-cell adhesion protein) and DAPI / nucleus. Representative pore impedance images combine several impedance parameters into different gray shades. Cells strongly expressing E-cadherin at the cell-cell interface (MDCK, Caco-2, MCF-7) exhibit a high tissue barrier compared to cells with dispersed E-cadherin (A549) or no expression (MDA-MB-231).

[0063] Figure 28CThis is a set of figures showing the measured and calculated parameter values ​​of Caco-2 cells plated on uncoated and collagen-coated substrates of the measuring device. Differences in Caco-2 cell function were observed from 0 to 48 hours post-inoculation. Tissue on the coated surface showed a more significant increase in tissue barrier (VF 250 Hz) and less adhesion (LF 16 kHz) in the case of culture medium exchange. The line traces represent the mean ± SD of 9 wells for each condition; the bar graphs are at 48 hours (p < 0.0001, n = 9 wells).

[0064] Figure 28D This is a set of graphs showing the measured and calculated parameter values ​​for a mixture of two different cell types. Co-culture sensitivity was characterized by mixing two breast cancer cell types, MCF-7 and MDA-MB-231, with different functional properties, plated at a total of 10,000 cells / well. Gradients in cell size (VF 16kHz) and RMS (mobility) relative to the plating ratio were observed. The line traces represent the mean ± sd for 12 wells under each condition.

[0065] Figures 28E to 28O This is a set of graphs showing the measured and calculated parameter values ​​for different cell types. It indicates the total number of cells per well for each cell type. The culture medium is changed approximately every 24 or 48 hours, depending on the cell type and experiment. The y-axis of each graph is scaled on a per-cell-type basis.

[0066] Figure 29A This is a set of images showing measured and calculated parameter values ​​of MDCK cells treated with two different compounds, arisertib and bosutinib. MDCK cells were obtained from canine kidneys. Arisertib was applied at a concentration of 1 μM, and bosutinib was applied at a concentration of 10 μM. Dome-shaped structures were observed only in tissues treated with arisertib.

[0067] Figure 29B It is shown Figure 29A A schematic diagram of the grayscale image.

[0068] Figure 29C This is a graph showing measurements of cell attachment as a function of time for samples treated with aripiprazole or bosutinib. Aripiprazole accelerated water transport detachment compared to the control, while bosutinib delayed it (LF 16 kHz); 3 wells for each condition, mean ± SD. The differential results are consistent with animal studies of autosomal dominant polycystic kidney disease (ADPKD), suggesting that water transport phenotypes can predict ADPKD efficacy.

[0069] Figures 29D-1 to 29D-10This is a set of graphs showing measured and calculated parameter values ​​for MDCK cells after a series of compounds were applied approximately 24 hours after plating and before water transport was initiated. Compound concentrations are indicated in the legend, and values ​​are time-normalized to 1 hour prior to compound application.

[0070] Figures 29E-1 to 29E-10 This is a set of graphs showing measured and calculated parameter values ​​for A549 cells after a series of compounds were applied approximately 24 hours after plating and before water transport was initiated. Compound concentrations are indicated in the legend, and values ​​are time-normalized to 1 hour prior to compound application.

[0071] Figures 29F-1 to 29F-10 This is a set of graphs showing measured and calculated parameter values ​​for MDA-MB-231 cells after a series of compounds were applied approximately 24 hours after plating and before water transport was initiated. Compound concentrations are indicated in the legend, and values ​​are time-normalized to 1 hour prior to compound application.

[0072] Figure 30A This is a graph showing the principal component analysis results of multiparameter impedance measurements in A549 cells. A549 (lung / alveolar) cells were treated with a library of 341 FDA-approved compounds at a concentration of 10 μM; anisomycin (100 μM) was used as a positive control. Principal component analysis (PCA) was performed using various field measurements (VF, LF at 1 kHz, 4 kHz, and 16 kHz) and calculations (fusion, RMS) across time points from 0 to 48 hours after compound treatment. The first two dimensions of the PCA space are shown, with selected clusters highlighted.

[0073] Figure 30B This is a set of plots showing the time traces of compounds treated with a subset of parameters in PCA 48 hours later. Each principal component shows a unique characteristic. The shaded line represents the control (median) response.

[0074] Figure 30C It is shown Figure 30A The table shows the clusters of compounds, where the targets and / or pathways are determined from the compound suppliers.

[0075] Figure 30D It shows from Figure 30A A set of diagrams showing additional clusters determined by PCA based on multiparameter impedance measurements. Various compounds reduce growth or induce cell death, and other morphological features distinguish different MOAs. The first four dimensions of the PCA space are shown in the diagram.

[0076] Figure 30E This is a set of plots showing the time traces of a subset of parameters in PCA 48 hours after compound treatment.

[0077] Figure 30F It is shown Figure 30D The table shows the clusters of compounds, where the targets and / or pathways are determined from the compound suppliers.

[0078] Figure 30G It shows from Figure 30A A set of plots showing additional clusters determined by PCA based on multiparameter impedance measurements. Proteasome inhibition of the death phenotype, antiproliferative, and antiviral activity all reduce cell growth or induce cell death. The first four dimensions of the PCA space are shown in the plot.

[0079] Figure 30H This is a set of graphs showing the time traces of a subset of the parameters in PCA 48 hours after compound treatment.

[0080] Figure 30I It is shown Figure 30G The table shows the clusters of compounds, where the targets and / or pathways are determined from the compound suppliers.

[0081] Figure 30J It shows from Figure 30A A set of plots showing the additional clusters determined by PCA of multi-parameter impedance measurements. Two Akt / mTOR clusters are observed, both distinguishable by the increase in the RMS (dynamic morphology) parameter. The first four dimensions of the PCA space are shown in the plot.

[0082] Figure 30K This is a set of graphs showing the time traces of a subset of the parameters in PCA 48 hours after compound treatment.

[0083] Figure 30L It is shown Figure 30J The table shows the clusters of compounds, where the targets and / or pathways are determined from the compound suppliers.

[0084] Figure 31A This is a set of graphs showing the principal component analysis results of multi-parameter impedance measurements in Caco-2 cells. A library of 341 FDA-approved compounds was applied to Caco-2 cells at a concentration of 10 μM. Principal component analysis (PCA) was performed using various field measurements (VF, LF at 250 Hz, 1 kHz, 4 kHz, and 16 kHz) and calculations (fusion, RMS) across time points from 0 to 48 hours after compound treatment. The first four dimensions of the PCA space are shown in the graphs.

[0085] Figure 31B This is a set of plots showing the time traces of compounds treated with a subset of parameters in PCA 48 hours later. Unique features were observed for each in each cluster. The shaded line represents the control (median) response.

[0086] Figure 31C It is shown Figure 31A The table shows the clusters of compounds, where the targets and / or pathways are determined from the compound suppliers.

[0087] Figure 31D It is for display purposes. Figure 31A A graph showing the maximum VF values ​​measured at 250 Hz in Caco-2 cells treated with 341 FDA-approved compounds between 0 and 48 hours post-compound treatment. Compounds were tested to assess the barrier function phenotype exhibited in Caco-2 cells.

[0088] Figure 31E This is a set of graphs showing the dose-response of Caco-2 tissue to the compounds, illustrating the highest observed increases in the barrier, amonafide, and ciclopirox. Test concentrations ranged from 1 nM to 10 μM (traces are time-normalized relative to controls). The rapid and slow barrier increases of the two compounds suggest different mechanisms of action. The traces represent the mean ± sd of three wells for each concentration.

[0089] Figure 31F The chemical structures of compounds with similar structures to aminonaphthiramine are shown.

[0090] Figure 31G It is shown Figure 31F A graph showing the changes in Caco-2 barrier function of different compounds 12 hours after compound administration. Multiple rounds of screening showed a rapid increase in barrier function for aminonaphthylamine and NSC 308848; all other compounds showed no significant effect compared to the control. The bar graph is at 12 hours (p < 1 × 10⁻⁶). -5 (n=3 wells). Etoposide exhibits a similar mechanism of action to the inhibition of topoisomerase II specified by aminonaphthirifi, but is not chemically similar.

[0091] Figure 31H This is a set of immunofluorescence images of Caco-2 cells treated with different compounds. Immunofluorescence imaging was performed on ciclopirox ol, aminonaphthiramine, and the most similar aminonaphthiramine derivatives NSC 308848 and UNBS5162 48 hours after compound treatment. Cells were stained for ZO-1 (a cell-cell adhesion and signaling protein), DAPI / nucleus, and closure protein (a cell-cell adhesion protein). For both aminonaphthiramine and NSC 308848, a significant increase in ZO-1 was observed in the membrane and nucleus. The localization of ZO-1 to the nucleus at 48 hours, coupled with the rapid increase in the impedance barrier, indicates the presence of an off-target MOA for aminonaphthiramine, which can directly tighten intercellular connections, thereby generating a ZO-1 signaling response.

[0092] Figure 31I It is shown that... Figure 31F A set of graphs showing impedance measurements of Caco-2 cells treated with the compounds. The traces shown are for compounds applied at a concentration of 10 μM. The traces represent the average of three wells for each compound. Each compound was plotted independently in duplicate. Values ​​were normalized to 1 hour before compound addition and controls were normalized. Dashed lines represent values ​​corresponding to... Figure 31G The 12-hour time point.

[0093] Figure 31J This is a set of figures showing the effects of compound treatment on cyclopropyl ether, aminonaphthiramine, and the most similar aminonaphthiramine derivatives NSC308848 and UNBS5162, 48 hours after compound treatment. Figure 31H ZO-1 response was measured in immunofluorescence images. ZO-1 (green) (a cell-cell adhesion and signaling protein) was quantified using ImageJ analysis of membrane strength (left panel) and cell nucleus (right panel). Bar graphs represent mean ± se for 15 cells for each compound or DMSO control (p < 0.0001 relative to control).

[0094] Figure 32A This is a set of impedance images showing Caco-2 cells treated with different concentrations of bosutinib. Caco-2 cells plated on an uncoated surface were titrated with bosutinib. A rapid decrease in adhesion was observed, and dome-shaped structures began to appear approximately 40 hours after the addition of 10 μM of the compound. Figures 31A to 31J In the Caco-2 screening, no dome was observed in the bosutinib positive control, which was attributed to the collagen surface treatment increasing cell-matrix adhesion to prevent bulging.

[0095] Figure 32B This is displayed at various bosutinib concentrations. Figure 32A The measured impedance values ​​of Caco-2 cells are plotted as a function of time after compound treatment. The line traces represent the average ± sd of three wells for each condition.

[0096] Similar reference numerals in the various figures indicate similar elements. Detailed Implementation

[0097] High-throughput, high-sensitivity electrical and electrochemical measurements can be used in a wide variety of applications. For example, by measuring the integrated response of cellular networks to biochemical stimuli, it is possible to determine the ability of an applied therapeutic agent to affect many different cellular properties, from adhesion to intracellular communication and proliferation or apoptosis. Therefore, such measurements are of considerable utility in drug screening assays and trials.

[0098] As another example, such measurements can be used in chemisensing and screening applications. Certain detection targets may possess reproducible and characteristic electrophysiological features that can be detected using the methods described herein. Therefore, highly sensitive measurements are useful for diagnostic applications, where specific target substances can be identified even when they are present at low concentrations and / or in complex analytical environments.

[0099] This disclosure features measuring devices and systems that can be used to measure individual cellular and cellular network responses to a variety of complex electrical stimuli. The device typically includes an array of electrodes that can both induce and measure cellular electrical responses. By controlling the properties of the applied electrical stimulation (including, but not limited to, electric field geometry, field strength and phase, and field frequency) and selecting appropriate measurement properties (such as voltage and current detection modes, near-field and far-field detection geometries, and electrode signal readout geometry), many key physiological parameters of cells and cellular networks can be elucidated. Queries for certain parameters using alternative measurement techniques are challenging. Methods for performing such measurements are also described in this disclosure.

[0100] As described in more detail below, the measurement device described herein allows for electrical, electrochemical, and optical measurements on cell culture microplates. The surface of the microplate can be physically divided into separate wells, allowing experiments to be performed simultaneously and in parallel between the wells. The number of electrodes measuring the cell response in each well can be selected by partitioning the surface of the microplate; the number of electrodes increases with the size of the wells. The measurement device described herein includes an electrical interface that allows multiple devices to be connected to a common backplane. In this way, measurement information from multiple measurement devices (each of which may include dozens or hundreds of wells) can be acquired in parallel. Furthermore, control information for experiments and measurements performed by each of the electrodes in each well can be transmitted from the backplane to the individual measurement devices.

[0101] Generally, the measurement apparatus described herein comprises multiple complementary metal-oxide-semiconductor (CMOS) integrated circuit (IC) chips on a common substrate. Several advantages can be achieved by using CMOS fabrication techniques to fabricate ICs. In some embodiments, submicron CMOS fabrication processes can be used to form integrated circuits comprising arrays of densely packed electrodes. For example, the electrode-to-electrode spacing in such an array can be 25 micrometers or less, which allows for single-cell measurements. That is, the electrical and electrochemical properties of a single cell can be measured using the array of electrodes. By grouping the electrodes within holes on the semiconductor substrate (such that a single hole contains many electrodes), spatially resolved measurements can be performed to allow for the acquisition of complete hole population statistics.

[0102] In some embodiments, electronic devices and components for electrical and electrochemical measurements can be co-located with the electrodes of an integrated circuit, on or within a semiconductor substrate. Thus, each integrated circuit (including its electrodes and other electronic components) can function as an independent measurement system capable of generating various signals for stimulating cells via the electrodes and measuring the cell's response to the stimulation signals. Each integrated circuit can receive control signals (e.g., from a host controller) to enable the integrated circuit to perform these functions. Conventional measurement systems may rely on external electronic devices and circuitry coupled to the electrodes to measure cell responses. By integrating components within or on a semiconductor substrate, the measurement system becomes more compact and less costly, and multiple measurement devices can operate in parallel, with measurement data transmitted to a common host controller.

[0103] I. Overview

[0104] Figure 1 This is a schematic diagram of an example of a measuring device 100. Device 100 includes a plurality of integrated circuits 102 fabricated on a substrate 104. Device 100 also includes an external connector 106 to which each integrated circuit 102 is connected. Connector 106 allows an external controller to send and receive signals from each of the integrated circuits 102.

[0105] The substrate 104 can be formed from any of a variety of materials. In some embodiments, for example, the substrate 104 is a printed circuit board formed from one or more plastic materials. In some embodiments, the substrate 104 includes one or more semiconductor materials. The connector 106 can be implemented in various ways. In some embodiments, for example, the connector 106 is a finger connector having a plurality of exposed electrodes and is configured to be received by a corresponding connector of another device. In some embodiments, the connector 106 includes a housing ( Figure 1 Multiple electrodes are housed within the device 100 (not shown), wherein the housing is sized to accommodate a mating connector of another device. More generally, connector 106 can be implemented in many different configurations that allow electrical contact between device 100 and external devices.

[0106] On or within device 100, multiple connecting lines (e.g., traces) connect each of integrated circuits 102 to connector 106 (for clarity, Figure 1 (Connecting lines are not shown). As will be discussed in more detail later, the host controller connected to device 100 via connector 106 can send electrical signals directly to any one or more of integrated circuits 102 via connecting lines.

[0107] Typically, device 100 includes R rows of integrated circuits 102 and C columns of integrated circuits 102. R can typically be selected as needed based on the number of measurements and the number of samples targeted for analysis. In some embodiments, R can be 2 or greater (e.g., 4 or greater, 6 or greater, 10 or greater, 20 or greater, 30 or greater, 50 or greater, 100 or greater, 150 or greater, 200 or greater, 500 or greater, or even greater). Similarly, C can typically be selected as needed based on the number of measurements and the number of samples targeted for analysis. In some embodiments, C can be 2 or greater (e.g., 4 or greater, 6 or greater, 10 or greater, 20 or greater, 30 or greater, 50 or greater, 100 or greater, 150 or greater, 200 or greater, 500 or greater, or even greater).

[0108] In some embodiments, the number of rows R and columns C of integrated circuit 102 are selected to correspond to a standard via configuration. For example, in Figure 1 In this device 100, 8 rows and 12 columns of integrated circuits 102 may be included, thereby providing a total of 96 integrated circuits on a substrate 104. The 8×12 geometry with a total of 96 integrated circuits matches the standard 96-well plate commonly used in the field of molecular biology.

[0109] exist Figure 1 In this configuration, integrated circuits 102 are positioned in a regular array on substrate 104, wherein there is a common spacing between adjacent integrated circuits 102 along rows and columns. In some embodiments, the integrated circuits 102 may be positioned in a regular array such that the spacing between adjacent integrated circuits along each row is the same, and the spacing between adjacent integrated circuits along each column is the same but different from the circuit-to-circuit spacing along each row. In some embodiments, the spacing between adjacent integrated circuits along each row is different in some rows. In some embodiments, the spacing between adjacent integrated circuits along each column is different in some columns.

[0110] Although Figure 1 The integrated circuit 102 is shown arranged in a regular square or rectangular array, but more generally, other regular arrangements of the integrated circuit 102 on the substrate 104 may also be used. In some embodiments, for example, the integrated circuit 102 may be arranged on the substrate 104 along a radial line extending from a common center point, in a hexagonal array, in a pentagonal array, or more generally in any regular arrangement.

[0111] In some embodiments, integrated circuit 102 may be positioned on substrate 104 in an irregular and / or non-repetitive arrangement. The methods described herein for delivering electrical signals to cells and measuring cell responses generally do not require delivering such signals from regularly arranged integrated circuits and measuring the responses. Thus, the measurement device may include an irregular arrangement of integrated circuit 102 on substrate 104, and any combination of one or more regular arrangements and one or more irregular arrangements of integrated circuit 102.

[0112] In any of the aforementioned arrangements of integrated circuit 102, the spacing between adjacent integrated circuits (e.g., along rows, along columns, or in another direction) can be selected as needed to control the density of measurement sites on substrate 104. For example, the spacing between adjacent circuits can be 3 mm or greater (e.g., 4 mm or greater, 5 mm or greater, 6 mm or greater, 7 mm or greater, 8 mm or greater, 9 mm or greater, 10 mm or greater, 12 mm or greater, 15 mm or greater, 20 mm or greater, 25 mm or greater, or even greater). As an example, in some embodiments, device 100 includes an 8×12 array of integrated circuits 102 on substrate 104, wherein each integrated circuit is spaced 9 mm apart from adjacent integrated circuits along both rows and columns. With this spacing, the location of the integrated circuits 102 on substrate 104 of device 100 corresponds to the location of the wells on a standard 96-well plate conventionally used in molecular biology.

[0113] The device 100 can be used to measure the electro-inductive response of one or more biological samples under various conditions. In some embodiments, multiple biological samples are studied in parallel. For example, Figure 1 Each integrated circuit 102 shown can be configured to measure the electrical and electrochemical responses from one or more different biological samples. Each such sample may include one or more cells.

[0114] To perform measurements in parallel, the integrated circuit 102 of device 100 can be positioned in individual recesses or holes. Each recess or hole includes a wall that forms a barrier surrounding one or more components in the integrated circuit, preventing cross-contamination with other holes. For example, a separate biological sample, along with optional chemical reagents, solvents, and other substances, can be introduced into each hole; the wall of each hole prevents partial migration of the sample, reagents, solvents, and other substances to other holes on device 100.

[0115] Deploying the integrated circuit 102 in the hole can be achieved in various ways. In some embodiments, the integrated circuit 102 (and / or certain components of such circuit, such as electrodes) can be fabricated in a recess formed in the substrate 104. Figure 2This is a schematic cross-sectional view showing an example of a substrate 104 including recesses 108. An integrated circuit 102 (or a portion thereof) has been fabricated in each of the recesses. The recesses 108 are deep enough that biological samples, chemical reagents, and other substances can be introduced into each of the recesses 108, such that the integrated circuit 102 associated with each of the recesses 108 can selectively measure the electrical and electrochemical information of a sample deposited in the associated recess 108.

[0116] exist Figure 2 In this embodiment, the depth of each recess 108 is limited by the thickness of the substrate 104, and the arrangement and number of holes are fixed by the position of the recesses 108 formed in the substrate 104. As an alternative to fabricating the integrated circuit 102 (or a portion thereof) in the recesses, in some embodiments, the integrated circuit 102 may be fabricated on the substrate 104 first, and then holes may be formed around the integrated circuit 102, wherein each integrated circuit 102 is surrounded by walls.

[0117] In order to form the hole in this way, the housing 302 can cover the top of the substrate 104. Figure 3 This is a schematic diagram showing a housing that can be placed on top of a substrate 104 on which multiple integrated circuits 102 have been fabricated. The housing 302 includes multiple apertures 304 extending through the housing. The apertures 304 are positioned within the housing 302 such that they are aligned with the integrated circuits 102 formed on the substrate 104. Thus, when the housing 302 is attached to the substrate 104, the wall of each of the apertures 304 surrounds one of the integrated circuits 102, forming a hole in which the integrated circuit 102 is positioned at the bottom. Biological samples can be introduced into each hole formed in this way along with chemical reagents, solvents, and other compounds for various electrical and electrochemical measurements.

[0118] Typically, a liquid- and gas-impermeable seal is formed between the housing 302 and the substrate 104, preventing leakage through the bottom of the orifice (i.e., between the housing 302 and the substrate 104). To form such a seal, the substrate 104 can be directly bonded to the housing 302 using epoxy resin, thereby isolating each volume contained within each orifice.

[0119] In some embodiments, the housing 302 may be bonded to the substrate 104 using a biocompatible rigid epoxy resin or a flexible silicone resin material. For example, a flexible silicone resin such as MasterSil 153Med (available from Masterbond, Inc., Hackensack, NJ) may be used to bond the housing 302 to the substrate 104. In some embodiments, the underside of the housing 302 (i.e., the surface in contact with the substrate 104) includes a routed channel, which may be backfilled with epoxy resin to further attach the housing 302 to the substrate 104 and provide structural support for the measurement device.

[0120] In some embodiments, the housing 302 can be secured to the substrate 104 using a mechanical sealing mechanism. For example, a gasket can be positioned between the substrate 104 and the housing 302, and a mechanical clamping mechanism can be used to apply pressure to the substrate 104 and the housing 302, clamping the gasket and sealing the gap space between the substrate 104 and the housing 302. In some embodiments, the gasket ( Figure 3 (Not shown) is formed of at least partially compressible, water-impermeable, biocompatible material. When pressure is applied, the gasket deforms to form a water-impermeable barrier, ensuring that fluid does not leak from the gap between the substrate 104 and the housing 302. A variety of different materials can be used to form the gasket, including but not limited to biocompatible thermoplastic materials. In some embodiments, the material forming the gasket is not chemically bonded to the substrate 104 or the housing 302, so the gasket can be removed to facilitate cleaning of the device 100 and / or the housing 302.

[0121] Various mechanical seal mechanisms can be used to secure the housing 302 to the substrate 104, with washers present between them. In some embodiments, the mechanical seal mechanism includes one or more screws or other threaded members that engage with corresponding threaded members and can be selectively adjusted to control the amount of pressure applied to the substrate 104 and / or the housing 302. In some embodiments, the mechanical seal mechanism includes a latch that engages with either or both of the housing 302 and the substrate 104. The latch may be permanently attached to the substrate 104, attached to the housing 302, or not attached to either the substrate 104 or the housing 302. In some embodiments, the mechanical seal mechanism includes a member having an internal channel sized to receive and engage the edges of the substrate 104 and the housing 302. The mechanical seal mechanism may be configured to be positioned around at least a portion of the periphery of the substrate 104 and / or the housing 302, thereby forming a frame that holds the substrate 104 and the housing 302 together. The component may be formed of a rigid material (e.g., one or more metals or rigid plastics), or alternatively, it may be formed of a flexible material that can be deformed to secure the substrate 104 and the housing 302.

[0122] It should also be noted that the foregoing are merely examples of suitable mechanical seal mechanisms, and more generally, any mechanism for securing the substrate 104 to the housing 302 can be used in the measuring device 100.

[0123] Back Figure 3 There is a 1:1 relationship between the number of formed holes and the number of integrated circuits 102, with one integrated circuit positioned within each hole. However, it is not required that each individual hole contain an entire application-specific integrated circuit. Instead, in some embodiments, a single integrated circuit can be used to perform measurements in multiple holes by forming holes such that they effectively subdivide portions of the surface of the substrate 104 forming the integrated circuit 102. Because each integrated circuit 102 includes a large number of electrodes, groups of electrodes can be assigned to measurements in different holes.

[0124] Typically, a single integrated circuit 102 can be used to perform measurements in one or more (e.g., two or more, three or more, four or more, eight or more, 12 or more, 16 or more, 32 or more, 64 or more, or even more) holes by partitioning the effective area of ​​the integrated circuit (i.e., the spatial distribution of the electrodes of the integrated circuit on the surface of the substrate 104) by using the hole walls, such that different groups of electrodes of the integrated circuit are located in different holes. In fact, the electrodes of any integrated circuit can be partitioned in any number of ways and dedicated to measurements in different holes.

[0125] Figure 4 A schematic diagram of an example of housing 306 is shown, wherein, Figure 3 Each of the holes in housing 302 is further partitioned into four equally sized holes 308. The alignment of the holes in housing 306 is the same as that in housing 302, such that when housing 306 is positioned relative to substrate 104 as described above, the effective area of ​​each integrated circuit 102 is partitioned into four equal areas. Therefore, each integrated circuit 102 is used to perform measurements in four different holes in the resulting measurement device. As an example, for a measurement device including an 8×12 array of integrated circuits 102, housing 302 forms a device including 96 different holes, wherein one integrated circuit is dedicated to each hole, while housing 306 forms a device including 38 four-hole devices, wherein one integrated circuit is dedicated to a set of four holes. In some embodiments, Figure 4 The principle shown can be extended to a housing where each hole of housing 302 is divided into 16 different holes, with one integrated circuit dedicated to each group of 16 holes. Such a device has a total of 1536 holes.

[0126] In the aforementioned example, the walls of the holes are used to subdivide the effective region of each integrated circuit into equal regions, each with the same number of electrodes. However, it should be understood that the effective regions of individual integrated circuits may be partitioned equally or unequally, wherein the same or different numbers of electrodes of the integrated circuit are dedicated to different holes (i.e., located within different holes). Furthermore, although Figure 3 and Figure 4 The holes shown have a generally square cross-sectional shape, but more generally, the holes in the measuring devices described herein can have any cross-sectional shape, and a single measuring device can have holes of more than one shape formed on the device. Other hole cross-sectional shapes that can be used include, but are not limited to, rectangular, circular, elliptical, pentagonal, hexagonal, octagonal, and more generally, any regular or irregular cross-sectional shape.

[0127] Typically, the housing 302 can be formed of various materials. For example, in some embodiments, the housing 302 is formed of one or more biocompatible polymers, such as, but not limited to, polystyrene, polycarbonate, and polyethylene terephthalate. In some embodiments, the housing 302 is formed of one or more other plastics, silicones, and / or polymers.

[0128] The number of electrodes for an integrated circuit located within each hole of a measuring device depends on the electrode density, the lateral width of the hole wall, the number of holes formed on the measuring device, and other factors. Typically, the number of electrodes for an integrated circuit located within each hole can be one or more (e.g., 10 or more, 100 or more, 1000 or more, 5000 or more, 10,000 or more, 50,000 or more, 100,000 or more, 200,000 or more, 500,000 or more, 1 × 10⁻⁶). 6 One or more, or even more).

[0129] To understand how the electrodes of an integrated circuit can be dedicated to a single hole within a measurement device, it is helpful to review examples. For instance, consider an integrated circuit comprising 384 × 384 electrodes arranged in a square array, where the electrode spacing (i.e., electrode-to-electrode spacing) is 12.5 micrometers. For a measurement device in which the entire effective area of ​​the integrated circuit (e.g., the entire electrode array) lies within a single hole (e.g., such as...),... Figure 3 (The measurement occurs within the housing), with a total of 147,456 electrodes dedicated to measurements within the aperture. If the electrode array extends 4.8 mm along each dimension of the array, the effective area of ​​the aperture is 4.8 mm × 4.8 mm. Figure 5A This is a schematic diagram showing the hole 304 having these dimensions.

[0130] However, for this, the effective area of ​​the integrated circuit is subdivided into 4 holes (e.g., as shown in the image). Figure 4 If the measuring device (which is generated by the outer shell) then the effective area of ​​each hole is reduced. Figure 5B This is a schematic diagram illustrating an example of the effective region of an integrated circuit subdivided among four vias 308. The inner walls of the vias cover portions of the integrated circuit, and the effective region of each via is reduced even if no electrodes are shielded. When the effective region of the aforementioned integrated circuit is subdivided into four regions (each dedicated to a different via), the effective region of each via can be approximately 2.2 mm × 2.2 mm, with a total of 36,864 electrodes dedicated to each via, assuming the via walls have a thickness of 400 micrometers. Similarly, Figure 5C A schematic diagram of the effective area of ​​an integrated circuit subdivided among 16 holes is shown. In these cases, the effective area of ​​each hole is 1.0 mm × 1.0 mm, with a total of 9,216 electrodes positioned within each hole.

[0131] exist Figure 3 and Figure 4 In this embodiment, housings 302 / 306 are positioned relative to substrate 104 to form holes on a measurement device. However, other methods may also be used to form holes surrounding the integrated circuit on substrate 104 (and in some embodiments, subdividing its effective area). In some embodiments, for example, pre-formed individual hole structures may be bonded to substrate 104 individually or in groups. Figure 6 This is a schematic diagram showing a substrate 104 comprising a plurality of integrated circuits 102, each of which is surrounded by a hole structure 602 bonded to the substrate 104. For example, bonding can be achieved using epoxy resin in a manner similar to the bonding between the housing 302 / 306 and the substrate 104.

[0132] The pore structure 602 can be formed from various materials, including but not limited to polystyrene, polycarbonate, polyethylene terephthalate, other plastics, silicone-based materials, and various fluorinated polymers. The cross-sectional shape of the pore structure 602 can include any shape described above in conjunction with housings 302 / 306, and can generally be any regular or irregular shape. The pore structure 602 can all have the same dimensions and / or cross-sectional shape, or alternatively, pore structures of different sizes and / or shapes can be bonded to the substrate 104. In addition to... Figure 6 In addition to the individual hole structure surrounding a single integrated circuit, the hole structure 602 may have inner walls that subdivide effective regions of the integrated circuit among the multiple holes (e.g., as shown). Figure 4 (As shown).

[0133] In some embodiments, pore structures similar to pore structure 602 can be formed directly on the surface of substrate 104 by direct injection molding of polystyrene, polycarbonate, polyethylene terephthalate, other plastics, silicone, and other materials. Pore structures formed in this manner can have any of the properties discussed above in conjunction with the pores of housings 302 / 306 and pore structure 602.

[0134] In some embodiments, the measuring device described herein is housed in a housing of a predetermined size to facilitate connection to an external host controller, which can send control signals and receive measurement signals from the measuring device. Figure 7A An example of such a housing is shown in the perspective view. The housing 702 is sized to accommodate the measuring device 100. When the measuring device 100 is inserted into the housing, the connector 106 engages with the interface 704 of the housing 702. The interface 704 is configured to connect to a host controller 706, which can manage some or all aspects and steps of the configuration of the measuring device 100 and the acquisition of measurement information. The housing 702 serves as a standalone unit that can be used to control and acquire data from each integrated circuit 102 of the measuring device 100. Control signals and measurement information are transmitted between the integrated circuits 102 of the measuring device 100 and the host controller 706 via the connector 106 and the interface 704.

[0135] Multiple housings 702 can be stacked together to form a housing array 708 that can accommodate and control multiple measuring devices 100, such as Figure 7B The perspective view is shown. The housing array 708 allows the host controller 706 to connect to multiple measurement devices to control each of the measurement devices and obtain measurement information from each of the measurement devices serially or in parallel. The multiple advantages arising from the parallel execution of measurements enable the simultaneous performance of thousands of different experiments on biological samples.

[0136] Back Figure 1 As described above, integrated circuit 102 can be formed using CMOS manufacturing methods, allowing for the fabrication of dense electrode arrays within each integrated circuit chip. After the integrated circuit chips have been fabricated, various different methods can be used to attach the chips to substrate 104. In some embodiments, for example, a chip-on-board (COB) method is used to attach the integrated circuit chips. Figure 8A This is a schematic diagram illustrating the attachment of an integrated circuit (IC) chip 102 to a substrate 104. The IC chip 102 is positioned in direct contact with the substrate 104 and wire-bonded to the substrate 104 via conductors 802. The molded wire-bonding conductors 802 are then covered with an epoxy sealant 804. One or more holes 806 can be formed around the chip 102 (or a portion thereof) using any of the methods described above.

[0137] COB packaging can present many challenges. Wire bonding the IC chip 102 and then molding it with a sealant 804 is a process that can be difficult to automate in some cases. Functional IC testing can sometimes be difficult, and if a single IC chip is not properly bonded to the substrate 104, errors can be hard to correct.

[0138] Therefore, in some embodiments, after the IC chip 102 has been manufactured, it is attached to the substrate 104 using an open cavity quad flat no-lead (QFN) package method. Figure 8B This is a schematic diagram illustrating an example of an open-cavity QFN packaging method. The IC chip 102 is wire-bonded to a metal lead frame 808, and the wire bonds are encapsulated in an epoxy resin layer to protect the wire bonds and form a rigid package. Holes 806 surrounding the IC chip 102 (or a portion thereof) can be formed using any of the methods described above. A solder layer 812 can then be allowed to flow directly to bond the IC chip 102 to the substrate 104.

[0139] The lead frame 808 improves the thermal conductivity of the device, allowing heat generated during the operation of the IC chip 102 to dissipate through the substrate 104. This dissipation of excess heat allows for improved control over temperature changes in biological samples during the operation of the measurement device.

[0140] The QFN packaging method can be used to achieve certain advantages over the COB method. Individual IC chips 102 can be tested before being permanently attached to the substrate 104, and defective chips can be replaced before attachment, resulting in a lower failure rate for the measurement equipment.

[0141] Another method for attaching the IC chip 102 to the substrate 104 is the ball grid array method. Figure 8C This is a schematic diagram illustrating an example of the method. In this method, IC chip 102 is wire-bonded to substrate 814, and the wire bond is encapsulated in epoxy resin 816. The bottom of substrate 814 includes a grid array of solder balls 818 routed to the wire bond. Holes 806 surrounding IC chip 102 (or a portion thereof) can be formed using any of the methods described above.

[0142] In some embodiments, due to the reduced contact area between substrate 814 and substrate 104, heat dissipation may be compromised when using a ball grid array method to mount the IC chip 102 to substrate 14, compared to the QFN packaging method. Appropriate thermal monitoring and management to avoid excessive heat conduction into the biological sample within the aperture 806 is a characteristic of this implementation.

[0143] Another method for attaching IC chip 102 to substrate 104 is the flip chip ball grid array (FCBGA) method. Figure 8DThis is a schematic diagram illustrating an example of the method. Small-diameter solder balls 818 positioned on the wire bonding pads of IC chip 102 are used to connect IC chip 102 to substrate 820. Larger solder balls 822 are located on substrate 820, connecting substrate 820 to substrate 104. Holes 806 can be formed around IC chip 102 (or a portion thereof) using any of the methods described above.

[0144] The smaller solder balls 818 eliminate the need for wire bonding between the IC chip 102 and the substrate 820, allowing for a larger effective area for the IC chip 102 and enabling the formation of larger vias 806 around the IC chip 102. The absence of wire bonding also improves the robustness of the chip package. Due to the flip-chip nature of this method, the IC chip 102 is also in direct contact with the substrate 104, thus creating an efficient path for heat dissipation from the IC chip 102 to the substrate 104.

[0145] II. Integrated circuits for measuring equipment

[0146] As discussed above, each integrated circuit 102 of the measurement device 100 serves as an independent measurement component and can be configured to perform various functions upon receiving appropriate control instructions (e.g., from the host controller 706), including generating an electrical signal to be applied to the biological sample and measuring information about the biological sample (e.g., electrical and electrochemical parameters) in response to the applied signal. Various aspects of the integrated circuit 102 will be discussed in this section.

[0147] Figure 9 This is a schematic diagram of an example of integrated circuit 102. Integrated circuit 102 includes multiple electrodes 902. Electrodes 902 are located in... Figure 9 The electrodes are positioned in a regular two-dimensional array. Integrated circuit 102 includes one or more reference electrode amplifiers (REA) 906 and one or more peripheral circuits (PC) 908. REA 906 and PC 908 may each be selectively coupled to one or more electrodes 902. Furthermore, integrated circuit 102 includes one or more analog-to-digital converters (ADCs) 904, each ADC 904 coupled to one or more REA 906 and / or one or more PC 908 (and receiving measurement signals from them).

[0148] like Figure 9As shown, integrated circuit 102 also includes row selection logic unit 910 and column selection logic unit 912. These logic units are used to selectively enable specific rows and columns of electrode 902. For example, the logic units can send control signals to specific rows and / or columns of electrode 902 to prepare electrodes in those rows and columns to receive configuration signals (e.g., from host controller 706 and / or from memory cells storing configuration bits for the electrodes). By enabling rows and / or columns of electrodes in this way, individual electrodes 902 can be selectively configured, for example, to perform specific measurements.

[0149] It should be noted that, although Figure 9 Although not shown in the diagram, some components of integrated circuit 102 are also coupled to connector 106 and can therefore be connected to host controller 706. The connected components can receive control signals from host controller 706, which cause the components to perform various functions, as described in more detail below. The connected components can also send signals, including, for example, measurement information, to host controller 706.

[0150] like Figure 9 As shown, each electrode 902 is spaced apart from its adjacent electrode. Typically, the spacing Δx and Δy can be selected as needed to achieve an electrode array with a specific spatial resolution, depending on factors such as the desired measurement resolution, the nature of the sample being measured, and the desired field geometry. The spacing Δx and Δy can be selected independently and can be 1 mm or less (e.g., 800 μm or less, 600 μm or less, 500 μm or less, 400 μm or less, 300 μm or less, 200 μm or less, 100 μm or less, 75 μm or less, 50 μm or less, 40 μm or less, 30 μm or less, 25 μm or less, 20 μm or less, 15 μm or less, 10 μm or less, 5 μm or less, 3 μm or less, or even less). In some embodiments, each of the intervals Δx and Δy is independently selected and is between 5 micrometers and 1 mm (e.g., between 5 micrometers and 500 micrometers, between 10 micrometers and 500 micrometers, between 10 micrometers and 400 micrometers, between 15 micrometers and 400 micrometers, between 15 micrometers and 300 micrometers, between 20 micrometers and 300 micrometers, between 20 micrometers and 200 micrometers, between 25 micrometers and 200 micrometers, between 25 micrometers and 100 micrometers, or any range within any of the foregoing ranges).

[0151] exist Figure 9In this configuration, electrodes 902 are arranged in a square or rectangular array, where Δx and Δy may be the same or different. More generally, the electrodes can be arranged in a variety of different array geometries. For example, electrodes 902 can be arranged in a square array, rectangular array, hexagonal array, octagonal array, ring array, spiral array, radial array, or any other type of array defined by a regular repeating geometric pattern of the electrodes. Alternatively, in some embodiments, electrodes 902 can be positioned such that the repeating spatial order of electrodes 902 is not defined by their arrangement, i.e., in an irregular spatial arrangement.

[0152] exist Figure 9 In this context, electrode-to-electrode spacings Δx and Δy are measured in orthogonal directions within the array. However, more generally, the spacing can represent the nearest neighbor distance between electrodes measured along non-orthogonal directions.

[0153] In some embodiments, all of the electrodes 902 are arranged in an array defined by a common repeating spatial pattern of the electrodes. In some embodiments, some of the electrodes 902 may be arranged in a first array defined by a first electrode pattern, and some electrodes 902 may be arranged in a second array defined by a second electrode pattern. As an example, the first array may be a square or rectangular array, and the second array may be a hexagonal array. More generally, any combination of array types – including (but not limited to) the types described above – may be present in the integrated circuit 102.

[0154] In some embodiments, the two electrode arrays may be spatially separated from each other in integrated circuit 102. Alternatively, in some embodiments, the first and second arrays may be at least partially interleaved, such that at least some electrodes of the second array are spatially located within the boundary of the first array, and vice versa. In some embodiments, the arrays may be completely interleaved, for example, wherein one array is completely located within the boundary of the other array.

[0155] Although the foregoing discussion focuses on an array of two electrodes, more generally, the electrodes 902 of the integrated circuit 902 can be arranged in any number (e.g., 2 or more, 3 or more, 4 or more, 5 or more, 6 or more, 7 or more, 8 or more, 10 or more, 12 or more, 16 or more, 32 or more, or even more) arrays, each of which can have any of the characteristics described above.

[0156] Typically, the number of electrodes 902 within integrated circuit 102 can be selected based on criteria such as the number of samples to be measured, the desired spatial resolution of the measurement, power consumption considerations, and the measurement frequency. In some embodiments, for example, integrated circuit 102 includes at least 3000 electrodes (e.g., at least 3000 electrodes, at least 4000 electrodes, at least 5000 electrodes, at least 10,000 electrodes, at least 20,000 electrodes, at least 30,000 electrodes, at least 50,000 electrodes, at least 75,000 electrodes, at least 1.0 × 10⁻⁶ electrodes). 5 One electrode, at least 1.5 × 10 5 One electrode, at least 2.0 × 10 5 One electrode, at least 2.5 × 10 5 One electrode, at least 3.0 × 10 5 One electrode, at least 5.0 × 10 5 One electrode (e.g., at least 7.5 × 10⁻⁶) 5 One electrode, at least 1.0 × 10 6 One electrode, at least 3.0 × 10 6 One electrode, at least 5.0 × 10 6 One electrode, at least 7.0 × 10 6 One electrode, at least 1.0 × 10 7 One electrode, at least 1.2 × 10 7 One electrode, at least 1.4 × 10 7 One electrode, at least 1.6 × 10 7 One electrode, at least 1.8 × 10 7 One electrode, at least 2.0 × 10 7 One electrode or even more electrodes).

[0157] The effective area of ​​integrated circuit 102 (which corresponds to the on-chip area occupied by electrode array 902) typically depends on the electrode-to-electrode spacing and the total number of electrodes. In some embodiments, for example, the effective area of ​​integrated circuit 102 is 0.5 mm². 2 (For example, 1.0mm) 2 2.0mm 2 3.0mm 2 5.0mm 2 6.0mm 2 8.0mm 2 10.0mm 2 12.0mm 2 14.0mm 2 16.0mm 2 18.0mm 2 20.0mm 2 25.0mm2 30.0mm 2 50.0mm 2 1.0×10 2 mm 2 1.5×10 2 mm 2 2.0×10 2 mm 2 3.0×mm 2 4.0×10 2 mm 2 5.0×10 2 mm 2 6.0×10 2 mm 2 7.0×10 2 mm 2 8.0×10 2 mm 2 9.0×10 2 mm 2 1.0×10 3 mm 2 Or larger (e.g., 1.2 × 10⁻⁶) 3 mm 2 Or larger, 1.4 × 10 3 mm 2 Or larger, 1.6 × 10 3 mm 2 Or larger, 1.8 × 10 3 mm 2 Or larger, 2.0×10 3 mm 2 Or larger, 2.2×10 3 mm 2 Or larger, 2.4 × 10 3 mm 2 Or larger, 2.6 × 10 3 mm 2 Or larger, 2.8 × 10 3 mm 2 Or larger, 3.0×10 3 mm 2 Or larger, or even larger).

[0158] In the following discussion, for clarity, the discussion will be... Figure 9 The example shown illustrates this—where electrodes 902 are arranged in a spatially uniform array with consistent electrode spacing. However, it should be understood that, unless otherwise explicitly stated, the additional features of electrodes 902 described below apply to electrodes positioned in any of the above arrangements.

[0159] (a) Pixel circuit

[0160] Each electrode 902 of integrated circuit 102 can typically be connected to a variety of different components and circuit elements. Typically, each electrode 902 is connected to a pixel circuit, which includes various different components that can be configured to control functions performed by the electrode 902 in response to one or more control signals. Various different pixel circuits can be used in integrated circuit 102. In some embodiments, each electrode 902 is coupled to its own pixel circuit, such that each electrode 902 in integrated circuit 102 has a dedicated pixel circuit. In some embodiments, one or more electrodes may share a pixel circuit and may be individually coupled to the pixel circuit, or alternatively, a group of one or more electrodes may be simultaneously coupled to a shared pixel circuit.

[0161] Typically, the pixel circuit coupled to electrode 902 can perform at least two functions. First, the pixel circuit can deliver one or more electrical signals (e.g., voltage signals, current signals) to electrode 902. Second, the pixel circuit can receive one or more electrical signals at electrode 902. Depending on the configuration of the pixel circuit, each of these functions can be implemented in different (and multiple) ways.

[0162] Figure 10A This is a schematic diagram of an example pixel circuit 1050 to which electrode 902 can be coupled. Pixel circuit 1050 includes pixel logic block 1052 and pixel analog circuit 1054. Figure 10A The memory unit used to store settings of switches in pixel analog circuit 1054 is not shown. Typically, pixel logic block 1052 controls the configuration of one or more switches in pixel analog circuit 1054, thereby selecting the functional attributes of pixel analog circuit 1054.

[0163] Pixel logic block 1052 includes input terminals 1056, 1058, 1060, 1062, and 1064, and output terminals 1066 and 1064. At terminal 1056, pixel logic block 1052 receives an input voltage signal from an analog voltage source AVDD33. Typically, the voltage signal has an amplitude of approximately 3.3 V, although voltage signals of other amplitudes can also be provided.

[0164] At terminal 1058, pixel logic block 1052 receives configuration programming bit values, for example, directly or indirectly, from host controller 706 or from a memory unit storing bit values ​​for configuring electrode 902. At terminals 1060 and 1062, pixel logic block 1052 receives assertion and / or deassertion signals from row selection logic unit 910 and / or column selection logic unit 920 that control the operation of latches within pixel logic block 1052. At output terminals 1066 and 1068, the configuration bit values ​​generated by pixel logic block 1052 are sent to pixel analog circuit 1054 to control the configuration of switches within pixel analog circuit 1054, as will be described in more detail below.

[0165] To control the configuration of the switches in the pixel analog circuit 1054, the pixel logic block 1052 contains four D latches. Figure 10B This is a schematic diagram illustrating an example of a D latch. Figure 10B In this configuration, the D latch is transparent when the LE input of the D latch is asserted and the LEB input is deasserted via control signals received at terminals 1060 and 1062. Each D latch generates corresponding output bit values ​​QB and B, which are sent at terminals 1066 and 1068 of the pixel logic block 1052. The output bit values ​​Q<3:0> and QB<3:0> of each of the four D latches are sent as bit signals S<3:0> and SB<3:0> to the pixel analog circuit 1054, as shown below. Figure 10A As shown.

[0166] Figure 10C This is a schematic diagram illustrating an example of a pixel analog circuit 1054. The pixel analog circuit 1054 includes six switches SW1 (1002), SW2 (1004), SW3 (1006), SW4 (1008), SW5 (1010), and SW6 (1012). Each of switches 1002, 1004, 1008, 1010, and 1012 can be toggled between an open and closed state. Switch 1006 can be toggled between terminal T1 and terminal T2. The pixel analog circuit 1054 includes terminals 1016 and 1018, at which a reference voltage signal V can be received from a reference amplifier 906, from peripheral circuitry 908, or from a digital-to-analog converter (DAC). REF1 At terminal 1018, a reference voltage signal V can be selectively received from a reference amplifier 906, from peripheral circuitry 908, or from a digital-to-analog converter (DAC). REF2 The pixel analog circuit 1054 also includes a terminal 1030 at which a bias voltage signal for a current source of the source follower portion of the pixel analog circuit 1054 is received.

[0167] refer to Figure 10AThe pixel analog circuit 1054 also includes elements not shown for clarity. Figure 10C Other terminals are shown in the diagram. Pixel analog circuitry 1054 includes terminal 1032, at which it receives voltage bias signals for electrode 902 from reference amplifier 906, peripheral circuitry 908, or digital-to-analog converter (DAC). Pixel analog circuitry 1054 includes terminals 1034 and 1036, at which it receives clock signals IGENCKM and IGENCKP, and uses clock signals IGENCKM and IGENCKP in certain operating modes to inject current via electrode 902, as discussed further below.

[0168] Return to Figure 10C The pixel analog circuit 1054 is coupled to the electrode 902 at terminal 1014. Electrical signals (e.g., voltage signals, current signals) are delivered to the electrode 902 through terminal 1014, and the electrical signals at the electrode 902 are measured at terminal 1014. The pixel analog circuit 1054 also includes an output terminal 1020, which is selectively connected to peripheral circuitry 908, such that the measurement signal detected by the electrode 902 can be routed to peripheral circuitry 908 through a source follower portion of the pixel analog circuit 1054.

[0169] The pixel analog circuit 1054 includes a current injector 1022, which includes a capacitor 1028 and switches 1024 and 1026. Switches 1024 and 1026 are connected to terminals 1034 and 1036, respectively. When switches 1024 and 1026 receive a suitable input signal via these terminals, the current injector 1022 is "turned on" and injects current from the capacitor 1028 at electrode 902. When switches 1024 and 1026 do not receive a suitable signal via terminals 1034 and 1036, the capacitor 1028 is isolated and the current injector 1022 is "turned off".

[0170] Figure 10C Different switches in the pixel analog circuit 1054 allow each electrode 902 to operate in a variety of different modes. Table 1 summarizes 14 different modes in which the electrode 902 can operate, depending on the state of switches SW1-SW6 and current injector 1022 in the pixel analog circuit 1054.

[0171] Table 1

[0172]

[0173] In Table 1, the logic control for switches SW5, SW6, and SW3 can be shared because SW3 is always connected to T2 when switches SW5 and SW6 are closed, and connected to T1 when switches SW5 and SW6 are open. Therefore, by sharing logic control, the number of storage elements used for configuring the electrodes can be reduced from six to four, which simplifies the design of the pixel circuit 1050 and reduces the area of ​​the electrodes 902 in the integrated circuit 102. By sharing the logic control for switches SW5, SW6, and SW3, the various operating modes shown in Table 1 can be represented by a truth table of four configuration bits PBC<3:0>, as shown in Table 2 below.

[0174] Table 2

[0175]

[0176] Therefore, the state of switch SW1 is determined by the PBC of pixel logic block 1052. <0> Input bit value control, the state of switch SW2 is controlled by the PBC of pixel logic block 1052. <1> Input bit value control: the states of switches SW3, SW5, and SW6 are controlled by the PBC of pixel logic block 1052. <2> The input bit value is controlled, and the state of SW4 is controlled by the PBC of pixel logic block 1052. <3> Input bit value control.

[0177] As previously mentioned, the pixel circuit 1050 can configure the electrode 902 to operate in various different modes, as summarized in Table 1. In mode 1, the pixel analog circuit 1054 is configured to deliver a voltage level V to the electrode 902. E A biased current signal. The current signal can be used, for example, to pattern cells placed on top of the measuring device 100. Figure 11A This is a schematic diagram showing the Mode 1 configuration of the pixel analog circuit 1054. For clarity, active circuit paths are indicated by thick black lines. To achieve current injection, two clock signals (ICKGENP and ICKGENM) are applied to switches 1024 and 1026 of the current injector 1022, respectively. Clock signal ICKGNP is a phase 1 clock signal that does not overlap with clock signal ICKGENM, and clock signal ICKGENM is a phase 2 clock signal that does not overlap with clock signal ICKGNP. Each clock signal has a frequency F. SC . Figure 11B This is a graph showing an example of two clock signals applied during mode 1.

[0178] The total capacitance of the current injector 1022 typically consists of the drain-to-body and source-to-body capacitances of switches 1024 and 1026, and the additional metal-to-metal capacitance of capacitor 1028. Under typical operating conditions, for example, at a frequency F of 2 MHz, the current injector 1022...SC This generates a current signal with an amplitude of 5 nA.

[0179] In this mode, for diagnostic purposes, the source follower portion of the pixel analog circuit 1054 is connected to terminal 1020, allowing the current injector signal to be observed at the terminal of the peripheral circuit 908 for diagnostic purposes.

[0180] Switches 1024 and 1026 of the current injector 1022 are typically implemented using NMOS transistors. When electrode 902 is not operating in mode 1 (e.g., when no current is injected during cell patterning on measurement device 1000), switch SW5 connects electrode 902 to the voltage level V generated by the current injector 1022. E Bias current signal isolation. In some embodiments, switch SW5 can also be implemented as an NMOS device, and therefore can be the V of the current signal. E An upper limit is established for the value of the bias voltage.

[0181] The pixel analog circuit 1054 in Mode 2 is configured similarly to that used in Mode 1, and... Figure 11C The diagram schematically illustrates the active circuit path, represented by thick black lines for clarity. In mode 2, electrode 902 is isolated from terminal 1020 (e.g., the output terminal connected to peripheral circuit 908) by keeping switch SW4 in the OFF state. This mode is useful for preventing interaction between multiple electrodes 902 connected to the same peripheral circuit 908. For example, for multiple electrodes 902 selectively connected to a common peripheral circuit 908, one of the electrodes 902 can be configured to operate in mode 1 (i.e., active current injection), while other electrodes 902 selectively connected to the common peripheral circuit 908 can be configured to operate in mode 2 to prevent interaction with the electrode 902 operating in mode 1.

[0182] Mode 3 corresponds to the open circuit potential (OCP) measurement mode, and in Figure 11D The diagram is schematically shown, with active circuit paths represented by thick black lines for clarity. In this mode, voltage amplitude V is used as the reference. E The biased electrode voltage signal is buffered by the NMOS source follower portion of the pixel analog circuit 1054, and electrode 902 is connected to terminal 1020, allowing the voltage signal at electrode 902 to be measured by peripheral circuit 908. For example, during operation, the bias current of the source follower portion of the pixel analog circuit 1054 is set to a value that results in a relatively high output impedance (e.g., several kilohms) for the source follower portion of the pixel analog circuit 1054, which allows the capacitive load of the electrode (e.g., a voltage signal) to be driven to the peripheral circuit 908 connected to terminal 1020.

[0183] Mode 4 corresponds to an open-circuit mode similar to Mode 3, except that SW4 is disconnected, so that the electrode voltage signal is not routed to terminal 1020. Figure 11E This is a schematic diagram showing the pixel analog circuit 1054 configured in mode 4. For clarity, the active circuit paths are indicated by thick black lines.

[0184] As discussed above in combination with modes 1 and 2, mode 4 can be used in conjunction with mode 3 to prevent interaction between the multiple electrodes 902 when multiple electrodes 902 share a common peripheral circuit 908. In particular, by keeping the electrodes 902 in mode 4, the electrode voltage can be stabilized at terminal T2 of switch SW3 before being actively measured by the peripheral circuit 908 when switch SW4 is closed (i.e., the configuration of pixel analog circuit 1054 is changed to mode 3).

[0185] As will be described below, the measurement signal at electrode 902 is detected by peripheral circuitry 908. However, within integrated circuit 102, there are typically fewer peripheral circuits 908 than electrode 902. Therefore, electrode 902 can be selectively connected to peripheral circuitry 908, such that electrode 902 typically shares peripheral circuitry 908. To detect the measurement signal from a specific electrode 902, electrode 902 is selectively connected to peripheral circuitry 908. Other electrodes 902 sharing the same peripheral circuitry 908 are nominally disconnected from peripheral circuitry 908, while the peripheral circuitry detects the measurement signal from the specific electrode. Regarding the operating modes described above, the specific electrode 902 from which the measurement signal is detected is configured for operation in mode 3, while other electrodes sharing peripheral circuitry 908 are configured for operation in mode 4.

[0186] To detect measurement signals from the electrode array within integrated circuit 102, peripheral circuits 908 of integrated circuit 102 are each selectively connected to one of the electrodes 902. For example, in an integrated circuit having P peripheral circuits 908, P electrodes 902 are initially connected to the peripheral circuits (one electrode connected to each peripheral circuit). Each of the connected electrodes 902 can be configured to operate in mode 3, and the measurement signal from each connected electrode can be detected by the peripheral circuit.

[0187] Typically, the P electrodes 902 at which a measurement signal is detected represent only a subset or "frame" of the total number of electrodes in the integrated circuit 102. Measurement signals are detected from the electrodes of the integrated circuit frame by frame; thus, in the first frame, measurement signals are detected from a first subset of the electrodes, and then in the second (and subsequent) (one or more) frames, measurement signals are detected from additional subsets of the electrodes. Each subset of electrodes corresponding to a new frame is selectively connected to the P peripheral circuits 908 that detect the measurement signal, while the other electrodes of the integrated circuit are disconnected from the peripheral circuits.

[0188] In the context of modes 3 and 4 described above, the active frame of the electrodes (the subset of electrodes from which measurement signals are detected) can be configured to operate in mode 3 and selectively connected to peripheral circuitry 908, which detects the measurement signals from the active frame of the electrodes. Other electrodes of integrated circuit 102 can be configured to operate in mode 4, which can have several advantages. First, by configuring the electrodes to operate in mode 4, interaction between the electrodes and other electrodes of the integrated circuit is prevented, and in particular, interference with the measurement signals detected from the electrodes in the active frame is prevented. Second, the measurement signals at electrode 902 frequently exhibit some "stabilization" over time; that is, they gradually reach a steady-state value. By configuring the electrodes in mode 4 before detecting the measurement signals from them, the measurement signals can be allowed to stabilize to a steady-state value before they are detected by the peripheral circuitry, resulting in more accurate and reproducible measurements.

[0189] In this way, while detecting the measurement signal from the active frame of the electrodes, a subset of electrodes forming the next measurement frame can be prepared within the measurement integrated circuit 102 by configuring the electrodes of the next frame in mode 4 and allowing their measurement signals to stabilize to a steady-state value before being detected. After the peripheral circuit detects the measurement signal from the current electrode frame, the electrodes of the current frame can be changed to operate in mode 4, and the electrodes of the next measurement frame can be changed to operate in mode 3, which effectively moves the current frame within the electrode array in the integrated circuit 102.

[0190] In the manner described above, measurement signals from electrodes of integrated circuit 102 can be detected frame by frame (i.e., grouped) from batches or subsets of multiple electrodes, and when the peripheral circuit detects an electrode measurement signal for a specific frame from a group of electrodes configured to operate in mode 3, one or more subsequent groups of electrodes can be prepared for measurement signal detection by configuring the electrode group to operate in mode 4.

[0191] Mode 5 corresponds to the voltage signal V received by the pixel analog circuit 1054 at terminal 1016. REF1 The buffer calibration mode. Figure 11FThis is a schematic diagram of the mode; for clarity, the active circuit path is indicated by thick black lines. This mode can be used for calibration purposes. Reference voltage V REF1 The signal is applied to electrode 902, and the output is directed to terminal 1020, where it can be detected by peripheral circuitry 908. For each electrode 902, the measurement of the output signal from electrode 902 can be used to correct the offset (e.g., bias) of the source follower from the actual open-circuit potential value, thereby allowing individual correction of the open-circuit potential signal measured from electrode 902.

[0192] Mode 6 in Figure 11G The diagram schematically illustrates this; for clarity, the active circuit paths are indicated by thick black lines. Mode 6 is similar to Mode 5, except that the output from electrode 902 is disconnected from terminal 1020. In this way, the relationship between Modes 5 and 6 is similar to the relationship between Modes 1 and 2, and similar to the relationship between Modes 3 and 4. During calibration, the actively calibrated electrode can be configured for operation in Mode 5 and connected to the peripheral circuit 908. To prevent interaction between electrodes during calibration, the uncalibrated electrode can be configured for operation in Mode 6.

[0193] Mode 7 corresponds to the voltage signal V received by the pixel analog circuit 1054 at terminal 1018. REF2 The buffer calibration mode. The configuration of the pixel analog circuit 1054 in mode 7 is similar to that in mode 5, except that V REF2 An output signal from electrode 902 is applied to the outside of electrode 902 and directed to terminal 1020.

[0194] Mode 8 is similar to Mode 7, except that the output from electrode 902 is disconnected from terminal 1020. The relationship between Modes 7 and 8 is similar to the relationship between Modes 5 and 6 described above, except that the reference voltage signal V... REF2 It is directed outside of electrode 902. A similar consideration applies to mode selection during the calibration of electrode 902 to correct for the offset of the source follower from the actual open-circuit potential value.

[0195] Mode 9 is the current measurement mode. Figure 11H This is a schematic diagram showing the pixel analog circuit 1054 configured in mode 9. For clarity, the active circuit paths are indicated by thick black lines. In this mode, the measurement signal at electrode 902 is directed to terminal 1020, where it is coupled to peripheral circuit 908. To measure the current at electrode 902 biased at a known potential, peripheral circuit 908 acts as a transimpedance amplifier, amplifying the current measurement signal from electrode 902.

[0196] Mode 10 is a voltage supply mode, in which electrode 902 directly receives the voltage signal V at terminal 1016 of pixel analog circuit 1054. REF1 Bias. Figure 11I This is a schematic diagram showing the pixel analog circuit 1054 configured in mode 10. For clarity, the active circuit paths are indicated by thick black lines. In this mode, V REF1 The measurement signal is delivered directly to electrode 902. By routing the measurement signal from that electrode / those electrodes to peripheral circuitry 908, one or more peripheral circuits 908 detect the measurement signal from another electrode (or electrode group).

[0197] Mode 11 is similar to Mode 10, except that switch SW4 is open, preventing the output signal from electrode 902 from being routed to the external circuitry. Mode 11 is used to prevent interaction with the electrodes in Mode 10, in a manner similar to the relationship between Modes 1 and 2, Modes 3 and 4, and Modes 5 and 6 discussed above.

[0198] Mode 12 is a voltage supply mode, in which electrode 902 is directly used to receive the voltage signal V at terminal 1018 of pixel analog circuit 1054. REF2 Bias. Otherwise, mode 12 is similar to mode 10. By routing the measurement signal from this / those electrodes to one or more peripheral circuits 908, the measurement signal from another electrode (or electrode group) is detected by one or more peripheral circuits 908.

[0199] Mode 13 is similar to Mode 12, except that switch SW4 is open, preventing the output signal from electrode 902 from being routed to the external circuitry. Mode 13 is used to prevent interaction with the electrodes in Mode 12, in a manner similar to the relationship between Modes 1 and 2, Modes 3 and 4, and Modes 5 and 6 discussed above.

[0200] Combinations of modes 9, 11, and 13 can be used to measure the "transelectrode impedance" between electrode groups in integrated circuit 102. For example, in some measurements, one or more of electrodes 902 are configured to operate in mode 9 and serve as measuring electrodes for measuring current thereat as described above. Additionally, one or more of electrodes 902 are configured to operate in mode 11 or mode 13 and serve as shielding electrodes to control the electric field distribution at the surface of measuring device 100. Furthermore, one or more of electrodes 902 are configured to operate in mode 13 or mode 11 and serve as return electrodes for the electric field.

[0201] The choice of spatial arrangement of electrode arrays configured in different modes, as described above, depends on many factors, including but not limited to the nature of the measurements being performed and the relevant biological properties of the samples being inquired about by the measurements. Specific examples of different arrangements of electrodes operating in different modes to perform different measurements are described in more detail below.

[0202] Mode 14 is an isolated electrode condition, in which electrode 902 is electrically isolated from the reference voltages provided at terminals 1016 and 1018, from the current injector 1022, and from the peripheral circuitry 908. This mode can be used to isolate electrode 902 from other electrodes in integrated circuit 102 in a manner similar to other modes such as 2, 4, and 6. For example, during the detection of a current measurement signal at one or more other electrodes, electrode 902 can be configured to operate in mode 14 to ensure that electrode 902 does not interact with one or more other electrodes at which a measurement signal is being detected.

[0203] (b) Electrode measurement geometry

[0204] As discussed above, each of the electrodes 902 is connected to the dedicated pixel circuit 1050, and therefore each of the electrodes can be configured to operate in any of the different operating modes described. Furthermore, it should be understood that the operating modes shown in Table 1 are merely examples, and each of the electrodes 902 can also be configured with additional operating modes depending on the nature of the specific measurement being performed. The configuration of each electrode is established by four bit values ​​PBC<3:0>, which the pixel logic block 1052 uses to control the state of switches SW1-SW6 of the pixel analog circuit 1054.

[0205] The multiple operating modes in Table 1 can be used to detect the measurement signal at electrode 902. In other words, electrode 902 can be configured to operate in one of multiple different operating modes, and once configured, the peripheral circuitry 908 connected to electrode 902 via terminal 1020 can detect the measurement signal at electrode 902.

[0206] Because integrated circuit 102 contains fewer peripheral circuits 908 than electrodes 902, measurement signals are detected from groups or frames of electrodes 902 by the peripheral circuits 908, as described above. The number of electrode measurement signals that can be detected in parallel depends on the number of peripheral circuits 908 present in integrated circuit 102, since each peripheral circuit 908 is selectively connected to only one electrode 902 at any given time, and therefore can only detect measurement signals from the electrode to which it is connected.

[0207] In some embodiments, measurement signals are detected from adjacent groups of electrodes in integrated circuit 102 such that the effective spatial resolution of the measurement signals corresponds to the spacing (i.e., Δx and Δy) between adjacent electrodes in the electrode array. By detecting measurement signals from groups or frames of electrodes 902 in parallel, the total measurement time for detecting signals across the entire electrode array can be reduced compared to the time required to sequentially detect measurement signals at each electrode in the array.

[0208] In some embodiments, measurement signals can also be detected from groups of electrodes that are not adjacent to each other in the electrode array of integrated circuit 102. By detecting measurement signals from a group of electrodes 902 that are not all neighbors within the electrode array in parallel, the effective spatial resolution of the detected measurement signals can be adjusted. Effectively, the electrode spacing can be adjusted to a larger (i.e., coarser) value. Measurements performed in this manner can be used in a variety of applications. For example, to facilitate certain measurements, an initial scan of the electrode array of integrated circuit 102 can be performed at a coarser (i.e., lower) spatial resolution to sample measurement signals across the electrode array faster than possible at the finest spatial measurement resolution.

[0209] To further illustrate the process of adjusting the effective spatial measurement resolution, consider the electrode array of integrated circuit 102, where electrodes 902 are arranged in a regular square array pattern, with a spacing of 12.5 micrometers between adjacent electrodes in two orthogonal array directions (i.e., Δx = 12.5 micrometers, Δy = 12.5 micrometers). It should be noted that these electrode spacings are merely illustrative; more generally, as mentioned above, various different electrode spacings can be used. Furthermore, in this example, integrated circuit 102 includes nine peripheral circuits 908 for detecting measurement signals from the electrodes 902 in the array. As will be explained in more detail below, the number of peripheral circuits 908 in integrated circuit 102 can generally vary over a wide range depending on various performance, manufacturing, and power consumption criteria.

[0210] Figures 12A-12D This is a schematic diagram illustrating a portion of the electrode array in this example. In each of these diagrams, the measurement signal is detected from different electrodes of the array in a manner that varies the effective spatial resolution of the measurement signal between the diagrams. Figure 12AIn the first measurement frame, each electrode in region 1202 (a total of 9 electrodes) is selectively connected to a different peripheral circuit in 9 peripheral circuits 908, and the measurement signal from each electrode in region 1202 is detected by the peripheral circuit. Then, in the second measurement frame, each electrode in region 1204 (a total of 9 electrodes) is selectively connected to a different peripheral circuit in 9 peripheral circuits 908, and the measurement signal from each electrode in region 1204 is detected by the peripheral circuit. This process continues until the measurement signal from each electrode in the array has been measured. Because signals are detected from adjacent electrodes, the effective measurement resolution in both array directions is 12.5 micrometers, which corresponds to the maximum array resolution of the minimum interval between the measured signals detected in the array.

[0211] Figure 12B An example of a detection method for detecting measurement signals at low resolution is illustrated. Measurement signals are detected from electrodes in each row and column of an electrode array. However, within each row and column, measurement signals are detected only from every other electrode (e.g., every other electrode). That is, within each row and column of the electrode array, no measurement signal is detected from any immediately adjacent pair of electrodes. Therefore, referring to... Figure 12B In the first measurement frame 1206, each of the nine shaded electrodes is selectively connected to a different peripheral circuit in each of the nine peripheral circuits 908, and the measurement signals from the nine connected electrodes are detected by the peripheral circuits. The effective spatial resolution of the detected measurement signals is the nearest diagonal neighbor distance, sqrt(2). 12.5 micrometers = 17.7 micrometers. When detecting from... Figure 12B After measuring the signal of each of the nine shaded electrodes shown, a second measurement frame consisting of nine different electrodes, whose relative positions are similar to those shown, is selected. Figure 12B The relative positions of the nine shaded electrodes in the array. The electrodes of the second measurement frame are each selectively connected to one of the nine peripheral circuits 908, and the measurement signal corresponding to the second measurement frame is detected. This process is repeated across the electrode array to compare... Figure 12A The measurement signal is generated with a lower effective spatial resolution.

[0212] Figure 12C An example of a detection method for detecting measurement signals with even lower spatial resolution is illustrated. Within the electrode array, measurement signals are detected only from electrodes in alternating rows and columns within each measurement frame. Furthermore, in each row and column of the measurement frame from which measurement signals are detected from electrodes, measurement signals are detected only from every other electrode (e.g., every second electrode). Figure 12CAn exemplary measurement frame 1208 is illustrated. In this method, the measurement signal is detected only from the next nearest neighbor electrode along both the array row and column directions and the array diagonal direction.

[0213] In measurement frame 1208, each of the nine shaded electrodes is selectively connected to a different peripheral circuit in the nine peripheral circuits 908, and the measurement signals from the nine connected electrodes are detected by the peripheral circuits. The effective spatial resolution of the detected measurement signal is the next nearest neighbor distance along the array row and column directions, 2. 12.5 micrometers = 25.0 micrometers. When detecting from... Figure 12C After measuring the signal of each of the nine shaded electrodes shown, a second measurement frame consisting of nine different electrodes, whose relative positions are similar to those shown, is selected. Figure 12C The relative positions of the nine shaded electrodes in the array. The electrodes of the second measurement frame are each selectively connected to one of the nine peripheral circuits 908, and the measurement signal corresponding to the second measurement frame is detected. This process is repeated across the electrode array, even at levels lower than... Figure 12B The effective spatial resolution generates the measurement signal.

[0214] Figure 12D An example of a detection method for detecting measurement signals with lower spatial resolution is illustrated. Figure 12D In the method shown, measurement signals are detected only from every other (e.g., every second) row and column of the electrode array. Furthermore, within each row and column of the measurement frame from which measurement signals are detected, measurement signals are detected only from every fourth electrode. Figure 12D In example measurement frame 1210, the measurement signal is detected only from the shaded electrodes. Thus, the effective spatial resolution of the detected signal is the next nearest diagonal neighbor distance within the electrode array.

[0215] In measurement frame 1210, nine shaded electrodes are each selectively connected to different peripheral circuits in nine peripheral circuits 908, and measurement signals from the nine connected electrodes are detected by the peripheral circuits. The effective spatial resolution of the detected measurement signals is 2. sqrt(2) 12.5 micrometers = 35.4 micrometers. When detecting from... Figure 12D After measuring the signal of each of the nine shaded electrodes shown, a second measurement frame consisting of nine different electrodes, whose relative positions are similar to those shown, is selected. Figure 12D The relative positions of the nine shaded electrodes are determined. The electrodes of the second measurement frame are each selectively connected to one of the nine peripheral circuits 908, and the measurement signal corresponding to the second measurement frame is detected. This process is repeated across the electrode array.

[0216] As will be understood, the pattern of electrode selection used to detect measurement signals can be extended to larger electrode spacings within the array, allowing for a wide variation in the effective spatial resolution of the detected measurement signals. Obtaining measurement signals at a relatively low spatial resolution can be an effective method, for example, to perform an initial interrogation or sampling of measurement signals across the electrode array. This initial interrogation or sampling can reveal, for example, which parts of the array generate measurement signals of interest and which do not. Further measurement signals can then be sensed and detected from the parts of the array that generate measurement signals of interest (e.g., by applying different electrical stimuli to the electrodes in those parts of the array, and / or by detecting measurement signals from the electrodes in those parts of the array at a higher effective spatial resolution, as described above).

[0217] (c) Integrated Circuit Functional Group

[0218] In some embodiments, to facilitate the fabrication of integrated circuit 102, the integrated circuit can be implemented as a plurality of repeating functional groups. Dividing integrated circuit 102 in this way facilitates fabrication because the integrated circuit can be simply formed on a substrate by replicating the functional groups f times, where f represents the number of repeating functional groups in the integrated circuit.

[0219] Figure 13 This is a schematic diagram illustrating a representative example of an integrated circuit 102 comprising multiple functional groups. Figure 13 In the example, integrated circuit 102 includes f=4 functional groups, each of which is called a "quadruple". It should be understood that... Figure 13 The integrated circuits shown (more specifically, the number of functional groups) are merely examples. Typically, the number f of functional groups within an integrated circuit can be chosen as needed to aid in manufacturing and balancing performance factors such as detection speed and power consumption. Therefore, f can typically be 1 or greater (e.g., 2 or greater, 4 or greater, 8 or greater, 16 or greater, 32 or greater, 64 or greater, 128 or greater, or even greater).

[0220] As used herein, a “functional group” as part of an integrated circuit is a collection of components including one or more electrodes, one or more peripheral circuits, one or more reference amplifiers, one or more analog-to-digital converters (ADCs), optional row selection logic units, and optional column selection logic units. A functional group may also include other components, including any other components described herein. Typically, each functional group is capable of operating as an independent integrated circuit, detecting measurement signals from electrodes within the functional group.

[0221] As mentioned above, Figure 13The integrated circuit 102 includes four functional groups 1302, 1304, 1306, and 1308. Each functional group includes one or more ADCs 904, one or more REAs 906, one or more PCs 908, optional row selection logic units 910, and optional column selection logic units 912. Additionally, each functional group includes a portion of an electrode array of the integrated circuit 102. Functional group 1302 includes a first portion 1310 of the electrode array, functional group 1304 includes a second portion 1312 of the electrode array, functional group 1306 includes a third portion 1314 of the electrode array, and functional group 1308 includes a fourth portion 1316 of the electrode array. In some embodiments, such as Figure 13 As shown, portions of the electrode array are positioned within functional groups such that these portions are adjacent to each other, thereby forming a continuous electrode array within integrated circuit 102.

[0222] Typically, each functional group may include one or more (e.g., two or more, three or more, four or more, five or more, six or more, seven or more, eight or more, nine or more, ten or more, twelve or more, fifteen or more, twenty or more, twenty-five or more, thirty or more, fifty or more, or even more) ADCs 904. Each ADC is connected to one or more PCs 908 and / or one or more REAs 906 in the functional group and is used to convert analog received signals into digital signals for transmission to external devices (such as host controller 706). For example, measurement signals from one or more electrodes of a portion of the electrode array of the functional group may be detected by PC 908, then routed to ADC 904 for conversion into digital signals, and then transmitted to host controller 706.

[0223] The input of each ADC is connected to a multiplexer, which in turn is connected to one or more peripheral circuits 908 and / or one or more reference electrode amplifiers 906. As described above, one or more peripheral circuits 908 are selectively connected to electrodes 902 of a portion of the electrode array of the functional group.

[0224] Figure 14 This is a schematic diagram illustrating an example portion of a functional group including a multiplexer 1320 connected to an ADC 904. The multiplexer 1320 is also connected to PC 908 and REA 906 within the functional group via wires or traces 1322. Furthermore, PC 908 is selectively connected to the electrodes of the functional group via wires or traces 1318. It should be noted that... Figure 14 The number of wires, PC, and REA in the diagram is merely an example provided for illustrative purposes.

[0225] Multiplexer 1320 acts as a signal router, directing signals from PC 908 and / or REA 906 to ADC 904. After conversion from analog to digital signals in ADC 904, the digital signals are routed to the data output interface via data output line 1326, as will be described in more detail later. Multiplexer 1320 receives control signals via wires or traces 1324 (e.g., from host controller 706) and, in response to the control signals, selectively directs detected measurement signals from PC 908 and / or signals from REA 906 to ADC 904.

[0226] By selectively connecting different electrode groups to the PC of a functional group, the same PC can be used to detect (in a sequential group) measurement signals from all electrodes of a portion of the electrode array within the functional group. In practice, the PC of the functional group is shared among the electrodes for detection purposes. In this way, measurement signals from a relatively large number of electrodes can be detected with a relatively small number of PCs. Furthermore, once detected, the measurement signal can be converted into digital form and packaged into a sequential data stream for transmission to an external device (such as the host controller 706), as described in more detail below.

[0227] Each functional group can typically include one or more (e.g., two or more, three or more, four or more, five or more, six or more, seven or more, eight or more, nine or more, ten or more, twelve or more, fifteen or more, twenty or more, twenty-five or more, thirty or more, fifty or more, or even more) REA 906.

[0228] Each REA 906 can be selectively connected to any electrode 902 in a portion of the electrode array within the functional group. Each REA 906 can deliver a stimulation signal to electrode 902 and / or detect a measurement signal at electrode 902, and more generally, perform a function similar to PC 908. In some embodiments, for example, the structure of REA 906 is similar to or even identical to that of PC 908. An example of the peripheral circuit structure is described in more detail below.

[0229] Each functional group includes one or more (e.g., two or more, three or more, four or more, five or more, six or more, seven or more, eight or more, nine or more, ten or more, twelve or more, fifteen or more, twenty or more, twenty-five or more, thirty or more, fifty or more, or even more) PC 908s. The PCs perform a variety of functions, including the detection of measurement signals from the electrodes and the calibration of integrated circuits. The various operating modes of the PC 908 will be discussed in more detail below.

[0230] Usually, such as Figure 14 As shown, wire 1322 serves as an input line for the PC. Referring to the electrodes of a functional group forming part of the electrode array of integrated circuit 102, each PC is selectively connectable to each set of multiple electrode sets in the part of the electrode array via ADC 904 and multiplexer 1320. In some embodiments, the electrode sets to which a particular PC can be selectively connected may follow a repetitive pattern. Thus, in some embodiments, for example, where the functional group comprises n PCs 908, each of the PCs is selectively connectable to every nth electrode set.

[0231] The connection between a specific PC 908 and the electrode set is shared (i.e., electrically short-circuited) among all electrodes in that set. Each of these shared connections is cross-connected to another subset of electrodes in the functional group. During the detection of a measurement signal, the cross-connections allow each PC 908 to selectively connect to one or more electrodes for detecting the measurement signal at one or more electrodes.

[0232] In some embodiments, the PC selectively connects to only one electrode at a time and detects the measurement signal from that electrode. For example, in a functional group with n PCs, in a first measurement frame, each PC selectively connects to a different electrode in the first group of n electrodes and detects the measurement signal from it. In a second measurement frame, each PC selectively connects to a different electrode in a second group of n electrodes and detects the measurement signal from it, wherein the electrodes in the second group are different from those in the first group. In each consecutive measurement frame, different groups of n electrodes are selectively connected to the PCs, and measurement signals from the electrodes are detected, until measurement signals have been detected from all electrodes in the functional group.

[0233] In some embodiments, the PC is selectively connected to more than one electrode simultaneously to detect measurement signals. For example, certain types of measurement signals can be detected additively in parallel at multiple electrodes. The PC is connected to each of the multiple electrodes simultaneously, and measurement signals from the multiple electrodes are routed to the PC in parallel. The detected signals are additive with respect to the incoming measurement signals. This type of configuration can be used, for example, to perform positional averaging measurements of a sample in response to electrical stimulation.

[0234] As discussed above, each electrode 902 is connected to the peripheral circuitry 908 via pixel circuitry 1054. Specifically, the terminal 1020 of the pixel circuitry is connected to the terminal 1506 of the peripheral circuitry 908. Typically, the pixel circuitry associated with multiple electrodes 902 is connected in parallel to the common terminal 1506 of a single PC 908.

[0235] For example, consider a set of p electrodes E i (Where i = 1, 2, 3, ... p), each electrode is connected to the same PC 908 via terminal 1506 of the PC through its own pixel circuit. To route a measurement signal from only one electrode (e.g., E1) to the PC 908, the pixel circuit connected to electrode E1 operates in a mode that routes the measurement signal from electrode E1 to the output terminal 1020 of the pixel circuit. Electrodes E2, E3, ... P are connected to... p The pixel circuitry uses electrodes E2, E3, ... E p The measurement signal from electrode E1 is not routed to its output terminal 1020 during operation. Therefore, only the measurement signal from electrode E1 is received at terminal 1506 of PC 908. After the measurement signal has been routed to ADC 904 by PC 908, the operating mode of the pixel circuit connected to the electrode can be changed. For example, the operating mode of the pixel circuit connected to electrode E1 can be changed to a mode where the measurement signal from electrode E1 is not routed to the pixel circuit's output terminal 1020, and the operating mode of the pixel circuit connected to electrode E2 can be changed to a mode where the measurement signal from electrode E2 is routed to the pixel circuit's output terminal 1020. Then, PC 908 can be used to detect the measurement signal from electrode E2 and route it to ADC 904.

[0236] To route measurement signals from multiple electrodes to PC 908, pixel circuits connected to multiple electrodes (e.g., electrodes E1, E2, E3, and E4) can be configured to operate in a mode that routes measurement signals from each of these electrodes to the output terminal 1020 of the corresponding connected pixel circuit. At terminal 1506, PC 908 thus receives measurement signals from electrodes E1, E2, E3, and E4 in parallel. Measurement signals connected to electrodes E5, E6, ... E... pThe pixel circuits are configured to operate in a mode in which measurement signals from these electrodes are not routed to the output terminal 1020 of the corresponding connected pixel circuits. Therefore, at terminal 1506, PC 908 does not receive measurement signals from these electrodes.

[0237] After PC 908 detects signals from electrodes E1, E2, E3, and E4 and routes the measurement signals to ADC 904, the pixel circuit configuration can be changed in the manner described above, and signals from E1-E4 can be selectively routed. p The measurement signals from different electrode sets are routed to terminal 1506 of PC 908.

[0238] As discussed above, the number of ADCs, REAs, and PCs in each functional group can vary. The choice of how many of these components to include takes into account factors such as the complexity of integrated circuit 102, circuit power consumption, and the desired detection speed of the measured signal. Generally, by increasing the number of ADCs, REAs, and PCs in a functional group, the measured signal from the electrodes of that functional group can be detected faster because more signals can be detected in parallel rather than sequentially. However, increasing the number of these components also significantly increases circuit complexity and power consumption.

[0239] The number of PC 908s connected to each ADC 904 can also be controlled. For example... Figure 14 As shown, the multiplexer 1320 can receive a control signal via wire 1324 and, in response to such a control signal, can selectively direct signals from each of PC 908 and each of REA 906 to ADC 904.

[0240] To detect measurement signals from the electrodes at maximum speed, the measurement signals can be detected by each of the PCs 908 and routed through the ADC 904. However, to save power, or for measurements that can be performed at relatively low sampling rates and / or with coarser spatial resolution at extended intervals, some of the PCs 908 can be selectively disabled, and the measurement signals can be detected by only a subset of the PCs 908 and routed through the ADC 904.

[0241] As described above, each PC 908 can be selectively connected to multiple electrodes. During a specific measurement frame in which the PC 908 detects measurement signals, each PC 908 detects measurement signals from one or more electrodes connected to the PC, while the one or more electrodes connected to the PC operate in a mode where the measurement signals are not routed to the PC. These inactive connections represent significant parasitic loads on the active connection lines between the electrodes and the PC, resulting in increased settling time, feedthrough, and current leakage on the electrodes(one or more) that route the measurement signals to the PC. In some embodiments, to reduce these parasitic loads, disconnect switches are connected in series with each of the connection lines between the pixel circuits of the connected electrodes and the PC 908 to which they are connected. When one or more of the electrodes are configured to route measurement signals to the PC 908 via one or more of the connection lines, the other connection lines (which connect pixel circuits of non-route electrodes to the PC 908) can be disconnected from the PC 908 by disconnecting the corresponding disconnect switch. In order to selectively adjust the disconnecting switch, the disconnecting switch can be implemented as a switch block with a dedicated control logic unit, which receives control signals from the host controller 706, for example, and opens or closes the disconnecting switch in the switch block according to the control signals.

[0242] It should be noted that when integrated circuit 102 comprises multiple functional groups, the number of ADCs, REAs, and PCs within each functional group can be selected independently. In some embodiments, to facilitate the direct fabrication of integrated circuit 102, each functional group will have the same number of ADCs, REAs, and PCs. However, more generally, in some embodiments, one or more of the number of ADCs, the number of REAs, and the number of PCs can vary among the functional groups of the integrated circuit. Each functional group can be independently configured with ADCs, REAs, and PCs as described above.

[0243] (d) Peripheral circuits

[0244] Integrated circuit 102 typically includes multiple peripheral circuits 908. The peripheral circuits 908 may be shared across a portion or all of integrated circuit 102, or may be specific to a particular functional group of integrated circuit 102. The peripheral circuits 908 typically include operational amplifier circuitry that is reconfigurable via switches to allow the circuitry to operate in a variety of different modes.

[0245] Figure 15 This is a schematic diagram of an example of peripheral circuitry 908 that can be implemented in integrated circuit 102. Peripheral circuitry 908 includes terminals 1502, 1504, and 1508 connected to the DAC. After being generated in the DAC, the reference voltage signal V... s1 V s2 and V s3They are received as input signals at terminals 1502, 1504 and 1508 respectively.

[0246] Terminal 1506 is an input terminal for peripheral circuitry 908 and is selectively connected to output terminal 1020 of pixel circuitry 1050 via wire or trace 1318. As discussed above, output terminal 1020 of pixel circuitry is directly or indirectly connected to (or may be connected to) electrode 902. Measurement signals (and / or other signals) from electrode 902 are thus transmitted as signal V. e The pixel circuit 1050 routes to terminal 1506 of the peripheral circuit 908.

[0247] The peripheral circuit 908 includes multiple switches 1512 (s1), 1514 (s2), 1516 (s3), 1518 (s4), 1520 (s5), 1522 (s6), 1524 (s7), 1526 (s8), 1528 (s9), 1530 (T1), and 1532 (T2), two adjustable capacitors 1534 (C1) and 1536 (C2), and an operational amplifier 1538, the output of which is connected to output terminal 1510. The peripheral circuit also includes a capacitor and resistor CR2 (1540), which can be selectively coupled to the circuit via switches 1542 and 1544. Output terminal 1510 is connected to multiplexer 1320 via wire or trace 1322, such as... Figure 14 As shown in the figure.

[0248] Return to Figure 15 Various switches in the peripheral circuit 908 can be used to control the operating mode of the peripheral circuit 908. To enable a specific mode, a sequence of control bits representing the state value (e.g., 1 = closed, 0 = open) of each switch in the peripheral circuit 908 is received (e.g., from the host controller 706), and the peripheral circuit logic block ( Figure 15 (Not shown in the diagram) The switches of the peripheral circuit 908 are configured according to the sequence of control bits. In this way, the operating mode of each peripheral circuit 908 in the integrated circuit can be controlled independently.

[0249] In the first configuration, the peripheral circuit 908 can operate in current measurement mode to detect voltage V. s1 The current of the biased electrode. The current signal V is received at input terminal 1506. e When switches S1 and S4 are closed, switches S2, S3, and S5-S9 in the external circuit 908 are open.

[0250] In this configuration of the peripheral circuit 908, switches 1542 and 1544 are controlled by a non-overlapping clock signal of frequency F. Switches 1542 and 1544, together with capacitor 1540 (capacitor C), serve as a circuit with a resistance value of R = 1 / (C). F) The resistance of the switched capacitor. Figure 16A This is a schematic diagram of the peripheral circuit 908 operating in this mode, where the active circuit path is shown by a thick black line.

[0251] With switches 1542 and 1544 controlled in this manner, a switched capacitor resistor is introduced across the feedback of operational amplifier 1538, which functions as a transimpedance amplifier (TIA) to amplify the current signal received at terminal 1506. The transconductance gain of the TIA is controlled by the resistance value R of the switched capacitor resistor.

[0252] Adjust the adjustable capacitor C2 to set the feedback pole of the TIA. The input current signal (DC or AC current signal) at terminal 1506 is converted into an output voltage signal by the TIA. The voltage signal is output at terminal 1510 as the detected measurement signal.

[0253] In the second configuration, the peripheral circuit 908 can operate in a current measurement calibration mode. In this mode, the peripheral circuit is calibrated against a known calibration signal to perform current measurements. Switches s1, s5, and s9 are closed, switches 1542 and 1544 are driven by a non-overlapping clock signal to adjust the transconductance gain of the TIA, and the other switches of PC 908 are open. Figure 16B This is a schematic diagram of the peripheral circuit 908 operating in this mode, where the active circuit path is shown by a thick black line.

[0254] With switch S1 closed, TIA amplifies to V s1 The bias input current signal. The calibration voltage signal V is received at terminal 1508. s3 With switch S9 closed, the calibration voltage signal is converted into a calibration current signal by passing through the adjustable capacitor C1. This calibration current signal is transmitted to the TIA and detected as an output signal at terminal 1510. The detected calibration current signal can be used to verify the accuracy of the peripheral circuitry's detection of the measured current signal. Specifically, in this mode, both the amplitude and phase of the current signal can be calibrated (including at different input signal frequencies), thus allowing for accurate detection of signals from multi-frequency impedance measurements.

[0255] In the third configuration, the peripheral circuit 908 can operate in AC voltage measurement mode. Switches s5 and s8 are closed, switches s1-s4, s6-s7 and s9 are closed, and switches 1542 and 1544 are driven by a non-overlapping clock signal to adjust the transconductance gain of the TIA. Figure 16C This is a schematic diagram of the peripheral circuit 908 operating in this mode, where the active circuit path is shown by a thick black line.

[0256] Figure 16CThe switched capacitor and resistor in the circuit set the high-pass filter pole of amplifier 1538. Amplifier 1538 is used as a capacitive gain voltage amplifier with negative gain of -C1 / C2. The AC voltage signal V from the electrode... e The signal is received at terminal 1506 and amplified by capacitors C1 and C2. The amplified voltage signal is then sent by the amplifier to output terminal 1510 as a detection voltage signal from the electrode.

[0257] In the fourth configuration, the peripheral circuit 908 can operate in a DC voltage drive mode. In this mode, the peripheral circuit is configured to directly drive the electrodes with a reference voltage signal. This mode can be implemented in various different ways. To drive the electrodes connected to terminal 1506 via their corresponding pixel circuits, switches s1 and s3 are closed, and the other switches are open. Figure 16D This is a schematic diagram of the peripheral circuit 908 operating in this manner, where the active circuit paths are shown in thick black lines. The reference voltage V received from the DAC at terminal 1502... s1 It is directly coupled to terminal 1506, and therefore coupled to the electrode connected to terminal 1506.

[0258] Alternatively, in order to use the reference voltage V s2 The drive electrodes are activated, switches S2 and S3 are closed, and the other switches in the peripheral circuit 908 are open. Therefore, the reference voltage V received from the DAC at terminal 1504... s2 It is directly coupled to terminal 1506 and electrode.

[0259] As another alternative, in order to use the reference voltage V s3 Drive the electrodes, close switches S8 and S9 and open the other switches. The reference voltage V received from the DAC at terminal 1508. s3 It is directly coupled to terminal 1506 and electrode.

[0260] Because one of the reference voltage signals generated by the DAC is used to drive the electrodes in this configuration, this configuration is generally more efficient when the number of electrodes driven individually in this way (i.e., the number of peripheral circuits 908 configured to operate simultaneously in this mode) is relatively moderate. If the number of such PCs is too large, the DAC may not be able to generate enough reference voltage signals to drive all the electrodes.

[0261] In the fifth configuration, the peripheral circuit 908 can operate in a buffered voltage drive mode. Reference voltage V s1 Or reference voltage V s2 The signal is buffered by amplifier 1538 and amplified to drive the electrode connected to terminal 1506. In this mode, switch s1 (for V) s1 (drive) or s2 (for V)s2 (Drive), S4 and T1 are closed, and other switches are open. Figure 16E This is how it is operated (using a buffered reference voltage V). s1 A schematic diagram of the peripheral circuit 908 of the driver, wherein the active circuit path is shown by thick black lines.

[0262] As a result of this configuration, terminal 1510 is directly connected to terminal 1506. A buffered reference voltage signal connected to the first terminal of amplifier 1538 is routed to terminal 1506 to drive the electrodes. This operating mode is effective when the number of PCs configured in this mode is relatively large, for example, to drive a relatively large number of electrodes. The reference voltage signal generated by the DAC can be amplified via amplifier 1538 to generate a drive signal for each electrode.

[0263] In the sixth configuration, the peripheral circuit 908 can operate in buffer calibration mode. In this mode, the reference voltage V... s1 Or reference voltage V s2 This is used to calibrate the signal path from the DAC to the peripheral circuitry and then to the electrodes to identify sources of measurement error in the system. In this mode, switch S1 (used for the reference voltage V) s1 ) or s2 (for reference voltage V) s2 T1 and T2 are closed, while the other switches are open. Figure 16F A schematic diagram of the peripheral circuit 908 operating in this manner (using reference voltage V). s1 (Calibration), where the active circuit path is shown in thick black lines. The reference voltage is buffered by amplifier 1538 and read out at terminal 1510 for calibration purposes.

[0264] It should be noted that Figure 15 and Figures 16A-16F The peripheral circuitry shown is merely an example, and more generally, a wide variety of different circuits can be used to detect the measured voltage at the electrodes of integrated circuit 102. Furthermore, in addition to the components shown in these figures, peripheral circuitry 908 may also include additional circuitry components not shown in the figures; and one or more of the components shown in the figures may not be present in some embodiments of peripheral circuitry 908.

[0265] Furthermore, the above configurations and operating modes are merely examples. The peripheral circuitry 908 present in integrated circuit 102 may also be able to operate in other modes and may have operating configurations different from the examples described above. The integrated circuit 102 described herein is not limited to the specific example of peripheral circuitry 908 discussed in this section for illustrative purposes.

[0266] (e) Digital-to-analog converter

[0267] In some embodiments, integrated circuit 102 includes one or more digital-to-analog converters (DACs). Typically, the DACs (one or more) are used to generate various voltage and / or current signals, which are then sent to other components of the integrated circuit. Such signals may include, for example, voltage signals used to drive electrodes and apply various electrical stimuli to elicit a response in a sample located near the electrodes of the integrated circuit. The voltage signals may also include a reference voltage used to bias a measurement signal for detection and to bias the electrodes of the integrated circuit to control the spatial distribution of the electric field near the sample during the application of electrical stimulation to the sample.

[0268] Typically, the number of DACs in each integrated circuit 102 can be selected independently. In some embodiments, each integrated circuit 102 of the measuring device includes the same number of DACs. In some embodiments, one or more integrated circuits of the measuring device may have a different number of DACs than other one or more integrated circuits of the measuring device. The number of DACs in any integrated circuit 102 can be one or more (e.g., two or more, three or more, four or more, five or more, six or more, eight or more, ten or more, fifteen or more, twenty or more, or even more).

[0269] In some embodiments, each functional group in integrated circuit 102 has a dedicated DAC for that functional group. Alternatively, in some embodiments, at least one or more DACs are shared by multiple functional groups of the integrated circuit. For example, one or more DACs may be shared by two or more functional groups (e.g., three or more, four or more, five or more, six or more, or even more) within the integrated circuit. In some embodiments, all functional groups of the integrated circuit share a common DAC.

[0270] Figure 17 This is a schematic diagram of an example DAC 1700 based on integrated circuit 102. The DAC 1700 includes five functional blocks: voltage bias block 1702, resistor string module 1704, transimpedance amplifier (TIA) group 1706, current-mode DAC module block 1708, and switch matrix 1710.

[0271] Voltage bias block 1702 generates bias voltage signal V BP V CP and V CN These voltage signals are sent to, for example... Figure 17 The current-mode DAC module block 1708 shown is also sent to the transimpedance amplifier group 1706.

[0272] The current-mode DAC module block 1708 has multiple input terminals ( Figure 17(not shown in the diagram), and receives one or more control signals at the input terminals. Block 1708 contains five DAC modules, each generating an output signal at the output terminal of the DAC module ( Figure 17 (Not shown in the diagram). The output signal is sent to the input terminals 1712a-1712e of the switch matrix 1710.

[0273] Switching matrix 1710 is a 5-to-5 switching matrix that allows any current signal received at input terminals 1712a-1712e to be switched to any output terminal 1714a-1714e. Therefore, the output signals generated by the multiple DAC modules of DAC module block 1708 can be additively combined at any one or more of the output terminals 1714a-1714e.

[0274] The switch matrix 1710 is configured to generate five output current signals at terminals 1714a-1714e, respectively. Figure 17 As shown: V REF1_I V REF2_I V s1_I V s2_I and V s3_I These current signals are used to generate the corresponding reference voltage signal V in TIA group 1706. REF1 V REF2 V s1 V s2 and V s3 Specifically, the five output signals from the switch matrix 1710 are sent to the input terminals 1716a-1716e of the TIA group 1706. The TIA group 1706 also receives five DC input voltage signals corresponding to the five reference voltage signals generated by the DAC 1700 at terminals 1718a-1718e: V REF1_DC V REF2_DC V s1_DC V s2_DC and V s3_DC At each of the five output terminals 1720a-1720e, the TIA group 1706 generates a corresponding output signal based on the input signal received by the TIA group 1706 at the corresponding input terminal, the corresponding output signal being a reference voltage signal. Therefore, for example, at output terminal 1720a, the TIA group 1706 generates an output signal based on the input signal V at input terminal 1718a. REF_DC and the input signal V at input terminal 1716a REF1_I Generate output signal V REF1 The output voltage signal at terminal 1720 is V. REF1 =V REF1_DC +R V REF1_IWhere R is the gain factor of TIA group 1706 for the signal at output terminal 1720a. Similarly, output signals are generated at terminals 1720b-1720e, and... Figure 17 As shown in the image.

[0275] Terminals 1720a and 1720b will reference voltage signal V REF1 and V REF2 The pixel circuitry of the integrated circuit 102 described above is provided directly or indirectly (i.e., through other circuit elements). In some embodiments, for example, terminals 1720a and 1720b are connected to other components of the integrated circuit 102 (such as peripheral circuitry and / or reference electrode amplifiers) that use these voltage signals as bias voltages in operations involving driving electrodes with voltage and / or current-mode signals, and to detect measurement signals at the electrodes of the integrated circuit.

[0276] Terminals 1720c-1720e are connected to the peripheral circuit 908 of integrated circuit 102, causing the reference voltage signal V to... s1 V s2 and V s3 As described above, it is sent to the external circuit.

[0277] like Figure 17 As shown, resistor string module 1704 is used to generate five DC reference voltages that are sent to TIA group 1706. Figure 18A This is a schematic diagram illustrating an example of a resistor string module 1704. Module 1704 includes an input terminal 1802 and five output terminals 1804a-1804e. The resistors of module 1704 are connected in a single series string, and five analog multiplexers 1806a-1806e are connected to the resistor string at different tap positions.

[0278] Module 1704 receives an input voltage signal V from an external source (i.e., from another source located outside integrated circuit 102) at terminal 1802. REFH Each analog multiplexer is connected to a resistor string at 31 different tap positions via 31 input terminals, and its output terminal can be coupled to an input signal received at any of the 31 input terminals to generate a corresponding output signal. In this way, different DC reference voltages V... REF1_DC V REF2_DC V s1_DC V s2_DC and V s3_DC Each of them is generated by one of the analog multiplexers 1806a-1806e and sent to the corresponding output terminals 1804a-1804e of the resistor string module 1704.

[0279] As discussed above, DAC module block 1708 includes multiple DAC modules, each of which serves as a current signal source. In some embodiments, for example, DAC module block 1708 includes 32 unit current sources. However, more generally, DAC module block 1708 may include any number of current sources (e.g., five or more, 10 or more, 15 or more, 20 or more, 25 or more, 30 or more, 35 or more, 40 or more, 50 or more, or even more).

[0280] Figure 18B This is a schematic diagram of an example current source 1810. The current source 1810 includes input terminals 1812a-1812f and an output terminal 1814. At input terminals 1812a-1812c, the current source 1810 receives a bias voltage signal V from the voltage bias block 1702. BP V CP and V CN At input terminals 1812d-1812f, current source 1810 receives (e.g., from host controller 706) digital control bit signals that control the operation of the current source.

[0281] When the digital control bit DMPB and SELB are invalid, current source 1810 is inactive and does not draw power. When DMPB is asserted and SELB is invalid, current source 1810 is on but does not generate an output current signal. When SELB is also asserted, current source 1810 generates an output current signal at terminal 1814.

[0282] Output current signal I at terminal 1814 OUT It is a function of the input current signal at terminals 1812a-1812b, which is respectively determined by the bias voltage V BP and V CP The number of asserted SELB signals s in the current source of DAC module block 1708 and the gain factor G of the current source are determined. The gain factor G of the current source is controlled by the 3-bit digital control signal received by the current source at terminal 1812f, DIV. The output current signal is represented as I. OUT =s G I REF The values ​​of the digital control signal DIV and the corresponding gain factor G are shown in Table 3 below.

[0283] Table 3

[0284]

[0285] The output current signal from the output terminal 1814 of the current source is sent to the input terminals 1712a-1712e of the switch matrix 1710, as described above.

[0286] TIA group 1806 includes multiple TIAs, each typically configured to generate an output voltage signal. Generally, TIA group 1806 can include any number of TIAs (e.g., one or more, two or more, three or more, five or more, seven or more, ten or more, fifteen or more, twenty or more, or even more). Figure 17 In the example shown, TIA group 1806 includes five TIAs, each configured to generate one of the output voltage signals at terminals 1720a-1720e.

[0287] Figure 18C This is a schematic diagram of the example TIA 1820. The TIA 1820 includes input terminals 1822 and 1824, output terminal 1826, switches 1828, 1830, and 1832, and operational amplifier 1834. At input terminal 1822, the TIA 1820 receives one of the DC reference voltage signals generated by the resistor string module 1704. Input terminal 1822 corresponds to or is connected to one of terminals 1718a-1718e. At input terminal 1824, the TIA 1820 receives one of the current-mode signals generated by the switch matrix 1710. Input terminal 1824 corresponds to or is connected to one of terminals 1716a-1716e.

[0288] TIA 1820 at the terminal ( Figure 18C The digital control bit signal AMP_EN (not shown) controls the on / off state of the TIA 1820. When AMP_EN is asserted, the TIA 1820 is on, and when AMP_EN is not asserted, the TIA 1820 is off. In its off state, the TIA 1820 draws very low (or no) power and provides high impedance at terminal 1826 to ensure it is bypassed in this state.

[0289] When the TIA 1820 is turned on, it can operate in different modes depending on the state of switches 1828, 1830, and 1832. Table 4 shows the various operating modes of the TIA 1820 as a function of the states of switches 1828 (HIGH_GAINB), 1830 (BUF_EN), and 1832 (BPS_EN).

[0290] Table 4

[0291]

[0292] In bypass mode, the DC voltage signal generated by the resistor string module and received at terminal 1822 is directly sent to output terminal 1826. Compared to the amplified output signal, the resulting output reference voltage signal has relatively low noise but relatively high output impedance.

[0293] In buffered mode, the DC voltage signal generated by the resistor string module is buffered by amplifier 1834, which operates as a unity-gain buffer. The buffered DC voltage signal is then sent to output terminal 1826.

[0294] In TIA mode, the output voltage is a function of resistors R1 and R2, which are selectively coupled to TIA 1820 depending on the states of switches 1828 and 1830. In TIA low-gain mode, the output voltage at terminal 1826 is V. OUT =V IN +R1 I IN , where V IN It is the input reference voltage signal at terminal 1822, and I IN This is the current input signal at terminal 1824. In TIA high-gain mode, the output voltage at terminal 1826 is V. OUT =V IN +(R1+R2) I IN .

[0295] A key aspect of the DAC 1700 involves the generation of multi-frequency output voltage signals. The DAC 1700 can be used to generate multi-frequency output voltage signals in different ways. In the first mode (“5-bit mode”), the output voltage signal is generated from an analog current signal and combined in analog form to generate the multi-frequency output voltage signal.

[0296] Refer again Figure 18B In this mode, a current source 1810 is used to generate each analog current signal at a specific frequency. Therefore, for a three-frequency output voltage signal, three different current sources 1810 are used. The first current source 1810 generates an analog current signal with frequency f1 at its output terminal 1814. The second current source 1810 generates an analog current signal with frequency f2 at its output terminal 1814. The third current source 1810 generates an analog current signal with frequency f3 at its output terminal 1814. Each of the frequencies f1, f2, and f3 is different.

[0297] Then, each of the analog output current signals from the three current sources 1810 is combined by the switch matrix 1710 at a single output terminal of the switch matrix to generate an output current signal containing three frequency components f1, f2, and f3. For example, to generate an output signal V containing three frequency components... REF1 Three analog current signals, with frequencies f1, f2, and f3 respectively, are routed to terminal 1714a of switch matrix 1710. Effectively, the three analog current signals are added in the current domain by switch matrix 1710, and the resulting signal is provided at terminal 1714a. The output analog current signal containing frequency components f1, f2, and f3 is routed to terminal 1716a of TIA group 1706.

[0298] The amplitude profile of the current signal generated by each current source 1810 is controlled by configuration bits sent to the current source. The configuration bits define the amplitude profile of the current signal over one cycle of the current signal. Therefore, for example, by setting the configuration bit values ​​to define the amplitude profile of a sine wave, a current signal with a sinusoidal amplitude profile can be easily generated. More generally, each current source 1810 can be configured to generate output current signals with various different amplitude profiles by sending appropriate corresponding configuration bit values ​​to each current source. Suitable configuration bit values ​​are determined and sent, for example, by the host controller 706. The configuration bit values ​​can also be stored in a memory unit (…). Figure 18B (not shown in the image), and the amplitude spectrum of the output current signal is set by reading from the memory cell by the current source 1810.

[0299] The frequency of the current signal generated by each current source is determined by a clock signal sent to each current source 1810. The clock signal controls the frequency of one cycle of the output current signal generated by the current source, which has an amplitude spectrum defined by a configuration bit value. In order to generate the output current signal at a frequency f1, for example, the frequency of the clock signal is set to f1 (e.g., by the host controller 706), and the current source generates the cycle of the output current signal at a frequency of f1.

[0300] The aforementioned method for generating the output current signal at the desired frequency may be advantageous because it allows for the generation of the output current signal over a wide frequency range simply by adjusting the frequency of the clock signal sent to each current source 1810. Furthermore, it allows for the generation of current signals with various amplitude spectra, and the amplitude spectrum of the output current signal can be adjusted independently of its frequency.

[0301] It should be noted that each current source 1810 can be independently adjusted relative to the two configuration bit values ​​that define the amplitude spectrum and clock frequency of the output current signal. During operation, the current source 1810 can be timed at the same frequency and phase, or at different frequencies and phases, or both. Furthermore, the current source 1810 can be configured to generate output current signals with different amplitude spectra or the same amplitude spectrum. Additionally, the current source 1810 can be configured to use the same number or different numbers of configuration bits to define the amplitude spectrum. In some embodiments, for example, the number of configuration bits used to define the amplitude spectrum of each output current waveform can be adjusted based on the properties of the desired output current waveform.

[0302] As discussed above in conjunction with DAC control block 1708, the 3-bit digital control signal DIV for each current source controls the gain factor of the source. The DIV control signal for each of the current sources used to synthesize the output signal at terminal 1714a can be adjusted relative to each other to individually weight the amplitude of the frequency component of the output signal at terminal 1714a. The configuration bit values ​​(relative to the configuration bit values ​​of the other current sources 1810) used to define the amplitude spectrum of the output current waveform generated by each current source 1810 can also be adjusted to effectively weight the output current signals generated relative to each other before combining the signals. As mentioned above, the relative phase of the clock signal sent to each current source 1810 can also be controlled; by doing so, the relative phase of the frequency components in the output current signal at terminal 1714a can be controlled.

[0303] In the second mode (“7-bit mode”), the output terminals 1814 of the four current sources 1810 are connected via a switch matrix 1710 to the same input terminals of the TIA group 1706 (and thus to the same TIA 1820). For example, the output terminals of the four current sources can be connected to terminal 1714a (to generate an output signal V with multiple frequency components). REF_I ) or terminal 1714d (to generate an output signal V with multiple frequency components) s2_I In this way, the four current sources are connected in parallel, effectively forming a 7-position current source.

[0304] In this mode, the multi-frequency output current signal is digitally generated by current sources. The configuration bit values ​​for each current source 1810 define the amplitude spectrum corresponding to a period (or a portion of a period) of the multi-frequency output current signal, and are therefore generally more complex than the single-frequency amplitude waveforms discussed above. Each current source 1810 receives a clock signal as described above and generates a repetitive period (or a portion of a period) of the multi-frequency output current signal. The multi-frequency signals generated by each of the current sources 1810 are then additively combined by a switch matrix 1710 and provided at the common output terminal of the switch matrix. The additive combination of the multi-frequency signals generated by each of the current sources 1810 produces an output current signal containing multiple frequencies. However, in contrast to the first operating mode described previously, in this mode, frequency components are efficiently and digitally added by configuring each current source 1810 with appropriate configuration bit values ​​to define the multi-frequency amplitude spectrum of the output current signal.

[0305] (f) Measurement signals and data communication

[0306] As described above, the measurement signal at the electrode in each integrated circuit 102 is detected by the peripheral circuit 908. The measured signal, detected as an analog signal, is then converted into a digital signal by the ADC 904. However, due to the relatively large number of electrodes in each integrated circuit, detecting the measurement signal from each electrode of each integrated circuit in the measurement device and sending all detected signals to an external device (e.g., host controller 706) in an energy-efficient manner, while maintaining a high data throughput to ensure that all integrated circuits of the measurement device can be measured within reasonable and relevant time intervals, can be challenging.

[0307] In order to achieve a relatively high data throughput with moderate power consumption, in some embodiments, the measurement device described herein includes a low-voltage differential signaling (LVDS) interface for transmitting detected measurement signals. Figure 19 This is a schematic diagram illustrating an example of an integrated circuit 102 including many of the features described above. Figure 19 As shown, after being converted into a digital signal by the ADC 904, the measurement signal is routed to the data aggregation unit 1902 and buffered thereon.

[0308] Figure 19 The measuring device 100 includes two low-voltage differential signal (LVDS) data output lines 1904 and 1906 for transmitting digital measurement signals to external devices (such as a host controller 706). The LVDS output lines operate in parallel according to a first-in-first-out (FIFO) data transmission scheme.

[0309] exist Figure 19In the example shown, each ADC 904 is connected to its own independent FIFO buffer within the data aggregation unit 1902. Then, depending on the number of ADCs enabled, signals routed from the ADCs to the corresponding buffers in the data aggregation unit 1902 are sequentially transmitted on the LVDS output lines. Thus, for example, using signals provided to the data aggregation unit 1902 by eight ADCs, the data aggregation unit 1902 sequentially cycles through each of the ADC FIFO buffers, transmitting the digital signals contained in each buffer in sequence. If a particular ADC is disabled and does not generate data signals, the data aggregation unit bypasses the FIFO buffer associated with the disabled ADC.

[0310] Typically, each ADC 904 receives the same timing signal, so the ADCs nominally operate synchronously. However, in practice, there may be a finite timing difference between the ADCs. As a result, when the data aggregation unit 1902 samples the buffer for data transmission on the LVDS output line, data from a particular enabled ADC may not be available in its corresponding FIFO buffer. In this case, the data aggregation unit will wait until data is received in the FIFO buffer, transmit the received data on the LVDS output line, and then move to the next FIFO buffer sequentially.

[0311] Each LVDS output line can be independently enabled or disabled by a control signal (e.g., a control signal from the host controller 706). For example, for measurements where the number of measurement signals is not as high as in other measurements, the data corresponding to the measurement signals can be transmitted at an acceptable rate by only one of the LVDS output lines. In these environments, another LVDS output line can be disabled to reduce the power consumption of the measurement device 100.

[0312] In addition to the two LVDS data output lines, the LVDS interface also includes an LVDS clock channel 1908. The clock channel transmits a clock signal synchronized with the data stream on the LVDS data output lines. Because the data stream on the data output lines contains measurement signals interleaved from multiple integrated circuits 102, an external device receiving the data stream on the LVDS data output lines can demultiplex the data stream based on the transmitted clock signal and attribute the measurement signals of the data stream to specific electrodes of specific integrated circuits of the measurement device.

[0313] To simplify the connection between integrated circuit 102 and the LVDS interface, in some embodiments, multiple integrated circuits 102 of the measurement device share a connection to the LVDS interface. Figure 20This is a schematic diagram showing a measuring device 100 with a two-dimensional arrangement of integrated circuit 102 on the device. The measuring device 100 includes LVDS connection lines 2002a-2002h, each of which is connected to LVDS data output lines 1904 and 1906. Figure 20 As shown, each of the integrated circuits 102 in a row of the measuring device shares LVDS connection lines 2002a-2002h.

[0314] In order to unload the detected measurement signal from the integrated circuit 102 of the measuring device 100, only one signal is enabled at a time. Figure 20 One of the integrated circuits in each row is used for data transmission. Figure 20 In this configuration, the integrated circuit 2004 is enabled for data transmission, and the measurement signals detected from the electrodes of each enabled integrated circuit are transmitted to LVDS data output lines 1904 and 1906 via LVDS connection lines 2002a-2002h. For each LVDS connection line, only one integrated circuit sharing the connection is active and transmitting data. Therefore, no single LVDS connection line transmits data from multiple integrated circuits simultaneously in a common data stream.

[0315] While the integrated circuit in column 2004 transmits the detected measurement signal, the integrated circuit in column 2006 can optionally be prepared for data transmission, for example, by configuring various properties of the electrodes and other components of these integrated circuits. By pre-configuring the integrated circuits in this way, the latency associated with transmitting the detected measurement signal from different integrated circuits of the measurement device can be reduced or even minimized. As will be explained in more detail later, the integrated circuit in column 2006 can be prepared for data transmission using a different interface independent of the LVDS output line, such that the LVDS output line remains dedicated to data transmission from the ADC to an external host (e.g., host controller 706).

[0316] It should be understood that Figure 20 The enabling and disabling procedures shown are merely examples. Various different procedures can be implemented. For instance, the integrated circuits actively transmitting detected measurement signals on connection lines 2002a-2002h do not need to be aligned in a common row or column on the measuring device. Any integrated circuit on any of connection lines 2002a-2002h can be configured to transmit the detected measurement signal at a specific time. Furthermore, although... Figure 20The illustrated configuration uses one shared LVDS connection line per row of integrated circuits; however, more generally, each LVDS connection line can be shared between integrated circuits located anywhere in the measurement device. Integrated circuits sharing a particular LVDS connection line do not need to be aligned in rows or columns. In some embodiments, within a row or column of integrated circuits, some integrated circuits may share one LVDS connection line, and some integrated circuits may share another LVDS connection line. In this case, the number of LVDS communication lines in each measurement device can be two or more (e.g., three or more, four or more, eight or more, 16 or more, 32 or more, 64 or more, or even more). Furthermore, each LVDS communication line can be shared between two or more integrated circuits in the measurement device (e.g., three or more, four or more, five or more, six or more, seven or more, eight or more, 10 or more, 15 or more, 20 or more, 30 or more, 40 or more, 50 or more, or even more).

[0317] In addition, it should be noted that the above combination Figure 20 The described enable and disable procedures are useful for reducing the power consumption of the measurement device 100. The power consumption of the measurement device 100 can be reduced by disabling integrated circuits that do not transmit measurement signals from them via the LVDS output lines (and optionally, integrated circuits not intended for data transmission). When measuring the response of certain biological samples to specific stimuli, the effective sampling rate generated by the above enable and disable procedures is sufficient to capture the relevant biological response.

[0318] However, if a higher sampling rate is desired, for example, when a biological response to electrical stimulation occurs more quickly, the measuring device 100 may include a higher sampling rate than [previous device]. Figure 20 The number of LVDS connections shown (e.g., 2000a-h) is greater than the number of LVDS connections. That is, the number of integrated circuits sharing common LVDS connections can be reduced to allow for higher data transfer rates via the LVDS data output lines. Typically, the number of integrated circuits sharing common LVDS connections can be one or more (e.g., two or more, three or more, four or more, five or more, six or more, seven or more, eight or more, nine or more, ten or more, twelve or more, fifteen or more, twenty or more, thirty or more, or even more). In some embodiments, to achieve very high data transfer rates, each integrated circuit has a dedicated LVDS connection that is not shared with other integrated circuits in the measurement device 100.

[0319] The high-throughput LVDS data output lines 1904 and 1906 of the measurement device 100 allow detected measurement signals to be sent from each integrated circuit to an external device (such as the host controller 706) without the need for on-chip data buffering. Disabling integrated circuits that do not send detected measurement signals can also significantly reduce heat generation and power consumption. Since excessive heating can have adverse consequences for living biological samples (such as cells), reducing abnormal heating can be an important advantage of the aforementioned data offloading procedure.

[0320] return Figure 19 The data aggregation unit 1902 (in some embodiments, it may be part of integrated circuit 102) includes a FIFO buffer that receives detected measurement signals from the integrated circuit's ADC, aligns the signals with the LVDS clock signal, and packages the data stream to match the data transmission rate of one or two LVDS data output lines. If the rate of the measurement signal detected from the electrodes of the actively scanned integrated circuit is low enough that the data rate (in bits per unit time) of the data stream from the integrated circuit is within the data transmission rate capacity of a single LVDS data output line, the measurement device (in response to a control signal from, for example, the host controller 706) can deactivate one of the LVDS data output lines. Doing so can result in a significant reduction in the power consumption and heat generation of the measurement device.

[0321] In some embodiments, the LVDS interface (and specifically, the LVDS data output line) in the measurement device 100 can support dual data rate (DDR) transmission of data corresponding to detected measurement signals from the device's integrated circuit. In single data rate (SDR) operation, data is transmitted on either the rising or falling edge of the LVDS clock signal. As previously discussed, an external device receiving the transmitted data stream can demultiplex the data stream based on either the rising or falling edge of the LVDS clock signal. In DDR operation, data corresponding to the detected measurement signals is transmitted on both the rising and falling edges of the LVDS clock signal. As a result, the data transmission rate is effectively doubled, and the increase in power consumption associated with DDR operation is relatively modest compared to SDR operation. For high data rate transmission, DDR mode operation further improves power utilization efficiency.

[0322] III. Stimulation and Measurement Methods and Procedures

[0323] The measurement devices and systems described above can be used to perform various types of measurements on biological samples. Typically, measurements involve providing one or more electrical stimuli to a sample and then measuring the sample's response to the electrical stimulation. Measurements are usually performed in parallel on multiple samples located on or near the measurement device. In some embodiments, the same stimulus is provided to all samples located on or near the measurement device; alternatively, in some embodiments, different stimuli are provided to different samples. Similarly, in some embodiments, the measurement of the sample response to the provided stimulus is performed in the same manner for all samples; alternatively, in some embodiments, the measurement of the sample response to the provided stimulus is different for different samples.

[0324] Figure 21 This is flowchart 2100, which illustrates a series of example steps that can be performed to measure the response to electrical stimulation from one or more samples. These will be explained in detail in the following discussion. Figure 21 Each step is shown. However, it should be understood that... Figure 21 The flowcharts shown and the following discussion are provided as examples only, and the measuring devices and systems are not limited to performing measurements only in the manner described. More generally, the measuring devices and systems described herein can be used to perform measurements as needed, wherein... Figure 21 Modify any of the steps shown.

[0325] In the first step 2102 of flowchart 2100, the measurement device configuration for multiple samples is selected. (As described above...) Figures 3-6 As explained, selecting a measurement device configuration involves selecting the number of samples to be positioned on or near the measurement device 100 and how the samples will be positioned relative to the integrated circuit 102 for measurement purposes. In some embodiments, selecting a measurement device configuration involves covering a housing 302 on the substrate 104 of the measurement device 100 to define a plurality of holes into which samples can be placed for measurement purposes. More generally, selecting a measurement device configuration includes selecting sample locations on the measurement device 100 regardless of whether holes are defined on the measurement device 100. Typically, when holes are defined on the measurement device 100, the sample location corresponds to the location of the hole. However, even in the absence of holes, the plurality of sample locations can simply be defined as areas on the measurement device 100 where samples will be positioned.

[0326] At each sample location, at least a portion of the electrodes 902 of the integrated circuit 102 associated with the sample location is configured to provide electrical stimulation to the sample at that location and measure the sample's response to the provided stimulation. In some embodiments, such as in combination Figure 3The number of integrated circuits 102 in the measurement device discussed is in a 1:1 ratio to the number of sample locations on the measurement device, such that one integrated circuit is associated with each sample location. In this configuration, all electrodes of the integrated circuit 102 are allocated for measurement of the sample at the location associated with the integrated circuit. However, in some embodiments, such as combining... Figure 4 and Figures 5A-5C The discussed integrated circuit is associated with multiple sample locations. In these cases, the electrodes 902 of the integrated circuit 102 associated with the multiple sample locations are partitioned into groups, wherein each group of electrodes is assigned to perform a measurement at one of the sample locations (i.e., on one of the samples). As previously explained, in some embodiments, the electrodes 902 of a particular integrated circuit 102 can typically be divided into any number of groups. Figure 5B and Figure 5C A specific example is shown where the electrodes of the integrated circuit are divided into four groups by establishing four and sixteen sample locations associated with the integrated circuit 102 (e.g., by defining holes using the housing 302). Figure 5B ) and sixteen groups ( Figure 5C ).

[0327] In the following discussion, each of the subsequent steps in flowchart 2100 is performed at each sample location on the measurement device 100. For simplicity, a specific example of a 1:1 relationship between sample locations and integrated circuits is discussed. That is, each sample location is associated with one integrated circuit 102, and the entire complement of the electrodes 902 of the integrated circuit is allocated to the measurement of the sample at that location. However, it should be understood that in a method where multiple sample locations are associated with individual integrated circuits 102, similar method steps are performed at each sample location, and the electrodes of the integrated circuits 102 associated with multiple sample locations are partitioned into groups associated with the multiple sample locations, where one group of electrodes is assigned to each sample location. Subsequently, method steps specific to the multiple sample locations are performed only using the groups of electrodes assigned to these locations.

[0328] In step 2102 of flowchart 2100, if a measurement configuration is selected and a sample location is determined on or adjacent to the measurement device 100, in the next step 2104, the sample is positioned at each of the sample locations. Figure 22 This is a schematic diagram illustrating an example of the result of this positioning step. Figure 22In this embodiment, sample 2202 is positioned at each sample location 2204 defined on the surface of substrate 104 of measuring device 100. As described above, in this example, each of the sample locations 2204 is associated with one of the integrated circuits 102 of measuring device 100, and therefore, the integrated circuit 102 is located below each location of sample 2202 on substrate 104.

[0329] Typically, the sample 2202 located at each sample location 2204 comprises cells, and typically comprises live cells. In some embodiments, a single cell is located at one or more sample locations 2202, and in some embodiments, each of the sample locations may be occupied by only a single cell. In some embodiments, some or all of the sample locations may be occupied by multiple cells. Cells can typically be obtained using a variety of methods, including growing them in a culture medium and extracting them from a living subject (e.g., via biopsy); generally, the methods described herein can use any technique used to obtain cell samples.

[0330] Furthermore, cells can generally be of any type. Cells can be, for example, cells of various organs, including (but not limited to) liver cells, kidney cells, lung cells, heart cells, and skin cells. Cells can also be circulating cells found in bodily fluids such as blood, saliva, lymph, and other bodily fluids. Cells can also be cells of non-organ tissues (such as muscle cells, fat cells, and connective tissue cells). Cells can be associated with a variety of disease conditions (such as tumor cells, viral host cells, and bacterial cells).

[0331] Once the cell samples have been obtained, they can be positioned at each of the sample sites 2204 using various methods. In some embodiments, for example, cells are deposited at the sample sites using pipetting and / or other microfluidic methods. Such methods can be performed manually or automatically, for example, via a robotic sample dispensing component.

[0332] return Figure 21 In the next step 2106, at each sample location, the measurement configuration is determined. Determining the measurement configuration involves selecting the type of measurement to be performed and the electrode configuration used to perform the measurement. Typically, for the electrodes associated with each sample location, this involves selecting:

[0333] (a) The type of electrical stimulation to be provided to the sample;

[0334] (b) The location of the electrical stimulation provided to the sample;

[0335] (c) The type of the measurement signal to be measured, which reflects the sample's response to the provided electrical stimulation; and

[0336] (d) The location where the measurement signal will be measured.

[0337] Various types of electrical stimulation can be provided to the sample. In some embodiments, the sample is stimulated by current injection. Current injection includes delivering a low-impedance current signal to the sample via one or more electrodes of an integrated circuit. To inject current in this manner, the pixel circuitry 1054 connected to the electrodes of the injected current can operate in either mode 1 or mode 2, as previously explained.

[0338] In some embodiments, the sample is stimulated with a voltage signal via one or more electrodes of the integrated circuit. To stimulate the sample in this manner, the pixel circuitry 1054 connected to the electrodes providing the voltage signal can operate in one of modes 10 or 12, wherein the voltage V... REF1 or V REF2 The voltage is applied to the electrodes respectively, or operated in mode 9, wherein the corresponding pixel circuit is configured in the fourth configuration (where the electrodes are directly connected to a voltage V). s1 V s2 or V s3 (Drive) operation. As an alternative, the corresponding pixel circuitry is configured for operation in a sixth configuration (such as...). Figure 16F (As shown) and with switch S4 closed, so that terminal 1506 is connected to the negative terminal of amplifier 1538, the voltage signal V s1 (Switch S1 closed) or V s2 (Switch S2 closed) can be buffered by amplifier 1538 and supplied to the electrode through the pixel circuit 1054 connected thereto to stimulate the sample.

[0339] In addition to selecting the current and voltage signals to be applied to the sample, selecting the type of electrical stimulation also involves (for the applied oscillating current and voltage signals) selecting the frequency of the stimulation signals. The measuring device described herein can be used to generate both current and voltage signals to be applied to a sample over a wide frequency range. For example, the frequency of the oscillating current or voltage signal applied to the sample can be between 10 Hz and 1 MHz (e.g., between 50 Hz and 800 kHz, between 100 Hz and 500 kHz, between 200 Hz and 300 kHz, between 500 Hz and 200 kHz, between 1 kHz and 100 kHz, or any range falling within any of the foregoing ranges). The frequency of the oscillating current or voltage signal applied to the sample can be 10 Hz or higher (e.g., 20 Hz or higher, 30 Hz or higher, 50 Hz or higher, 100 Hz or higher, 200 Hz or higher, 300 Hz or higher, 500 Hz or higher, 1 kHz or higher, 5 kHz or higher, 10 kHz or higher, 20 kHz or higher, 50 kHz or higher, 100 kHz or higher, 200 kHz or higher, 300 kHz or higher, 500 kHz or higher, or even higher). The frequency of the oscillating current or voltage signal applied to the sample can be 1 MHz or less (e.g., 900 kHz or less, 800 kHz or less, 700 kHz or less, 500 kHz or less, 300 kHz or less, 100 kHz or less, 50 kHz or less, 30 kHz or less, 20 kHz or less, 10 kHz or less, 5 kHz or less, 1 kHz or less, 900 Hz or less, 800 Hz or less, 700 Hz or less, 500 Hz or less, 300 Hz or less, 100 Hz or less, or even less).

[0340] In addition to single-frequency electrical stimulation, the measurement apparatus described herein can also be used to generate both current and voltage signals at multiple frequencies. As mentioned above, the DAC 1700 can be used to generate current and voltage signals comprising more than one (e.g., two or more, three or more, four or more, five or more, or even more) frequency components. Each of the frequency components can be within any range discussed above. Furthermore, the phase of the frequency components can be adjusted relative to each other. In some embodiments, the multi-frequency current and voltage signals used for electrical stimulation typically correspond to a superposition of sinusoidal variations at each of the multiple frequencies. However, in some embodiments, a more complex amplitude spectrum of the current and voltage signals used for stimulation can be digitally defined, as previously described in conjunction with the DAC 1700.

[0341] The choice of location to provide various electrical stimuli to the sample depends in part on the type of response the sample will be elicited. In some measurement methods, for example, electrical stimulation is provided by some or all of the electrodes of an integrated circuit according to a spatial pattern, e.g., by every j-th electrode of the integrated circuit, where j is an integer. In other methods, electrical stimulation is provided by all the electrodes of the integrated circuit.

[0342] However, more complex stimulus configurations can also be used in measurements for various reasons. For example, in some measurements, specific stimulus configurations are used to prevent coupling between adjacent electrodes of an integrated circuit, which could lead to leakage current and other undesirable electrical artifacts in the measured sample response. Furthermore, in some measurements, specific stimulus configurations are used to provide more precise control over the nature of the stimulus provided to the sample and the measurement signal generated from the sample in response to the provided stimulus.

[0343] For example, in some embodiments, in addition to simple impedance measurements at individual electrodes, the measurement apparatus described herein can be used to study the response of a sample to a vertically oriented electric field, which is correlated with the sample’s transmembrane resistance (TEER) value or barrier function / tight connection value. Figure 23 A schematic cross-sectional view of an example measurement configuration is shown, in which the sample is interrogated in response to a vertically oriented electric field. Figure 23 In this configuration, the first set of electrodes 2302 (a total of 9 electrodes, only 3 shown in the cross-sectional view) delivers an AC signal to the sample 2202. The same set of electrodes 2302 is used to measure the current signal from the sample in response to a stimulus. The second set of electrodes 2304 is biased with the same AC signal to create a set of shielding electrodes. Due to this bias of the second set of electrodes 2304, the electric field generated by the first set of electrodes 2302 is constrained to a vertical orientation, as shown in the diagram. Figure 23 The dashed field lines are shown in the diagram. The horizontal component of the electric field generated by the first set of electrodes 2302 is largely eliminated by this bias configuration, as shown in the diagram. Figure 23 As indicated by the "X" in the diagram. As a result, the current introduced by the first set of electrodes 2302 passes only through the relatively tight connections at the cell membrane. The third set of electrodes 2306 is biased to ground potential and serves as a return electrode for the vertically oriented electric field generated by the first set of electrodes 2302, and also as a shielding electrode 2304.

[0344] exist Figure 23 In the measurement configuration shown, it should also be noted that measurement signals are actually obtained simultaneously from each of the nine electrodes of the first group of electrodes 2302. This provides a significant multiplexing advantage over the method of obtaining measurements sequentially from the individual electrodes and can significantly reduce the amount of time required to measure signals at each electrode of the integrated circuit.

[0345] In Figure 23Obtaining measurement signals at all electrodes associated with the sample locations involves measurements taken in “frames”, as previously discussed. In practice, the measurement method involves looping through all electrodes of the integrated circuit associated with the sample locations in a group, such that in each frame, different groups of nine electrodes are used as the first electrode group 2302. Figure 24 This is a schematic diagram illustrating two measurement frames used in this method. In the first measurement frame 2402, the nine darkest shaded electrodes form a first electrode group 2302, the medium-dark gray shaded electrodes form a second electrode group 2304, and the lightest gray electrodes form a third electrode group 2306. After measurement signals are obtained at the nine electrodes of the first electrode group 2302 in frame 2402, a new measurement frame 2404 is established, wherein the nine darkest shaded electrodes of frame 2404 form a new first electrode group 2302, the medium-dark gray shaded electrodes of frame 2404 form a new second electrode group 2304, and the lightest gray electrodes of frame 2404 form a new third electrode group 2306. It is noteworthy that the electrodes of the first electrode group 2302 in frame 2404 are adjacent to each other. Measurement signals are obtained from the nine electrodes of the first electrode group 2302 in frame 2404, and the procedure continues in a similar manner, wherein each new measurement frame includes nine electrodes forming a different group of the first electrode group 2302, until measurement signals have been obtained from all electrodes associated with the sample location.

[0346] In combination with the above Figure 23 and Figure 24 In the described measurement configuration, the first set of electrodes 2302 serves as both a stimulation electrode (which delivers electrical stimulation to the sample 2202) and a measurement electrode (where a measurement signal corresponding to the sample's response to the stimulation is obtained). However, this measurement configuration is merely one example of a vertical field measurement configuration. The measurement device described herein can also be used in many other vertical field measurement configurations. For example, in some embodiments, Figure 24 The lightest gray-shaded electrode is used as the stimulation electrode and delivers the AC current signal to sample 2202, the medium-dark gray-shaded electrode is used as the shielding electrode and biased with the same AC current signal, and the darkest gray-shaded electrode is biased with ground potential and used as the return and measurement electrode. In this vertical field measurement configuration, measurement signals are obtained frame-by-frame from the electrodes associated with the sample position in the same manner as described above.

[0347] As another example, in some embodiments, in addition to simple sequential impedance measurements at adjacent electrode pairs, the measurement apparatus described herein can be used to perform concurrent transverse field measurements at multiple sites within a sample. In such measurements, multiple stimulating and returning electrodes can be activated simultaneously among the electrodes associated with the sample location.

[0348] Figure 25 A schematic cross-sectional view illustrating an example of this measurement is shown. Figure 25 In this process, multiple stimulation electrodes 2502 apply AC current signals to simultaneously stimulate sample 2202. Electrode 2504, serving as the nearest neighbor electrode of electrode 2502, is biased to ground potential and used as a measurement electrode. Two measurement electrodes 2504 are used for each stimulation electrode—the nearest neighbor in each of the two orthogonal directions relative to each stimulation electrode 2502 (due to the cross-sectional view, in...). Figure 25 (Only one is shown in the image). A measurement signal is simultaneously detected at electrode 2504. Electrode 2506 is biased to ground potential and serves as a shielding electrode.

[0349] Figure 26 It is shown that it is used for Figure 25 This diagram illustrates multiple measurement frames of the measurement configuration. In the first measurement frame 2602, the stimulating electrodes are shaded in the darkest gray and marked with white numbers, the measuring electrodes are shaded in the next darkest gray and marked with white numbers, and the shielding electrodes are other colors. Multiple stimulating and measuring electrodes are activated simultaneously, allowing for simultaneous transverse field measurements at multiple sites. After obtaining measurement signals at the measuring electrodes in the first frame 2602, the electrode configuration is changed for the second measurement frame 2604, using different electrodes as stimulating and measuring electrodes. It should be noted that each stimulating electrode in the second measurement frame 2604 is adjacent to the stimulating electrode in the first measurement frame 2602. In other words, in each consecutive measurement frame, a new set of stimulating and measuring electrodes is configured until transverse field measurements of each of the electrodes associated with the sample location have been obtained.

[0350] return Figure 25 As can be clearly seen from the figure, cell attachment to the surface of substrate 104 significantly affects the electric field return distribution. At low field frequencies, when cells are attached to the surface, the electric field generated by the stimulating electrode is typically tightly confined to the nearest neighbor electrode, resulting in a larger current signal detected at the measuring electrode. Conversely, when fewer cells are attached to the surface, the electric field generated by the stimulating electrode is less spatially confined, and the return current is spatially distributed more extensively between the measuring electrode and the shielding electrode. Therefore, the current signal detected at the measuring electrode typically has a smaller amplitude.

[0351] However, at high field frequencies, when cells attach to the surface, the presence of cells near the electrodes blocks the field from the nearest-neighbor electrode. With a more constrained current path between adjacent electrodes, the impedance between the electrodes increases, and the current measured at the nearest-neighbor electrode decreases. Conversely, when fewer cells attach to the surface, there is a lower impedance path between the nearest-neighbor electrodes (relative to the stronger cell attachment at high field frequencies), and the current measured at the nearest-neighbor electrode increases.

[0352] As can be clearly seen from the above, frequency-based transverse field measurements can sensitively detect cell attachment; however, the measured signal will depend on factors such as the frequency of the introduced field. At very low frequencies, a larger current signal will be measured at the nearest-neighbor electrode (relative to the stimulating electrode) than at electrodes farther from the stimulating electrode. At very high frequencies, a smaller current signal will be measured at the nearest-neighbor electrode than at electrodes farther from the stimulating electrode. At frequencies between very low and very high, the measured signals at the nearest-neighbor electrode and electrodes farther from the stimulating electrode will reflect intermediate positions between these endpoints. That is, as the frequency increases from very low to very high, the current signal detected at the nearest-neighbor electrode will become relatively small (i.e., relative to the current signal measured at very low frequencies), while the current signal detected at the nearest-neighbor electrode will become relatively large (i.e., relative to the current signal measured at very low frequencies). With appropriate calibration and normalization, the cell attachment spectrum of the sample can be quantitatively determined from the current signal detected at the measuring electrode.

[0353] Regarding the above combination Figure 23 Similar effects were observed in the described vertical field measurements. At very low frequencies, the electric field introduced by the stimulating electrode passes through the tight junctions, and the signal measured at the measuring electrode is correlated with transepithelial resistance (TEER). However, at very high frequencies, due to the capacitive nature of the cell membrane, the electric field instead passes through the cell membrane, and the signal measured at the measuring electrode is correlated with the height of the cell (or cell layer). At intermediate frequencies between very low and very high, the measurement signal detected at the measuring electrode includes contributions from both effects and therefore contains partial information about both TEER and cell height. Both TEER and cell height information can be obtained through appropriate calibration (and, in some embodiments, by detecting measurement signals in response to stimulation at multiple frequencies).

[0354] More generally, by stimulating samples at different frequencies, a variety of different sample responses can be induced. Sample responses contain "orthogonal" components because a sample's response to a particular stimulus can reflect the stimulus's detection of different biological structures and / or response mechanisms. Therefore, the detected measurement signal can contain contributions from more than one "orthogonal" component, depending on the frequency of the stimulus provided to the sample.

[0355] As previously described, the measurement apparatus described herein allows stimulation signals comprising multiple different frequency components to be provided to a sample. The detected measurement signal in response to such multi-frequency stimulation can include convolutional contributions from different types of phenomena being detected, all of which can be obtained from a single multi-frequency measurement.

[0356] Orthogonal information (i.e., information relating to distinct, nominally unrelated biological structures and / or responses) can be extracted from detected measurement signals using various methods. Principal component analysis (PCA) can be used to deconvolve this orthogonal information, as will be described in more detail later. Other methods, such as, but not limited to, linear discriminant analysis, K-means clustering, projective pursuit analysis, and analysis via support vector machines, neural networks, and other clustering algorithms, can also be used to extract orthogonal information from complex detected measurement signals.

[0357] Some types of orthogonal information extracted can be attributed to specific biological structures, properties, or responses. For example, when using PCA analysis to analyze detected measurement signals, certain principal components will be strongly correlated with specific structures, properties, or sample responses to stimuli (e.g., TEER, cell height, cell attachment). Other types of orthogonal information (i.e., other principal components used in PCA analysis) will not necessarily be strongly correlated with specific sample structures, properties, or responses to stimuli. Nevertheless, these types of information also reflect, in some way, the properties or changes in the sample caused by the applied stimulus.

[0358] The measurement apparatus and methods described in this paper can be used to obtain multidimensional complex datasets containing two types of orthogonal information: namely, directly and specifically biologically relevant orthogonal information, and indirectly and non-specifically biologically relevant orthogonal information. Both types of orthogonal information can be used for live-cell profiling and for a variety of applications involving various chemical and genetic perturbations of cells. Examples of such applications will be described in more detail later.

[0359] Returning to step 2106 of flowchart 2100, determining another aspect of the measurement configuration involves selecting the type of measurement signal to be measured. Because electrical signals are routed from electrode 902 through its connected pixel circuitry to peripheral circuitry 908 for detection, different types of measurement signals can be detected by appropriately configuring the peripheral circuitry 908 connected to electrode 902.

[0360] As described above, the peripheral circuitry 908 can be configured to operate in a variety of different modes. For example, in some embodiments, in order to detect the current signal at electrode 902, the peripheral circuitry 908 can be configured to... Figure 16A The first configuration operation shown in the figure is in which amplifier 1538 is used as a transimpedance amplifier to amplify the current signal received from electrode 902.

[0361] As another example, in some embodiments, in order to detect the voltage signal at electrode 902, peripheral circuitry 908 may be configured to... Figure 16C The third configuration operation shown in the figure is in which amplifier 1538 is used as a capacitive gain voltage amplifier to amplify the voltage signal received from electrode 902.

[0362] An additional aspect of determining the measurement configuration involves determining the spatial measurement resolution. For some measurements, the spatial measurement resolution is effectively selected based on the nature of the signal being measured. For example, when performing nearest-neighbor detection of a current or voltage signal, the spatial measurement resolution is established by the nearest-neighbor distance between the electrodes at the sample location.

[0363] However, some measurements offer flexibility in the selection of spatial measurement resolution. Typically, this flexibility manifests in the choice of measuring electrodes to acquire the measurement signal. In the most straightforward measurement configuration, adjacent electrode groups are used as measuring electrodes, where the spatial resolution is determined based on the distance between adjacent electrodes, for example... Figure 24 As shown.

[0364] However, in some embodiments, the spatial measurement resolution can be selected based on factors such as the nature of the sample, the expected acquisition time for obtaining the measurement signal across the entire measurement device, and the power consumption of the measurement device. Lower spatial resolution measurements can generally be performed faster and consume less power. Therefore, such measurements can be used, for example, to identify samples of interest, and then subsequently obtain measurement signals from the samples of interest at a higher spatial resolution. Measurement signals can also be obtained at a lower spatial resolution, where the nature of the measurement makes higher resolution provide little or no additional useful information about the sample.

[0365] By selecting appropriate electrodes at each sample location to serve as measurement electrodes, measurements can be performed with the desired spatial measurement resolution. (The above is combined...) Figures 12A-12D An example is described whereby different electrodes are designated as measurement electrodes to select from multiple different spatial resolutions. Typically, the same or similar method can be used at each sample location to obtain a measurement signal at the desired spatial resolution.

[0366] After the measurement configuration has been determined in step 2106, the integrated circuit of the measurement device 100 is configured for measurement in step 2108. Generally, the configuration of the integrated circuit 102 for measurement includes a configuration of pixel circuitry 1054 connected to individual electrodes 902 to control the mode of operation of the electrodes, i.e., current and / or voltage signals applied to the sample by the electrodes, and measurement signals obtained at the electrodes in response to stimulation of the sample; a configuration of peripheral circuitry 908 connected to the electrodes 902 via their pixel circuitry 1054 to control the nature of the measurement signals detected at the electrodes; and a configuration of DAC 1700 to control the nature of the current and voltage signals generated in the measurement device 100 and provided to the electrodes.

[0367] In some embodiments, different electrodes are used as stimulation electrodes and measurement electrodes, and thus the stimulation and measurement electrodes can be configured to operate simultaneously, for example, before any measurement signal is acquired. However, in some embodiments, certain electrodes are used as both stimulation and measurement electrodes. Therefore, the pixel circuitry of such an electrode can be initially configured to deliver stimulation current and / or voltage signals to sample 2022, and then, after the current and / or voltage signals have been applied, the pixel circuitry of such an electrode can be reconfigured such that the electrode routes the measurement signal to connected peripheral circuitry 908 for detection. In this respect, some configuration operations nominally performed as part of step 2108 can be interleaved with some operations performed as part of step 2110.

[0368] After configuring the integrated circuit, a measurement signal is obtained in step 1110. To obtain the measurement signal, the stimulation electrode delivers a current and / or voltage signal to the sample 2202, and a measurement signal reflecting the response of the sample 2202 to the stimulation signal is obtained at the measurement electrode. In some measurement configurations where certain electrodes are used as both stimulation and measurement electrodes, as discussed in conjunction with step 2108, these electrodes can be reconfigured after the stimulation signal has been provided to the sample.

[0369] As previously described, peripheral circuitry 908 is selectively connected to electrodes to detect measurement signals acquired at the electrodes. The detected measurement signals are then routed from peripheral circuitry 908 to one or more ADCs 904 via multiplexer 1320, where they are converted into digital signals that include measurement information derived from the detected measurement signals. The digital signals are then sequentially transmitted from the multiple ADCs 904 to an external host (e.g., host controller 706) via a data output interface comprising multiple data output lines.

[0370] After the measurement information for each of samples 2202 has been sent by the measuring device 100, Figure 21 The procedure shown reaches decision step 2112. If all measurements for the sample have been performed, the procedure terminates at step 2114. However, if further measurements of the sample are to be performed, the procedure returns to step 2106, where a new measurement configuration (for different types of sample measurements) is determined. Figure 21 The procedure shown can be implemented over multiple periods. Different types of measurements can be performed on the sample in each period. Alternatively or additionally, some periods can repeat previously performed measurements. For example, measurements can be repeated on the same sample in a time series to monitor changes in the sample over extended time periods. Measurements can also be repeated for purposes such as, but not limited to, verifying measurement information, signal averaging, and / or calibration.

[0371] The procedure described in conjunction with flowchart 2100 is merely an example of a method for obtaining measurement information of multiple samples using the measuring device described herein. It should be understood that the measurement method may include additional steps not shown in flowchart 2100, and may include various modifications to the method steps described in conjunction with flowchart 2100. Furthermore, the steps of flowchart 2100 may each be performed in a manner different from the description of the steps contained herein, as the measuring device 100 can be readily adapted to various different configurations and measurement procedures.

[0372] Example

[0373] High-throughput screening is a prime example of compound profiling based on bioactivity, toxicity, and mechanism of action (MOA). One of the most informative screening tools is high-content imaging with feature extraction to create high-dimensional profiles (e.g., cell mapping). However, this technique only produces endpoint images of fluorescently labeled, fixed cells, lacking important features of living cells and tissues. For example, the barrier and water transport properties of epithelium are important for cancer, fibrosis, inflammation, and cystic diseases, but they cannot be easily assessed using high-content imaging.

[0374] Impedance techniques overcome the limitations of imaging, providing real-time information on live cell morphology throughout the experimental time. They offer the added advantages of being non-invasive and label-free, enabling experiments without fluorescent probes or cell line engineering. Transepithelial resistance (TEER) measurements and other commercial devices (e.g., xCelligence RTCA from Agilent Technologies, Inc., and ECIS from Applied Biophysics, Inc.) measure cell membrane impedance to examine tissue barriers and dynamics (cell growth / death). However, these devices use large electrode pairs for measurements, leading to limitations in accuracy and the number / type of parameter readouts.

[0375] The following examples utilize the measurement apparatus described herein to provide a high-throughput, high-resolution impedance platform for drug discovery applications, performing high-dimensional MOA profiling and phenotypic hit / lead generation. The measurement apparatus comprises 96 integrated circuits on a substrate, each including 4096 electrodes, providing a spatial resolution of 25 μm for high-dimensional measurements. More than 20 parameters of the samples are measured using different stimulation frequencies, field geometries, and spatial features. Parameters are measured in real-time every 5–15 minutes to obtain a complete kinetic view of live cell growth and compound responses, providing functional insights beyond endpoint imaging.

[0376] The sensitivity and diversity of the measurements created a high-dimensional electrical representation of cell states over time, involving the characterization of 11 different cell types, from primary epithelial cells to cancerous epithelial cells to suspension cells, each with unique morphology and growth kinetics. By screening 341 FDA-approved compounds, the measurement device and system demonstrated real-time, label-free analysis of the compound MOA on live cells. Furthermore, the translatability of the unique parameters is suitable for high-throughput phenotypic screening for relevant drug discovery applications, including epithelial-to-mesenchymal transition (EMT), transepithelial water transport, and barrier function. The identification of previously unknown compounds that enhance tissue barriers demonstrates the ability of the measurement device and system to aid in the identification of novel treatments in the context of intestinal barrier diseases.

[0377] The integrated circuits were positioned within each well of the 96-well measuring device. Each well has a maximum capacity of 140 μL and a working volume of 120 μL, with a bottom diameter of 3.4 mm. Each integrated circuit produced a 1.6 × 1.6 mm image in a 64 × 64 array of 4,096 pixels with a 25 μm pitch. 2 The total sensing area is [not specified]. Electrochemical images with 25 μm resolution are generated across the entire 96-well measurement device within 40 seconds. Parallel data signal transmission allows simultaneous operation and data reception from eight measurement devices. Real-time live-cell impedance data are typically acquired at a rate of one frame every 5–15 minutes and analyzed via a cloud-based data processing pipeline. Analysis includes feature extraction, high-dimensional clustering, and integration with known compound metadata to determine phenotypes and correlate them with cell function.

[0378] Impedance measurements were performed using two different electric field configurations, called vertical field (VF) and transverse field (LF), and at four different frequencies: 250 Hz, 1 kHz, 4 kHz, and 16 kHz. Figure 27A As shown. In total, nine impedance parameter plots were measured for each field configuration, including amplitude and phase at four frequencies and DC (0Hz) amplitude. To help interpret the measurements and demonstrate the orthogonality of the parameters, in Figures 27A-27C The paper illustrates specific experiments using MDCK cells, an epithelial cell line that forms a strong cellular barrier, and has been shown to contribute to tissue bulges or hemicysts through apical-basal water transport. A correlation was observed between bioinformation and measurements of frequency amplitude, phase, and DC.

[0379] To perform field-based impedance measurements across multiple frequencies, a voltage stimulus, the sum of four different frequency signals, was applied, and the return current was measured using a transimpedance amplifier (TIA) configuration with a feedback gain of 18 MΩ. The amplitude of the AC voltage signal was scaled to produce a similar output amplitude as measured by the TIA configuration (0.2 V / 250 Hz, 0.08 V / 1 kHz, 0.04 V / 4 kHz, and 0.02 V / 16 kHz for the transverse field, and 0.25 V / 250 Hz, 0.1 V / 1 kHz, 0.04 V / 4 kHz, and 0.025 V / 16 kHz for the vertical field). Six wells out of 96 were scanned each time, taking 2.5 s, resulting in a total scan time of 40 s for the entire well plate. Fast Fourier Transform (FFT) was used to extract the amplitude and phase, as well as the DC component – ​​nine impedance parameter plots for each of the four frequencies – for each field configuration. Different frequencies were observed to contain different types of biological information (e.g., Figure 27A-Figure 2 (As shown in 7D).

[0380] Cell location is determined using a reference impedance map: a threshold is set higher than the default impedance of the electrode in solution, and the presence of cells above the electrode causes the impedance to exceed the detection threshold. Typically, a VF 4 kHz plot provides the best contrast for generating the cell mask. For amplitude, phase, and DC, the median of the electrode with cells is then calculated. An additional epoxy mask is calculated in a similar manner to remove electrodes with overflowing epoxy from the well plate attachment. A reference measurement is performed in empty culture medium before each cell platening to calculate the epoxy mask.

[0381] Transient features (such as motion and migration) are generated from impedance video using root mean square (RMS) calculation. The difference between two unmasked image frames is obtained (using an epoxy mask if applicable), and then the RMS is calculated across pixels of the difference map. To normalize for amplitude variations, the calculated RMS is then divided by the median of the aperture distribution of the cell mask. Typically, a 4 kHz VF map is used for RMS signal generation.

[0382] To perform and analyze the screening, cells were seeded in five CMOS 96-well plates and allowed to grow for 24 hours (for A549) or 48 hours (for Caco-2). Compounds were added at 10 μM in 1% DMSO via half-culture medium exchange using an OpenTrons liquid handling robot. Effects were measured for 48 hours, with impedance measurements performed every 15 minutes. Numerous field / frequency and calculated parameters were then normalized to the time point one hour prior to compound addition. A normalized parameter array from compound addition at a +48-hour log interval was then used for principal component analysis (PCA) and unbiased clustering using the first 20 PCA dimensions. The log interval was found to balance the rapid binding effect and long-term effect that increased / decreased throughout the 48-hour period.

[0383] All cell lines were obtained from ATCC (Manassas, Virginia) and maintained in a humidified incubator at 37°C and 5% CO2. MCF-7, A549, MDA-MB-231, MDCK, Calu-3, and HCT116 cells were cultured in DMEM supplemented with 10% FBS. Caco-2 cells were cultured in EMEM supplemented with 20% FBS. K-562 cells were cultured in IMDM supplemented with 10% FBS. HT-29 cells were cultured in McCoy's 5A medium supplemented with 10% FBS. hCMEC / D3 cells were cultured in EndoGRO medium obtained from MilliporeSigma (St. Louis, Missouri).

[0384] Cell lines were seeded in wells at various densities. Collagen-1-rat tails were obtained from Corning (Corning, NY) and coated onto plates according to the manufacturer's instructions. All measurements before and after compound treatment were performed in an incubator with regulated CO2, humidity, and temperature.

[0385] For immunofluorescence imaging, cells were grown on coverslips and then allowed to grow for 48 hours or treated with the relevant compound for 48 hours. Cells were then fixed with 4% paraformaldehyde, permeabilized with 0.5% Triton-X 100 in PBS, washed, and then incubated with antibodies. The antibodies used were anti-E-cadherin (available from Cell Signaling Technology, Danfoss, MA, catalog number: 3195T), anti-ZO1 (available from Thermo Fisher, Waltham, MA, catalog number: 617300), and anti-closure protein (available from Thermo Fisher, catalog number: 331500). Alexa Fluor 488 and 568 secondary antibodies were used. Coverlips were mounted in Vectashield® anti-fading mounting medium containing DAPI.

[0386] Used with a Hamamatsu ORCA-Fusion BT CMOS camera (6.5 μm) 2 Imaging was performed using a confocal Yokogawa W1 rotating disk on an inverted Nikon Ti fluorescence microscope with a photodiode, Lumencor SOLA fluorescence source, and Nikon LUN-F XL solid-state laser combination at 405nm (80mW), 445nm (35mW), 488nm (80mW), 514nm (50mW), 561nm (65mW), and 640nm (60mW). Wide-field modes of the microscope were typically used for imaging, and all imaging was performed with 20x objectives. Consistent exposure across samples was used for acquisition to enable intensity quantification. Images were processed using the open-source image processing software FIJI.

[0387] ZO₁ in the cell membrane and nucleus was quantified by manually defining Regions of Interest (ROIs) for the cell membrane and nucleus. The average integral intensity was calculated within each ROI. All quantifications were performed on raw, unprocessed images.

[0388] Compound treatment was performed using a half-medium exchange of culture medium. To prepare for compound addition, half of the culture medium was removed from each well. The compound was prepared at a 2x concentration in cell culture medium, and then the 2x compound solution was added to the wells. Note that the DMSO concentration was kept below 1%, and the compound was diluted with a constant DMSO concentration. The compound in the culture medium was equilibrated for temperature and CO2 before addition. All compounds in the 341-component library were obtained from Selleckchem Chemicals (Houston, Texas). For screening analyses, pathway and target information provided by Selleckchem Chemicals was used for planning.

[0389] At lower frequencies (250 Hz, 1 kHz), the capacitive properties of the cell membrane lipid bilayer result in very high impedance—in VF, this causes the field to penetrate the intercellular spaces, thus allowing measurement of tissue or barrier permeability. In the MDCK experiment, an increased VF 250 Hz barrier was observed after confluence was achieved, reflecting the process of tight junction formation, and peaking after the onset of water transport. At higher frequencies (4 kHz, 16 kHz), the field is sensitive to membranes closer to the electrode. For VF configurations, the high-frequency signal reflects cell size: the flatter the cells, the more of the cell membrane is close to the electrode, thus increasing impedance. For this reason, a peak in VF at 16 kHz was observed in the experiment shortly after plating, attributed to suspended cells settling onto the surface and diffusing.

[0390] In high-frequency LF, cell matrix attachment is measured with high sensitivity: the closer the cell is to the electrode, the higher the impedance at LF 16 kHz. In the MDCK experiment, cells reach confluence and firmly attach to the surface, then rapidly detach as water transport begins. The water transport process can be accelerated by changes in the medium, such as... Figure 27B As shown, it is also affected by the coating density. The spatial resolution of the measurement enables the detection of, for example, Figure 27C The raised areas shown are a phenomenon where increased water pressure beneath the cell sheet is caused by transepithelial water transport. This leads to the detachment of the cell sheet from the dome-shaped structure. In our measurements, the dome was observed as a reduction in the circularity of the attachment signal. Figure 27C It is represented as a purple dot with a diameter of approximately 150 μm in the bottom image.

[0391] In addition to field and frequency, confluence can be used to parameterize cell growth / death and is calculated as the percentage area of ​​cell coverage determined using a threshold, such as... Figure 27A As shown, cell location is also used in mask impedance mapping to account for confluence differences and omit data from uncovered electrodes, thus improving accuracy beyond conventional polymer-hole techniques. The root mean square (RMS) of the difference from one measurement frame to another is used to parameterize transient characteristics such as motion and migration.

[0392] To test the sensitivity of the measurement device, various well-characterized cell types were measured, ranging from primary epithelial cells to cancer epithelial cells and suspension cells, such as... Figure 28A As shown. Cell types were derived from kidney, brain endothelial / blood-brain barrier (BBB), colon, lung, mammary gland, and bone marrow / leukemia, and were of human origin, except for MDCK cells, which were of canine origin. Impedance techniques were used to measure the characteristics of all cell types tested. Figure 28E-1 to Figure 28E-6 It includes a series of figures showing the results of different impedance measurements performed on different cell types at various cell plating densities.

[0393] Epithelial cells exhibit strong adhesion to the matrix, and many have tight cell-cell junctions, forming a high barrier, such as... Figure 28AAs shown. Besides MDCK, these cell types included Caco-2 (colon cancer cells used as a model of intestinal barrier and inflammation), Calu-3 (lung adenocarcinoma cells used as a model of bronchial barrier), and MCF-7 (luminal type A breast cancer cells exhibiting differentiated mammary epithelial properties). In contrast, several cell types from similar human tissue sources did not produce a barrier. These cell types included HT-29 and HCT116 (two types of colon cancer cells), A549 (lung adenocarcinoma cells derived from alveoli), and MDA-MB-231 (triple-negative breast cancer cells that have undergone EMT). To complement the cancer cells, hCMEC / D3 (brain endothelial cells used to mimic BBB function) exhibited the highest motility of any cell type. Finally, K-562 (suspended cells from CML patients) was effectively measured, and the presence of live cells above the electrodes could be easily determined. As expected, suspended cells had the lowest cell attachment signal among all cell lines tested.

[0394] Immunofluorescence imaging was performed on representative cell types to detect the expression and localization of E-cadherin (a functional component of adhesion junctions expressed in normal epithelium), and the results were compared with impedance images, such as... Figure 28B As shown, loss of E-cadherin can lead to dedifferentiation and invasiveness in human cancers, and has been observed in cancer cells that have undergone EMT. Cell types with high levels of membrane E-cadherin and regular epithelial morphology (MDCK, Caco-2, and MCF-7) were observed to have correspondingly high barrier signals, such as... Figure 28B As shown in the left figure. Conversely, cells with low / diffused (A549) or undetectable (MDA-MB-231) levels of E-cadherin do not exhibit barrier signals, as... Figure 28B The left image is shown. Different impedance image textures were also observed for barrier-free cell types: A549 cells optically exhibited an epithelial morphology and displayed a smoother impedance texture than MDA-MB-231 cells, which had a mesenchymal morphology and a more dynamic and coarser texture, as shown in the left image. Figure 28B As shown in the right figure.

[0395] In vivo, epithelial cells grow within the extracellular matrix (ECM) – integrin signaling via the ECM is a crucial regulator of epithelial cell polarity and morphogenesis. Therefore, the compatibility of the coating was tested by plating Caco-2 cells in wells with or without type I collagen coating. The results of this test were... Figure 28C As shown. Cells growing on collagen were successfully measured, exhibiting a low attachment signal, reflecting the increased distance between the cells and the electrode (e.g., Figure 27AThe diagram illustrating LF measurement highlights the sensitivity of the measurement technique. To further test the limits of sensitivity, experiments were conducted to study breast cancer cells exhibiting different phenotypes co-cultured in different proportions, such as... Figure 28D As shown. Figures 28A-28C As observed, MCF-7 exhibited epithelial morphology and E-cadherin expression, while MDA-MB-231 showed a mesenchymal phenotype with no E-cadherin expression. Graded responses corresponding to the ratio of the two breast cancer cell types were observed in cell size parameters (VF 16kHz) and migration (RMS) in the mixture, allowing for quantification of the overall epithelial and mesenchymal phenotypes of the mixed population. Parameter values ​​measured and calculated for different cell types were... Figures 28E-28O As shown in the diagram.

[0396] Compound screening was then performed to help reveal the range of functional phenotypes that could be observed using measurement devices. Two approaches were taken. First, three cell types representing a range of properties—MDCK, A549, and MDA-MB-231—were selected, and a set of common compounds targeting various cellular processes were applied. The selected compounds (Cytochalasin D, Vinblastine Sulfate, Paclitaxel, Aripiprazole, Bosutinib, Anisin, Dexamethasone, Getfitinib, Decitabine, Cyclophosphamide Monohydrate, and GSK 269962A) targeted various cellular processes, including cell division, DNA replication, inflammation, and various other signaling pathways. The effects of the compounds on measurements associated with specific biological parameters were investigated. Many different changes were observed and matched with known effects of the compounds—increases / decreases in attachment, barrier function, cell size, motility, and confluence—to differences in responses across cell lines.

[0397] Figures 29D-1 to 29D-10 Includes a series of graphs showing impedance measurements of MDCK cells after administration of each of the above compounds. Figures 29E-1 to 29E-10 This includes a series of graphs showing similar measurements of A549 cells, and Figures 29F-1 to 29F-10 Includes a series of graphs showing similar measurements of MDA-MB-231 cells.

[0398] Effects on motility were observed in MDA-MB-231 cells treated with two different compounds: the anti-inflammatory drug dexamethasone and the actin polymerization inhibitor cytochalasin D. MDA-MB-231 cells are metastatic breast cancers and are highly aggressive and invasive. Increased attachment and decreased motility (RMS) were observed after dexamethasone treatment. The observed results are confirmed by dexamethasone's previously described reversal of EMT and reduction of migration potential in MDA-MB-231 cells.

[0399] A decrease in motility / RMS was also observed after treatment with cytochalasin D, but unlike with dexamethasone, attachment was reduced and cell size changed significantly—an immediate decrease of ≥0.2 μm followed by an increase of ≥1 μm. Cytochalasin D inhibits actin polymerization, which has been reported to prevent cell motility and alter cell shape and size, supporting the observed results. This further demonstrates that the parameters measured using the measurement apparatus described herein are independent, orthogonal, and inquire into a wide range of cellular characteristics.

[0400] Dexamethasone has also been described as increasing the barrier in A549 cells. Figures 29E-1 to 29E-10 The measurements shown illustrate a similar effect of dexamethasone, which works by increasing tissue barrier and cell surface attachment. Interestingly, in MDCK cells, dexamethasone did not appear to affect any morphological parameters, such as... Figures 29D-1 to 29D-10 As shown, MDCK is a non-cancerous cell line with a high barrier function, low motility, and low levels of inflammation, which may explain the lack of dexamethasone effect.

[0401] Besides identifying the different effects of compounds, the temporal resolution of the data allows for the differentiation of mechanisms of action of drugs with similar results. Paclitaxel and vincristine are both microtubule inhibitors and have very similar effects on cell death in A549 cells. Figures 29E-1 to 29E-10 As shown, at 48 hours post-treatment, both compounds exhibited similar levels of cell death, reflected in the confluence measurements. However, the cellular morphological responses between the two drugs revealed distinct effects. The mechanisms of action of these two compounds differ because paclitaxel is an inhibitor of tubulin polymerization, while vinblastine is an inhibitor of tubulin depolymerization. Therefore, they have very different effects on cell morphology. As can be clearly seen from the foregoing, time data can thus help distinguish the mechanisms of action.

[0402] Of particular interest was the observation that treatment with compounds that modulate water transport properties in MDCK was associated with in vivo outcomes in autosomal dominant polycystic kidney disease (ADPKD). In humans, ADPKD is thought to be caused by a combination of cell overgrowth and a transition from absorptive to secretory epithelium, both of which lead to fluid accumulation in the cysts, thereby increasing kidney size and reducing renal function.

[0403] In MDCK drug therapy, aripiprazole (an Aurora kinase inhibitor) was found to accelerate transepithelial water transport, as evidenced by a sharp decrease in cell surface attachment and an increase in ridges, such as... Figures 29A-29C As shown in the diagram. Conversely, bosutinib (a multi-kinase inhibitor) slows water transport, as evidenced by a slower reduction in cell attachment and the absence of a dome. Interestingly, aripiprazole has been shown to exacerbate ADPKD in animal models, while bosutinib is in a phase II clinical trial for the treatment of ADPKD, matching the differential characteristics of the MDCK trial.

[0404] In the second approach, instead of comparing five measurement parameters, all fields and computational parameters are used to perform unbiased phenotypic profiling with a larger compound library. A total of 341 compounds were selected as a subset of the FDA-approved library and applied to two cell types, A549 and Caco-2. At least two compounds were selected for each target for conserved phenotypic effects. For screening, compounds were added 24 or 48 hours after cell seeding, and measurements were performed up to 48 hours after compound addition. High-dimensional data readouts (VF and LF amplitudes, phases, and DCs) were sequentially time-normalized, principal component analysis (PCA), and unbiased clustering. This unbiased approach ensures the separation of compounds based solely on cellular functional and morphological effects, without target / pathway bias. Positive controls on the plates help assess data variance and validate clustering; anisin was selected as a positive control for A549 (in... Figure 30A (It is divided into its own clusters) because it shows increased VF in many cell types, while anisin, bosutinib and YM-201636 were used as positive controls for Caco-2.

[0405] A549 has proven to be an effective cell model for screening high-content phenotypes. A549 cluster analysis revealed interesting insights into the MOA (Mean Activity Aspect) of various compounds and their effects on live cell function. Clusters composed of several anti-inflammatory compounds were identified, such as... Figure 30C As shown, it separates in PCA due to increased cell-cell adhesion, such as Figure 30B As shown, this cluster contains two forms of dexamethasone, which has been described as reducing inflammation and increasing the tissue barrier in A549 cells, corresponding to the MOA characteristics we measured. Multiple clusters were associated with cell death or growth inhibition. These compounds generally had very similar endpoint effects on growth; however, different transient effects on cell morphology separated the compounds into distinct clusters. These reflect the MOA of the compounds within that cluster. For example, the microtubule polymerization inhibitor cluster and the antiviral cluster showed similar confluence reductions (approximately 20% over 48 hours), but they separated due to significant differences in other parameters such as attachment and migration.

[0406] In the extended analysis, additional clusters of DNA replication inhibitors, microtubule depolymerization inhibitors, antimetabolites, antiproliferators, and reversible / irreversible proteasome inhibitors were identified and separated into distinct clusters based on their transient morphological effects. Additional results from the extended analysis are available in... Figure 30D -I is shown in Figure 30. Therefore, it is clear that the measuring devices are sensitive enough to separate closely related compounds based on their effect on cell state.

[0407] Some compounds cluster by target. For example, most Akt / mTOR inhibitors have similar effects on cell function. Interestingly, while these compounds have relatively small effects on many cellular morphological properties, it is one of the few clusters that induces increased motility (RMS). Figures 30J-30L The results of cluster analysis of A549 cells are shown, in which two Akt / mTOR clusters were observed.

[0408] In another example, common annotation functions were not apparent, such as antiviral clusters containing compounds targeting NF-κB, DNA synthesis, and STAT. However, further investigation revealed that during antiviral phenotype screening for SARS-CoV-2, all compounds in the clusters were identified as functional hits, indicating a common potential function.

[0409] Caco-2 cells are widely used to mimic intestinal epithelial barrier function and to study regulators of tight junctions in the epithelium. Cluster analysis of Caco-2 cells was performed similarly to that of A549 cells described above. Results... Figures 31A-31C As shown in the image.

[0410] The Caco-2 screening identified the DNA intercalating agent and the topoisomerase II inhibitor aminonaphthirase and the antifungal iron chelator ciclopirox ketone as compounds that caused the maximum barrier increase within 48 hours. Figure 31D As shown. Subsequent dose-response experiments (the results of which are presented in...) Figure 31E (As shown in the image) confirmed the screening hit. Aminofifenitol caused a rapid increase in the barrier, suggesting regulation through cell signaling or protein changes, while ciclopirox olfurf caused a more gradual increase in the barrier, suggesting a longer-term response (such as changes in gene expression).

[0411] To further investigate specificity and test the observed rapid response, commercially available aminonaphthiramine analogs (such as...) were obtained. Figure 31F As shown, their effects on the Caco-2 barrier were measured. Figure 31 includes two graphs showing the measurement signals detected from samples treated with one of the aminonaphthylamine or its analogues in a specific well. The results of measurements for all samples in the well are shown in... Figure 31G As shown in the image.

[0412] Only one derivative, NSC 308848, showed a similar barrier increase. Interestingly, UNBS5162, a structurally similar compound that retains DNA intercalation activity, did not affect the barrier. Similarly, etoposide (a topoisomerase II inhibitor that does not intercalate into DNA) did not show a rapid barrier increase. This suggests that the observed barrier increase is non-random and may be independent of both its DNA intercalation and topoisomerase inhibitor activity.

[0413] To investigate whether the increase in barrier function is also reflected in changes in tight junctions, immunofluorescence imaging was performed to observe the tight junction protein ZO-1 and the closing protein. Representative images obtained are shown in [the image]. Figure 31H The results of the quantitative measurement of ZO-1 immunofluorescence signal are shown in [the figure]. Figure 31J As shown in the figure, treatment with aminonaphthirazole resulted in an increase in membrane ZO-1 levels with additional nuclear localization. NSC 308848 had a similar effect on ZO-1 expression, while UNBS5162, which does not show an increase in the barrier, did not affect ZO-1 levels or distribution. This indicates that changes in ZO-1 are directly related to the observed increase in the barrier. Interestingly, although ciclopirox ketone increased the barrier, it did not affect the distribution or expression of ZO-1 and may tighten the barrier through a different mechanism. Therefore, real-time data were able to identify two different MOAs that tighten the barrier, which was further validated by immunofluorescence data.

[0414] ZO-1 has been shown to relocalize to the nucleus during tight junction remodeling, and its nuclear and membrane localization is associated with cellular signaling. In summary, the rapid and sustained increase in the measured Caco-2 sheet barrier with increasing ZO-1 expression and nuclear localization strongly suggests a direct effect of aminonaphthiramine on tight junctions, possibly through activation of signaling pathways. Furthermore, similar responses measured for NSC 208848 but not UNBS 5162 or etoposide suggest off-target MOAs in addition to its primary pharmacological effects as an intercalator and topoisomerase II inhibitor.

[0415] In summary, the combination of multiple field and frequency impedance parameters allows for the measurement of label-free, high-dimensional electrical representations of cell states, partially based on morphology and cellular function. Real-time measurements allow for observation of state changes over time. This yields a wealth of information about intermediate cell states in drug responses. Determining the MOA of cell death is a primary application of these capabilities: since cell death is inherently a physical process, the measurement apparatus described herein is highly sensitive to the morphology of cell death and its “sequence of action.” This label-free MOA profiling capability is widely useful throughout in vitro toxicology, heavily reliant on endpoint readouts that are unaware of cell state transitions and potential off-target activities.

[0416] To supplement the breadth of information in MOA assessment, many functional parameters cannot currently be accurately or on a large scale using other techniques. Therefore, the measurement device described herein can be used to realize novel therapeutic approaches in many disease areas. For example, the measurement device described herein provides a unique functional readout of water transport. The response of compounds to the water transport phenotype of MDCK cells (see, for example...) Figures 29A-29C The strong correlation between ADPKD and animal and human studies provides a pathway for ADPKD screening applications.

[0417] Besides the kidneys, bulges have been observed as evidence of water transport in other cell types, including Caco-2 and Calu-3. Figures 32A-32B The results show the effects of treating Caco-2 cells with various concentrations of bosutinib. Evidence of bulging began to be observed approximately 40 hours after the addition of a 10 μM bosutinib dose. These additional cell types can be used to create effective phenotypic models for other diseases, such as chronic diarrhea or cystic fibrosis. Water transport phenotypes are also significant in the screening of functional aquaporin inhibitors, a field of drug discovery spanning edema, cancer, obesity, brain injury, glaucoma, and other conditions where reliable assays are lacking.

[0418] Epithelial leakage or barrier dysfunction, caused by physical damage or alterations in tight junctions, is important in inflammatory bowel disease (IBD), celiac disease, Crohn's disease, and other intestinal disorders. Most treatments for IBD focus on anti-inflammatory or immunosuppressive therapies, but recently, directly tightening the epithelial barrier has been explored as a therapeutic approach. The screening method using Caco-2 cells described in this paper reveals potential new modalities of action (MOAs) for barrier enhancement and demonstrates the ability to screen for physiologically relevant parameters at high throughput. Aminofenadifide has inherent toxicity and is therefore not a good therapeutic candidate for IBD. However, studies of the analogues discussed above demonstrate the sensitivity of the measurement equipment and methods described in this paper for in-depth medicinal chemistry, structure-activity relationship (SAR) approaches for developing lead compounds. The expansion of the screened compounds can also be used to identify other modulators of the intestinal barrier as potential therapeutic molecules.

Claims

1. A measuring device, comprising: Substrate; Multiple integrated circuits, each including multiple electrodes, are positioned on the substrate in a two-dimensional array comprising n rows and m columns; A communication interface is connected to each of the plurality of integrated circuits, such that each integrated circuit is addressable through the interface; as well as The data output interface includes multiple data output lines connected to the communication interface. In each of the n rows of the array, the integrated circuit is connected to a common data line; and The measuring device can be configured to transmit measurement information through the data output interface in response to a control signal in one or more of the n rows of the array in the following manner: Selectively send measurement information from one of the integrated circuits connected to the common data line of the row to the data output interface; and Disable one or more of the other integrated circuits connected to the common data lines of the row.

2. The measuring device of claim 1, wherein, The measuring device can be configured to, in response to a control signal, transmit measurement information through the data output interface in each of the n rows of the array in the following manner: Measurement information is selectively sent from one of the integrated circuits connected to the common data line of the row to the data output interface; as well as Disable one or more of the other integrated circuits connected to the common data lines of the row.

3. The measuring device of claim 1, wherein, The measuring device can be configured, in response to a control signal, to selectively configure one of the integrated circuits in one or more rows of the n rows of the array, so as to prepare the selectively configured integrated circuit for transmitting measurement information during the transmission of measurement information from the one of the integrated circuits in one or more rows of the n rows of the array.

4. The measuring device of claim 3, wherein, The measuring device can be configured, in response to a control signal, to selectively configure one of the integrated circuits in each of the n rows of the array to prepare the selectively configured integrated circuit for transmitting measurement information during the transmission of measurement information from the one integrated circuit in each of the n rows of the array.

5. The measuring device of claim 1, wherein, n is greater than or equal to 4 and less than or equal to 24.

6. The measuring device of claim 1, wherein, m is greater than or equal to 4 and less than or equal to 24.

7. The measuring device of claim 1, wherein, n=8 and m=12.

8. The measuring device of claim 1, wherein, The multiple data output lines include multiple low-voltage differential signal (LVDS) data output lines.

9. The measuring device of claim 1, wherein, Each integrated circuit includes at least one analog-to-digital converter (ADC) and at least one peripheral circuit (PC).

10. The measuring device of claim 9, wherein, The peripheral circuitry can be configured to operate in a current measurement mode in response to a control signal, in which the peripheral circuitry includes a transimpedance amplifier (TIA) that amplifies the current signal from the electrodes.

11. The measuring device of claim 9, wherein, The peripheral circuitry can be configured to operate in a voltage measurement mode in response to a control signal, in which the peripheral circuitry includes a capacitive gain voltage amplifier.

12. The measuring device of claim 9, wherein, The peripheral circuitry can be configured to operate in a DC voltage drive mode in response to a control signal, in which the peripheral circuitry applies a voltage signal to the electrodes of the integrated circuit.

13. The measuring device of claim 9, wherein, The peripheral circuitry can be configured to operate in a buffered voltage drive mode in response to a control signal, in which the peripheral circuitry receives a voltage signal, passes the voltage signal through an amplifier to generate a buffered voltage signal, and applies the buffered voltage signal to the electrodes of the integrated circuit.

14. The measuring device of claim 1, wherein, The measuring device can be configured to operate each of the integrated circuits synchronously with respect to a clock signal generated outside the measuring device.

15. The measuring device of claim 1, wherein, Disabling one or more of the integrated circuits includes configuring the one or more integrated circuits to operate in a power state, in which the amount of power supplied to the one or more integrated circuits is reduced relative to the amount of power applied to an integrated circuit that selectively transmits measurement information.

16. The measuring device of claim 1, wherein, Disabling one or more of the integrated circuits in the integrated circuits includes providing a higher impedance on one or more output lines of the one or more integrated circuits in the integrated circuits than the impedance on one or more output lines of the integrated circuits that selectively transmit measurement information.

17. The measuring device of claim 1, wherein, Each integrated circuit in the array includes: Unique array address; and The configuration interface includes at least one configuration line. The configuration interface is a Serial Peripheral Interface (SPI).

18. The measuring device of claim 17, wherein, The measuring device can be configured to selectively send a deactivation control signal to the one or more integrated circuits in the other integrated circuits in response to a received first control signal including one or more addresses corresponding to the one or more integrated circuits in the other integrated circuits, so as to deactivate the one or more integrated circuits in the other integrated circuits.

19. The measuring device of claim 18, wherein, The measuring device can be configured to send the deactivation control signal in response to a received second control signal corresponding to the deactivation control signal.

20. A system comprising: The measuring device according to any one of claims 1-19; as well as A host controller, the host controller including a host interface configured to connect to the communication interface, The host controller includes instructions that, when executed, cause the host controller to acquire measurement data from the measuring device by sending control signals to the measuring device.

21. The measuring device of any one of claims 1 to 19, comprising a partition member attached to a surface of the measuring device and comprising a plurality of apertures, wherein, The plurality of openings are sized and positioned to individually surround the integrated circuit of the measuring device.

22. The measuring device of claim 21, wherein, The plurality of openings completely surround the sensor of the measuring device to form a plurality of holes on the surface of the measuring device.

23. The measuring device of claim 22, wherein, The plurality of openings form a hole on one or more sensors of the device.

24. The measuring device according to claim 22, wherein, The plurality of openings form four holes on one or more sensors of the device.

25. The measuring device according to claim 22, wherein, The plurality of openings form sixteen holes on one or more sensors of the device.

26. A system comprising: Measuring apparatus according to any one of claims 1-19 and 21-25; as well as The housing includes a plurality of receiving compartments, each of which is configured to receive the measuring device.

27. The system of claim 26, further comprising a host controller integrated within the housing.

28. The system according to claim 27, wherein, Each of the housing compartments includes a connector sized to engage with the connector of the measuring device, such that when the measuring device is housed within the housing compartment, the communication interface of the measuring device is connected to the host interface of the host controller.

29. A method comprising: A measuring device is provided, the measuring device comprising: Substrate; Multiple integrated circuits, each including multiple electrodes, are positioned on the substrate in a two-dimensional array comprising n rows and m columns; A communication interface, the communication interface being connected to each of the plurality of integrated circuits, such that each integrated circuit is addressable through the interface; and The data output interface includes multiple data output lines connected to the communication interface. In each of the n rows of the array, the integrated circuit is connected to a common data line; Selectively send measurement information from one of the integrated circuits connected to the common data line of the row to the data output interface; and Disable one or more of the other integrated circuits connected to the common data lines of the row.

30. The method of claim 29, further comprising transmitting measurement information through the data output interface in each of the n rows of the array in the following manner: Selectively send measurement information from one of the integrated circuits connected to the common data line of the row to the data output interface; and Disable one or more of the other integrated circuits connected to the common data lines of the row.

31. The method of claim 29, further comprising selectively configuring one of the integrated circuits in one or more rows of the n rows of the array to prepare the selectively configured integrated circuit for transmitting measurement information during the transmission of measurement information from the one of the integrated circuits in one or more rows of the n rows of the array.

32. The method of claim 31, further comprising selectively configuring one of the integrated circuits in each of the n rows of the array to prepare the selectively configured integrated circuit for transmitting measurement information during the transmission of measurement information from the one integrated circuit in each of the n rows of the array.

33. The method according to claim 29, wherein, n is greater than or equal to 4 and less than or equal to 24.

34. The method according to claim 29, wherein, m is greater than or equal to 4 and less than or equal to 24.

35. The method according to claim 29, wherein, n=8 and m=12.

36. The method according to claim 29, wherein, The multiple data output lines include multiple low-voltage differential signal (LVDS) data output lines.

37. The method according to claim 29, wherein, Each integrated circuit includes at least one analog-to-digital converter (ADC) and at least one peripheral circuit (PC).

38. The method of claim 37, further comprising at least one peripheral circuit of at least one integrated circuit operating in a current measurement mode, wherein the at least one peripheral circuit includes a transimpedance amplifier (TIA) amplifying a current signal from an electrode.

39. The method of claim 37, further comprising at least one peripheral circuit of at least one integrated circuit operating in a voltage measurement mode, wherein the at least one peripheral circuit comprises a capacitive gain voltage amplifier.

40. The method of claim 37, further comprising at least one peripheral circuit of at least one integrated circuit operating in a DC voltage drive mode, wherein the at least one peripheral circuit applies a voltage signal to the electrodes of the integrated circuit in the DC voltage drive mode.

41. The method of claim 37, further comprising operating at least one peripheral circuit of at least one integrated circuit in a buffered voltage drive mode, wherein the at least one peripheral circuit receives a voltage signal, passes the voltage signal through an amplifier to generate a buffered voltage signal, and applies the buffered voltage signal to an electrode of the at least one integrated circuit.

42. The method of claim 29, further comprising receiving a clock signal generated outside the measuring device and operating each of the integrated circuits synchronously with respect to the clock signal.

43. The method of claim 29, further comprising disabling one or more of the other integrated circuits by configuring the one or more other integrated circuits to operate in a power state, wherein the amount of power supplied to the one or more of the other integrated circuits is reduced relative to the amount of power applied to an integrated circuit that selectively transmits measurement information.

44. The method of claim 29, further comprising disabling the one or more other integrated circuits by providing a higher impedance on one or more output lines of the one or more integrated circuits that selectively transmit measurement information than the impedance on one or more output lines of the integrated circuits that selectively transmit measurement information.

45. The method according to claim 29, wherein, Each integrated circuit in the array includes: Unique array address; and The configuration interface includes at least one configuration line. The configuration interface is a Serial Peripheral Interface (SPI).

46. ​​The method of claim 45, comprising: Receive a first control signal, the first control signal including one or more addresses corresponding to the one or more integrated circuits in the other integrated circuits; as well as A deactivation control signal is selectively sent to one or more of the other integrated circuits to deactivate the one or more of the other integrated circuits.

47. The method of claim 46, further comprising receiving a second control signal and sending the deactivation control signal in response to the received second control signal, wherein, The received second control signal corresponds to the deactivation control signal.

48. A system comprising: Measuring equipment, including: Substrate; Multiple integrated circuits on the substrate, wherein each integrated circuit includes multiple electrodes and at least one analog-to-digital converter (ADC); and A data output interface, which is connected to the at least one ADC and includes multiple data output lines, The at least one ADC is configured to receive a measurement signal from one or more of the plurality of electrodes and generate one or more data signals including measurement information derived from the measurement signal; and The host controller includes: A host interface, configured to connect to the data output interface of the measuring device; and The instruction, when executed by the host controller, causes the host controller to obtain measurement information from the measuring device in the following manner: Determine the rate at which measurement information in one or more data signals is transmitted from the data output interface to the host interface; Selectively activate multiple data output lines of the data output interface such that the data transmission capacity of the activated data output lines is at least as large as the rate at which measurement information in one or more data signals will be transmitted from the data output interface to the host interface; and The measurement information is received from one or more data signals on the activated data output line of the data output interface.

49. The system according to claim 48, wherein, Each of the data output lines is a Low Voltage Differential Signaling (LVDS) data line.

50. The system according to claim 48, wherein, The multiple data output lines include two data output lines.

51. The system according to claim 48, wherein, Each integrated circuit includes at least one peripheral circuit (PC).

52. The system according to claim 51, wherein, The at least one peripheral circuit can be configured to operate in a current measurement mode in response to a control signal, wherein the at least one peripheral circuit includes a transimpedance amplifier (TIA) that amplifies the current signal from the electrodes of the integrated circuit.

53. The system according to claim 51, wherein, The at least one peripheral circuit can be configured to operate in a voltage measurement mode in response to a control signal, in which the at least one peripheral circuit includes a capacitive gain voltage amplifier.

54. The system according to claim 51, wherein, The at least one peripheral circuit can be configured to operate in a DC voltage drive mode in response to a control signal, in which the at least one peripheral circuit applies a voltage signal to the electrodes of the integrated circuit.

55. The system according to claim 51, wherein, The at least one peripheral circuit can be configured to operate in a buffered voltage drive mode in response to a control signal, in which the at least one peripheral circuit receives a voltage signal, passes the voltage signal through an amplifier to generate a buffered voltage signal, and applies the buffered voltage signal to the electrodes of an integrated circuit.

56. The system according to claim 48, wherein, The measuring device can be configured to operate each of the integrated circuits synchronously with respect to a clock signal generated outside the measuring device.

57. The system according to claim 48, wherein, Selectively activating multiple data output lines of the data output interface includes supplying operating power to the data output lines, such that the data output lines transmit one or more data signals from the data output interface to the host interface.

58. The system according to claim 48, wherein, Selectively activating multiple data output lines of the data output interface includes a higher input and output impedance state relative to the inactive data output lines, while keeping the selectively activated data output lines in at least one of a low input impedance state and a low output impedance state.

59. The system according to claim 48, wherein, Each integrated circuit includes: Unique address; and The configuration interface includes at least one configuration line. The configuration interface is a Serial Peripheral Interface (SPI).

60. The system according to claim 59, wherein, The host controller includes instructions that, when executed by the host controller, cause the host controller to configure the integrated circuit of the measuring device by: Sending a first control signal to the configuration interface of one or more integrated circuits in the integrated circuit, wherein the first electrical signal includes one or more coded address sequences corresponding to one or more addresses of the integrated circuit; and A second control signal, including configuration information, is sent to the integrated circuit corresponding to the one or more addresses.

61. The system according to claim 48, wherein, The integrated circuit is positioned on the substrate in a two-dimensional array.

62. The system according to claim 61, wherein, The array comprises four to twenty-four rows of integrated circuits and four to twenty-four columns of integrated circuits.

63. The system of claim 48, further comprising a partitioning member attached to a surface of the measuring device and including a plurality of openings, wherein, The plurality of openings are sized and positioned to individually surround the integrated circuit of the measuring device.

64. The system according to claim 63, wherein, The plurality of openings completely surround the integrated circuit of the measuring device to form a plurality of holes on the surface of the measuring device.

65. The system according to claim 63, wherein, The plurality of openings form a hole on one or more integrated circuits of the measuring device.

66. The system according to claim 63, wherein, The plurality of openings form four holes on one or more integrated circuits of the measuring device.

67. The system according to claim 63, wherein, The plurality of openings form sixteen holes on one or more integrated circuits of the measuring device.

68. The system according to any one of claims 48-67, further comprising: The housing includes multiple receiving compartments. Each of the accommodating compartments is configured to accommodate the measuring device.

69. The system according to claim 68, wherein, The host controller is integrated within the housing.

70. The system according to claim 69, wherein, Each of the housing's accommodating compartments includes a connector sized to engage with the connector of the measuring device, such that when the measuring device is housed within the housing's accommodating compartment, the data output interface is connected to the host interface.

71. The system according to claim 51, wherein, When the instruction is executed by the host controller, the host controller: One or more control signals are sent to the peripheral circuitry of one or more integrated circuits to selectively route measurement signals from a subset of the electrodes of the one or more integrated circuits to the peripheral circuitry for detection.

72. The system according to claim 71, wherein, The data signal includes measurement information derived from the subset of measurement signals from the electrodes of the one or more integrated circuits.

73. A method comprising: A measuring device is provided, the measuring device comprising: Substrate; Multiple integrated circuits on the substrate, wherein each integrated circuit includes multiple electrodes and at least one analog-to-digital converter (ADC); and A data output interface, which is connected to the at least one ADC and includes multiple data output lines, The at least one ADC is configured to receive measurement signals from one or more of the plurality of electrodes and generate one or more data signals including measurement information derived from the measurement signals; Determine the rate at which measurement information in the one or more data signals will be transmitted from the data output interface; Selectively activate multiple data output lines of the data output interface such that the data transmission capacity of the activated data output lines is at least as large as the rate at which the measurement information in one or more data signals will be transmitted from the data output interface; and The measurement information is received from one or more data signals on the active data output line of the data output interface.

74. The method according to claim 73, wherein, Each of the data output lines is a Low Voltage Differential Signaling (LVDS) data line.

75. The method according to claim 73, wherein, The multiple data output lines include two data output lines.

76. The method according to claim 73, wherein, Each integrated circuit includes at least one peripheral circuit (PC).

77. The method of claim 76, further comprising at least one peripheral circuit of at least one integrated circuit operating in a current measurement mode, wherein the at least one peripheral circuit includes a transimpedance amplifier (TIA) amplifying current signals from electrodes of the at least one integrated circuit.

78. The method of claim 76, further comprising at least one peripheral circuit of at least one integrated circuit operating in a voltage measurement mode, wherein the at least one peripheral circuit comprises a capacitive gain voltage amplifier.

79. The method of claim 76, further comprising at least one peripheral circuit of at least one integrated circuit operating in a DC voltage drive mode, wherein in the DC voltage drive mode, the at least one peripheral circuit applies a voltage signal to the electrodes of the at least one integrated circuit.

80. The method of claim 76, further comprising operating at least one peripheral circuit of at least one integrated circuit in a buffered voltage drive mode, wherein the at least one peripheral circuit receives a voltage signal, passes the voltage signal through an amplifier to generate a buffered voltage signal, and applies the buffered voltage signal to an electrode of the at least one integrated circuit.

81. The method of claim 73, further comprising receiving a clock signal generated outside the measuring device and operating each of the integrated circuits synchronously with respect to the clock signal.

82. The method of claim 73, further comprising selectively activating a plurality of the data output lines of the data output interface by providing operating power to the data output lines, such that the data output lines transmit the one or more data signals from the data output interface.

83. The method of claim 73, further comprising selectively activating a plurality of the data output lines of the data output interface by holding the selectively activated data output lines in at least one of a low input impedance state and a low output impedance state relative to a higher input and output impedance state of the inactive data output lines.

84. The method according to claim 73, wherein, Each integrated circuit includes: Unique address; and The configuration interface includes at least one configuration line. The configuration interface is a Serial Peripheral Interface (SPI).

85. The method according to claim 84, wherein, When executed by the host controller, the instruction causes the host controller to configure the integrated circuit of the measuring device by the following operations: Sending a first control signal to the configuration interface of one or more integrated circuits in the integrated circuit, wherein the first electrical signal includes one or more coded address sequences corresponding to one or more addresses of the integrated circuit; and A second control signal, including configuration information, is sent to the integrated circuit corresponding to the one or more addresses.

86. The method according to claim 73, wherein, The instruction causes the host controller to: One or more control signals are sent to the peripheral circuitry of one or more integrated circuits to selectively route measurement signals from a subset of the electrodes of the one or more integrated circuits to the peripheral circuitry for detection.

87. The method according to claim 86, wherein, The data signal includes measurement information derived from the subset of measurement signals from the electrodes of the one or more integrated circuits.

88. A measuring device, comprising: Substrate; as well as The substrate has a plurality of integrated circuits, wherein each integrated circuit includes: Multiple electrodes; Multiple peripheral circuits (PCs), wherein each of the peripheral circuits is connected to multiple electrodes of the integrated circuit; Multiple analog-to-digital converters (ADCs), wherein each of the ADCs is connected to multiple PCs via a multiplexer; Data aggregation unit, the data aggregation unit being connected to each of the ADCs; and A data output interface, comprising multiple data output lines, wherein the multiple data output lines are connected to the data aggregation unit. In each integrated circuit: The total number of PCs exceeds the total number of ADCs; The data output interface is configured to send a data clock signal; and The data output interface is configured to send measurement information generated by the ADC based on measurement signals detected at the electrodes of the integrated circuit in a plurality of sequential cycles synchronized with the data clock signal.

89. The measuring device according to claim 88, wherein, In each sequential cycle, the data output interface is configured to send the measurement information from the ADC in a common order.

90. The measuring device according to claim 89, wherein, The data output interface is configured to interrupt the transmission of measurement information during the cycle if measurement information from the next ADC in the common sequence is unavailable at the data output interface.

91. The measuring device according to claim 90, wherein, The data output interface is configured to resume the transmission of measurement information during the interrupted period when the measurement information from the next ADC in the common sequence is available at the data output interface.

92. The measuring device according to claim 88, wherein, The data output interface is configured to send the measurement information in each cycle of a plurality of packets, wherein the transmission of each packet is synchronized with at least one of the rising and falling edges of the data clock signal.

93. The measuring device according to claim 88, wherein, The data output interface is configured to send the measurement information in each of a plurality of packets, each of the plurality of packets being synchronized with both the rising and falling edges of the data clock signal.

94. The measuring device according to claim 88, wherein, The data output interface is configured to send the measurement information on the multiple data output lines.

95. The measuring device according to claim 88, wherein, Each of the multiple data output lines is a Low Voltage Differential Signaling (LVDS) data line.

96. The measuring device according to claim 88, wherein, The multiple data output lines include two data output lines.

97. The measuring device according to claim 88, wherein, The data output interface can be configured to disable one or more of the data output lines in response to a control signal.

98. The measuring device according to claim 88, wherein, The data output interface includes multiple data buffers, and each of the data buffers is connected to only one of the ADCs.

99. The measuring device according to claim 88, wherein, Each multiplexer can be configured to adjust multiple peripheral circuits that can be connected to each ADC in response to a control signal to control the detection rate of the measurement signal used for the integrated circuit.

100. The measuring device according to claim 88, wherein, Each peripheral circuit can be configured to operate in a current measurement mode in response to a control signal, in which the peripheral circuit includes a transimpedance amplifier (TIA) that amplifies the current signal from the electrodes of the integrated circuit.

101. The measuring device according to claim 88, wherein, Each peripheral circuit can be configured to operate in a voltage measurement mode in response to a control signal, in which the peripheral circuit includes a capacitive gain voltage amplifier.

102. The measuring device according to claim 88, wherein, Each peripheral circuit can be configured to operate in a DC voltage drive mode in response to a control signal, in which the peripheral circuit applies a voltage signal to the electrodes of the integrated circuit.

103. The measuring device according to claim 88, wherein, Each peripheral circuit can be configured to operate in a buffered voltage drive mode in response to a control signal, in which the peripheral circuit receives a voltage signal, passes the voltage signal through an amplifier to generate a buffered voltage signal, and applies the buffered voltage signal to the electrodes of the integrated circuit.

104. The measuring device according to claim 88, wherein, The measuring device can be configured to operate each of the integrated circuits synchronously with respect to a measuring clock signal generated outside the measuring device.

105. The measuring device according to claim 88, wherein, Each integrated circuit includes: Unique address; and The configuration interface includes at least one configuration line. The configuration interface is a Serial Peripheral Interface (SPI).

106. The measuring device according to claim 105, wherein, The configuration interface can be configured to enable one or more components of the integrated circuit to receive configuration information in response to a first control signal including an coded address of the integrated circuit containing the configuration interface.

107. The measuring device according to claim 106, wherein, The configuration interface can be configured to send the configuration information to one or more components of the integrated circuit in response to a second control signal including configuration information.

108. The measuring device according to claim 106, wherein, The one or more components include at least one component selected from the group consisting of: pixel circuitry connected to electrodes of the integrated circuit, peripheral circuitry of the integrated circuit, a reference electrode amplifier of the integrated circuit, and a digital-to-analog converter (DAC) of the integrated circuit.

109. The measuring device according to claim 105, wherein, The configuration interface is a Serial Peripheral Interface (SPI) shared among each of the integrated circuits in the measuring device.

110. The measuring device according to claim 88, wherein, The integrated circuit is positioned on the substrate in a two-dimensional array.

111. The measuring device according to claim 110, wherein, The array comprises four to twenty-four rows of integrated circuits and four to twenty-four columns of integrated circuits.

112. The measuring device of claim 88, further comprising a partitioning member attached to a surface of the measuring device and including a plurality of openings, wherein, The plurality of openings are sized and positioned to individually surround the integrated circuit of the measuring device.

113. The measuring device according to claim 112, wherein, The plurality of openings completely surround the integrated circuit of the measuring device to form a plurality of holes on the surface of the measuring device.

114. The measuring device according to claim 113, wherein, The plurality of openings form a hole on one or more integrated circuits of the measuring device.

115. The measuring device according to claim 113, wherein, The plurality of openings form four holes on one or more integrated circuits of the measuring device.

116. The measuring device according to claim 113, wherein, The plurality of openings form sixteen holes on one or more integrated circuits of the measuring device.

117. A system comprising: The measuring device according to any one of claims 88-116; as well as The housing includes a plurality of receiving compartments, each of which is configured to receive the measuring device.

118. The system of claim 117, comprising a host controller integrated within the housing.

119. The system according to claim 118, wherein, Each of the housing's accommodating compartments includes a connector sized to engage with the connector of the measuring device, such that when the measuring device is housed within the housing's accommodating compartment, the measuring device's data output interface is connected to the host controller.

120. The system according to claim 119, wherein, The host controller includes instructions that, when executed by the host controller, cause the host controller to obtain the measurement information from a plurality of measuring devices connected to the host controller through the housing.

121. The system according to claim 120, wherein, When the instruction is executed by the host controller, the host controller: One or more control signals are sent to the peripheral circuitry of one or more integrated circuits to selectively route measurement signals from a subset of the electrodes of the one or more integrated circuits to the peripheral circuitry for detection.

122. The system according to claim 121, wherein, The measurement information is generated by the ADC based on the measurement signals detected at the subset of electrodes of the one or more integrated circuits.

123. A method comprising: A measuring apparatus is provided, the measuring apparatus comprising a substrate and a plurality of integrated circuits on the substrate, wherein each integrated circuit comprises: Multiple electrodes; Multiple peripheral circuits (PCs), wherein each of the peripheral circuits is connected to multiple electrodes of the integrated circuit; Multiple analog-to-digital converters (ADCs), wherein each of the ADCs is connected to multiple PCs via a multiplexer; Data aggregation unit, the data aggregation unit being connected to each of the ADCs; and A data output interface, comprising multiple data output lines, wherein the multiple data output lines are connected to the data aggregation unit. In each integrated circuit, the total number of PCs exceeds the total number of ADCs; Sending a data clock signal via the data output interface; and In multiple sequential cycles synchronized with the data clock signal, measurement information generated by the ADC based on measurement signals detected at the electrodes of the integrated circuit is transmitted via the data output interface.

124. The method of claim 123, further comprising transmitting the measurement information from the ADC in a common order via the data output interface in each sequential cycle.

125. The method of claim 124, further comprising, in the event that measurement information from the next ADC in the common sequence is unavailable at the data output interface, interrupting the transmission of measurement information during the period.

126. The method of claim 125, further comprising resuming the transmission of the measurement information during the interrupt period when the measurement information from the next ADC in the common sequence is available at the data output interface.

127. The method of claim 123, further comprising transmitting the measurement information in each period of a plurality of groups, wherein, The transmission of each packet is synchronized with at least one of the rising and falling edges of the data clock signal.

128. The method of claim 123, further comprising transmitting the measurement information in each of a plurality of groups, each of the plurality of groups being synchronized with the rising and falling edges of the data clock signal.

129. The method of claim 123, further comprising transmitting the measurement information on the plurality of data output lines.

130. The method according to claim 123, wherein, Each of the multiple data output lines is a Low Voltage Differential Signaling (LVDS) data line.

131. The method according to claim 123, wherein, The multiple data output lines include two data output lines.

132. The method of claim 123, further comprising disabling one or more of the data output lines via the data output interface.

133. The method according to claim 123, wherein, The data output interface includes multiple data buffers, and each of the data buffers is connected to only one of the ADCs.

134. The method of claim 123, further comprising controlling the detection rate of a plurality of said peripheral circuits connectable to each ADC via one or more adjustments in said multiplexers to the detection rate of a measurement signal for said integrated circuit.

135. The method according to claim 123, wherein, Each peripheral circuit can be configured to operate in a current measurement mode in response to a control signal, in which the peripheral circuit includes a transimpedance amplifier (TIA) that amplifies the current signal from the electrodes of the integrated circuit.

136. The method according to claim 123, wherein, Each peripheral circuit can be configured to operate in a voltage measurement mode in response to a control signal, in which the peripheral circuit includes a capacitive gain voltage amplifier.

137. The method according to claim 123, wherein, Each peripheral circuit can be configured to operate in a DC voltage drive mode in response to a control signal, in which the peripheral circuit applies a voltage signal to the electrodes of the integrated circuit.

138. The method according to claim 123, wherein, Each peripheral circuit can be configured to operate in a buffered voltage drive mode in response to a control signal, in which the peripheral circuit receives a voltage signal, passes the voltage signal through an amplifier to generate a buffered voltage signal, and applies the buffered voltage signal to the electrodes of the integrated circuit.

139. The method of claim 123, comprising: Receives a measurement clock signal generated outside the measuring device; as well as Each of the integrated circuits operates synchronously with respect to the measurement clock signal.

140. The method according to claim 123, wherein, Each integrated circuit includes: Unique address; and The configuration interface includes at least one configuration line. The configuration interface is a Serial Peripheral Interface (SPI).

141. The method of claim 140, comprising: Receive a first control signal, the first control signal including the coded address of the integrated circuit containing the configuration interface; as well as In response to the first control signal, one or more components of the integrated circuit are enabled via the configuration interface to receive configuration information via the configuration interface.

142. The method of claim 141, comprising: Receive a second control signal that includes configuration information; as well as The configuration information is sent to one or more components of the integrated circuit.

143. The method according to claim 141, wherein, The one or more components include at least one component selected from the group consisting of: pixel circuitry connected to electrodes of the integrated circuit, peripheral circuitry of the integrated circuit, a reference electrode amplifier of the integrated circuit, and a digital-to-analog converter (DAC) of the integrated circuit.

144. The method according to claim 141, wherein, The configuration interface is a Serial Peripheral Interface (SPI) shared among each of the integrated circuits in the measuring device.

145. The method of claim 123, further comprising transmitting the measurement information from a plurality of measuring devices to a host controller external to the measuring devices.

146. The method of claim 123, further comprising sending one or more control signals to peripheral circuitry of one or more integrated circuits to selectively route measurement signals from a subset of the electrodes of the one or more integrated circuits to the peripheral circuitry for detection.

147. The method of claim 123, further comprising generating the measurement information via the ADC based on measurement signals detected at a subset of the electrodes of the one or more integrated circuits.

148. A measuring device, comprising: Substrate; as well as Multiple integrated circuits on the substrate, each including multiple electrodes and connected to a pixel circuit, the pixel circuit being capable of independently switching between multiple operating modes. The measuring device can be configured to respond to a control signal: By adjusting the pixel circuitry connected to one or more electrodes to operate in a first mode, stimulation signals are delivered to the outside of the measuring device using the one or more electrodes; and Measurement signals at one or more electrodes are detected by adjusting the pixel circuit to operate in a second mode, different from the first mode.

149. The measuring device according to claim 148, wherein, The first mode is selected from the group consisting of: a mode in which a current signal is delivered by the one or more electrodes, and a mode in which a voltage signal is delivered by the one or more electrodes.

150. The measuring device according to claim 148, wherein, Each circuit includes multiple switches that can be configured to operate the pixel circuit in the first mode and the second mode in response to the control signal by the measuring device.

151. The measuring device according to claim 148, wherein, In the second mode, each of the one or more electrodes is connected to the output terminal of the pixel circuit, and the pixel circuit is connected to the electrode.

152. The measuring device according to claim 148, wherein, The one or more electrodes are a first set of electrodes of the integrated circuit, and the measuring device can be configured to adjust the pixel circuits connected to a second set of one or more electrodes of the integrated circuit to operate in a third mode different from the first mode and the second mode.

153. The measuring device according to claim 152, wherein, In the third mode, each of the one or more electrodes in the second set of electrodes is not connected to the output terminal of the pixel circuit, which is connected to the electrode.

154. The measuring device according to claim 149, wherein, The measuring device can be configured to select from a plurality of different reference voltage signals to provide to the one or more electrodes for delivery by the electrodes.

155. The measuring device according to claim 148, wherein, Each pixel circuitry includes: A first input terminal is connected to the pixel circuit via a first switch and can be configured to receive a first reference voltage signal from a source outside the pixel circuit. The second input terminal is connected to the pixel circuit via a second switch and can be configured to receive a second reference voltage signal from a source outside the pixel circuit. Output terminal, the output terminal being connected to the pixel circuit via a third switch; and A current injector, which is connected to the pixel circuit via a fourth switch.

156. The measuring device according to claim 155, wherein, The current injector includes two switches and at least one capacitor, and wherein the current injector can be configured to generate a current signal in response to a control signal received at each of the two switches of the current injector.

157. The measuring device according to claim 156, wherein, The control signal received at each of the two switches includes a first clock signal and a second clock signal, wherein the second clock signal has a positive non-overlap with the first clock signal.

158. The measuring device according to claim 148, wherein, Each integrated circuit includes at least one peripheral circuit (PC) connected to the one or more electrodes via corresponding pixel circuits connected to each of the one or more electrodes of the integrated circuit.

159. The measuring device according to claim 158, wherein, The at least one peripheral circuit can be configured to operate in a current measurement mode in response to a control signal, wherein the at least one peripheral circuit includes a transimpedance amplifier (TIA) that amplifies the current signal from the electrodes of the integrated circuit.

160. The measuring device according to claim 158, wherein, The at least one peripheral circuit can be configured to operate in a voltage measurement mode in response to a control signal, in which the at least one peripheral circuit includes a capacitive gain voltage amplifier.

161. The measuring device according to claim 158, wherein, The at least one peripheral circuit can be configured to operate in a DC voltage drive mode in response to a control signal, in which the at least one peripheral circuit applies a voltage signal to the electrode via a pixel circuit connected to the electrode of the integrated circuit.

162. The measuring device according to claim 158, wherein, The at least one peripheral circuit can be configured to operate in a buffered voltage drive mode in response to a control signal, in which the at least one peripheral circuit receives a voltage signal, passes the voltage signal through an amplifier to generate a buffered voltage signal, and applies the buffered voltage signal to the electrode through a pixel circuit connected to the electrode of the integrated circuit.

163. The measuring device according to claim 158, wherein, Each peripheral circuit includes multiple switches, and the measuring device can be configured to configure an operating mode for each peripheral circuit according to a plurality of operating modes for each peripheral circuit in response to one or more configuration signals.

164. The measuring device according to claim 158, wherein, Each peripheral circuit includes: A first input terminal, which is connected to the peripheral circuit via a first switch, and is configurable to receive a first reference voltage signal from the digital-to-analog converter (DAC) of the measuring device; The second input terminal is connected to the peripheral circuit via a second switch and can be configured to receive a second reference voltage signal from the DAC; The third input terminal is connected to the peripheral circuit via a third switch and can be configured to receive a second reference voltage signal from the DAC; A fourth input terminal, the fourth input terminal being connected to one or more electrodes of the integrated circuit; and The output terminal is connected to the multiplexing unit.

165. The measuring device according to claim 164, wherein, Each peripheral circuit includes a switched capacitor resistor connected to the amplifier and comprising a capacitor and two switches, wherein the resistance value of the switched capacitor resistor can be configured by a control signal received at each of the two switches.

166. The measuring device according to claim 165, wherein, The control signal received at each of the two switches includes a non-overlapping clock signal.

167. The measuring device according to claim 148, wherein, The measuring device can be configured to operate each of the integrated circuits synchronously with respect to a clock signal generated outside the measuring device.

168. The measuring device according to claim 148, wherein, Each integrated circuit includes: Unique address; and The configuration interface includes at least one configuration line. The configuration interface is a Serial Peripheral Interface (SPI).

169. The measuring device according to claim 168, wherein, The measuring device can be configured to respond to a first control signal including an coded address of the integrated circuit containing the configuration interface, such that one or more components of the integrated circuit can receive configuration information.

170. The measuring device according to claim 169, wherein, The configuration interface can be configured to send the configuration information to one or more components of the integrated circuit in response to a second control signal including configuration information.

171. The measuring device according to claim 170, wherein, The one or more components include at least one component selected from the group consisting of: pixel circuitry connected to electrodes of the integrated circuit, peripheral circuitry of the integrated circuit, a reference electrode amplifier of the integrated circuit, and a digital-to-analog converter (DAC) of the integrated circuit.

172. The measuring device according to claim 168, wherein, The serial peripheral interface is shared among each of the integrated circuits in the measuring device.

173. The measuring device according to claim 148, wherein, The integrated circuit is positioned on the substrate in a two-dimensional array.

174. The measuring device according to claim 173, wherein, The array comprises four to twenty-four rows of integrated circuits and four to twenty-four columns of integrated circuits.

175. The measuring device of claim 148, further comprising a partitioning member attached to a surface of the measuring device and including a plurality of openings, wherein, The plurality of openings are sized and positioned to individually surround the integrated circuit of the measuring device.

176. The measuring device according to claim 175, wherein, The plurality of openings completely surround the integrated circuit of the measuring device to form a plurality of holes on the surface of the measuring device.

177. The measuring device according to claim 176, wherein, The plurality of openings form a hole on one or more integrated circuits of the measuring device.

178. The measuring device according to claim 176, wherein, The plurality of openings form four holes on one or more integrated circuits of the measuring device.

179. The measuring device according to claim 176, wherein, The plurality of openings form sixteen holes on one or more integrated circuits of the measuring device.

180. A system comprising: The measuring device according to any one of claims 148-179; as well as The housing includes a plurality of receiving compartments, each of which is configured to receive the measuring device.

181. The system of claim 180, comprising a host controller integrated within the housing.

182. The system according to claim 181, wherein, Each of the housing compartments includes a connector sized to engage with the connector of the measuring device, such that when the measuring device is housed within the housing compartment, the interface of the measuring device is connected to the host controller.

183. The system according to claim 182, wherein, The host controller includes instructions that, when executed by the host controller, cause the host controller to obtain measurement data from a plurality of measuring devices connected to the host controller through the housing.

184. The system according to claim 183, wherein, When the instruction is executed by the host controller, the host controller: One or more control signals are sent to the peripheral circuitry of one or more integrated circuits to selectively route measurement signals from a subset of the electrodes of the one or more integrated circuits to the peripheral circuitry for detection.

185. A method comprising: A measuring device is provided, the measuring device including a substrate and a plurality of integrated circuits on the substrate, each integrated circuit including a plurality of electrodes and connected to a pixel circuit, the pixel circuit being capable of independently switching between a plurality of operating modes; By adjusting the pixel circuitry connected to the one or more electrodes to operate in a first mode, stimulation signals are delivered to the outside of the measurement device using the one or more electrodes; as well as Measurement signals at one or more electrodes are detected by adjusting the pixel circuit to operate in a second mode, different from the first mode.

186. A measuring device, comprising: Substrate; as well as Multiple integrated circuits on the substrate, each integrated circuit including multiple electrodes positioned in a two-dimensional array on the substrate, and each electrode connected to an independent pixel circuit. Specifically, for each of one or more of the plurality of integrated circuits, the measuring device can be configured to respond to a control signal: Receive information about the effective electrode spacing of the specified measuring electrodes from the control signal; and The pixel circuitry connected to the electrode set of the integrated circuit is configured such that the electrodes of the set operate as a regularly spaced array of measurement electrodes, at which measurement signals are detectable; and The electrode spacing of the array of measuring electrodes matches the effective electrode spacing.

187. The measuring device according to claim 186, wherein, The electrode spacing of the array of measuring electrodes matches the spacing between adjacent electrodes on the substrate.

188. The measuring device according to claim 186, wherein, The spacing between the electrodes in the array of measuring electrodes is greater than the spacing between adjacent electrodes on the substrate.

189. The measuring device according to claim 186, wherein, The electrode spacing of the array of measuring electrodes corresponds to the nearest neighbor electrode spacing along each of the two orthogonal directions in the array of measuring electrodes.

190. The measuring device according to claim 186, wherein, The electrode spacing of the array of measuring electrodes corresponds to the nearest diagonal adjacent electrode spacing in the array of measuring electrodes.

191. The measuring device according to claim 186, wherein, The electrode spacing of the array of measuring electrodes corresponds to the second nearest neighbor electrode spacing along each of the two orthogonal directions in the array of measuring electrodes.

192. The measuring device according to claim 186, wherein, The electrode spacing of the array of measuring electrodes corresponds to the second nearest diagonal adjacent electrode spacing in the array of measuring electrodes.

193. The measuring device according to claim 186, wherein, The spacing between adjacent electrodes on the substrate is p, and the electrode spacing of the array of measuring electrodes has a value m=p.

194. The measuring device according to claim 186, wherein, The spacing between adjacent electrodes on the substrate is p, and the electrode spacing of the array of measuring electrodes has a value m = p.

195. The measuring device according to claim 186, wherein, The spacing between adjacent electrodes on the substrate is p, and the electrode spacing of the array of measuring electrodes has a value m=2p.

196. The measuring device according to claim 186, wherein, The spacing between adjacent electrodes on the substrate is p, and the electrode spacing of the array of measuring electrodes has a value m = p.

197. The measuring device according to claim 186, wherein, The spacing between adjacent electrodes on the substrate is p, wherein the electrode spacing of the array of measuring electrodes has a value m=np, and where n is an integer.

198. The measuring device according to claim 186, wherein, The spacing between adjacent electrodes on the substrate is p, wherein the electrode spacing of the array of measuring electrodes has a value m= np, where n is an integer.

199. The measuring device according to claim 186, wherein, The spacing between adjacent electrodes on the substrate is between 1.0 μm and 15.0 μm.

200. The measuring device according to claim 186, wherein, For each of the plurality of integrated circuits, the measurement device can be configured to connect the electrode set to one or more peripheral circuits of the integrated circuit via the pixel circuits connected thereto in response to the control signal, so as to route the measurement signal to the peripheral circuits for detection.

201. The measuring device according to claim 186, wherein, For each of the plurality of integrated circuits, the measuring device can be configured to, in response to the control signal, disconnect the electrodes of components that are not part of the electrode set from the peripheral circuitry of the integrated circuit.

202. The measuring device according to claim 186, wherein, Each integrated circuit includes at least one peripheral circuit (PC) connected to the one or more electrodes via pixel circuitry connected to the one or more electrodes of the integrated circuit.

203. The measuring device according to claim 202, wherein, The at least one peripheral circuit can be configured to operate in a current measurement mode in response to a control signal, wherein the at least one peripheral circuit includes a transimpedance amplifier (TIA) that amplifies the current signal from the electrodes of the integrated circuit.

204. The measuring device according to claim 202, wherein, The at least one peripheral circuit can be configured to operate in a voltage measurement mode in response to a control signal, in which the at least one peripheral circuit includes a capacitive gain voltage amplifier.

205. The measuring device according to claim 202, wherein, The at least one peripheral circuit can be configured to operate in a DC voltage drive mode in response to a control signal, in which the at least one peripheral circuit applies a voltage signal to the electrode via a pixel circuit connected to the electrode of the integrated circuit.

206. The measuring device according to claim 202, wherein, The at least one peripheral circuit can be configured to operate in a buffered voltage drive mode in response to a control signal, in which the at least one peripheral circuit receives a voltage signal, passes the voltage signal through an amplifier to generate a buffered voltage signal, and applies the buffered voltage signal to the electrode through the pixel circuit connected to the electrode of the integrated circuit.

207. The measuring device according to claim 202, wherein, Each peripheral circuit includes multiple switches, and the measuring device can be configured to configure an operating mode for each peripheral circuit according to a plurality of operating modes for each peripheral circuit in response to one or more configuration signals.

208. The measuring device according to claim 186, wherein, Each integrated circuit includes: Unique address; and The configuration interface includes at least one configuration line. The configuration interface is a Serial Peripheral Interface (SPI).

209. The measuring device according to claim 208, wherein, The measuring device can be configured to enable one or more components of the integrated circuit to receive configuration information in response to a first control signal including an coded address of the integrated circuit containing the configuration interface.

210. The measuring device according to claim 209, wherein, The configuration interface can be configured to send the configuration information to one or more components of the integrated circuit in response to a second control signal including configuration information.

211. The measuring device according to claim 210, wherein, The one or more components include at least one component selected from the group consisting of: pixel circuitry connected to electrodes of the integrated circuit, peripheral circuitry of the integrated circuit, a reference electrode amplifier of the integrated circuit, and a digital-to-analog converter (DAC) of the integrated circuit.

212. The measuring device according to claim 208, wherein, The serial peripheral interface is shared among each of the integrated circuits in the measuring device.

213. The measuring device according to claim 186, wherein, The integrated circuit is positioned on the substrate in a two-dimensional array.

214. The measuring device according to claim 213, wherein, The array comprises four to twenty-four rows of integrated circuits and four to twenty-four columns of integrated circuits.

215. The measuring device of claim 186, further comprising a partitioning member attached to a surface of the measuring device and including a plurality of openings, wherein, The plurality of openings are sized and positioned to individually surround the integrated circuit of the measuring device.

216. The measuring device according to claim 215, wherein, The plurality of openings completely surround the integrated circuit of the measuring device to form a plurality of holes on the surface of the measuring device.

217. The measuring device according to claim 216, wherein, The plurality of openings form a hole on one or more integrated circuits of the measuring device.

218. The measuring device according to claim 216, wherein, The plurality of openings form four holes on one or more integrated circuits of the measuring device.

219. The measuring device according to claim 216, wherein, The plurality of openings form sixteen holes on one or more integrated circuits of the measuring device.

220. A system comprising: The measuring device according to any one of claims 186-219; as well as The housing includes a plurality of receiving compartments, each of which is configured to receive the measuring device.

221. The system of claim 220, comprising a host controller integrated within the housing.

222. The system according to claim 221, wherein, Each of the housing compartments includes a connector sized to engage with the connector of the measuring device, such that when the measuring device is housed within the housing compartment, the interface of the measuring device is connected to the host controller.

223. The system according to claim 222, wherein, The host controller includes instructions that, when executed by the host controller, cause the host controller to obtain measurement data from a plurality of measuring devices connected to the host controller through the housing.

224. A method comprising: A measuring device is provided, the measuring device including a substrate and a plurality of integrated circuits on the substrate, each integrated circuit including a plurality of electrodes positioned in a two-dimensional array on the substrate, and each electrode being connected to an independent pixel circuit; and For each of one or more of the plurality of integrated circuits: Receive information on the effective electrode spacing of the specified measuring electrodes from the control signal; as well as The pixel circuitry is configured to connect to the electrode set of the integrated circuit such that the electrode set operates as a regularly spaced array of measurement electrodes at which measurement signals are detectable. The electrode spacing of the array of measuring electrodes matches the effective electrode spacing.

225. A measuring device, comprising: Substrate; as well as The substrate has a plurality of integrated circuits, wherein each integrated circuit includes: Multiple electrodes; Multiple peripheral circuits; Multiple reference electrode amplifiers; and At least one digital-to-analog converter (DAC), the at least one DAC being configurable to selectively connect to one or more of the plurality of peripheral circuits and one or more of the reference electrode amplifiers in response to a control signal. The peripheral circuitry, the reference electrode amplifier, and the at least one DAC can be configured to control the electric field distribution adjacent to the substrate in response to a control signal by operating as follows: One or more drive signals are delivered to a first subset of the plurality of electrodes; Delivering one or more reference signals to a second subset of the plurality of electrodes, the second subset being different from the first subset; and One or more shielding signals are delivered to a third subset of the plurality of electrodes, the third subset being different from the first subset and the second subset.

226. The measuring device according to claim 225, wherein, The at least one DAC is configured to generate the one or more drive signals.

227. The measuring device according to claim 226, wherein, The peripheral circuitry is configured to deliver the one or more drive signals to the first subset of the plurality of electrodes.

228. The measuring device according to claim 226, wherein, The reference electrode amplifier is configured to deliver the one or more drive signals to the first subset of the plurality of electrodes.

229. The measuring device according to claim 225, wherein, The at least one DAC is configured to generate the one or more reference signals.

230. The measuring device according to claim 229, wherein, The peripheral circuitry is configured to deliver the one or more reference signals to a second subset of the plurality of electrodes.

231. The measuring device according to claim 225, wherein, The one or more drive signals include at least one of voltage signals and current signals corresponding to multiple frequency components.

232. The measuring device according to claim 225, wherein, The at least one DAC is configured to generate the one or more shielding signals.

233. The measuring device according to claim 225, wherein, The measuring device can be configured to measure one or more electrical signals from a biological sample positioned on or adjacent to the substrate in response to a control signal by: (a) Delivering one or more drive signals to the first subset of the electrodes; (b) Delivering one or more shielding signals to the third subset of the electrodes; (c) Delivering one or more reference signals to the second subset of the electrodes; as well as (d) Measure one or more electrical signals from the biological sample in response to the one or more drive signals.

234. The measuring device according to claim 233, wherein, The measuring device can be configured to measure the one or more electrical signals from the biological sample using the second subset of the electrodes in response to a control signal.

235. The measuring device according to claim 233, wherein, The measuring device can be configured to measure one or more electrical signals from the biological sample using the first subset of the electrodes in response to a control signal.

236. The measuring device according to claim 233, wherein, In one or more integrated circuits of the measuring device, the measuring device can be configured to respond to a control signal: (a) Delivering one or more drive signals to a plurality of first subsets of the electrodes; (b) Delivering one or more shielding signals to multiple third subsets of the electrodes; (c) Delivering one or more reference signals to multiple second subsets of the electrodes; as well as (d) Measure one or more electrical signals from a biological sample in response to the one or more drive signals.

237. The measuring device according to claim 236, wherein, The measuring device can be configured to measure one or more electrical signals from the biological sample in parallel using the plurality of second subsets of the electrodes in response to a control signal.

238. The measuring device according to claim 236, wherein, The measuring device can be configured to measure one or more electrical signals from the biological sample in parallel using the plurality of first subsets of the electrodes in response to a control signal.

239. The measuring device according to claim 233, wherein, The measured one or more electrical signals are a first set of one or more electrical signals, and wherein the measuring device can be configured to respond to a control signal: (e) Delivering one or more drive signals to a fourth subset of the electrodes; (f) Deliver one or more shielding signals to a sixth subset of the electrodes; (g) Delivering one or more reference signals to a fifth subset of the electrodes; and (h) In response to one or more drive signals delivered to the fourth subset of the electrodes, a second set of one or more electrical signals from the biological sample is measured. The first subset and the fourth subset of electrodes do not share any electrodes.

240. The measuring device according to claim 239, wherein, The measuring device can be configured to, in response to a control signal, use the fifth subset of the electrodes to measure the second set of one or more electrical signals from the biological sample.

241. The measuring device according to claim 239, wherein, The measuring device can be configured to, in response to a control signal, use the fourth subset of the electrodes to measure the second set of one or more electrical signals from the biological sample.

242. The measuring device according to claim 233, wherein, The measuring device can be configured to repeat steps (a)-(d) for different first subsets of the electrodes in response to a control signal.

243. The measuring device according to claim 242, wherein, In the repetition of steps (a)-(d), at least some components of the second electrode subset are different.

244. The measuring device according to claim 242, wherein, In the repetition of steps (a)-(d), at least some components of the third electrode subset are different.

245. The measuring device according to claim 233, wherein, The first subset of the electrodes includes a ring that at least partially surrounds the electrodes of the second subset and the third subset of the electrodes.

246. The measuring device according to claim 245, wherein, The first subset of the electrodes completely surrounds the second subset and the third subset of the electrodes.

247. The measuring device according to claim 245, wherein, The second subset of the electrodes comprises a two-dimensional continuous array of electrodes.

248. The measuring device according to claim 247, wherein, The second subset of the electrodes comprises a square n×n electrode array, where n is an integer.

249. The measuring device according to claim 248, wherein, n is at least 2 and less than or equal to 64.

250. The measuring device according to claim 246, wherein, The third subset of the electrodes includes a ring of electrodes that at least partially surrounds the first subset of the electrodes.

251. The measuring device according to claim 250, wherein, The third subset of the electrodes completely surrounds the first subset of the electrodes.

252. The measuring device according to claim 249, wherein, The third subset of the electrodes is located between the second subset of the electrodes and the first subset of the electrodes.

253. The measuring device according to claim 250, wherein, The thickness of the ring in the third electrode subset is greater than that of a single electrode.

254. The measuring device according to claim 245, wherein, The thickness of the ring in the first electrode subset is greater than that of a single electrode.

255. The measuring device according to claim 233, wherein, The second subset of the electrodes comprises nine electrodes.

256. The measuring device according to claim 233, wherein, The first subset of the electrodes comprises a two-dimensional continuous array of electrodes.

257. The measuring device according to claim 256, wherein, The first subset of the electrodes comprises a square n×n electrode array, where n is an integer.

258. The measuring device according to claim 257, wherein, n is at least 2 and less than or equal to 64.

259. The measuring device according to claim 256, wherein, The first subset of the electrodes comprises nine electrodes.

260. The measuring device according to claim 256, wherein, The third subset of the electrodes includes a ring of electrodes that at least partially surrounds the first subset of the electrodes.

261. The measuring device according to claim 260, wherein, The third subset of the electrodes completely surrounds the first subset of the electrodes.

262. The measuring device according to claim 260, wherein, The thickness of the ring in the third electrode subset is greater than that of a single electrode.

263. The measuring device according to claim 256, wherein, The second subset of the electrodes includes a ring of electrodes that at least partially surround the first subset and the third subset of the electrodes.

264. The measuring device according to claim 263, wherein, The second subset of the electrodes completely surrounds the first subset and the third subset of the electrodes.

265. The measuring device according to claim 263, wherein, The third subset of the electrodes is located between the first subset of the electrodes and the second subset of the electrodes.

266. The measuring device according to claim 263, wherein, The thickness of the ring of the second subset of electrodes is greater than that of a single electrode.

267. The measuring device according to claim 233, wherein, The first subset of the electrodes comprises a single electrode.

268. The measuring device according to claim 233, wherein, The first subset of the electrodes includes multiple electrodes.

269. The measuring device according to claim 233, wherein, The second subset of the electrodes comprises a single electrode.

270. The measuring device according to claim 233, wherein, The second subset of the electrodes includes multiple electrodes.

271. The measuring device according to claim 270, wherein: The plurality of electrodes are arranged in a two-dimensional array; as well as Each electrode in the second subset of the electrodes is adjacent to an electrode in the first subset of the electrodes in the two-dimensional array.

272. The measuring device according to claim 233, wherein, The third subset of the electrodes includes more electrodes than the first subset of the electrodes, and more electrodes than the second subset of the electrodes.

273. The measuring device according to claim 271, wherein, The first subset of the electrodes comprises a single electrode, wherein the second subset of the electrodes comprises two electrodes, and wherein the two electrodes of the second subset of the electrodes are orthogonally shifted relative to the single electrode of the first subset of the electrodes.

274. The measuring apparatus of claim 225, further comprising a row selection logic unit and a column selection logic unit configured to selectively connect each of the plurality of electrodes to the plurality of peripheral circuits.

275. The measuring device of claim 225, further comprising a partitioning member attached to a surface of the device and including a plurality of openings, wherein, The plurality of openings are sized and positioned to individually surround the integrated circuit of the device.

276. The measuring device according to claim 275, wherein, The plurality of openings completely surround the integrated circuit of the device to form a plurality of holes on the surface of the device.

277. The measuring device according to claim 275, wherein, The plurality of openings form a hole on one or more integrated circuits of the device.

278. The measuring device according to claim 275, wherein, The plurality of openings form four holes on one or more integrated circuits of the measuring device.

279. The measuring device according to claim 275, wherein, The plurality of openings form sixteen holes on one or more integrated circuits of the measuring device.

280. A system comprising: The measuring device according to any one of claims 225-279; as well as The housing includes a plurality of receiving compartments, each of which is configured to receive the measuring device.

281. The system of claim 280, comprising a host controller integrated within the housing.

282. The system according to claim 281, wherein, Each of the receiving compartments of the housing includes a connector that is sized to engage with the connector of the measuring device, such that when the measuring device is housed within the receiving compartment of the housing, the interface of the measuring device is connected to the host controller.

283. The system according to claim 282, wherein, The host controller includes instructions that, when executed by the host controller, cause the host controller to obtain measurement data from a plurality of measuring devices connected to the host controller through the housing.

284. The system according to claim 282, wherein, The host controller includes instructions that, when executed by the host controller, cause the host controller to send control signals to the at least one DAC to cause the at least one DAC to: Generate the one or more drive signals and the one or more reference signals; Deliver the one or more drive signals to the plurality of peripheral circuits; as well as The one or more reference signals are delivered to the plurality of reference amplifiers.

285. A method comprising: A measuring apparatus is provided, the measuring apparatus comprising a substrate and a plurality of integrated circuits on the substrate, wherein each integrated circuit comprises: Multiple electrodes; Multiple peripheral circuits; Multiple reference electrode amplifiers; and At least one digital-to-analog converter (DAC), the at least one DAC being configurable to selectively connect to one or more of the plurality of peripheral circuits and one or more of the reference electrode amplifiers in response to a control signal; and The electric field distribution adjacent to the substrate is controlled by the following operations: One or more drive signals are delivered to a first subset of the plurality of electrodes; Delivering one or more reference signals to a second subset of the plurality of electrodes, the second subset being different from the first subset; and One or more shielding signals are delivered to a third subset of the plurality of electrodes, the third subset being different from the first subset and the second subset.

286. A measuring device, comprising: Substrate; as well as The substrate has a plurality of integrated circuits, wherein each integrated circuit includes: Multiple electrodes; At least one digital-to-analog converter (DAC); Multiple peripheral circuits; and Multiple reference electrode amplifiers, Each peripheral circuit and reference electrode amplifier can be configured to be selectively connected to the at least one DAC; and The at least one DAC can be configured to generate a drive signal comprising multiple frequency components for one or more of the plurality of electrodes in response to a control signal.

287. The measuring device according to claim 286, wherein, The at least one DAC can be configured to generate a reference voltage for one or more of the plurality of electrodes in response to a control signal.

288. The measuring device according to claim 286, wherein, The plurality of frequency components includes at least three frequency components.

289. The measuring device according to claim 286, wherein, At least some of the plurality of frequency components are between 10 Hz and 1 MHz.

290. The measuring device according to claim 289, wherein, At least some of the plurality of frequency components are between 100 Hz and 200 kHz.

291. The measuring device according to claim 286, wherein, The at least one DAC can be configured to control the relative phase of the plurality of frequency components of the drive signal in response to a control signal.

292. The measuring device according to claim 287, wherein, The measuring device can be configured to apply the drive signal to a first subset of the plurality of electrodes and apply the reference voltage to a second subset of the plurality of electrodes in response to a control signal.

293. The measuring device according to claim 292, wherein, The measuring device can be configured to measure signals from biological samples near the plurality of integrated circuits in response to a control signal.

294. The measuring device according to claim 287, wherein, The measuring device can be configured to respond to a control signal: (a) Applying the drive signal to a first subset of the plurality of electrodes and applying the reference voltage to a second subset of the plurality of electrodes; (b) Measure signals from biological samples near the plurality of integrated circuits; as well as (c) Repeat steps (a) and (b) for different electrodes among the plurality of electrodes, such that each first subset of the plurality of electrodes is different from the other first subsets of the plurality of electrodes.

295. The measuring device according to claim 294, wherein, The measuring device can be configured to apply a shielding signal to a third subset of the plurality of electrodes in response to a control signal.

296. The measuring device according to claim 295, wherein, The measuring device can be configured to measure signals from the biological sample using a first subset of the plurality of electrodes in response to a control signal.

297. The measuring device according to claim 295, wherein, The measuring device can be configured to measure signals from the biological sample using a second subset of the plurality of electrodes in response to a control signal.

298. The measuring device according to claim 295, wherein: The second subset of the plurality of electrodes comprises a continuous array of electrodes; The third subset of the plurality of electrodes includes a ring of electrodes surrounding the second subset of the plurality of electrodes; as well as The first subset of the plurality of electrodes surrounds the second subset and the third subset of the plurality of electrodes.

299. The measuring device according to claim 298, wherein, The second subset of the plurality of electrodes comprises an array of 3×3 electrodes.

300. The measuring device according to claim 295, wherein: The first subset of the plurality of electrodes includes a continuous electrode array; The third subset of the plurality of electrodes includes a ring of electrodes surrounding the first subset of the plurality of electrodes; as well as The second subset of the plurality of electrodes surrounds the second subset and the third subset of the plurality of electrodes.

301. The measuring device according to claim 300, wherein, The first subset of the plurality of electrodes comprises an array of 3×3 electrodes.

302. The measuring device according to claim 295, wherein: Each electrode in the second subset of the plurality of electrodes is adjacent to an electrode in the first subset of the plurality of electrodes; as well as The third subset of the plurality of electrodes surrounds the first subset and the second subset of the plurality of electrodes.

303. The measuring device according to claim 300, wherein: The first subset of the plurality of electrodes includes one electrode; and The second subset of the plurality of electrodes includes two electrodes.

304. The measuring device according to claim 294, wherein, The at least one DAC includes multiple current-mode DAC modules coupled to multiple transimpedance amplifiers.

305. The measuring device according to claim 304, wherein, Each of the current-mode DAC modules can be configured to generate an analog output signal corresponding to one of the plurality of frequency components in response to a control signal.

306. The measuring device according to claim 304, further comprising a switch matrix, wherein, The switching matrix can be configured to couple the output signal from any of the current-mode DAC modules to any of the transimpedance amplifiers in response to a control signal.

307. The measuring device according to claim 306, wherein, The switching matrix can be configured to couple output signals from multiple DAC modules to a single transimpedance amplifier in response to a control signal.

308. The measuring device according to claim 307, wherein, The transimpedance amplifier is configured to generate multiple frequency components of the drive signal.

309. The measuring device according to claim 304, wherein, The at least one DAC includes five current-mode DAC modules and five transimpedance amplifiers.

310. The measuring device according to claim 304, wherein, Each of the plurality of transimpedance amplifiers can be configured to operate in a plurality of different operating modes, wherein the plurality of different operating modes include: Low-gain mode, in which the output voltage signal of the transimpedance amplifier is a function of a fixed resistance; and In the high-gain mode, the output voltage signal of the transimpedance amplifier is a function of the sum of the fixed resistor and the switchable resistor.

311. The measuring device according to claim 310, wherein, The various operating modes include a bypass mode, in which the transimpedance amplifier receives a DC input signal and transmits the DC input signal as the output voltage signal of the transimpedance amplifier.

312. The measuring device according to claim 286, wherein, The at least one DAC includes: Resistor-connected DAC module; and Multiple analog multiplexers, each of which includes multiple input lines, and each of which can be configured to connect its input lines to multiple terminals on the resistor string DAC module in response to a control signal. The resistor string DAC module includes an input terminal for receiving an input reference voltage signal; and The plurality of analog multiplexers can be configured to generate a plurality of different output DC reference voltage signals in response to control signals.

313. The measuring device according to claim 286, wherein, Within each integrated circuit, the plurality of electrodes are arranged in multiple groups.

314. The measuring device according to claim 313, wherein, The at least one DAC can be configured to deliver the drive signal to one or more electrodes of any one of the groups in response to a control signal.

315. The measuring device according to claim 313, wherein, Within each group, the electrodes are arranged in a two-dimensional array on the substrate.

316. The measuring device according to claim 313, wherein, One or more of the plurality of peripheral circuits are associated with each group, and one or more of the plurality of reference electrode amplifiers are associated with each group.

317. The measuring device according to claim 313, wherein, The multiple groups include four groups.

318. The measuring device according to claim 316, wherein, For each group, one or more associated peripheral circuits can be configured to receive the drive signal from the at least one DAC and apply the drive signal to one or more electrodes of the group in response to a control signal.

319. The measuring device according to claim 316, wherein, The at least one DAC can be configured to generate one or more reference voltage signals for one or more of the plurality of electrodes in response to a control signal.

320. The measuring device according to claim 319, wherein, For each group, one or more associated reference electrode amplifiers can be configured to receive the one or more reference voltage signals from the at least one DAC and apply the one or more reference voltage signals to one or more electrodes of the group in response to a control signal.

321. The measuring device according to claim 320, wherein, Each group includes a row selection logic unit and a column selection logic unit, wherein the row selection logic unit and the column selection logic unit can be configured to selectively direct the drive signal and the one or more reference voltage signals to the electrodes within the group in response to a control signal.

322. The measuring device of claim 286, further comprising a partitioning member attached to a surface of the device and including a plurality of openings, wherein, The plurality of openings are sized and positioned to individually surround the integrated circuit of the device.

323. The measuring device according to claim 322, wherein, The plurality of openings completely surround the integrated circuit of the device to form a plurality of holes on the surface of the device.

324. The measuring device according to claim 323, wherein, The plurality of openings form a hole on one or more integrated circuits of the device.

325. The measuring device according to claim 323, wherein, The plurality of openings form four holes on one or more integrated circuits of the measuring device.

326. The measuring device according to claim 323, wherein, The plurality of openings form sixteen holes on one or more integrated circuits of the measuring device.

327. A system comprising: The measuring device according to any one of claims 286-326; as well as The housing includes a plurality of receiving compartments, each of which is configured to receive the measuring device.

328. The system of claim 327, further comprising a host controller integrated within the housing.

329. The system according to claim 328, wherein, Each of the receiving compartments of the housing includes a connector that is sized to engage with the connector of the measuring device, such that when the measuring device is housed within the receiving compartment of the housing, the interface of the measuring device is connected to the host controller.

330. The system according to claim 329, wherein, The host controller includes instructions that, when executed by the host controller, cause the host controller to obtain measurement data from a plurality of measuring devices connected to the host controller through the housing.

331. The system according to claim 328, wherein, The host controller includes instructions that, when executed by the host controller, cause the host controller to send a control signal that causes the at least one DAC to generate the drive signal.

332. A method comprising: A measuring apparatus is provided, the measuring apparatus comprising a substrate and a plurality of integrated circuits on the substrate, wherein each integrated circuit comprises: Multiple electrodes; At least one digital-to-analog converter (DAC); Multiple peripheral circuits; and Multiple reference electrode amplifiers, Each peripheral circuit and reference electrode amplifier can be configured to be selectively connected to the at least one DAC; and The at least one DAC is used to generate a drive signal comprising multiple frequency components for one or more of the plurality of electrodes.

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