Semiconductor device and manufacturing method thereof

Abstract

The invention discloses a semiconductor device and a manufacturing method thereof, and the method comprises the steps: providing a cap substrate, and forming a cavity which is recessed inwards from the surface of the cap substrate in the cap substrate; a device substrate on which a micro-mechanical gap structure is to be formed is provided, a barrier layer is formed on the surface of the device substrate, and the arrangement position of the barrier layer corresponds to an area with a structural gap larger than a preset size in the micro-mechanical gap structure; combining the surface, on which the barrier layer is formed, of the device substrate with the surface, on which the cavity is formed, of the cap substrate, so that the barrier layer is located in the cavity; and etching the device substrate from one surface, deviating from the barrier layer, of the device substrate so as to form the micro-mechanical gap structure in the device substrate. The substrate material is prevented from being etched through or excessively thinned due to the fact that the etching time is prolonged in the area with the large gap, the mechanical strength and stability of the bottom structure of the device are ensured, and the performance of the device is effectively improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and more specifically to a semiconductor device and a method for manufacturing the same. Background Technology

[0002] In the manufacturing of semiconductor devices such as microelectromechanical systems (MEMS), it is often necessary to form micromechanical gap structures with gap characteristics, such as comb structures and spring structures, on the device substrate to realize functions such as sensing and driving.

[0003] In related technologies, the fabrication of such structures typically involves: providing a cap substrate and forming a cavity on its surface; providing a device substrate to be processed; combining the device substrate with the cap substrate so that the area to be processed on the device substrate corresponds to the cavity; and then etching the device substrate through an etching process to form the required micromechanical gap structure.

[0004] However, a significant loading effect exists in the etching process of related technologies: the gap size varies in different regions of the micromechanical gap structure. Regions with larger gaps have a significantly faster etching rate than regions with smaller gaps due to their larger exposed area and more thorough contact with etching ions or reactive gases. To ensure that the regions with smaller gaps are completely etched, the etching time needs to be extended. This can lead to over-etching in regions with larger gaps, damaging the underlying structure (such as the substrate material being etched through or excessively thinned), thereby affecting device performance. Summary of the Invention

[0005] The summary section introduces a series of simplified concepts, which will be further explained in detail in the detailed description section. This summary section is not intended to limit the key and essential technical features of the claimed technical solution, nor is it intended to determine the scope of protection of the claimed technical solution.

[0006] To address the existing problems, this application provides a method for manufacturing a semiconductor device, the method comprising: A cap base is provided, and a cavity is formed in the cap base that is recessed inward from the surface of the cap base; A device substrate is provided to form a micromechanical gap structure, and a barrier layer is formed on the surface of the device substrate. The location of the barrier layer corresponds to the region in the micromechanical gap structure where the structural gap is larger than a preset size. The side of the device substrate with the barrier layer formed is combined with the side of the cap substrate with the cavity formed, so that the barrier layer is located inside the cavity; The device substrate is etched from the side facing away from the barrier layer to form the micromechanical gap structure in the device substrate.

[0007] In some embodiments of this application, the thickness of the barrier layer satisfies: When the device substrate is etched to form the micromechanical gap structure, when the area in the micromechanical gap structure with a structural gap no larger than the preset size is completely etched through, the barrier layer corresponding to the area in the micromechanical gap structure with a structural gap larger than the preset size is also etched through at the same time.

[0008] In some embodiments of this application, the cavity is a test cavity for a pressure sensor or a test cavity for an inertial sensor.

[0009] In some embodiments of this application, the micromechanical gap structure has at least two different sizes of structural gaps.

[0010] In some embodiments of this application, the micromechanical gap structure includes a comb structure or a spring structure. When the micromechanical gap structure is a comb structure, the comb structure includes a plurality of comb teeth spaced apart, and the structural gap refers to the gap between adjacent comb teeth. When the micromechanical gap structure is a spring structure, the spring structure includes a plurality of elastic beams spaced apart, and the structural gap refers to the gap between adjacent elastic beams.

[0011] In some embodiments of this application, both the device substrate and the cap substrate are silicon substrates, and the side of the device substrate with the barrier layer and the side of the cap substrate with the cavity are bonded together by silicon-silicon bonding.

[0012] In some embodiments of this application, forming a cavity recessed inward from the surface of the cap substrate includes: A first mask layer is formed on the surface of the cap substrate, the first mask layer having a first etched window for defining the cavity to be formed; The cap substrate exposed by the first etched window is etched based on the first mask layer to form the cavity.

[0013] In some embodiments of this application, forming a barrier layer on the surface of the device substrate includes: A barrier material is deposited on the surface of the device substrate to form a barrier material layer covering the device substrate; A second mask layer is formed on the barrier material layer, the second mask layer covering the region of the barrier material layer corresponding to the area in the micromechanical gap structure where the structural gap is larger than the preset size; The area of ​​the barrier material layer not covered by the second mask layer is etched away, and the remaining part constitutes the barrier layer.

[0014] In some embodiments of this application, etching the side of the device substrate facing away from the barrier layer to form the micromechanical gap structure in the device substrate includes: A third mask layer is formed on the side of the device substrate opposite to the barrier layer, and the third mask layer has a second etching window for defining the micromechanical gap structure to be formed; The device substrate exposed by the second etching window is etched based on the third mask layer to form the micromechanical gap structure in the device substrate.

[0015] In another aspect, this application provides a semiconductor device manufactured by the manufacturing method of any one of the semiconductor devices described above.

[0016] The semiconductor device and its manufacturing method disclosed in this application, by setting a barrier layer in the region of the micromechanical gap structure corresponding to the device substrate where the structural gap is larger than a preset size, ensures that during the etching process, even if the region with a larger gap has a significantly faster etching rate and is preferentially etched through due to the load effect because of its larger exposed area and more sufficient contact between etching ions or reactive gases, after the region is etched through, subsequent etching will instead act on the barrier layer rather than directly on the capping substrate. Therefore, even if etching continues to ensure that the region with a smaller gap is completely etched, the region with a larger gap will not be damaged by excessive etching of the capping substrate. This avoids the capping substrate being etched through or excessively thinned due to prolonged etching time in this region, ensuring the mechanical strength and stability of the bottom structure of the device and effectively improving the device performance. Attached Figure Description

[0017] The following drawings, which are incorporated herein by reference and are used to understand this application, illustrate embodiments of the invention and their descriptions to explain the principles of the invention.

[0018] In the attached image: Figure 1A-1F A cross-sectional schematic diagram of the device obtained by sequentially implementing a manufacturing method for a MEMS device with a comb-like structure in the related art is shown.

[0019] Figure 2 A flowchart illustrating a method for manufacturing a semiconductor device according to one specific embodiment of this application is shown.

[0020] Figures 3A-3H This illustration shows a cross-sectional schematic diagram of a semiconductor device obtained by sequentially implementing a method for manufacturing a semiconductor device according to a specific embodiment of this application. Detailed Implementation

[0021] The following description provides numerous specific details to offer a more thorough understanding of this application. However, it will be apparent to those skilled in the art that this application can be practiced without one or more of these details. In other instances, certain technical features well-known in the art have not been described to avoid confusion with this application.

[0022] It should be understood that this application can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of this application to those skilled in the art. In the drawings, for clarity, the dimensions and relative dimensions of layers and regions may be exaggerated. The same reference numerals denote the same elements throughout.

[0023] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this application, the first element, component, area, layer, or portion discussed below may be referred to as the second element, component, area, layer, or portion.

[0024] Spatial relation terms such as “below,” “under,” “below,” “below,” “above,” “above,” etc., are used herein for convenience of description to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, then the element or feature described as “below” or “below” other elements or features will be oriented “above” other elements or features. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. The device may be otherwise oriented (rotated 90 degrees or otherwise) and the spatial descriptive terms used herein will be interpreted accordingly.

[0025] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising” and / or “including,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0026] In related technologies, such as Figures 1A-1F As shown, taking the formation of a MEMS device with a comb-like structure as an example, its manufacturing method includes the following steps: First, such as Figures 1A-1C As shown, a cap substrate 110 is provided, a first mask layer 120 is formed on its surface, and the cap substrate 110 is etched using the first mask layer 120 as a mask to form a cavity 130 in the cap substrate 110. Secondly, such as Figure 1D As shown, a device substrate 140 to be processed is provided and bonded to one side of a cap substrate 110 where a cavity 130 is formed, so that the area to be processed on the device substrate 140 corresponds to the cavity 130. After that, as Figures 1E-1F As shown, a second mask layer 150 is formed on the side of the device substrate 140 away from the cap substrate 110. The device substrate 140 is etched using the second mask layer 150 as a mask to form a comb structure 160 in the device substrate 140.

[0027] However, a significant loading effect exists in the above etching process: the gap size varies in different regions of the comb structure 160. Regions with larger gaps have a significantly faster etching rate due to their larger exposed area and more thorough contact with etching ions or reactive gases compared to regions with smaller gaps. To ensure complete etching of regions with smaller gaps, the etching time needs to be extended. This can lead to over-etching in regions with larger gaps, damaging the underlying structure (e.g., the substrate material is etched through or excessively thinned). Figure 1F (as shown), which in turn affects device performance.

[0028] To fully understand this application, detailed steps and structures will be presented in the following description to illustrate the technical solutions proposed in this application. Preferred embodiments of this application are described in detail below; however, in addition to these detailed descriptions, this application may have other implementation methods.

[0029] Example 1 Below, for reference Figure 2 A method for manufacturing a semiconductor device according to an embodiment of this application is described. For example... Figure 2 As shown, the manufacturing method includes the following steps: Step S11: Provide a cap base 210 and form a cavity 230 recessed inward from the surface of the cap base 210 in the cap base 210; Step S12: Provide a device substrate 240 for forming a micromechanical gap structure 270, and form a barrier layer 250 on the surface of the device substrate 240. The location of the barrier layer 250 corresponds to the area in the micromechanical gap structure 270 where the structural gap is larger than a preset size. Step S13: Combine the side of the device substrate 240 where the barrier layer 250 is formed with the side of the cap substrate 210 where the cavity 230 is formed, so that the barrier layer 250 is located inside the cavity 230. Step S14: Etch the side of the device substrate 240 away from the barrier layer 250 to form a micromechanical gap structure 270 in the device substrate 240.

[0030] The manufacturing method of this embodiment involves setting a barrier layer 250 in the region of the micromechanical gap structure 270 corresponding to the device substrate 240 where the structural gap is larger than a preset size. During the etching process, even if the region with a larger gap has a significantly faster etching rate and is preferentially etched through due to the load effect because of its larger exposed area and more sufficient contact between etching ions or reactive gases, after the region is etched through, the subsequent etching will be directed to the barrier layer 250 instead of directly to the cap substrate 210. Therefore, even if the etching continues to ensure that the region with a smaller gap is completely etched, the region with a larger gap will not be damaged by excessive etching of the cap substrate 210. This avoids the cap substrate 210 being etched through or excessively thinned due to prolonged etching time in this region, ensuring the mechanical strength and stability of the bottom structure of the device and effectively improving the device performance.

[0031] The manufacturing method described above will be explained in more detail below.

[0032] First, execute step S11, as follows: Figures 3A-3C As shown, a cap base 210 is provided, and a cavity 230 is formed in the cap base 210 that is recessed inward from the surface of the cap base 210.

[0033] The cap substrate 210 can be any suitable semiconductor substrate, such as a bulk silicon substrate, or at least one of the following materials: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP, or other III / V compound semiconductors, including multilayer structures composed of these semiconductors, or silicon on insulator (SOI), silicon on insulator (SSOI), silicon on insulator (S-SiGeOI), silicon on insulator (SiGeOI), and germanium on insulator (GeOI), or it can be a double-side polished wafer (DSP), or a ceramic substrate such as alumina, a quartz or glass substrate, etc.

[0034] In some embodiments, forming a cavity 230 recessed inward from the surface of the cap base 210 in the cap base 210 may include the following steps S111 to S112: Step S111, as follows Figure 3B As shown, a first mask layer 220 is formed on the surface of the cap substrate 210, and the first mask layer 220 has a first etch window for defining the cavity 230 to be formed.

[0035] Specifically, the process of forming the first mask layer 220 may include: coating a photoresist layer on the surface of the cap substrate 210, and patterning the photoresist layer through exposure, development, and other processes to form the first mask layer 220. This first mask layer 220 covers the area of ​​the cap substrate 210 outside the cavity 230, ensuring that the covered area of ​​the cap substrate 210 is not etched in subsequent etching processes; while the remaining areas of the cap substrate 210 are completely exposed, providing a process window for subsequent etching removal of that area of ​​the cap substrate 210.

[0036] Step S112, as follows Figure 3C As shown, the cap substrate 210 exposed by the first etch window is etched based on the first mask layer 220 to form a cavity 230.

[0037] For example, a wet etching process or a dry etching process can be used to selectively remove the cap substrate 210 not covered by the first mask layer 220. If a wet etching process is used, the material is selectively dissolved and removed by the chemical reaction between the etching solution and the cap substrate 210 not covered by the first mask layer 220. If a dry etching process (such as plasma etching) is used, the material is selectively stripped by physical bombardment or chemical reaction between high-energy plasma and the cap substrate 210 not covered by the first mask layer 220, so as to form a cavity 230 in the cap substrate 210.

[0038] After etching, the first mask layer 220 can be removed by processes such as stripping or ashing to completely remove photoresist residue from the surface of the cap substrate 210.

[0039] In some embodiments, the cavity 230 formed in the cap substrate 210 can serve as a test cavity for a pressure sensor or an inertial sensor.

[0040] Specifically, when the semiconductor device is a pressure sensor, the cavity 230 serves as a test chamber, which can accommodate the pressure-sensitive element and provide the closed or semi-closed environment required for pressure detection, ensuring that the external pressure signal is accurately transmitted to the pressure-sensitive element to achieve pressure parameter measurement. When the semiconductor device is an inertial sensor, the cavity 230 serves as a test chamber, which can be adapted to the inertial sensitive structure, providing it with the necessary space for movement, avoiding mechanical interference between the inertial sensitive structure and the cap base 210 during movement, thereby ensuring its degree of freedom of movement, so as to achieve the detection of inertial parameters such as acceleration and angular velocity.

[0041] Next, proceed to step S12, as follows: Figure 3D As shown, a device substrate 240 is provided to form a micromechanical gap structure 270. A barrier layer 250 is formed on the surface of the device substrate 240. The location of the barrier layer 250 corresponds to the region in the micromechanical gap structure 270 where the structural gap is larger than a preset size.

[0042] The device substrate 240 can be any suitable semiconductor substrate, such as a bulk silicon substrate, or at least one of the following materials: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP, or other III / V compound semiconductors, including multilayer structures composed of these semiconductors, or silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-on-insulator (S-SiGeOI), silicon-on-insulator (SiGeOI), and germanium-on-insulator (GeOI), or it can be a double-side polished wafer (DSP), or a ceramic substrate such as alumina, a quartz or glass substrate, etc.

[0043] In some embodiments, the micromechanical gap structure 270 to be formed in the device substrate 240 refers to a type of micromechanical structure in a MEMS device in which its functional layer (i.e., the key layer that realizes the functions of sensing, driving or supporting the device) contains a specific gap, and the extension direction of the gap is perpendicular to the substrate surface of the device. For example, the micromechanical gap structure 270 can be a comb structure or a spring structure.

[0044] When the micromechanical gap structure 270 is a comb structure, the comb structure includes multiple comb teeth spaced apart, and the structural gap refers to the gap between adjacent comb teeth. Comb structures are commonly used in capacitive MEMS sensors, and the size of the gap between the comb teeth directly affects the change in the device's capacitance signal, significantly impacting motion sensitivity.

[0045] When the micromechanical gap structure 270 is a spring structure, the spring structure includes multiple elastic beams spaced apart, and the structural gap refers to the gap between adjacent elastic beams. The spring structure can be used as an elastic support component for the mass block in an inertial sensor, or as a force transmission structure inside a device. Folded beam springs and cantilever beam springs are common specific forms of this structure.

[0046] In some embodiments, the micromechanical gap structure 270 to be formed in the device substrate 240 has at least two different sizes of structural gaps.

[0047] During the subsequent etching of the device substrate 240 to form the micromechanical gap structure 270, since the micromechanical gap structure 270 contains at least two different sizes of structural gaps, the area with larger gaps has a significantly faster etching rate due to its larger exposed area and more sufficient contact with etching ions or reactive gases, and will be etched first. To avoid damage to the underlying structure due to over-etching in the area with larger gaps before the area with smaller gaps is completely etched, this embodiment forms a barrier layer 250 on the surface of the device substrate 240. The barrier layer 250 is positioned to correspond to the area in the micromechanical gap structure 270 where the structural gap is larger than a preset size, thereby preventing the substrate material from being etched through or excessively thinned due to prolonged etching time in the area with larger gaps.

[0048] In some embodiments, forming a barrier layer 250 on the surface of the device substrate 240 may include the following steps S121 to S123: Step S121: Deposit a barrier material on the surface of the device substrate 240 to form a barrier material layer covering the device substrate 240.

[0049] Specifically, a barrier material can be deposited on the surface of the device substrate 240 using methods commonly used in the art, such as physical vapor deposition, chemical vapor deposition, or atomic layer deposition.

[0050] The deposited barrier material can be an oxide or any other suitable material, and there is no limitation on this.

[0051] Step S122: A second mask layer is formed on the barrier material layer, the second mask layer covering the region of the barrier material layer corresponding to the area in the micromechanical gap structure 270 where the structural gap is larger than a preset size.

[0052] Specifically, the process of forming the second mask layer may include: coating a photoresist layer on the barrier material layer, and patterning the photoresist layer through exposure, development, and other processes to form the second mask layer. This second mask layer covers the barrier material layer in the region of the micromechanical gap structure 270 where the gap is larger than a preset size, ensuring that the barrier material layer in the covered region is not eroded in subsequent etching processes; while the barrier material layer in the remaining regions is completely exposed, providing a process window for subsequent etching and removal of the barrier material layer in those regions.

[0053] Step S123: Etch away the area in the barrier material layer that is not covered by the second mask layer, and the remaining part constitutes the barrier layer 250.

[0054] For example, wet etching or dry etching processes can be used to selectively remove the barrier material not covered by the second mask layer. If a wet etching process is used, the device substrate 240 covered by the second mask layer can be immersed in an etching solution adapted to the barrier material. The chemical reaction between the etching solution and the barrier material not covered by the second mask layer is used to selectively dissolve and remove that portion of the material. If a dry etching process (such as plasma etching) is used, high-energy plasma physically bombards or chemically reacts with the barrier material not covered by the second mask layer, achieving selective stripping of the material.

[0055] After the above etching, the barrier material not covered by the second mask layer is completely removed, and the remaining portion forms a barrier layer 250 that corresponds in position and shape to the area in the micromechanical gap structure 270 where the structural gap is larger than the preset size. The presence of this barrier layer 250 allows the etching process of the micromechanical gap structure 270 on the device substrate 240 to be directed towards the barrier layer 250, rather than directly onto the cap substrate 210, after the larger gap area has been preferentially etched through, before the smaller gap area is fully etched. This prevents the substrate material from being etched through or excessively thinned due to prolonged etching time in areas with larger gaps, ensuring the mechanical strength and stability of the device's bottom structure and effectively improving device performance.

[0056] After etching is completed, the first mask layer 220 can be removed by processes such as stripping or ashing to completely remove the photoresist residue on the surface of the barrier layer 250.

[0057] Next, proceed to step S13, as follows: Figure 3E As shown, the side of the device substrate 240 where the barrier layer 250 is formed is combined with the side of the cap substrate 210 where the cavity 230 is formed, so that the barrier layer 250 is located inside the cavity 230.

[0058] In some embodiments, both the device substrate 240 and the cap substrate 210 are silicon substrates, and the side of the device substrate 240 with the barrier layer 250 and the side of the cap substrate 210 with the cavity 230 are bonded together by silicon-silicon bonding.

[0059] The specific bonding process can be as follows: Before bonding, the two surfaces to be bonded need to be pretreated, for example, by removing surface contaminants such as organic matter and particulate impurities through plasma activation or chemical cleaning processes, thereby improving the bonding activity of the silicon surface; then, the two substrates are precisely aligned to ensure that the barrier layer 250 on the device substrate 240 and the cavity 230 of the cap substrate 210 are completely matched in spatial position; after alignment, the substrate assembly is placed in the bonding equipment, and silicon-silicon bonding is completed under preset temperature and pressure conditions, constructing a strong bonding interface through covalent bonds formed between silicon atoms. After bonding, the device substrate 240 and the cap substrate 210 form an integrated structure, and the barrier layer 250 is completely contained within the cavity 230 of the cap substrate 210.

[0060] Next, proceed to step S14, as follows: Figures 3F to 3H As shown, the device substrate 240 is etched from the side facing away from the barrier layer 250 to form a micromechanical gap structure 270 in the device substrate 240.

[0061] In some embodiments, etching is performed on the side of the device substrate 240 facing away from the barrier layer 250 to form a micromechanical gap structure 270 in the device substrate 240, which may include the following steps S141 to S142: Step S141, as follows Figure 3F As shown, a third mask layer 260 is formed on the side of the device substrate 240 opposite to the barrier layer 250, and the third mask layer 260 has a second etching window for defining the micromechanical gap structure 270 to be formed.

[0062] Specifically, the process of forming the third mask layer 260 may include: coating a photoresist layer on the side of the device substrate 240 facing away from the barrier layer 250, and patterning the photoresist layer through exposure, development, and other processes to form the third mask layer 260. This third mask layer 260 covers the area of ​​the device substrate 240 outside the micromechanical gap structure 270, ensuring that the covered area of ​​the device substrate 240 is not etched in subsequent etching processes; while the remaining area of ​​the device substrate 240 is completely exposed, providing a process window for subsequent etching removal of that area of ​​the device substrate 240.

[0063] Step S142, as follows Figures 3G to 3H As shown, the device substrate 240 exposed by the second etching window is etched based on the third mask layer 260 to form a micromechanical gap structure 270 in the device substrate 240.

[0064] For example, either wet etching or dry etching can be used to selectively remove the portion of the device substrate 240 not covered by the third mask layer 260. If wet etching is used, the material is selectively dissolved and removed by the chemical reaction between the etching solution and the device substrate 240 not covered by the third mask layer 260. If dry etching (such as plasma etching) is used, the material is selectively removed by physical bombardment or chemical reaction between high-energy plasma and the device substrate 240 not covered by the third mask layer 260.

[0065] After the above etching, the area of ​​the device substrate 240 not covered by the third mask layer 260 is completely removed, and a micromechanical gap structure 270 is formed in the remaining portion of the device substrate 240. The micromechanical gap structure 270 is a comb structure or a spring structure, having at least two different sizes of structural gaps. For example, Figure 3H The micro-mechanical gap structure 270 formed in the middle is a comb-tooth structure.

[0066] It should be noted that a significant loading effect exists during the etching process described above: areas with larger gaps in the micromechanical gap structure 270 have a significantly faster etching rate than areas with smaller gaps due to their larger exposed area and more thorough contact with etching ions or reactive gases, and will be etched preferentially. In this embodiment, a barrier layer 250 is provided in the area of ​​the micromechanical gap structure 270 corresponding to the device substrate 240 where the structural gap is larger than a preset size. The presence of this barrier layer 250 means that after the area with larger gaps is etched through, the etching will be redirected to the barrier layer 250 instead of directly to the cap substrate 210. Therefore, even if continuous etching is required to ensure that the area with smaller gaps is completely etched, the area with larger gaps will not damage the cap substrate 210 due to excessive etching. This avoids the problem of the substrate material being etched through or excessively thinned due to prolonged etching time in this area, ensuring the mechanical strength and stability of the bottom structure of the device and effectively improving the overall performance of the device.

[0067] After etching, the third mask layer 260 can be removed by processes such as peeling or ashing to completely remove the photoresist residue on the side of the device substrate 240 away from the barrier layer 250.

[0068] It should be noted that the thickness of the barrier layer 250 satisfies the following: when the device substrate 240 is etched to form the micromechanical gap structure 270, when the area in the micromechanical gap structure 270 with a structural gap no larger than the preset size is completely etched through, the barrier layer 250 corresponding to the area in the micromechanical gap structure 270 with a structural gap larger than the preset size is also etched through at the same time.

[0069] On the one hand, if the barrier layer 250 is too thin, the barrier layer 250 in the larger gap area will be prematurely etched before the smaller gap area in the micromechanical gap structure 270 is etched. If etching continues at this time to ensure the formation of the smaller gap area, the etching ions or reactive gases will directly act on the cap substrate 210 area corresponding to the larger gap area, which can easily cause the cap substrate 210 to be etched through or excessively thinned, damaging the integrity and mechanical strength of the bottom structure of the device. However, in this embodiment, the matched thickness of the barrier layer 250 can continuously provide etching barrier for the cap substrate 210 area corresponding to the larger gap area until the smaller gap area is etched, thus preventing the structural damage problem caused by the above-mentioned over-etching.

[0070] On the other hand, if the barrier layer 250 is too thick, when the area with smaller gaps is completely etched through to form the target micromechanical gap structure 270, the barrier layer 250 in the area with larger gaps will still remain. These residual barrier layers 250 will affect the normal operation of the micromechanical gap structure 270, requiring additional process steps to remove them. This not only increases the manufacturing process and production costs but may also cause secondary damage to the already formed micromechanical gap structure 270 during the removal process. In this embodiment, the precisely matched thickness of the barrier layer 250 allows for the simultaneous completion of the forming of the area with smaller gaps and the complete etching of the barrier layer 250, eliminating the need for an additional barrier layer 250 removal process. This simplifies the manufacturing process, improves production efficiency, ensures the forming accuracy and performance stability of the micromechanical gap structure 270, and enhances the compatibility and controllability of the process.

[0071] This concludes the description of the key steps in the semiconductor device manufacturing method of this application. The complete semiconductor device manufacturing method may also include other steps, which will not be elaborated here. It is worth mentioning that the order of the above steps can be adjusted without conflict.

[0072] In summary, the semiconductor device manufacturing method of this application embodiment provides a barrier layer 250 in the region of the micromechanical gap structure 270 corresponding to the device substrate 240 where the structural gap is larger than a preset size. During the etching process, even if the region with a larger gap has a significantly faster etching rate and is preferentially etched through due to the load effect because of its larger exposed area and more sufficient contact between etching ions or reactive gases, after the region is etched through, subsequent etching will be applied to the barrier layer 250 instead of directly to the cap substrate 210. Therefore, even if etching continues to ensure that the region with a smaller gap is completely etched, the region with a larger gap will not be damaged by excessive etching of the cap substrate 210. This avoids the cap substrate 210 being etched through or excessively thinned due to prolonged etching time in this region, ensuring the mechanical strength and stability of the bottom structure of the device and effectively improving the device performance.

[0073] Example 2 This application also provides a semiconductor device. It is understood that the semiconductor device in this embodiment can be manufactured by the method in the aforementioned embodiment one. In order to avoid repetition, only a brief description is given for the same components and structures as in the aforementioned embodiment one. For specific explanations and descriptions, please refer to the description in embodiment one.

[0074] In some embodiments, the semiconductor device in this embodiment is a MEMS device, such as a pressure sensor or an inertial sensor, and there is no limitation on this.

[0075] Based on the above description, the semiconductor device and manufacturing method of the present application embodiment, by setting a barrier layer in the region of the micromechanical gap structure corresponding to the device substrate where the structural gap is larger than a preset size, during the etching process, even if the region with a larger gap has a significantly faster etching rate and is preferentially etched through due to the load effect because of its larger exposed area and more sufficient contact between etching ions or reactive gases, after the region is etched through, the subsequent etching will be applied to the barrier layer instead of directly to the capping substrate. Therefore, even if the etching continues to ensure that the region with a smaller gap is completely etched, the region with a larger gap will not be damaged by excessive etching of the capping substrate, thereby avoiding the capping substrate being etched through or excessively thinned due to the extended etching time in this region, ensuring the mechanical strength and stability of the bottom structure of the device, and effectively improving the device performance.

[0076] Although exemplary embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above exemplary embodiments are merely illustrative and are not intended to limit the scope of this application. Various changes and modifications can be made therein by those skilled in the art without departing from the scope and spirit of this application. All such changes and modifications are intended to be included within the scope of this application as claimed in the appended claims.

[0077] Similarly, it should be understood that, in order to simplify this application and aid in understanding one or more aspects of the application, various features of this application may sometimes be grouped together in a single embodiment, figure, or description thereof in the description of exemplary embodiments of this application. However, this approach should not be construed as reflecting an intention that the claimed application requires more features than are expressly recited in each claim. Rather, as reflected in the corresponding claims, the point of application is that the corresponding technical problem can be solved with fewer features than all of a single disclosed embodiment. Therefore, the claims following the detailed description are hereby expressly incorporated into that detailed description, wherein each claim itself is a separate embodiment of this application.

[0078] Furthermore, those skilled in the art will understand that although some embodiments described herein include certain features but not others included in other embodiments, combinations of features from different embodiments are intended to be within the scope of this application and form different embodiments. For example, in the claims, any one of the claimed embodiments can be used in any combination.

[0079] It should be noted that the above embodiments are illustrative of this application and not limiting of it, and that those skilled in the art can devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses should not be construed as limiting the claims. The use of the words first, second, and third, etc., does not indicate any order. These words can be interpreted as names.

Claims

1. A method of manufacturing a semiconductor device, characterized by, The manufacturing method comprises: providing a cap substrate, and forming a cavity recessed inward from a surface of the cap substrate; providing a device substrate to be formed with a micromechanical gap structure, forming a barrier layer on a surface of the device substrate, the barrier layer being arranged at a position corresponding to a region in the micromechanical gap structure where a structural gap is greater than a preset size; bonding a surface of the device substrate formed with the barrier layer to a surface of the cap substrate formed with the cavity, so that the barrier layer is located in the cavity; etching the device substrate from a surface thereof away from the barrier layer to form the micromechanical gap structure in the device substrate.

2. The production method according to claim 1, wherein The thickness of the barrier layer satisfies: when etching the device substrate to form the micromechanical gap structure, the barrier layer arranged at the position corresponding to the region in the micromechanical gap structure where the structural gap is greater than the preset size is etched through at the same time when the region in the micromechanical gap structure where the structural gap is not greater than the preset size is etched through completely.

3. The production method according to claim 1, wherein The cavity is a test cavity of a pressure sensor or a test cavity of an inertial sensor.

4. The production method according to claim 1, wherein The micromechanical gap structure has at least two structural gaps of different sizes.

5. The production method according to claim 1 or 4, wherein The micromechanical gap structure comprises a comb structure or a spring structure, wherein, when the micromechanical gap structure is a comb structure, the comb structure comprises a plurality of combs arranged at intervals, and the structural gap refers to a gap between adjacent combs; when the micromechanical gap structure is a spring structure, the spring structure comprises a plurality of elastic beams arranged at intervals, and the structural gap refers to a gap between adjacent elastic beams.

6. The production method according to claim 1, wherein The device substrate and the cap substrate are both silicon substrates, and the bonding of the surface of the device substrate formed with the barrier layer to the surface of the cap substrate formed with the cavity is a silicon-silicon bonding.

7. The production method according to claim 1, wherein The forming of the cavity recessed inward from the surface of the cap substrate comprises: forming a first mask layer on the surface of the cap substrate, the first mask layer having a first etching window for defining the cavity to be formed; etching the cap substrate exposed by the first etching window based on the first mask layer to form the cavity.

8. The production method according to claim 1, wherein The forming of the barrier layer on the surface of the device substrate comprises: depositing a barrier material on the surface of the device substrate to form a barrier material layer covering the device substrate; forming a second mask layer on the barrier material layer, the second mask layer covering the barrier material layer corresponding to the region in the micromechanical gap structure where the structural gap is greater than the preset size; etching to remove regions of the barrier material layer not covered by the second mask layer, and the remaining part constitutes the barrier layer.

9. The production method according to claim 1, wherein The etching of the device substrate from the surface thereof away from the barrier layer to form the micromechanical gap structure in the device substrate comprises: forming a third mask layer on the surface of the device substrate away from the barrier layer, the third mask layer having a second etching window for defining the micromechanical gap structure to be formed; Based on the third mask layer, the second etching window exposed device substrate is etched to form the micro-mechanical gap structure in the device substrate.

10. A semiconductor device, characterized by comprising: The semiconductor device manufactured by the manufacturing method of any one of claims 1 to 9.

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