Mask substrate and manufacturing method thereof, and manufacturing method of mask plate

Abstract

The invention discloses a mask base plate and a manufacturing method thereof and a manufacturing method of the mask plate, the mask base plate comprises a mask substrate, a mask material layer, an anti-scattering layer and an electric etching glue layer, the mask material layer is formed on the surface of the mask substrate, the anti-scattering layer is formed on the surface of the mask material layer and is formed by low atomic number elements, and the electric etching glue layer is formed on the surface of the mask material layer. And the electric etching adhesive layer is formed on the surface of the anti-scattering layer. According to the invention, the proximity effect of back scattering can be reduced, and the resolution of the mask plate is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuit manufacturing, and in particular to a mask substrate applied to electron beam direct writing, a manufacturing method thereof, and a manufacturing method of a mask plate. BACKGROUND

[0002] With the development of integrated circuit technology, the feature size (Critical dimension, CD) of semiconductor devices is getting smaller and smaller, and the exposure wavelength has developed from ultraviolet (Ultraviolet, UV), deep ultraviolet (Deep Ultra-Violet, DUV) to extreme ultraviolet (Extreme Ultra-violet, EUV). Therefore, in order to meet the requirements of high-precision chip preparation, the mask plate for lithography needs to be precisely processed during the preparation process. Traditional optical mask manufacturing technologies, such as laser direct writing, are gradually facing the challenge of physical limits and are difficult to meet the needs of sub-10nm nodes.

[0003] Electron beam direct writing (Electron Beam Lithography, EBL) technology has become a core means for high-precision mask plate manufacturing due to its extremely high resolution (up to sub-10nm) and flexibility without the need for a pre-mask. Its principle is to directly scan and expose on a mask substrate through a focused electron beam, and to generate fine patterns by using the interaction between electrons and electroplating materials. Compared with optical methods, the de Broglie wavelength of the electron beam is extremely short (0.0055nm at 50KeV), effectively avoiding the optical diffraction limit, and is particularly suitable for mask manufacturing in complex circuits, advanced process nodes, and research and development of prototypes. However, electron beam direct writing technology also has some challenges, such as low efficiency caused by serial writing mode, high equipment cost, and pattern distortion caused by proximity effect, etc.

[0004] Currently, high-precision mask plate preparation mainly uses electron beam direct writing technology, but it faces the problem of proximity effect during the electron beam writing process. Specifically, during the mask plate manufacturing process, when the electron beam is written to the electroplating, the mask material layer (the mask material layer is mostly a light-shielding layer of chromium compound, etc.) under the electroplating will produce backscattering, which will unintentionally expose the electroplating in a larger area (up to several microns) around the main exposure point, causing the electroplating pattern sidewall to easily appear pits or protrusions, which seriously affects the edge roughness of the mask plate. In addition, the electron beam direct writing equipment used in the prior art requires extremely high direct writing precision, resulting in high cost. Therefore, it is urgent to develop a new mask substrate and mask plate structure to reduce the proximity effect of backscattering, improve the resolution of the mask plate, and achieve smaller CD size, so as to meet the growing needs of the semiconductor manufacturing field. SUMMARY

[0005] The purpose of this invention is to provide a mask substrate and its manufacturing method, and a mask template manufacturing method, to solve the technical problem of high roughness of the mask template line edges caused by the proximity effect of backscattering during electron beam direct writing.

[0006] To solve the above-mentioned technical problems, the present invention provides a mask substrate, comprising: Mask substrate; A mask material layer is formed on the surface of the mask substrate; An anti-scattering layer is formed on the surface of the mask material layer, and the anti-scattering layer is formed of low atomic number elements; An electro-resist layer is formed on the surface of the anti-scattering layer.

[0007] The aforementioned mask substrate has an anti-scattering layer composed of low atomic number elements between the electroresist and the mask material layer. When an electron beam forms a pattern on the mask substrate, the electron beam passes through the electroresist and reaches the anti-scattering layer. Most of the electrons collide with the outer electrons of the low atomic number elements, resulting in energy loss and significantly reducing the number of electrons scattered back to the electroresist layer. Although some electrons reach the mask material layer (which is generally composed of high atomic number chromium compounds, etc.), they must pass through the anti-scattering layer again due to backscattering. The anti-scattering layer further attenuates the energy of these backscattered electrons, significantly reducing the number and energy of the backscattered electrons that ultimately reach the electroresist. Low-energy electrons are insufficient to cause chemical changes in the electroresist, thus reducing the proximity effect of backscattering, improving the mask resolution, and achieving a smaller CD size. This meets the growing demands of the semiconductor manufacturing industry and effectively solves the technical problem of high mask line edge roughness caused by the proximity effect of backscattering during direct electron beam writing.

[0008] In one embodiment, the low atomic number element is any one of beryllium, boron, or lithium.

[0009] In one embodiment, the thickness of the anti-scattering layer is 2nm to 10nm.

[0010] Based on the same inventive concept, the present invention also provides a method for manufacturing a mask substrate, comprising the following steps: Provide a mask substrate; A mask material layer is formed on the surface of the mask substrate; An anti-scattering layer is formed on the surface of the mask material layer, and the anti-scattering layer is formed of low atomic number elements; An electroresist layer is formed on the surface of the anti-scattering layer.

[0011] In one embodiment, the low atomic number element is beryllium, and the anti-scattering layer is formed by magnetron sputtering deposition. In the magnetron sputtering deposition process, the sputtering pressure is 0.2 Pa to 0.5 Pa, the sputtering power is 10 W to 30 W, the working gas is argon, and the argon gas flow rate is 10 sccm to 50 sccm.

[0012] In one embodiment, the low atomic number element is lithium, and the anti-scattering layer is formed by physical vapor deposition or atomic layer deposition.

[0013] In one embodiment, the low atomic number element is boron, and the anti-scattering layer is formed by magnetron sputtering deposition process. In the magnetron sputtering deposition process, the sputtering pressure is 0.1 Pa to 1.0 Pa, the sputtering power is 50 W to 200 W, the working gas is argon, and the argon gas flow rate is 10 sccm to 50 sccm. or, The low atomic number element is boron. The anti-scattering layer is formed by chemical vapor deposition. In the chemical vapor deposition process, the deposition temperature is 400°C to 700°C, the precursor is diborane, the gas flow rate is 50 sccm to 200 sccm, and the working pressure is no more than 100 Pa.

[0014] Based on the same inventive concept, the present invention also provides a method for manufacturing a photomask, comprising the following steps: Provide a mask base plate; Patterned electroresist layers are formed by direct electron beam writing; Using an electro-resist pattern as a mask, a patterned anti-scattering layer is formed; Using the anti-scattering layer pattern as a mask, a patterned mask material layer is formed; Remove the patterned electroresist layer; Remove the patterned anti-scattering layer.

[0015] In one embodiment, the step of forming a patterned anti-scattering layer using an electroresist pattern as a mask includes: The anti-scattering layer is patterned by wet etching using hydrofluoric acid solution or aluminum phosphate etching solution. or, A patterned anti-scattering layer is formed by dry etching with a mixture of sulfur hexafluoride and oxygen gas. or, The anti-scattering layer is plasma etched using iodine vapor or hydrogen iodide.

[0016] In one embodiment, the step of removing the patterned anti-scattering layer includes: The patterned anti-scattering layer is removed by wet etching using hydrofluoric acid solution or aluminum phosphate etching solution. or, The patterned anti-scattering layer was removed by dry etching using a mixture of sulfur hexafluoride and oxygen gas. or, The anti-scattering layer is plasma etched using iodine vapor or hydrogen iodide.

[0017] The aforementioned mask substrate and its manufacturing method, as well as the mask template manufacturing method, incorporate an anti-scattering layer composed of low atomic number elements between the electroresist and the mask material layer. When the electron beam passes through the electroresist and reaches the anti-scattering layer, most of the electrons collide with the outer electrons of the low atomic number elements, resulting in energy loss and significantly reducing the number of electrons scattered back to the electroresist layer. Although some electrons reach the mask material layer (which is generally composed of high atomic number chromium compounds, etc.), they must pass through the anti-scattering layer again due to backscattering. The anti-scattering layer further attenuates the energy of these backscattered electrons, significantly reducing the number and energy of the backscattered electrons that ultimately reach the electroresist. Low-energy electrons are insufficient to cause chemical changes in the electroresist, thus reducing the proximity effect of backscattering, improving the mask template resolution, and achieving a smaller CD size. This effectively meets the growing demands of the semiconductor manufacturing industry and solves the technical problem of high mask template edge roughness caused by the proximity effect of backscattering during direct electron beam writing. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of one embodiment.

[0019] Figure 2 This is a flowchart illustrating one embodiment.

[0020] Figure 3 This is a flowchart illustrating one embodiment.

[0021] 1-Mask substrate; 11-Mask substrate; 12-Mask material layer; 13-Anti-scattering layer; 14-Electrical resist layer. Detailed Implementation

[0022] In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the invention. However, it will be apparent to those skilled in the art that the invention may be practiced without one or more of these details. In other instances, certain technical features well-known in the art have not been described in order to avoid confusion with the invention. It should be understood that the invention can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of the invention to those skilled in the art. The same reference numerals denote the same elements throughout. It should be understood that when a layer is referred to as being formed on other layers, it may be formed directly on the other layers, or there may be intervening film layers. The terms “upper,” “lower,” “front,” “back,” etc., indicating orientation or positional relationship based on the orientation or positional relationship shown in the drawings, are used only for the convenience of describing the invention and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention, wherein “longitudinal” can be understood as a direction perpendicular to the substrate surface, and “lateral” can be understood as a direction parallel to the substrate surface. When used herein, the singular forms "a," "an," and "the" are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term "comprising" is used to identify the presence of features, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, steps, operations, elements, components, and / or groups. When used herein, the term "and / or" includes any and all combinations of the associated listed items. The terms "identical," "equal," and "consistent" include the meaning of being completely equal and identical, and may also include the meaning of being approximately identical or approximately equal within permissible process tolerances. The terms "first," "second," etc., in the specification are used to distinguish between similar elements and are not necessarily used to describe a particular order or chronological sequence. It should be understood that these terms, as used herein, may be replaced where appropriate, for example, to enable the embodiments of the invention described herein to operate in a different order than that described or shown herein. Similarly, if the methods described herein comprise a series of steps, and the order of these steps presented herein is not necessarily the only possible order in which these steps can be performed, and some of the described steps may be omitted and / or some other steps not described herein may be added to the method. If a component in one figure is the same as a component in another figure, although these components are easily identifiable in all figures, this specification will not label all identical components in every figure for the sake of clarity of description.

[0023] The present invention will be described more clearly and completely by way of embodiments and in conjunction with the accompanying drawings, but the present invention is not limited to the scope of the following embodiments.

[0024] This invention provides a mask substrate and its manufacturing method, as well as a mask template manufacturing method, which can reduce the proximity effect of backscattering, improve the resolution of the mask template, and achieve a smaller CD size, thereby meeting the growing needs of the semiconductor manufacturing industry.

[0025] Please see Figure 1 In one embodiment, the mask substrate 1 includes a mask substrate 11, a mask material layer 12, an anti-scattering layer 13, and an electroresist layer 14. The mask material layer 12 is formed on the surface of the mask substrate 11, the anti-scattering layer 13 is formed on the surface of the mask material layer 12, and the anti-scattering layer 13 is formed of low atomic number elements. The electroresist layer 14 is formed on the surface of the anti-scattering layer 13.

[0026] in: The mask substrate 11 can be a quartz glass substrate, borosilicate glass substrate, soda ash glass substrate, silicon carbide substrate, etc., used as a mask base plate; or any substrate known to those skilled in the art for carrying semiconductor integrated circuit components, such as gallium nitride substrate, silicon substrate, bulk silicon substrate, germanium substrate, germanium silicon substrate, indium phosphide (InP) substrate, gallium arsenide (GaAs) substrate, or germanium-on-insulator substrate, etc. Furthermore, the mask substrate 11 can also be a regenerated semiconductor substrate or mask base plate. Even further, the mask substrate 11 can be any shape, such as square or circular; this embodiment does not limit the specific shape of the substrate.

[0027] The mask material layer 12 can be a single layer or multiple layers, and it can be a compound layer or a pure element layer; this embodiment does not impose specific limitations. In one embodiment, the mask material layer 12 includes any one or more of the following: a light-shielding layer, an anti-reflection layer, a phase-shifting layer, an absorption layer, a reflective layer, and a protective layer. Specifically, in different types of mask substrates, the mask material layer 12 can have different film layers. For example, in a binary mask substrate, the mask material layer 12 includes a light-shielding layer and an anti-reflection layer; in a phase-shifting mask substrate, the mask material layer 12 includes a phase-shifting layer, a light-shielding layer, and an anti-reflection layer; in an EUV mask substrate, the mask material layer 12 includes a reflective layer, a protective layer, and an absorption layer.

[0028] The anti-scattering layer 13 is a single-element material film layer composed of elements with low atomic numbers. It can be a single-layer film structure or a multi-layer film structure. In the multi-layer film structure, it can be different single-element material films composed of elements with low atomic numbers. Further, the electroresist layer 14 is preferably a chemically amplified electroresist layer.

[0029] The aforementioned mask substrate 1 has an anti-scattering layer 13 made of low atomic number elements between the electroresist layer 14 and the mask material layer 12. When an electron beam is used to form a pattern on the mask substrate, the electron beam passes through the electroresist layer 14 and reaches the anti-scattering layer 13. Most of the electrons collide with the outer electrons of the low atomic number elements, thus losing energy and greatly reducing the number of electrons scattered back to the electroresist layer. Although some electrons reach the mask material layer 12 (which is generally composed of high atomic number chromium compounds, etc.), backscattering occurs, and they must pass through the anti-scattering layer again. Layer 13, the anti-scattering layer 13, again plays a role in attenuating the energy of these secondary backscattered electrons, which significantly reduces the number and energy of the backscattered electrons that finally reach the electroresist layer 14. The low-energy electrons are insufficient to cause chemical changes in the electroresist, thus reducing the proximity effect of backscattering, improving the resolution of the mask, and achieving a smaller CD size. This meets the growing demand in the semiconductor manufacturing field and effectively solves the technical problem of high roughness of the mask line edges caused by the proximity effect of backscattering during direct electron beam writing of the existing mask substrate 1.

[0030] In one embodiment, the low atomic number element is any one of beryllium, boron, or lithium. Specifically, beryllium (Z=4), lithium (Z=3), and boron (Z=5) have extremely low atomic numbers, which can effectively absorb incident and backscattered electron beams, significantly reducing the energy and number of electrons. This results in very few backscattered electrons reaching the electroresist and causing unintended exposure, effectively reducing the proximity effect of backscattering and improving the resolution of the mask pattern. Furthermore, beryllium has good thermal conductivity, which facilitates heat dissipation during electron beam exposure. Compared to mask material layers (such as chromium compounds), beryllium has a high selectivity chemical property, ensuring the fidelity of pattern transfer to the mask material layer. Additionally, boron has strong chemical inertness, effectively preventing possible chemical diffusion and reactions between the mask material layer and the electroresist layer. Boron also has a high selectivity chemical property compared to mask material layers (such as chromium compounds), ensuring the fidelity of pattern transfer to the mask material layer.

[0031] In one embodiment, the thickness of the anti-scattering layer is 2nm to 10nm. Specifically, an excessively thick anti-scattering layer will affect the optical performance of the mask substrate, while an excessively thin layer will fail to provide anti-scattering protection. In this embodiment, the thickness of the anti-scattering layer is set to 2nm to 10nm, which ensures that the anti-scattering layer effectively provides anti-scattering protection without affecting the optical performance of the mask substrate due to excessive thickness. Furthermore, to ensure that the anti-scattering layer can minimize electron scattering, the thickness of the anti-scattering layer is preferably not less than 5nm. In practical applications, an appropriate thickness can be selected according to specific requirements, such as 5nm, 8nm, or 10nm.

[0032] Based on the same inventive concept, please refer to Figure 2 This embodiment also provides a method for manufacturing a mask substrate, the steps of which include: S11: Provide a mask substrate.

[0033] Specifically, the mask substrate can be a quartz glass substrate, borosilicate glass substrate, soda ash glass substrate, silicon carbide substrate, etc., used as the base plate of the mask stencil; or any substrate known to those skilled in the art for carrying semiconductor integrated circuit components, such as gallium nitride substrate, silicon substrate, bulk silicon substrate, germanium substrate, germanium silicon substrate, indium phosphide (InP) substrate, gallium arsenide (GaAs) substrate, or germanium-on-insulator substrate, etc. Furthermore, the mask substrate can also be a regenerated semiconductor substrate. Even further, the mask substrate can be any shape, such as square or circular; this embodiment does not limit the specific shape of the substrate.

[0034] S12: Form a mask material layer on the surface of the mask substrate.

[0035] Specifically, a mask material layer can be formed on the surface of the mask substrate using any suitable deposition process such as sputtering, CVD, PECVD, ALD, PEALD, IBD, JVD, etc. Furthermore, the mask material layer can be a single layer or multiple layers, and it can be a compound layer or a pure element layer; this embodiment does not impose any specific limitations.

[0036] S13: An anti-scattering layer is formed on the surface of the mask material layer. The anti-scattering layer is formed of low atomic number elements.

[0037] Specifically, an anti-scattering layer can be formed on the surface of the mask material layer using any suitable deposition process such as sputtering, CVD, PECVD, ALD, PEALD, IBD, JVD, etc.

[0038] In one embodiment, the low atomic number element is beryllium, and the anti-scattering layer is formed by magnetron sputtering deposition. In the magnetron sputtering deposition process, the sputtering pressure is 0.2 Pa to 0.5 Pa, the sputtering power is 10 W to 30 W, the working gas is argon, and the argon gas flow rate is 10 sccm to 50 sccm. Specifically, the anti-scattering layer is a beryllium element layer, formed by magnetron sputtering deposition. The sputtering pressure of 0.2 Pa to 0.5 Pa reduces the probability of ionized argon ions colliding with the gas as they fly towards the beryllium target and sputtered beryllium atoms collide with the gas as they fly towards the substrate. This allows beryllium atoms to reach the surface of the mask material layer with higher energy and form a dense and smooth anti-scattering layer. A pressure greater than 0.5 Pa will cause frequent collisions of beryllium atoms, resulting in energy loss and a rough surface of the formed anti-scattering layer film. A pressure less than 0.2 Pa will make it difficult to stabilize the sputtered glow discharge, resulting in unstable sputtering power. Furthermore, a sputtering power of 10W to 30W allows for precise control of the thin film deposition process, preventing over-deposition and reducing film stress. Sputtering power exceeding 30W results in an excessively fast deposition rate, making it difficult to control the thickness of the anti-scattering layer and causing high film stress. Sputtering power below 10W leads to an excessively slow deposition rate, low production efficiency, and an inability to form a continuous and complete anti-scattering layer. Even further, an argon gas flow rate of 10sccm to 50sccm can maintain a stable low-pressure glow discharge plasma. An argon gas flow rate exceeding 50sccm disrupts plasma stability, while an argon gas flow rate below 10sccm cannot maintain the sputtering pressure, resulting in plasma instability.

[0039] In one embodiment, the low atomic number element is lithium, and the anti-scattering layer is formed by physical vapor deposition or atomic layer deposition. Specifically, the physical vapor deposition process for forming the lithium anti-scattering layer also includes magnetron sputtering deposition or thermal evaporation deposition. The principle and implementation of the specific deposition process are the same as those of existing conventional deposition processes, and will not be described in detail in this embodiment.

[0040] In one embodiment, the low atomic number element is boron, and the anti-scattering layer is formed by magnetron sputtering deposition process. In the magnetron sputtering deposition process, the sputtering pressure is 0.1 Pa to 1.0 Pa, the sputtering power is 50 W to 200 W, the working gas is argon, and the argon gas flow rate is 10 sccm to 50 sccm. or, The low atomic number element is boron. The anti-scattering layer is formed by chemical vapor deposition. In the chemical vapor deposition process, the deposition temperature is 400°C to 700°C, the precursor is diborane, the gas flow rate is 50 sccm to 200 sccm, and the working pressure is no more than 100 Pa.

[0041] Specifically, the anti-scattering layer is a boron layer formed by magnetron sputtering deposition. A sputtering pressure of 0.1 Pa to 1.0 Pa allows boron atoms sputtered from the boron target to have high kinetic energy, forming a high-density boron film with controllable internal stress on the mask material surface. Sputtering pressures greater than 1.0 Pa cause a significant reduction in boron atom energy due to frequent collisions, making it difficult to control the film thickness uniformity. Sputtering pressures less than 0.1 Pa are too low, making it difficult to stabilize the sputtered glow discharge and resulting in unstable sputtering power; 50W~2 A sputtering power of 00W can maintain a stable plasma, improving production efficiency while ensuring the quality of the antiscattering layer. A sputtering power of less than 50W will make it difficult to maintain a stable plasma, while a sputtering power of more than 200W will lead to overheating of the target material and excessive stress in the film. An argon gas flow rate of 10sccm to 50sccm can maintain a stable low-pressure glow plasma. An argon gas flow rate of more than 50sccm will disrupt the plasma stability, while an argon gas flow rate of less than 10sccm cannot maintain the sputtering pressure, resulting in an unstable plasma.

[0042] Specifically, the anti-scattering layer is a boron layer formed through chemical vapor deposition (CVD). The precursor is diborane (B₂H₆). During CVD, hydrogen evaporates as hydrogen gas (H₂), ensuring the final anti-scattering layer is composed of high-purity boron. A deposition temperature of 400°C to 700°C ensures complete decomposition of the diborane precursor (B₂H₆), reducing hydrogen impurities and increasing the surface mobility of boron atoms, resulting in a dense, non-porous anti-scattering film. This also promotes interatomic bonding and enhances the adhesion between the anti-scattering layer and the mask material. A diborane gas flow of 50 sccm to 200 sccm ensures the formation of a continuous, dense, uniform, and well-adhesive boron anti-scattering layer even when depositing ultrathin films of 2 nm to 10 nm. If the gas flow rate is less than 50 sccm, it will lead to insufficient reactants, resulting in discontinuous, porous or island-like film layers. If the gas flow rate is greater than 200 sccm, diborane may decompose and react in the gas phase before reaching the surface of the mask material layer, forming boron particles, causing film contamination and increased surface roughness. An operating pressure of no more than 100 Pa can more easily predict and control the thickness and uniformity of the anti-scattering layer, achieving the deposition of ultrathin films with high purity, high density, excellent uniformity and perfect conformability.

[0043] S14: Form an electroresist layer on the surface of the anti-scattering layer. Specifically, an electroresist layer is formed on the surface of the anti-scattering layer by spin coating.

[0044] Based on the same inventive concept, please refer to Figure 3This embodiment also provides a method for manufacturing a photomask, the steps of which include: S21: Provide a mask substrate. Specifically, the mask substrate used in this embodiment is the mask substrate 1 described in any of the above embodiments.

[0045] S22: Patterned electroresist layers are formed by direct electron beam writing.

[0046] Specifically, a patterned electroresist layer is formed by scanning and exposing the electroresist layer directly on the electroresist layer according to the designed circuit pattern using a precisely controlled electron beam.

[0047] S23: Using an electro-resist pattern as a mask, a patterned anti-scattering layer is formed.

[0048] Specifically, using the electro-resist pattern as a mask, wet etching or dry etching is used to remove the anti-scattering layer area that is not protected by the electro-resist, thereby accurately replicating the pattern on the electro-resist onto the anti-scattering layer to form a patterned anti-scattering layer.

[0049] In one embodiment, the step of forming a patterned anti-scattering layer using an electroresist pattern as a mask includes: The anti-scattering layer is patterned by wet etching using hydrofluoric acid solution or aluminum phosphate etching solution. or, A patterned anti-scattering layer is formed by dry etching with a mixture of sulfur hexafluoride and oxygen gas. or, The anti-scattering layer is plasma etched using iodine vapor or hydrogen iodide.

[0050] Specifically, when the anti-scattering layer is a beryllium element layer, wet etching is performed using a 20% hydrofluoric acid solution, or dry etching is performed using a mixture of sulfur hexafluoride and oxygen gas to form a patterned anti-scattering layer; when the anti-scattering layer is a boron element layer, wet etching is performed using an aluminum phosphate etching solution with a composition ratio of 80% phosphoric acid: 5% acetic acid: 5% nitric acid: 10% water at 40°C to form a patterned anti-scattering layer; when the anti-scattering layer is a lithium element layer, plasma etching is performed on the anti-scattering layer using iodine vapor or hydrogen iodide to form a patterned anti-scattering layer. The principle and implementation of the specific plasma etching process are the same as those of the existing conventional plasma etching process, and will not be described in detail in this embodiment.

[0051] S24: Using the anti-scattering layer pattern as a mask, a patterned mask material layer is formed.

[0052] Specifically, using the anti-scattering layer as a mask, wet etching or dry etching is used to remove the mask material layer areas that are not protected by the electro-resist layer and the anti-scattering layer, thereby accurately replicating the patterns on the electro-resist and the anti-scattering layer onto the mask material layer, forming patterned mask material layers.

[0053] S25: Remove the patterned electroresist layer.

[0054] Specifically, the patterned electroresist layer is removed using dry etching or wet etching methods.

[0055] S26: Remove the patterned anti-scattering layer.

[0056] Specifically, the topmost patterned electroresist layer is removed by using dry etching or wet etching to remove the patterned anti-scattering layer.

[0057] In one embodiment, the step of removing the patterned anti-scattering layer includes: The patterned anti-scattering layer is removed by wet etching using hydrofluoric acid solution or aluminum phosphate etching solution. or, The patterned anti-scattering layer was removed by dry etching using a mixture of sulfur hexafluoride and oxygen gas. or, The anti-scattering layer is plasma etched using iodine vapor or hydrogen iodide.

[0058] Specifically, when the anti-scattering layer is a beryllium element layer, wet etching is performed using a 20% hydrofluoric acid solution, or dry etching is performed using a mixture of sulfur hexafluoride and oxygen gas to remove the patterned anti-scattering layer; when the anti-scattering layer is a boron element layer, wet etching is performed using an aluminum phosphate etching solution with a composition ratio of 80% phosphoric acid: 5% acetic acid: 5% nitric acid: 10% water at 40°C to remove the patterned anti-scattering layer; when the anti-scattering layer is a lithium element layer, plasma etching is performed on the anti-scattering layer using iodine vapor or hydrogen iodide to remove the patterned anti-scattering layer. The principle and implementation of the specific plasma etching process are the same as those of the existing conventional plasma etching process, and will not be described in detail in this embodiment.

[0059] The aforementioned mask substrate manufacturing method and mask template manufacturing method incorporate an anti-scattering layer composed of low atomic number elements between the electroresist and the mask material layer. When the electron beam passes through the electroresist and reaches the anti-scattering layer, most of the electrons collide with the outer electrons of the low atomic number elements, resulting in energy loss and significantly reducing the number of electrons scattered back to the electroresist layer. Although some electrons reach the mask material layer (which is generally composed of high atomic number chromium compounds, etc.), they must pass through the anti-scattering layer again due to backscattering. The anti-scattering layer further attenuates the energy of these backscattered electrons, significantly reducing the number and energy of the backscattered electrons that ultimately reach the electroresist. Low-energy electrons are insufficient to cause chemical changes in the electroresist, thus reducing the proximity effect of backscattering, improving the mask template resolution, and achieving a smaller CD size. This effectively meets the growing demands of the semiconductor manufacturing industry and solves the technical problem of high mask template edge roughness caused by the proximity effect of backscattering during direct electron beam writing.

[0060] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the scope of the present invention.

Claims

1. A mask substrate, characterized in that, include: Mask substrate; A mask material layer is formed on the surface of the mask substrate; An anti-scattering layer is formed on the surface of the mask material layer, the anti-scattering layer being formed of low atomic number elements; An electro-resist layer is formed on the surface of the anti-scattering layer.

2. The mask substrate according to claim 1, characterized in that, The low atomic number element is any one of beryllium, boron, or lithium.

3. The mask substrate according to claim 1, characterized in that, The thickness of the anti-scattering layer is 2nm~10nm.

4. A method for manufacturing a mask substrate as described in any one of claims 1-3, characterized in that, Including the following steps: Provide a mask substrate; A mask material layer is formed on the surface of the mask substrate; An anti-scattering layer is formed on the surface of the mask material layer, and the anti-scattering layer is formed of low atomic number elements; An electro-resist layer is formed on the surface of the anti-scattering layer.

5. The method for manufacturing a mask substrate according to claim 4, characterized in that, The low atomic number element is beryllium. The anti-scattering layer is formed by magnetron sputtering deposition. In the magnetron sputtering deposition process, the sputtering pressure is 0.2 Pa to 0.5 Pa, the sputtering power is 10 W to 30 W, the working gas is argon, and the argon gas flow rate is 10 sccm to 50 sccm.

6. The method for manufacturing a mask substrate according to claim 4, characterized in that, The low atomic number element is lithium, and the anti-scattering layer is formed by physical vapor deposition or atomic layer deposition.

7. The method for manufacturing a mask substrate according to claim 4, characterized in that, The low atomic number element is boron, and the anti-scattering layer is formed by magnetron sputtering deposition process. In the magnetron sputtering deposition process, the sputtering pressure is 0.1 Pa to 1.0 Pa, the sputtering power is 50 W to 200 W, the working gas is argon, and the argon gas flow rate is 10 sccm to 50 sccm. or, The low atomic number element is boron, and the anti-scattering layer is formed by chemical vapor deposition. In the chemical vapor deposition process, the deposition temperature is 400°C to 700°C, the precursor is diborane, the gas flow rate is 50 sccm to 200 sccm, and the working pressure is not greater than 100 Pa.

8. A method for manufacturing a mask template based on a mask base as described in any one of claims 1-3, characterized in that, Including the following steps: Provide a mask base plate; Patterned electroresist layers are formed by direct electron beam writing; Using an electro-resist pattern as a mask, a patterned anti-scattering layer is formed; Using the anti-scattering layer pattern as a mask, a patterned mask material layer is formed; Remove the patterned electroresist layer; Remove the patterned anti-scattering layer.

9. The method for manufacturing a photomask according to claim 8, characterized in that, The step of forming a patterned anti-scattering layer using an electroresist pattern as a mask includes: The anti-scattering layer is patterned by wet etching using hydrofluoric acid solution or aluminum phosphate etching solution. or, The anti-scattering layer is patterned by dry etching using a mixture of sulfur hexafluoride and oxygen gas. or, The anti-scattering layer is plasma etched using iodine vapor or hydrogen iodide.

10. The method for manufacturing a photomask according to claim 8, characterized in that, The step of removing the patterned anti-scattering layer includes: The patterned anti-scattering layer is removed by wet etching using hydrofluoric acid solution or aluminum phosphate etching solution. or, The patterned anti-scattering layer was removed by dry etching using a mixture of sulfur hexafluoride and oxygen gas. or, The anti-scattering layer is plasma etched using iodine vapor or hydrogen iodide.

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