Multilayer ceramic capacitor

Abstract

The invention provides a laminated ceramic capacitor capable of improving adhesive force between a laminated body and an external electrode. A multilayer ceramic capacitor according to the present invention is provided with: a multilayer body including a plurality of dielectric layers that are laminated, and a plurality of internal electrode layers that are laminated on the dielectric layers, the first main surface and the second main surface are opposite to each other in the stacking direction of the dielectric layers, the first side surface and the second side surface are opposite to each other in the width direction orthogonal to the stacking direction, and the first end surface and the second end surface are opposite to each other in the length direction orthogonal to the stacking direction and the width direction. A first external electrode disposed on the first main surface and the first end surface of the laminate; and a second external electrode disposed on the first main surface and the second end surface of the laminated body, the first end surface and the second end surface having an inclined surface having a distal end widening from the first main surface toward the second main surface, the inclined surface having a first inclined portion disposed on the first main surface side and a second inclined portion disposed on the second main surface side, the inclination angle of the first inclined portion with respect to the longitudinal direction is different from the inclination angle of the second inclined portion with respect to the longitudinal direction.

Description

TECHNICAL FIELD

[0001] The present application relates to a multilayer ceramic capacitor. BACKGROUND

[0002] In recent years, electronic devices such as portable telephones and portable music players have been made smaller and thinner. In conjunction therewith, multilayer ceramic electronic components such as multilayer ceramic capacitors mounted in electronic devices that have been made smaller and thinner have also been made smaller and thinner. In particular, in multilayer ceramic electronic components that have been made thinner, for example, there is a tendency to be built into wiring boards for use, or even in cases where they are mounted on the surface of a wiring board, to be mounted in very narrow gaps. As such, the more the thinness of multilayer ceramic electronic components is advanced, the more the mechanical strength of multilayer ceramic electronic components decreases, and there is a strong demand to ensure the mechanical strength thereof.

[0003] For example, a multilayer capacitor that has been made thinner is disclosed in Patent Literature 1. This multilayer capacitor has a capacitor body that is substantially rectangular parallelepiped in shape, a first external electrode that continuously covers the front surface and the left and right surfaces and the front side portion of the upper and lower surfaces of the capacitor body, and a second external electrode that continuously covers the rear surface and the left and right surfaces and the rear side portion of the upper and lower surfaces of the capacitor body. Moreover, this multilayer capacitor is a multilayer capacitor that has been made thinner with a height direction dimension H of 0.15 mm.

[0004] PRIOR ART DOCUMENTS

[0005] PATENT LITERATURE

[0006] Patent Literature 1: Japanese Patent Application Publication No. 2012-222276 SUMMARY

[0007] PROBLEMS TO BE SOLVED BY THE INVENTION

[0008] In such a multilayer capacitor that has been made thinner, the contact area of the multilayer body and the external electrode decreases. Therefore, when the first main surface of the multilayer capacitor is mounted as a mounting surface, stress caused by the shrinkage of solder at the time of mounting acts on the external electrode, and there is a problem in that the external electrode easily peels from the multilayer body.

[0009] Therefore, the main object of the present application is to provide a multilayer ceramic capacitor that can improve the adhesion between a multilayer body and an external electrode.

[0010] TECHNICAL SOLUTION FOR SOLVING THE PROBLEM

[0011] The multilayer ceramic capacitor of the present invention comprises: a multilayer body including a plurality of stacked dielectric layers and a plurality of internal electrode layers stacked on the dielectric layers, and having a first main surface and a second main surface opposite to each other in the stacking direction of the plurality of dielectric layers, a first side surface and a second side surface opposite to each other in the width direction orthogonal to the stacking direction, and a first end surface and a second end surface opposite to each other in the length direction orthogonal to the stacking direction and the width direction; a first external electrode disposed on the first main surface and the first end surface of the multilayer body; and a second external electrode disposed on the first main surface and the second end surface of the multilayer body, wherein the first end surface and the second end surface have inclined surfaces that widen at their ends from the first main surface toward the second main surface, and the inclined surfaces have a first inclined portion disposed on the side of the first main surface and a second inclined portion disposed on the side of the second main surface, wherein the inclination angle of the first inclined portion relative to the length direction is different from the inclination angle of the second inclined portion relative to the length direction.

[0012] According to the multilayer ceramic capacitor of the present invention, the first end face and the second end face have inclined surfaces that widen at the ends from the first main face toward the second main face. The inclined surfaces have a first inclined portion disposed on the side of the first main face and a second inclined portion disposed on the side of the second main face. The inclination angle of the first inclined portion with respect to the length direction is different from the inclination angle of the second inclined portion with respect to the length direction. Therefore, when the first main face is used as a mounting surface for mounting, the stress near the intersection of the second main face and the first end face, which are the parts where the first external electrode and the second external electrode are easily peeled off from the multilayer, and the stress near the intersection of the second main face and the second end face, can be dispersed to the vicinity of the second inclined portion. Therefore, the effect of suppressing the peeling of the first external electrode and the second external electrode from the multilayer can be obtained.

[0013] Invention Effects

[0014] According to the present invention, a multilayer ceramic capacitor capable of improving the adhesion between the multilayer and the external electrode can be provided.

[0015] The above-described objects, other objects, features, and advantages of the present invention will become more apparent from the following detailed description of specific embodiments with reference to the accompanying drawings. Attached Figure Description

[0016] Figure 1 This is a perspective view showing an example of a multilayer ceramic capacitor according to the first embodiment of the present invention.

[0017] Figure 2 This is a top view illustrating an example of a multilayer ceramic capacitor according to the first embodiment of the present invention.

[0018] Figure 3This is a front view illustrating an example of a multilayer ceramic capacitor according to the first embodiment of the present invention.

[0019] Figure 4 This is a side view illustrating an example of a multilayer ceramic capacitor according to the first embodiment of the present invention.

[0020] Figure 5 yes Figure 1 A schematic cross-sectional view of line VV involved.

[0021] Figure 6 yes Figure 1 A cross-sectional view of line VI-VI.

[0022] Figure 7 yes Figure 1 A schematic cross-sectional view of line VII-VII.

[0023] Figure 8 (A) is a perspective view of the laminated ceramic capacitor according to the first embodiment of the present invention. Figure 8 (B) is from and Figure 8 (A) A three-dimensional view of the appearance of the stacked body viewed from different directions.

[0024] Figure 9 This is a schematic cross-sectional view illustrating an example of a multilayer ceramic capacitor according to a first variation of the first embodiment of the present invention.

[0025] Figure 10 This is a schematic cross-sectional view showing an example of a multilayer ceramic capacitor according to a second variation of the first embodiment of the present invention.

[0026] Figure 11 This is a schematic cross-sectional view showing an example of a multilayer ceramic capacitor according to a third variation of the first embodiment of the present invention.

[0027] Figure 12 This is a schematic cross-sectional view showing an example of a multilayer ceramic capacitor according to a fourth variation of the first embodiment of the present invention.

[0028] Figure 13 This is a schematic cross-sectional view showing an example of a multilayer ceramic capacitor according to a fifth variation of the first embodiment of the present invention.

[0029] Figure 14 This is a schematic cross-sectional view showing an example of a multilayer ceramic capacitor according to a sixth variation of the first embodiment of the present invention.

[0030] Figure 15 This is a perspective view showing an example of a multilayer ceramic capacitor according to the second embodiment of the present invention.

[0031] Figure 16 This is a perspective view showing an example of a multilayer ceramic capacitor according to the second embodiment of the present invention.

[0032] Figure 17 This is a front view illustrating an example of a multilayer ceramic capacitor according to the second embodiment of the present invention.

[0033] Figure 18 This is a side view illustrating an example of a multilayer ceramic capacitor according to the second embodiment of the present invention.

[0034] Figure 19 yes Figure 15 A schematic cross-sectional view of the line XIX-XIX involved.

[0035] Figure 20 yes Figure 15 A cross-sectional schematic diagram of the line XX-XX involved.

[0036] Figure 21 yes Figure 15 A schematic cross-sectional view of line XXI-XXI involved.

[0037] Figure 22 yes Figure 15 A schematic cross-sectional view of line XXII-XXII involved.

[0038] Figure 23 (A) is a perspective view of the laminated ceramic capacitor according to the second embodiment of the present invention. Figure 23 (B) is from and Figure 23 (A) A three-dimensional view of the appearance of the stacked body viewed from different directions.

[0039] Figure 24 This is a perspective view showing an example of a multilayer ceramic capacitor according to the third embodiment of the present invention.

[0040] Figure 25 yes Figure 24 The diagram shows a cross-sectional view at the line XXV-XXV, and is used to illustrate the construction of an example of a multilayer ceramic capacitor according to the third embodiment of the present invention.

[0041] Figure 26 yes Figure 24 The diagram shows a cross-sectional view along line XXVI-XXVI, and is used to illustrate the construction of an example of a multilayer ceramic capacitor according to the third embodiment of the present invention. Detailed Implementation

[0042] Hereinafter, as an example of the present invention, a multilayer ceramic capacitor will be described using this embodiment.

[0043] A. First Implementation

[0044] 1. Multilayer ceramic capacitor

[0045] An example of a multilayer ceramic capacitor 10 according to an embodiment of the present invention will be described.

[0046] Figure 1 This is a perspective view showing an example of a multilayer ceramic capacitor according to the first embodiment of the present invention. Figure 2 This is a top view illustrating an example of a multilayer ceramic capacitor according to the first embodiment of the present invention. Figure 3 This is a front view illustrating an example of a multilayer ceramic capacitor according to the first embodiment of the present invention. Figure 4 This is a side view illustrating an example of a multilayer ceramic capacitor according to the first embodiment of the present invention. Figure 5 yes Figure 1 A schematic cross-sectional view of line VV involved. Figure 6 yes Figure 1 A cross-sectional view of line VI-VI. Figure 7 yes Figure 1 A schematic cross-sectional view of line VII-VII. Figure 8 (A) is a perspective view of the laminated ceramic capacitor according to the first embodiment of the present invention. Figure 8 (B) is from and Figure 8 (A) A three-dimensional view of the appearance of the stacked body viewed from different directions.

[0047] The multilayer ceramic capacitor 10 has a laminate 12 and an external electrode 24. Hereinafter, the structure will be described in the order of laminate 12 and external electrode 24.

[0048] (Layered structure)

[0049] The laminate 12 includes a first main surface 12a and a second main surface 12b that are opposite each other in the height direction x, which is the stacking direction of the plurality of dielectric layers 14; a first side surface 12c and a second side surface 12d that are opposite each other in the width direction y, which is orthogonal to the height direction x; and a first end surface 12e and a second end surface 12f that are opposite each other in the length direction z, which is orthogonal to the height direction x and the width direction y.

[0050] In this laminate 12, the corners and edges are rounded. A corner is the intersection of three adjacent faces of the laminate 12, and an edge is the intersection of two adjacent faces of the laminate 12. Furthermore, some or all of the first main face 12a and the second main face 12b, the first side face 12c and the second side face 12d, and the first end face 12e and the second end face 12f may be formed with irregularities or protrusions.

[0051] Furthermore, it is preferable that the first main surface 12a and the second main surface 12b, or one of them, are flat. If they are flat, the stress experienced by the nozzle picking up the multilayer ceramic capacitor 10 can be dispersed, thus increasing the strength of the multilayer ceramic capacitor 10 during installation. In the multilayer ceramic capacitor 10 according to this embodiment, the second main surface 12b is formed to be flat.

[0052] like Figure 5 as well as Figure 6 As shown, the laminate 12 has the following in the height direction x connecting the first main surface 12a and the second main surface 12b: an inner layer 15a with multiple inner electrode layers 16 facing each other, a first main surface side outer layer 15b1 formed by multiple dielectric layers 14 located between the inner electrode layer 16 on the side closest to the first main surface 12a and the first main surface 12a, and a second main surface side outer layer 15b2 formed by multiple dielectric layers 14 located between the inner electrode layer 16 on the side closest to the second main surface 12b and the second main surface 12b.

[0053] The first main surface outer layer 15b1 and the second main surface outer layer 15b2 are sometimes integrated after firing and are not distinguished piece by piece, but are an assembly of multiple outer dielectric layers.

[0054] The outer layer 15b1 on the first main surface side is located on the first main surface 12a side of the laminate 12, and is an assembly of multiple dielectric layers 14 located between the first main surface 12a and the inner electrode layer 16 closest to the first main surface 12a.

[0055] The outer layer 15b2 on the second main surface side is located on the second main surface 12b side of the laminate 12, and is an assembly of multiple dielectric layers 14 located between the second main surface 12b and the inner electrode layer 16 closest to the second main surface 12b.

[0056] The dimensions of the laminate 12 are not particularly limited, but preferably the dimensions in the length direction z are 0.1 mm or more and 1.6 mm or less, the dimensions in the width direction y are 0.1 mm or more and 1.6 mm or less, and the dimensions in the height direction x are 0.01 mm or more and 0.1 mm or less.

[0057] The dielectric layer 14 can be formed from a dielectric material, for example. The dielectric material can have multiple grains comprising a perovskite-type compound with BaTiO3 as its basic structure. Specifically, in addition to BaTiO3, dielectric ceramics containing main components such as CaTiO3, SrTiO3, or CaZrO3 can be used as the material for the dielectric layer 14. Furthermore, depending on the desired characteristics of the laminate, materials containing secondary components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, and Ni compounds in smaller amounts than the main components can also be used.

[0058] Furthermore, the outer dielectric layer can, for example, have multiple grains comprising a perovskite-type compound with BaTiO3 as its basic structure. For example, dielectric ceramics containing main components such as BaTiO3, CaTiO3, SrTiO3, and CaZrO3 can be used. Additionally, materials with secondary components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, and Ni compounds added to these main components can also be used. Furthermore, the dielectric layer 14 and the outer dielectric layer can be made of different materials depending on the desired function. For example, if the outer dielectric layer is made of a soft material, it can buffer the stress caused to the laminate; if the outer dielectric layer is made of a hard material, it can suppress crack formation.

[0059] The thickness of the outer layer 15b1 on the first main surface side is preferably 2 μm or more and 15 μm or less. The thickness of the outer layer 15b2 on the second main surface side is preferably 2 μm or more and 15 μm or less.

[0060] The first end face 12e and the second end face 12f have inclined surfaces that widen at the ends from the first main face 12a toward the second main face 12b. Furthermore, the first side face 12c and the second side face 12d also have inclined surfaces that widen at the ends from the first main face 12a toward the second main face 12b. Alternatively, the first side face 12c and the second side face 12d may not be inclined in a way that widens at the ends from the first main face 12a toward the second main face 12b.

[0061] In other words, the length z of the first principal surface 12a of the laminate 12 is shorter than the length z of the second principal surface 12b. Therefore, as Figure 3 As shown, the side view of the laminate 12 is approximately trapezoidal. Furthermore, the length of the first main surface 12a in the width direction y is preferably shorter than the length of the second main surface 12b in the width direction y. Thus, as... Figure 4 As shown, the end view of the stacked body 12 is roughly trapezoidal in shape.

[0062] Therefore, in the laminate 12, when the length in the longitudinal direction z of the first major surface 12a is shorter than the length in the longitudinal direction z of the second major surface 12b and the length in the width direction y of the first major surface 12a is shorter than the length in the width direction y of the second major surface 12b, as Figure 8 shown, in the stacking direction of the laminate 12, when the area of the first major surface 12a is set as A and the area of the second major surface 12b is set as B, the condition A < B is satisfied.

[0063] The laminate 12 has a first inclined portion 40 and a second inclined portion 42 on an inclined surface inclined from the first major surface 12a toward the second major surface 12b.

[0064] The first inclined portion 40 has a first inclined portion 401 formed on the first major surface 12a side at the first end surface 12e and the second end surface 12f, and a first inclined portion 402 formed on the first major surface 12a side at the first side surface 12c and the second side surface 12d.

[0065] The second inclined portion 42 has a second inclined portion 421 formed on the second major surface 12b side at the first end surface 12e and the second end surface 12f, and a second inclined portion 422 formed on the second major surface 12b side at the first side surface 12c and the second side surface 12d.

[0066] In addition, on the inclined surfaces of the first side surface 12c and the second side surface 12d, the first inclined portion 402 and the second inclined portion 422 may not be provided.

[0067] The first inclined portion 401 and the second inclined portion 421 are continuously formed. Thus, compared with the case where the first inclined portion 401 and the second inclined portion 421 are not continuously formed, the adhesion between the laminate 12 and the external electrode 24 can be improved. In addition, the first inclined portion 402 and the second inclined portion 422 are continuously formed.

[0068] In addition, the first inclined portion 401 and the second inclined portion 421 may not be continuously formed, and the first inclined portion 402 and the second inclined portion 422 may not be continuously formed.

[0069] Regarding the first inclined portion 401 and the second inclined portion 421, the cross-section when grinding toward the width direction y until 1 / 4W or 1 / 2W of the size of the multilayer ceramic capacitor 10 is observed at a magnification of 3000 times and □50 μm by a scanning electron microscope (SEM, manufactured by JEOL Ltd., for example). Based on the observed image of the obtained cross-section, the inclined portions formed at the first end surface 12e or the second end surface 12f are regarded as the first inclined portion 401 and the second inclined portion 421.

[0070] Similarly, regarding the first inclined portion 402 and the second inclined portion 422, a cross-section of the ceramic capacitor 10 milled along the length direction z until it reaches 1 / 4L or 1 / 2L of its size was observed using a scanning electron microscope (SEM, for example, manufactured by NJE Inc.) at a magnification of 3000x and a depth of □50μm. Based on the observed images of the cross-sections, the inclined portions formed on the first end face 12e or the second end face 12f were designated as the first inclined portion 402 and the second inclined portion 422.

[0071] like Figure 3 As shown, the tilt angle θ1 of the first tilted part 401 relative to the straight line l1 parallel to the length direction z is different from the tilt angle θ2 of the second tilted part 421 and the straight line l2 parallel to the length direction z.

[0072] Therefore, when the first main surface 12a is used as the mounting surface, the stress near the intersection of the second main surface 12b and the first end surface 12e, which are the parts where the external electrode 24 is easily peeled off from the laminate 12, and the stress near the intersection of the second main surface 12b and the second end surface 12f, can be dispersed to the vicinity of the inclined portion, thereby achieving the effect of suppressing the peeling of the external electrode 24.

[0073] The inclination angle θ2 of the second inclined portion 421 and the straight line l2 parallel to the length direction z is preferably greater than the inclination angle θ1 of the first inclined portion 401 and the straight line parallel to the length direction z.

[0074] Furthermore, the tilt angle θ1 of the first tilted portion 401 and the straight line l1 parallel to the length direction z is preferably 30° or more and 85° or less. If the tilt angle θ1 becomes less than 30°, it becomes difficult to form an angle difference between the tilt angle θ1 of the first tilted portion 401 and the tilt angle θ2 of the second tilted portion 421. On the other hand, if the tilt angle θ1 becomes greater than 85°, it becomes difficult to obtain the effect of suppressing peeling.

[0075] The tilt angle θ2 of the second tilted portion 421 and the straight line l2 parallel to the length direction z is preferably 5° or more greater than the tilt angle θ1 of the first tilted portion 401 and the straight line l1 parallel to the length direction z. The second tilted portion 421 becoming larger than the first tilted portion 401 shortens the chip distance in the length direction z, reducing the force exerted on the electrode tip by the stress during solder shrinkage through a lever principle. On the other hand, if the difference between the tilt angle θ2 of the second tilted portion 421 and the straight line parallel to the length direction z and the tilt angle θ1 of the first tilted portion 401 and the straight line parallel to the length direction z becomes less than 5°, it is difficult to achieve the effect of suppressing peeling.

[0076] The inner electrode layer 16 may also be exposed at the first inclined portion 401 at the first end face 12e and the second end face 12f. If the inner electrode layer 16 is exposed at the first inclined portion 401, the metal between the inner electrode layer 16 and the outer electrode 24 will be closely connected, which can improve the adhesion between the laminate 12 and the outer electrode 24.

[0077] The inner electrode layer 16 can be exposed at the second inclined portion 421 at the first end face 12e and the second end face 12f. If the inner electrode layer 16 is exposed at the second inclined portion 421, the metal between the inner electrode layer 16 and the outer electrode 24 will be closely connected, which can improve the adhesion between the laminate 12 and the outer electrode 24.

[0078] The number of stacked dielectric layers 14 is not particularly limited, but including the inner layer 15a, the first main surface side outer layer 15b1, and the second main surface side outer layer 15b2, the total number of these layers is preferably 3 or more and 700 or less. Furthermore, it is preferable that the thickness of the inner layer 15a is 0.4 μm or more and 2.0 μm or less, and the thickness of each of the first main surface side outer layer 15b1 and the second main surface side outer layer 15b2 is 2.0 μm or more and 10.0 μm or less.

[0079] (Internal electrode layer)

[0080] like Figure 5 as well as Figure 6 As shown, the internal electrode layer 16 has a first internal electrode layer 16a and a second internal electrode layer 16b. The first internal electrode layer 16a and the second internal electrode layer 16b are stacked alternately with a dielectric layer 14 in between.

[0081] The first internal electrode layer 16a is disposed on the surface of the dielectric layer 14. The first internal electrode layer 16a has a first opposing electrode portion 18a opposite to the second internal electrode layer 16b, and a first lead-out electrode portion 20a located at one end of the first internal electrode layer 16a and extending from the first opposing electrode portion 18a to the first end face 12e of the laminate 12. The first lead-out electrode portion 20a extends to and is exposed at its end at the first end face 12e.

[0082] The shape of the first opposing electrode portion 18a of the first inner electrode layer 16a is not particularly limited, but it is preferably rectangular in plan view. However, the corner portion can be rounded in plan view, or the corner portion can be formed into a plan view tilted (conical shape). Alternatively, it can be a plan view conical shape that tilts in either direction.

[0083] The shape of the first lead-out electrode portion 20a of the first internal electrode layer 16a is not particularly limited, but it is preferably rectangular in plan view. However, the corner portion can be rounded in plan view, or the corner portion can be formed into a plan view tilted (conical shape). Alternatively, it can be a plan view conical shape that tilts in any direction.

[0084] The width of the first opposing electrode portion 18a of the first internal electrode layer 16a and the width of the first lead-out electrode portion 20a of the first internal electrode layer 16a can be formed to be the same width, or they can be formed to be either narrower.

[0085] The second internal electrode layer 16b is disposed on the surface of a dielectric layer 14 different from the dielectric layer 14 on which the first internal electrode layer 16a is disposed. It has a second opposing electrode portion 18b opposite to the first internal electrode layer 16a, and a second lead-out electrode portion 20b located at one end of the second internal electrode layer 16b and extending from the second opposing electrode portion 18b to the second end face 12f of the laminate 12. The second lead-out electrode portion 20b extends to and is exposed at its end at the second end face 12f.

[0086] The shape of the second opposing electrode portion 18b of the second inner electrode layer 16b is not particularly limited, but it is preferably rectangular in plan view. However, the corner portion can be rounded in plan view, or the corner portion can be formed into a plan view angled (conical shape). Alternatively, it can be a plan view conical shape that is angled in either direction.

[0087] The shape of the second lead-out electrode portion 20b of the second inner electrode layer 16b is not particularly limited, but it is preferably rectangular in plan view. However, the corner portion can be rounded in plan view, or the corner portion can be formed into a plan view tilted (conical shape). Alternatively, it can be a plan view conical shape that tilts in any direction.

[0088] The width of the second opposing electrode portion 18b of the second internal electrode layer 16b and the width of the second lead-out electrode portion 20b of the second internal electrode layer 16b can be formed to be the same width, or either of them can be formed to be narrower.

[0089] The first lead-out electrode portion 20a of the first internal electrode layer 16a and the second lead-out electrode portion 20b of the second internal electrode layer 16b may also be curved toward the first main surface 12a or the second main surface 12b. Furthermore, the longest distance in the height direction x between the exposed portions of the first lead-out electrode portion 20a of the first internal electrode layer 16a leading to the second end surface 12f and the longest distance in the height direction x between the exposed portions of the second lead-out electrode portion 20b of the second internal electrode layer 16b leading to the first end surface 12e may be shorter than the longest distance in the height direction x between the first opposing electrode portion 18a of the first internal electrode layer 16a and the second opposing electrode portion 18b of the second internal electrode layer 16b.

[0090] The number of stacked internal electrode layers 16 is not particularly limited, but is preferably 2 or more and 700 or less. Furthermore, the thickness of the internal electrode layers 16 is preferably 0.2 μm or more and 2.0 μm or less.

[0091] The laminate 12 includes a side portion 22a (W gap) located between the inner electrode layer 16 and the first side surface 12c, and between the inner electrode layer 16 and the second side surface 12d. Furthermore, the laminate 12 includes an end portion 22b (L gap) located between the inner electrode layer 16 and the first end surface 12e, and between the inner electrode layer 16 and the second end surface 12f.

[0092] The internal electrode layer 16 may be made of a suitable conductive material, such as metals like Ni, Cu, Ag, Pd, Au, or alloys containing at least one of these metals, such as Ag-Pd alloys, but is not limited thereto.

[0093] Furthermore, by including Sn in both the first internal electrode layer 16a and the second internal electrode layer 16b, the electric field concentration at the interface between the internal electrode layer 16 and the dielectric layer 14 can be mitigated, thereby improving high-temperature load reliability. In this case, even if Sn is contained only in either the first internal electrode layer 16a or the second internal electrode layer 16b, it can still exert a significant effect.

[0094] In this embodiment, the first opposing electrode portion 18a of the first internal electrode layer 16a and the second opposing electrode portion 18b of the second internal electrode layer 16b are opposed to each other across the dielectric layer 14, thereby forming an electrostatic capacitance and exhibiting the characteristics of a capacitor.

[0095] To achieve a high capacitance in the capacitor, the area of ​​the internal electrode layer 16 needs to be increased. Therefore, the LW surface coverage of the internal electrode layer 16 is preferably 90% or more. The LW surface coverage is defined as the ratio obtained by subtracting the area of ​​the voids from the area of ​​the inner side of the edge of the internal electrode layer 16 when viewed from the LW surface of the laminate 12. A high LW surface coverage results in a higher capacitance, but even a lower coverage ensures stronger interlayer bonding because the dielectric layers 14 are bonded together through the voids, thus suppressing interlayer delamination.

[0096] (External electrode)

[0097] like Figures 1 to 7 As shown, external electrodes 24 are disposed on the first end face 12e side and the second end face 12f side of the laminate 12.

[0098] The external electrode 24 includes a thin film layer 26 and a plating layer 30 formed to cover the thin film layer 26.

[0099] The external electrode 24 has a first external electrode 24a and a second external electrode 24b.

[0100] The first external electrode 24a is disposed on a portion of the first end face 12e and the first main face 12a of the laminate 12. In this case, the first external electrode 24a is electrically connected to the first lead-out electrode portion 20a of the first internal electrode layer 16a. Alternatively, the first external electrode 24a may also slightly wrap around a portion of the first side face 12c and a portion of the second side face 12d.

[0101] The second external electrode 24b is disposed on a portion of the second end face 12f and the first main face 12a of the laminate 12. In this case, the second external electrode 24b is electrically connected to the second lead electrode portion 20b of the second internal electrode layer 16b. Alternatively, the second external electrode 24b may also slightly wrap around a portion of the first side face 12c and a portion of the second side face 12d.

[0102] The external electrode 24 is composed of a thin film layer 26, an upper plating layer 34 covering the thin film layer 26, and a surface plating layer 36 covering the upper plating layer 34.

[0103] (Thin film layer)

[0104] The thin film layer 26 has a first thin film layer 26a and a second thin film layer 26b.

[0105] The first thin film layer 26a is configured to cover a portion of the first main surface 12a on the side of the first end face 12e of the laminate 12, but does not cover the first end face 12e of the laminate 12. Alternatively, it may wrap around any of the surfaces that are in contact with the first main surface 12a.

[0106] The second thin film layer 26b is configured to cover a portion of the first main surface 12a on the side of the second end face 12f of the laminate 12, but does not cover the second end face 12f of the laminate 12. Alternatively, it may wrap around any of the surfaces that are in contact with the first main surface 12a.

[0107] In this manner, the first thin film layer 26a and the second thin film layer 26b are electrodes disposed on the first main surface 12a. The first thin film layer 26a and the second thin film layer 26b are preferably thin film layers with deposited metal particles, formed by sputtering, evaporation, or the like. Therefore, the thickness of the first thin film layer 26a and the second thin film layer 26b in the direction connecting the first main surface 12a and the second main surface 12b of the laminate 12 can be set to 1 μm or less, which can sufficiently reduce the dimension in the height direction x of the laminated ceramic capacitor 10, thus enabling a lower height.

[0108] Furthermore, the method for measuring the height direction x-dimensional dimensions of the first thin film layer 26a and the second thin film layer 26b can be performed as follows: When the thin film layers are formed by deposition of metal particles, the thickness can be calculated based on the given element concentration using a fluorescence X-ray apparatus and a calibration line method for that metal type. Alternatively, the thickness can be measured based on the observed image by observing the cross-section of the FIB-based component using a scanning microscope.

[0109] Furthermore, when the first thin film layer 26a and the second thin film layer 26b are formed by the thin film formation method, these thin film layers can be composed of metals such as Cu, Cr, Au, Pt, Ag, Sn, Ti or Ni.

[0110] The first thin film layer 26a and the second thin film layer 26b can be configured with their respective functions in mind. For example, considering the close contact with the laminate 12, NiCr or NiCu is preferably used as the main component. Furthermore, the first thin film layer 26a and the second thin film layer 26b can be multiple sheets, or they can be a two-layer structure of NiCr and NiCu.

[0111] The thin film layer 26 can also be a thin film layer containing dielectric materials and metallic components, formed by methods such as screen printing, CVD, and ALD. Based on these methods, the adhesion between the laminate and the external electrode can be further improved through ceramic bonding of the thin film layer 26 and the laminate 12. In this case, the thin film layer 26 can also have a discontinuous shape. Discontinuity refers to a shape that is not continuous when viewed from a direction perpendicular to the length direction.

[0112] For example, when the thin film layer 26 is formed from a ceramic-containing material, one method involves obtaining a cross-sectional photograph using a digital microscope (Keyence VHX-5000) after cross-sectional grinding, and then calculating the thickness based on the photograph. Another method involves using a scanning microscope to examine the cross-section of the FIB-based component and determining the thickness based on the actual observed image.

[0113] Furthermore, by ensuring that the first thin film layer 26a and the second thin film layer 26b each contain the same main components as the dielectric layer 14, the adhesion can be further improved by simultaneously firing the laminate 12 and the first thin film layer 26a and the second thin film layer 26b. In this case, Ni, Cu, etc., are preferred as the metal component, but can be appropriately changed depending on the metal component of the internal electrode layer 16.

[0114] (plating layer)

[0115] The plating layer 30 includes a first plating layer 30a and a second plating layer 30b.

[0116] The first coating layer 30a is configured to cover the first thin film layer 26a and the first end face 12e of the laminate 12.

[0117] The second coating layer 30b is configured to cover the second thin film layer 26b and the second end face 12f of the laminate 12.

[0118] The plating layer 30 is formed of multiple layers. That is, the plating layer 30 has an upper plating layer 34 and a surface plating layer 36.

[0119] The upper plating layer 34 includes the first upper plating layer 34a included in the first plating layer 30a and the second upper plating layer 34b included in the second plating layer 30b. The surface plating layer 36 includes the first surface plating layer 36a included in the first plating layer 30a and the second surface plating layer 36b included in the second plating layer 30b.

[0120] The first upper plating layer 34a of the upper plating layer 34 is configured to cover the first direct plating layer 28a of the direct plating layer 28 and the first thin film layer 26a.

[0121] The second upper plating layer 34b of the upper plating layer 34 is configured to cover the second direct plating layer 28b of the direct plating layer 28 and the second thin film layer 26b.

[0122] The upper plating layer 34 is preferably a Ni plating used to prevent solder corrosion.

[0123] The first surface plating layer 36a of the surface plating layer 36 is configured to cover the first upper plating layer 34a of the upper plating layer 34.

[0124] The second surface plating layer 36b of the surface plating layer 36 is configured to cover the second upper plating layer 34b of the upper plating layer 34.

[0125] The surface plating layer 36 is preferably a Sn plating layer that has good adhesion to the solder used when mounting the multilayer ceramic capacitor 10. Alternatively, the surface plating layer 36 can also be a Cu plating layer. In this case, the adhesion to the vias formed when embedding the multilayer ceramic capacitor 10 into the mounting substrate can be improved.

[0126] Alternatively, the plating layer 30 may consist solely of the surface plating layer 36. In this case, the first surface plating layer 36a of the surface plating layer 36 is configured to be coated with a first thin film layer 26a, and the second surface plating layer 36b of the surface plating layer 36 is configured to be coated with a second thin film layer 26b.

[0127] The metal content per unit volume of the plating layer 30 is preferably 99% or more.

[0128] The thickness of each layer of the plating layer 30 is preferably 1.0 μm or more and 10.0 μm or less.

[0129] The dimension of the stacked ceramic capacitor 10, which includes the stacked body 12, the first external electrode 24a, and the second external electrode 24b, in the length direction z is set as dimension L. The dimension of the stacked ceramic capacitor 10, which includes the stacked body 12, the first external electrode 24a, and the second external electrode 24b, in the height direction x is set as dimension T. The dimension of the stacked ceramic capacitor 10, which includes the stacked body 12, the first external electrode 24a, and the second external electrode 24b, in the width direction y is set as dimension W.

[0130] The preferred dimensions of the multilayer ceramic capacitor 10 are as follows: the length dimension L in the z-direction is 0.1 mm or more and 1.6 mm or less; the height dimension T in the x-direction is 10 μm or more and 100 μm or less; and the width dimension W in the y-direction is 0.1 mm or more and 1.6 mm or less. Figure 1 In the stacked ceramic capacitor 10 shown, the L dimension is larger than the W dimension.

[0131] Furthermore, in this embodiment, the effect of the present invention can be effectively achieved when the T dimension in the height direction x of the stacked ceramic capacitor 10 is 100 μm or less, and it becomes even more effective when it is 55 μm or less or 50 μm or less.

[0132] exist Figure 1 In the multilayer ceramic capacitor 10 according to the first embodiment shown, such as Figure 3As shown, the inclination angle θ1 of the first inclined portion 401 relative to a straight line parallel to the length direction z is different from the inclination angle θ2 of the second inclined portion 421 relative to a straight line parallel to the length direction z. As a result, when the first main surface 12a is used as a mounting surface, the stress near the intersection of the second main surface 12b and the first end surface 12e, which are areas where the external electrode 24 is easily peeled off from the laminate 12, and the stress near the intersection of the second main surface 12b and the second end surface 12f, can be dispersed to the vicinity of the inclined portion, thus suppressing the peeling of the external electrode 24.

[0133] (1) First variation

[0134] Next, an example of a multilayer ceramic capacitor 10A according to a first variation of the first embodiment of the present invention will be described. Figure 9 This is a schematic cross-sectional view illustrating an example of a multilayer ceramic capacitor according to a first variation of the first embodiment of the present invention. However, for... Figures 1 to 8 For identical or equivalent structures, use the same reference numerals and omit detailed descriptions.

[0135] In the multilayer ceramic capacitor 10A involved in the first modification example, such as Figure 9 As shown, the inner layer 15a has an internal electrode layer 16 exposed at the first end face 12e or the second end face 12f, and has a dielectric layer 14 alternately stacked with the internal electrode layer 16.

[0136] Moreover, such as Figure 9 As shown, the first inclined portion 401 is formed on the first end face 12e and the second end face 12f on the first main surface side outer layer 15b1 provided on the first main surface 12a side, and the second inclined portion 421 is formed on the first end face 12e and the second end face 12f on the second main surface side outer layer 15b2.

[0137] Here, the region on the first end face 12e from the intersection point P1 of the inner layer 15a and the outer layer 15b1 on the first main surface to the intersection point P2 of the first main surface 12a and the first end face 12e is designated as the first inclined portion 401, and the region on the first end face 12e from the intersection point P3 of the inner layer 15a and the outer layer 15b2 on the second main surface to the intersection point P4 of the second main surface 12b and the first end face 12e is designated as the second inclined portion 421.

[0138] At this time, as Figure 9As shown, when the straight line l3 connecting intersection point P1 and intersection point P2 is drawn, from this straight line, the inner layer 15a forms a protrusion 50 that protrudes in a shape substantially perpendicular to the first end face 12e. Similarly, the inner layer 15a forms a protrusion 50 that protrudes in a shape substantially perpendicular to the second end face 12f. Here, the term "protruding inner layer 15a" means that both the inner electrode layer 16 and the dielectric layer 14 protrude. In this case, the amount of protrusion of the inner electrode layer 16 and the dielectric layer 14 may also be different. When the amount of protrusion of the inner electrode layer 16 is greater, part of the dielectric layer 14 is recessed, thus becoming a concave-convex shape.

[0139] Furthermore, a straight line l is drawn from this line, connecting intersection points P1 and P2. t The straight line l at that time t The protrusion t of the inner layer 15a is the apex T of the convex part 50a and the straight line l t The shortest distance. The protrusion t of the inner layer 15a is preferably 0.3 μm or more and 3.0 μm or less. If the protrusion t of the inner layer 15a is within this range, the surface shape will not become too smooth, the surface area of ​​the inner layer 15a will increase, and thus the adhesion between the laminate 12 and the outer electrode 24 can be further improved.

[0140] Furthermore, in cases where the intersection of the first main surface 12a and the first end surface 12e, and the intersection of the second main surface 12b and the first end surface 12e, have rounded corners but the intersection point P2 is unclear,

[0141] The first inclined portion 401 is defined by a straight line from a point on the first end face 12e that exists when the inner electrode layer 16 closest to the first main surface 12a is 2 μm away from the first main surface 12a side along the stacking direction to the first main surface 12a side, to the intersection point P1 of the inner layer portion 15a and the outer layer portion 15b1 on the first main surface side.

[0142] The second inclined portion 421 is defined by a straight line from a point on the first end face 12e that exists when the inner electrode layer 16 closest to the second main surface 12b is 2 μm away from the second main surface 12b side along the stacking direction to the second main surface 12b side, to the intersection point P3 of the inner layer portion 15a and the outer layer portion 15b2 on the second main surface side.

[0143] The inclination angle of each inclined part at this point is defined based on the angle between the intersection point and the straight line parallel to the length direction z.

[0144] Furthermore, an inclined portion can also be provided in the inner layer portion 15a on the first end face 12e, in which case the exposed surface of the inner electrode layer 16 can also be inclined. Similarly, an inclined portion can also be provided in the inner layer portion 15a on the second end face 12f, in which case the exposed surface of the inner electrode layer 16 can also be inclined.

[0145] exist Figure 9The first modified example of the first embodiment shown in the multilayer ceramic capacitor 10A has the same effect as the multilayer ceramic capacitor 10 described above, and also has the following effect.

[0146] That is, by making the inner layer 15a convex or the surface of the inner layer 15a concave-convex, the surface area of ​​the metal component and the dielectric component increases, thereby increasing the contact area between the metal component in the outer electrode and the metal component of the laminate 12, thus further improving the adhesion between the laminate 12 and the outer electrode 24.

[0147] (2) Second variation

[0148] Next, an example of a multilayer ceramic capacitor 10B according to a first variation of the first embodiment of the present invention will be described. Figure 10 This is a schematic cross-sectional view illustrating an example of a multilayer ceramic capacitor according to a second variation of the first embodiment of the present invention. However, for... Figures 1 to 8 For identical or equivalent structures, use the same reference numerals and omit detailed descriptions.

[0149] In the second modified example, the multilayer ceramic capacitor 10B, as follows: Figure 10 As shown, the first thin film layer 26a and the second thin film layer 26b respectively surround the first end face 12e and the second end face 12f formed on the laminate 12.

[0150] Specifically, the first thin film layer 26a is formed around the first main surface 12a to cover the first end surface 12e. In addition, the second thin film layer 26b is formed around the first main surface 12a to cover the second end surface 12f.

[0151] The first thin film layer 26a is directly electrically connected to the first lead-out electrode portion 20a of the first internal electrode layer 16a exposed from the first end face 12e. In addition, the second thin film layer 26b is directly electrically connected to the second lead-out electrode portion 20b of the second internal electrode layer 16b exposed from the second end face 12f.

[0152] Regarding the first thin film layer 26a, the thin film layer formed on the first main surface 12a and the thin film layer formed on the first end surface 12e can be continuously connected, or they can be discontinuously formed at the edge portion. Furthermore, regarding the second thin film layer 26b, the thin film layer formed on the first main surface 12a and the thin film layer formed on the second end surface 12f can be continuously connected, or they can be discontinuously formed at the edge portion.

[0153] exist Figure 10 The multilayer ceramic capacitor 10B according to the first embodiment shown has the same effect as the multilayer ceramic capacitor 10 described above, and also has the following effect.

[0154] A first thin film layer 26a is disposed on the first end face 12e, and a second thin film layer 26b is disposed on the second end face 12f. Therefore, the first inclined portion 401 and the second inclined portion 421 increase the contact area between the metal components in the laminate 12 and the metal components in the thin film layer 26, and also increase the contact area between the dielectric components in the laminate 12 and the dielectric components in the thin film layer 26. As a result, the adhesion between the laminate 12 and the external electrode 24 can be further improved.

[0155] (3) Third variation

[0156] Next, an example of a multilayer ceramic capacitor 10C according to the third variation of the first embodiment of the present invention will be described. Figure 11 This is a schematic cross-sectional view illustrating an example of a multilayer ceramic capacitor according to a third variation of the first embodiment of the present invention. However, for... Figures 1 to 8 For identical or equivalent structures, use the same reference numerals and omit detailed descriptions.

[0157] like Figure 11 As shown, in the third variation of the first embodiment, the stacked ceramic capacitor 10C has a base electrode layer 27 disposed on its two end faces 12e and 12f.

[0158] (Base electrode layer)

[0159] The substrate electrode layer 27 includes a first substrate electrode layer 27a and a second substrate electrode layer 27b.

[0160] The first base electrode layer 27a is configured to cover the first end face 12e of the laminate 12. The first base electrode layer 27a is directly electrically connected to the first lead electrode portion 20a of the first inner electrode layer 16a.

[0161] The upper end of the first base electrode layer 27a may also be arranged on the ridge portion formed by the first main surface 12a and the first end surface 12e of the laminate 12 to overlap with the lower side of the first thin film layer 26a.

[0162] The second base electrode layer 27b is configured to cover the second end face 12f of the laminate 12. The second base electrode layer 27b is directly electrically connected to the second lead electrode portion 20b of the second inner electrode layer 16b.

[0163] The upper end of the second base electrode layer 27b may also be arranged on the ridge portion formed by the first main surface 12a and the second end surface 12f of the laminate 12 to overlap with the lower side of the second thin film layer 26b.

[0164] Additionally, a portion of the first thin film layer 26a may also be disposed around the first end face 12e, and a portion of the second thin film layer 26b may also be disposed around the second end face 12f.

[0165] The substrate electrode layer 27 is formed, for example, by a sintered layer.

[0166] In this case, the sintered layer comprises a metallic component and a glass component. The glass component of the sintered layer comprises at least one selected from B, Si, Ba, Mg, Al, Li, etc. The metallic component of the sintered layer comprises, for example, at least one selected from Cu, Ni, Ag, Pd, Ag-Pd alloy, Au, etc. The sintered layer is formed by applying a conductive paste comprising glass and metal to a laminate and then sintering it. The sintered layer is formed by simultaneously sintering a laminated sheet having an internal electrode layer 16 and a dielectric layer 14 and a conductive paste applied to the laminated sheet, but it can also be sintered after the laminated sheet having an internal electrode layer 20 and a dielectric layer 14 has been sintered. The sintered layer can also be multilayered.

[0167] The thickness of each layer of the substrate electrode layer 27 is preferably 0.1 μm or more and 200 μm or less.

[0168] Alternatively, the upper ends of the first base electrode layer 27a and the second base electrode layer 27b can be separately disposed from the first thin film layer 26a and the second thin film layer 26b.

[0169] exist Figure 11 The multilayer ceramic capacitor 10C according to the first embodiment shown has the same effect as the multilayer ceramic capacitor 10 described above, and also has the following effect.

[0170] A first base electrode layer 27a is disposed on the first end face 12e, and a second base electrode layer 27b is disposed on the second end face 12f. Therefore, the surface area of ​​the metal and dielectric components of the first inclined portion 401 and the second inclined portion 421 increases, resulting in increased contact area between the metal components in the laminate 12 and the metal components of the base electrode layer 27, and also increased contact area between the dielectric components in the laminate 12 and the glass components of the base electrode layer 27. As a result, the adhesion between the laminate 12 and the external electrode 24 can be further improved.

[0171] (4) Fourth variation

[0172] Next, an example of a multilayer ceramic capacitor 10D according to the fourth modification of the first embodiment of the present invention will be described. Figure 12 This is a schematic cross-sectional view showing an example of a multilayer ceramic capacitor according to a fourth variation of the first embodiment of the present invention. However, for... Figures 1 to 8For identical or equivalent structures, use the same reference numerals and omit detailed descriptions.

[0173] like Figure 12 As shown, in the fourth variation of the first embodiment, the two end faces 12e and 12f of the multilayer ceramic capacitor 10D are provided with direct plating layers 28.

[0174] (Direct plating layer)

[0175] The direct plating layer 28 includes a first direct plating layer 28a and a second direct plating layer 28b.

[0176] The first direct plating layer 28a is configured as the first end face 12e of the coated laminate 12. The first direct plating layer 28a is directly electrically connected to the first lead electrode portion 20a of the first internal electrode layer 16a.

[0177] The upper end of the first direct plating layer 28a is positioned on the ridge portion formed by the first main surface 12a and the first end surface 12e of the laminate 12 to overlap with the lower side of the first thin film layer 26a.

[0178] The second direct plating layer 28b is configured to cover the second end face 12f of the laminate 12. The second direct plating layer 28b is directly electrically connected to the second lead electrode portion 20b of the second internal electrode layer 16b.

[0179] The upper end of the second direct plating layer 28b is positioned on the ridge portion formed by the first main surface 12a and the second end surface 12f of the laminate 12 to overlap with the lower side of the second thin film layer 26b.

[0180] Additionally, a portion of the first direct plating layer 28a may also be disposed around the second main surface 12b, and a portion of the second direct plating layer 28b may also be disposed around the second main surface 12b.

[0181] The direct plating layer 28 can be made up of at least one metal selected from Cu, Ni, Ag, Pd, Ag-Pd alloy, Au, etc., as the main metal component, and is not particularly limited. For example, if Ni is used to form the first internal electrode layer 16a and the second internal electrode layer 16b, the direct plating layer 28 is preferably made of Cu, which has good adhesion to Ni.

[0182] The direct plating layer 28 is deposited and grown from the inner electrode layer 16, forming a layer covering the first end face 12e and the second end face 12f.

[0183] The thickness of each direct plating layer 28 is preferably 2.0 μm or more and 10.0 μm or less.

[0184] Alternatively, the upper ends of the first direct plating layer 28a and the second direct plating layer 28b can be separately disposed from the first thin film layer 26a and the second thin film layer 26b.

[0185] As a result, the thickness of the external electrode 24 formed on the first main surface 12a in the stacking direction can be further reduced, thus enabling the provision of a stacked ceramic capacitor with a further reduced height without compromising the installability during installation.

[0186] (5) Fifth variation

[0187] Next, an example of a multilayer ceramic capacitor 10E according to the fifth variation of the first embodiment of the present invention will be described. Figure 13 This is a schematic cross-sectional view showing an example of a multilayer ceramic capacitor according to a fourth variation of the first embodiment of the present invention. However, for... Figures 1 to 8 For identical or equivalent structures, use the same reference numerals and omit detailed descriptions.

[0188] like Figure 13 As shown, in the multilayer ceramic capacitor 10E according to the fifth modification, the plating layer 30 of the external electrode 24 further has a lower plating layer 32 disposed between the thin film layer 26 and the upper plating layer 34. Thus, the upper plating layer 34 of the plating layer 30 is indirectly covered by the thin film layer 26 through the lower plating layer 32.

[0189] Therefore, in the multilayer ceramic capacitor 10E, the lower plating layer 32 can prevent moisture from entering from the outside.

[0190] according to Figure 13 The fifth variation shown involves a multilayer ceramic capacitor 10E, which functions as a capacitor with... Figure 1 The same effect is achieved with the laminated ceramic capacitor 10. Furthermore, it can suppress the intrusion of moisture from the outside.

[0191] (6) The sixth variation

[0192] Next, the stacked ceramic capacitor 10F according to the sixth variation of the first embodiment of the present invention will be described. Figure 14 This is a schematic cross-sectional view showing an example of a multilayer ceramic capacitor according to a sixth variation of the first embodiment of the present invention. However, for... Figures 1 to 8 For identical or equivalent structures, use the same reference numerals and omit detailed descriptions.

[0193] The sixth modification involves a multilayer ceramic capacitor 10E whose external electrode 24 does not contain a plating layer, but is composed of multiple thin film layers. Figure 14In the stacked ceramic capacitor 10E shown, for example, the first external electrode 24a does not contain a plating layer but is composed of only four thin film layers 26a1 to 26a4, and the second external electrode 24b does not contain a plating layer but is composed of only four thin film layers 26b1 to 26b4.

[0194] In the first external electrode 24a, a thin film layer 26a1 is formed around the first main surface 12a to cover the first end surface 12e. Furthermore, thin film layers 26a2, 26a3, and 26a4 are sequentially formed on the surface of the thin film layer 26a1.

[0195] In the second external electrode 24b, a thin film layer 26b1 is formed around the first main surface 12a to cover the second end surface 12f. Furthermore, thin film layers 26b2, 26b3, and 26b4 are sequentially formed on the surface of the thin film layer 26b1.

[0196] Furthermore, in the first external electrode 24a, the edges of the four thin film layers 26a1 to 26a4 near the center of the laminate 12 may or may not be formed to cover the edges of the lower layers. Similarly, in the second external electrode 24b, the edges of the four thin film layers 26b1 to 26b4 near the center of the laminate 12 may or may not be formed to cover the edges of the lower layers.

[0197] exist Figure 14 The multilayer ceramic capacitor 10F according to the first embodiment shown has the same effect as the multilayer ceramic capacitor 10 described above, and also has the following effect.

[0198] That is, the multilayer ceramic capacitor 10F does not contain a plating layer, the first external electrode 24a is composed only of thin film layers 26a1 to 26a4, and the second external electrode 24b is composed only of thin film layers 26b1 to 26b4. This reduces the size of the T dimension in the height direction x and the L dimension in the length direction z, thereby reducing the size of the multilayer ceramic capacitor.

[0199] 2. Manufacturing method of multilayer ceramic capacitors

[0200] Hereinafter, a method for manufacturing a multilayer ceramic capacitor, which is an example of a multilayer ceramic capacitor according to the first embodiment, will be described.

[0201] First, prepare a conductive paste for the dielectric sheet and internal electrodes. The conductive paste for the dielectric sheet and internal electrode layer contains an adhesive (e.g., a known organic adhesive) and an organic solvent (e.g., a known organic adhesive).

[0202] Next, conductive paste for the internal electrodes is printed onto the dielectric sheet in a given pattern, for example, by screen printing or gravure printing, to form the internal electrode pattern. Additionally, an outer dielectric sheet without the internal electrode pattern is also manufactured.

[0203] A given number of outer layer dielectric sheets without internal electrode patterns are stacked, and dielectric sheets with internal electrode patterns corresponding to the first internal electrode layer 16a and the second internal electrode layer 16b are alternately stacked on them. Then, a given number of outer layer dielectric sheets without internal electrode patterns are stacked on them, thereby producing a laminated sheet.

[0204] Furthermore, laminated blocks are produced by pressing laminated sheets in the lamination direction using methods such as isostatic pressing.

[0205] Next, the stacked blocks are cut to the given dimensions to cut out stacked pieces. Then, a wet roller can be used to round the corners and edges of the stacked pieces.

[0206] For creating conical shapes from stacked pieces, a slicer is used when cutting the stacked blocks into small pieces. This is done by using a tapered blade to create angled end faces. Regarding the angle of the tapered shape, a blade with an angle between 10° and 80° is used, instead of a non-tapered blade with a 0° angle. The tapered shape of the blade and the angle of the end face of the cut piece may not necessarily correspond, so fine adjustments to the tapered angle are made for the target angle.

[0207] Therefore, the two side surfaces and the two end surfaces are inclined such that they widen at the ends from the first main surface side toward the second main surface side. As a result, the internal electrode pattern exposed from the two end surfaces can be identified from the direction of view from the first main surface side.

[0208] Next, the laminated sheets are fired to form the laminate 12. The firing temperature also depends on the ceramic and the material of the internal electrode layer 16, but is preferably above 900°C and below 1400°C.

[0209] Next, the fired stacked pieces are arranged on the adhesive tape with the first main surface facing upwards. For example, by taking advantage of the fact that the internal electrode layer 16 can be identified from both end faces when the first main surface is facing upwards, appearance screening is performed and orientation is arranged.

[0210] Abrasive is blasted onto the end faces at an angle perpendicular to the first main surface, followed by grinding. At this time, the outer layer near the first main surface of both end faces is easily removed. However, the outer layer near the second main surface of both end faces is difficult to remove because the exposed internal electrode layer 16 forms an umbrella shape. Furthermore, the cutting chips from the blasting tend to accumulate and are difficult to remove. Therefore, the ease of removal differs between the outer layer on the first main surface and the outer layer on the second main surface, allowing the formation of a first inclined portion 40 and a second inclined portion 42 on both end faces. Furthermore, the first inclined portion 40 and the second inclined portion 42 can also be formed on both side faces. For example, alumina abrasive, zirconia-alumina abrasive, or silicon carbide abrasive can be used.

[0211] Next, after sandblasting, the cutting chips adhering to the stacked small pieces are removed. Chip removal is achieved, for example, by blowing air.

[0212] Next, the stacked pieces with inclined portions are removed from the adhesive tape. At this time, for example, if a foam release sheet is used for the adhesive tape, multiple stacked pieces can be removed at the same time by heating.

[0213] Next, the laminate 12 having the first inclined portion 40 and the second inclined portion 42 is arranged on a worktable, and the first thin film layer 26a and the second thin film layer 26b are formed on the first main surface 12a by sputtering and vapor deposition.

[0214] Next, a first upper plating layer 34a is formed such that a first thin film layer 26a is disposed on a portion of the first main surface 12a of the laminate 12, and a first surface plating layer 36a is formed such that the first upper plating layer 34a is disposed on the laminate 12. Similarly, a second upper plating layer 34b is formed such that a second thin film layer 26b is disposed on a portion of the first main surface 12a of the laminate 12, and a second surface plating layer 36b is formed such that the second upper plating layer 34b is disposed on the laminate 12. Specifically, the upper plating layer 34 is formed as a Ni plating and the surface plating layer 36 is formed as a Sn plating by electrolytic plating or electroless plating.

[0215] Alternatively, when forming the base electrode layer 27, the base electrode layer is formed by applying the prepared conductive paste, which serves as the base electrode layer, to both ends of the laminate. The application of the conductive paste to the two ends of the laminate can be done by methods such as dipping or screen printing. The firing temperature is preferably 700°C or higher and 900°C or lower.

[0216] Furthermore, in the case of forming the direct plating layer 28, it is formed as follows.

[0217] That is, a first direct plating layer 28a and a second direct plating layer 28b are formed on the first end face 12e and the second end face 12f of the laminate 12, respectively. Then, the laminate 12 with the formed direct plating layer 28 is heat-treated to remove residual moisture in the plating film and at the interface between the laminate 12 and the direct plating layer 28. Then, the laminate 12 with the formed direct plating layer 28 is arranged on a worktable, and a thin film layer 26 is formed on the first main surface 12a by sputtering and vapor deposition. In the case where the direct plating layer 28 is formed on the thin film layer 26, the direct plating layer 28 is formed after the thin film layer 26 is formed by sputtering and vapor deposition.

[0218] Next, a first upper plating layer 34a is formed such that a first thin film layer 26a disposed on a portion of the first main surface 12a of the laminate 12 and a first direct plating layer 28a disposed on the first end surface 12e of the laminate 12 are covered. Similarly, a second upper plating layer 32b is formed such that a second thin film layer 26b disposed on a portion of the first main surface 12a of the laminate 12 and a second direct plating layer 28b disposed on the second end surface 12f of the laminate 12 are covered. The upper plating layer 34 is formed as a Ni plating by electrolytic plating or electroless plating.

[0219] Then, a first surface plating layer 36a is formed such that a first upper plating layer 34a is covered. Similarly, a second surface plating layer 36b is formed such that a second upper plating layer 34b is covered. The surface plating layer 36 is formed as a Sn plating by electrolytic plating or electroless plating.

[0220] As described above, it can be manufactured Figure 1 The first embodiment shown relates to a multilayer ceramic capacitor 10.

[0221] According to the manufacturing method of the multilayer ceramic capacitor of this embodiment, a multilayer ceramic capacitor with improved adhesion between the multilayer body 12 and the external electrode 24 can be provided.

[0222] B. Second Implementation Method

[0223] 1. Multilayer ceramic capacitor

[0224] Next, an example of a multilayer ceramic capacitor 510 according to the second embodiment of the present invention will be described.

[0225] Figure 15 This is a perspective view showing an example of a multilayer ceramic capacitor according to the second embodiment of the present invention. Figure 16 This is a perspective view showing an example of a multilayer ceramic capacitor according to the second embodiment of the present invention. Figure 17 This is a front view illustrating an example of a multilayer ceramic capacitor according to the second embodiment of the present invention.Figure 18 This is a side view illustrating an example of a multilayer ceramic capacitor according to the second embodiment of the present invention. Figure 19 yes Figure 15 A schematic cross-sectional view of the line XIX-XIX involved. Figure 20 yes Figure 15 A cross-sectional schematic diagram of the line XX-XX involved. Figure 21 yes Figure 15 A schematic cross-sectional view of line XXI-XXI involved. Figure 22 yes Figure 15 A schematic cross-sectional view of line XXII-XXII involved. Figure 23 (A) is a perspective view of the laminated ceramic capacitor according to the second embodiment of the present invention. Figure 23 (B) is from and Figure 23 (A) A three-dimensional view of the appearance of the stacked body viewed from different directions.

[0226] The multilayer ceramic capacitor 510 includes a multilayer body 512 and external electrodes 524 and 525.

[0227] (Layered structure)

[0228] The laminate 512 includes multiple dielectric layers 514 and multiple internal electrode layers 516. The laminate 512 has a first main surface 512a and a second main surface 512b facing each other in the height direction x, a first side surface 512c and a second side surface 512d facing each other in the width direction y, which is orthogonal to the height direction x, and a third side surface 512e and a fourth side surface 512f facing each other in the length direction z, which is orthogonal to both the height direction x and the width direction y. The first main surface 512a and the second main surface 512b extend along the width direction y and the length direction z, respectively. The first side surface 512c and the second side surface 512d extend along the height direction x and the length direction z, respectively. The third side surface 512e and the fourth side surface 512f extend along the height direction x and the width direction y, respectively. Therefore, the so-called height direction x is the direction that connects the first main surface 512a and the second main surface 512b, the so-called width direction y is the direction that connects the first side surface 512c and the second side surface 512d, and the so-called length direction z is the direction that connects the third side surface 512e and the fourth side surface 512f.

[0229] Furthermore, the laminate 512 preferably has rounded corners at its corners and edges. Here, the corners are the parts where three faces of the laminate 512 intersect, and the edges are the parts where two faces of the laminate 512 intersect.

[0230] Furthermore, it is preferable that the first main surface 512a and the second main surface 512b, or one of them, are flat. If they are flat, the stress experienced by the nozzle picking up the multilayer ceramic capacitor 510 can be dispersed, thus increasing the strength of the multilayer ceramic capacitor 510 during installation. Regarding the multilayer ceramic capacitor 510 according to this embodiment, the second main surface 512b is formed to be flat.

[0231] like Figures 18 to 21 As shown, the laminate 512 has the following in the height direction x connecting the first main surface 512a and the second main surface 512b: an inner layer portion 515a with multiple inner electrode layers 516 facing each other, a first main surface side outer layer portion 515b1 formed by multiple dielectric layers 514 located between the inner electrode layer 516 disposed on the side closest to the first main surface 512a and the first main surface 512a, and a second main surface side outer layer portion 515b2 formed by multiple dielectric layers 514 located between the inner electrode layer 516 disposed on the side closest to the second main surface 512b and the second main surface 512b.

[0232] The first main surface outer layer 515b1 and the second main surface outer layer 515b2 are sometimes integrated after firing and are not distinguished piece by piece, but are an assembly of multiple outer dielectric layers.

[0233] The outer layer 515b1 on the first main surface side is located on the first main surface 512a side of the laminate 512, and is an assembly of multiple external dielectric layers located between the first main surface 512a and the inner electrode layer 516 closest to the first main surface 512a.

[0234] The second main surface side outer layer 515b2 is located on the second main surface 512b side of the laminate 512, and is an assembly of multiple external dielectric layers located between the second main surface 512b and the inner electrode layer 516 closest to the second main surface 512b.

[0235] The region sandwiched between the first main surface side outer layer 515b1 and the second main surface side outer layer 515b2 is the inner layer 515a. The inner layer 515a has a first internal electrode layer 516a, a second internal electrode layer 16b and a dielectric layer 514.

[0236] The dielectric layer 514 can be formed from a dielectric material, for example. As the dielectric material, dielectric ceramics containing main components such as BaTiO3, CaTiO3, SrTiO3, or CaZrO3 can be used. Furthermore, depending on the desired characteristics of the laminate, materials containing secondary components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, and Ni compounds in smaller amounts than the main components can also be used.

[0237] As the external dielectric layer, for example, it can have multiple grains containing a perovskite-type compound with BaTiO3 as the basic structure. For example, dielectric ceramics containing main components such as BaTiO3, CaTiO3, SrTiO3, and CaZrO3 can be used. In addition, materials in which sub-components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, and Ni compounds are added to these main components can also be used. In addition, the dielectric layer 514 and the external dielectric layer can also be changed to different materials considering the required functions. For example, if the external dielectric layer is made of a soft material, the stress applied to the laminate can be buffered, and if the external dielectric layer is made of a hard material, the generation of cracks can be suppressed.

[0238] The first side surface 512c and the second side surface 512d have inclined surfaces that are inclined to widen at the ends from the first main surface 512a toward the second main surface 512b. In addition, the third side surface 512e and the fourth side surface 512f have inclined surfaces that are inclined to widen at the ends from the first main surface 512a toward the second main surface 512b. In this way, in the laminate 512, any two of the first side surface 512c, the second side surface 512d, the third side surface 512e, and the fourth side surface 512f have inclined surfaces that are inclined to widen at the ends from the first main surface 512a toward the second main surface 512b.

[0239] In other words, regarding the laminate 512, the length in the length direction z of the first main surface 512a is shorter than the length in the length direction z of the second main surface 512b. Therefore, as Figure 17 shown, the side view of the laminate 512 becomes a substantially trapezoidal shape. In addition, regarding the laminate 512, the length in the width direction y of the first main surface 512a is shorter than the length in the width direction y of the second main surface 512b. Therefore, as Figure 18 shown, the end face view of the laminate 512 becomes a substantially trapezoidal shape.

[0240] Therefore, when the length in the length direction z of the first main surface 512a of the laminate 512 is shorter than the length in the length direction z of the second main surface 512b and the length in the width direction y of the first main surface 512a of the laminate 512 is shorter than the length in the width direction y of the second main surface 512b, as Figure 23 shown, in the stacking direction of the laminate 512, when the area of the first main surface 512a is set as A and the area of the second main surface 512b is set as B, the condition A < B is satisfied.

[0241] The laminate 512 has a first inclined portion 540 and a second inclined portion 542 on the inclined surface inclined from the first main surface 512a toward the second main surface 512b.

[0242] The first inclined portion 540 has a first inclined portion 5401 formed on the first main surface 512a side on the first side surface 512c and the second side surface 512d, and a first inclined portion 5402 formed on the first main surface 512a side on the third side surface 512e and the fourth side surface 512f.

[0243] The second inclined portion 542 has a second inclined portion 5421 formed on the side of the second main surface 512b on the first side surface 512c and the second side surface 512d, and a second inclined portion 5422 formed on the side of the second main surface 512b on the third side surface 512e and the fourth side surface 512f.

[0244] The first inclined portion 5401 and the second inclined portion 5421 are formed continuously. Therefore, compared to the case where the first inclined portion 5401 and the second inclined portion 5421 are not formed continuously, the tightness of the laminate 512 with the external electrode 524 and the external electrode 525 can be improved. Similarly, the first inclined portion 5402 and the second inclined portion 5422 are also formed continuously.

[0245] In addition, the first inclined portion 5401 and the second inclined portion 5421 may be formed discontinuously, and the first inclined portion 5402 and the second inclined portion 5422 may also be formed discontinuously.

[0246] The tilt angle θ3 of the first inclined section 5401 relative to the straight line l3 parallel to the length direction z is different from the tilt angle θ4 of the second inclined section 5421 and the straight line l4 parallel to the length direction z.

[0247] Therefore, when the first main surface 512a is used as the mounting surface, the stress near the intersection of the second main surface 512b and the first side surface 512c, which are the areas where the external electrodes 524 and 525 are easily peeled off from the laminate 512, and the stress near the intersection of the second main surface 512b and the second side surface 512d, can be dispersed to the vicinity of the inclined portion, thereby achieving the effect of suppressing the peeling of the external electrodes 524 and 525.

[0248] The inclination angle θ4 of the second inclined portion 5421 and the straight line l4 parallel to the length direction z is preferably greater than the inclination angle θ3 of the first inclined portion 5401 and the straight line l3 parallel to the length direction z.

[0249] The tilt angle θ3 of the first tilted portion 5401 and the straight line l3 parallel to the length direction z is preferably 30° or more and 85° or less. If the tilt angle θ3 becomes less than 30°, it becomes difficult to form an angle difference between the tilt angle θ3 of the first tilted portion 5401 and the tilt angle θ4 of the second tilted portion 5421. On the other hand, if the angle θ3 becomes greater than 85°, it becomes difficult to obtain the effect of suppressing peeling.

[0250] The tilt angle θ4 of the second tilted portion 5421 and the straight line l4 parallel to the length direction z is preferably 5° or more greater than the tilt angle θ3 of the first tilted portion 5401 and the straight line l3 parallel to the length direction z. The second tilted portion 5421 becomes larger than the first tilted portion 5401, thereby shortening the distance between the small pieces in the length direction z, which weakens the force exerted on the electrode tip by the stress during solder shrinkage through a lever principle. If the difference between the tilt angle θ4 of the second tilted portion 5421 and the straight line parallel to the length direction z and the tilt angle θ3 of the first tilted portion 5401 and the straight line parallel to the length direction z becomes less than 5°, it is difficult to obtain the effect of suppressing peeling.

[0251] The tilt angle θ5 of the first inclined section 5402 relative to the straight line l5 parallel to the length direction z is different from the tilt angle θ6 of the second inclined section 5422 and the straight line l6 parallel to the length direction z.

[0252] The inclination angle θ6 of the second inclined portion 5422 and the straight line l6 parallel to the length direction z is preferably greater than the inclination angle θ5 of the first inclined portion 5402 and the straight line l5 parallel to the length direction z.

[0253] The tilt angle θ5 of the first tilted portion 5402 and the straight line l5 parallel to the length direction z is preferably 30° or more and 85° or less. If the tilt angle θ5 becomes less than 30°, it becomes difficult to form an angle difference between the tilt angle θ5 of the first tilted portion 5402 and the tilt angle θ6 of the second tilted portion 5422. On the other hand, if the tilt angle θ5 becomes greater than 85°, the effect of suppressing peeling cannot be obtained.

[0254] The inclination angle θ6 of the second inclined portion 5422 and the straight line l6 parallel to the length direction z is preferably 5° greater than the inclination angle θ5 of the first inclined portion 5402 and the straight line l5 parallel to the length direction z. The second inclined portion 5422 becomes larger than the first inclined portion 5402, thereby shortening the distance between the small pieces in the length direction z, which weakens the force exerted on the electrode tip by the stress during solder shrinkage through a lever principle. If the difference between the inclination angle θ6 of the second inclined portion 5422 and the straight line parallel to the length direction z and the inclination angle θ5 of the first inclined portion 5402 and the straight line parallel to the length direction z becomes less than 5°, it is difficult to obtain the effect of suppressing peeling.

[0255] Alternatively, the inner electrode layer 516 may be exposed at the first inclined portion 5401. If the inner electrode layer 516 is exposed at the first inclined portion 5401, the metal between the inner electrode layer 516 and the outer electrode 524 and the outer electrode 525 can be closely connected, thereby improving the adhesion between the laminate 512 and the outer electrode 524 and the outer electrode 525.

[0256] Alternatively, the inner electrode layer 516 may be exposed at the second inclined portion 5421. If the inner electrode layer 516 is exposed at the second inclined portion 5421, the metal between the inner electrode layer 516 and the outer electrode 524 and the outer electrode 525 will be closely connected, which can improve the adhesion between the laminate 512 and the outer electrode 524 and the outer electrode 525.

[0257] The inner electrode layer 516 may also be exposed at the first inclined portion 5402. If the inner electrode layer 516 is exposed at the first inclined portion 5402, the metal between the inner electrode layer 516 and the outer electrode 524 and the outer electrode 525 will be closely connected, which can improve the adhesion between the laminate 512 and the outer electrode 524 and the outer electrode 525.

[0258] Alternatively, the inner electrode layer 516 may be exposed at the second inclined portion 5422. If the inner electrode layer 516 is exposed at the second inclined portion 5422, the metal between the inner electrode layer 516 and the outer electrode 524 and the outer electrode 525 will be closely connected, which can improve the adhesion between the laminate 512 and the outer electrode 524 and the outer electrode 525.

[0259] The number of stacked dielectric layers 514 is not particularly limited, but including the inner layer 515a, the first main surface side outer layer 515b1, and the second main surface side outer layer 515b2, the total number of these layers is preferably 3 or more and 700 or less. Furthermore, it is preferable that the thickness of the inner layer 515a is 0.4 μm or more and 2.0 μm or less, and the thickness of each of the first main surface side outer layer 515b1 and the second main surface side outer layer 515b2 is 2.0 μm or more and 10.0 μm or less.

[0260] The dielectric layer 514 can be formed from a dielectric material, for example. The dielectric material can have multiple grains comprising a perovskite-type compound with BaTiO3 as its basic structure. Specifically, in addition to BaTiO3, dielectric ceramics containing main components such as CaTiO3, SrTiO3, or CaZrO3 can be used as the material for the dielectric layer 514. Furthermore, depending on the desired characteristics of the laminate, materials containing secondary components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, and Ni compounds in smaller amounts than the main components can also be used.

[0261] (Internal electrode layer)

[0262] like Figures 18 to 21 As shown, the internal electrode layer 516 has a plurality of first internal electrode layers 516a and a plurality of second internal electrode layers 516b. The first internal electrode layers 516a and the second internal electrode layers 516b are stacked alternately with a dielectric layer 514 in between.

[0263] The first internal electrode layer 516a is disposed on the surface of the dielectric layer 514. Furthermore, the first internal electrode layer 516a has a first opposing electrode portion 518a that is opposite to the first main surface 512a and the second main surface 512b and opposite to the second internal electrode layer 516b, and is stacked in the direction connecting the first main surface 512a and the second main surface 512b.

[0264] Furthermore, the second internal electrode layer 516b is disposed on the surface of a dielectric layer 514 that is different from the dielectric layer 514 on which the first internal electrode layer 516a is disposed. The second internal electrode layer 516b has a second opposing electrode portion 518b opposite to the first main surface 512a and the second main surface 512b, and is stacked in the direction connecting the first main surface 512a and the second main surface 512b.

[0265] like Figures 18 to 21 As shown, the first internal electrode layer 516a is led out to the first side surface 512c and the third side surface 512e of the laminate 512 via the first lead-out electrode portion 520a, and is led out to the second side surface 512d and the fourth side surface 512f of the laminate 512 via the second lead-out electrode portion 520b. Furthermore, the width of the first lead-out electrode portion 520a leading to the first side surface 512c can be approximately equal to the width leading to the third side surface 512e, and the width of the second lead-out electrode portion 520b leading to the second side surface 512d can be approximately equal to the width leading to the fourth side surface 512f.

[0266] That is, the first lead-out electrode portion 520a is led out to the third side surface 512e of the laminate 512, and the second lead-out electrode portion 520b is led out to the fourth side surface 512f of the laminate 512.

[0267] The second internal electrode layer 516b is led out to the first side surface 512c and the fourth side surface 512f of the laminate 512 via the third lead-out electrode portion 521a, and to the second side surface 512d and the third side surface 512e of the laminate 512 via the fourth lead-out electrode portion 521b. Furthermore, the width of the third lead-out electrode portion 521a leading to the first side surface 512c can be approximately equal to the width leading to the fourth side surface 512f, and the width of the fourth lead-out electrode portion 521b leading to the second side surface 512d can be approximately equal to the width leading to the third side surface 512e.

[0268] That is, the third lead-out electrode portion 521a is led out to the fourth side surface 512f side of the laminate 512, and the fourth lead-out electrode portion 521b is led out to the third side surface 512e side of the laminate 512.

[0269] Furthermore, when viewing the stacked ceramic capacitor 510 from the stacking direction, the straight line connecting the first lead electrode portion 520a and the second lead electrode portion 520b of the first internal electrode layer 516a preferably intersects the straight line connecting the third lead electrode portion 521a and the fourth lead electrode portion 521b of the second internal electrode layer 516b.

[0270] Furthermore, in the first side surface 512c, the second side surface 512d, the third side surface 512e, and the fourth side surface 512f of the laminate 512, preferably the first lead-out electrode portion 520a of the first internal electrode layer 516a and the fourth lead-out electrode portion 521b of the second internal electrode layer 516b are led out to opposite positions, and the second lead-out electrode portion 520b of the first internal electrode layer 516a and the third lead-out electrode portion 521a of the second internal electrode layer 516b are led out to opposite positions.

[0271] In addition, such as Figure 18 as well as Figure 19 As shown, the laminate 512 includes a side portion (W gap) 522a formed between one end of the first counter electrode portion 518a in the width direction y and the first side surface 512c, and between the other end of the second counter electrode portion 518b in the width direction y and the second side surface 512d.

[0272] Furthermore, such as Figure 20 as well as Figure 21 As shown, the laminate 512 includes a side portion (L gap) 522b formed between one end of the first counter electrode portion 518a in the length direction z and the third side surface 512e, and between the other end of the second counter electrode portion 518b in the length direction z and the fourth side surface 512f.

[0273] The internal electrode layer 516 may be made of a suitable conductive material, such as metals like Ni, Cu, Ag, Pd, Au, or alloys containing at least one of these metals, such as Ag-Pd alloys, but is not limited thereto.

[0274] Furthermore, by including Sn in both the first internal electrode layer 516a and the second internal electrode layer 516b, the electric field concentration at the interface between the internal electrode layer 16 and the dielectric layer 14 can be mitigated, thereby improving reliability under high-temperature loads. In this case, even if Sn is contained only in either the first internal electrode layer 16a or the second internal electrode layer 16b, it can still exert a significant effect.

[0275] In this embodiment, the first opposing electrode portion 518a of the first internal electrode layer 516a and the second opposing electrode portion 518b of the second internal electrode layer 516b are opposed to each other across the dielectric layer 514, thereby forming an electrostatic capacitor and exhibiting the characteristics of a capacitor.

[0276] To achieve a high capacitance in the capacitor, the area of ​​the internal electrode layer 516 needs to be increased. Therefore, the LW surface coverage of the internal electrode layer 516 is preferably 90% or more. The LW surface coverage is defined as the ratio obtained by subtracting the area of ​​the voids from the area of ​​the inner side of the edge of the internal electrode layer 516 when viewed from the LW surface of the laminate 512. A high LW surface coverage results in a higher capacitance, but even a lower coverage ensures stronger interlayer bonding because the dielectric layers 514 are bonded together through the voids, thus suppressing interlayer delamination.

[0277] (External electrode)

[0278] like Figures 14 to 21 As shown, external electrodes 524 and 525 are disposed in the laminate 512.

[0279] The external electrode 524 includes a thin film layer 526 and a plating layer 530 formed as a coating of the thin film layer 526.

[0280] The external electrode 525 includes a thin film layer 527 and a plating layer 531 formed as a coating of the thin film layer 527.

[0281] The external electrode 524 has a first external electrode 524a and a second external electrode 524b.

[0282] The first external electrode 524a is configured to cover the first lead-out electrode portion 520a on the first side surface 512c and the third side surface 512e, and is configured to cover a portion of the first main surface 512a. The first external electrode 524a is electrically connected to the first lead-out electrode portion 520a of the first internal electrode layer 516a.

[0283] The second external electrode 524b is configured to cover the second lead-out electrode portion 520b on the second side surface 512d and the fourth side surface 512f, and is configured to cover a portion of the first main surface 512a. The second external electrode 524b is electrically connected to the second lead-out electrode portion 520b of the first internal electrode layer 516a.

[0284] The external electrode 525 has a third external electrode 525a and a fourth external electrode 525b.

[0285] The third external electrode 525a is configured to cover the third lead-out electrode portion 521a on the first side surface 512c and the fourth side surface 512f, and is configured to cover a portion of the first main surface 512a. The third external electrode 525a is electrically connected to the third lead-out electrode portion 521a of the second internal electrode layer 516b.

[0286] The fourth external electrode 525b is configured to cover the fourth lead-out electrode portion 521b on the second side surface 512d and the third side surface 512e, and is configured to cover a portion of the first main surface 512a. The fourth external electrode 525b is electrically connected to the fourth lead-out electrode portion 521b of the second internal electrode layer 516b.

[0287] Within the laminate 512, the first opposing electrode portion 518a of the first inner electrode layer 516a and the second opposing electrode portion 518b of the second inner electrode layer 516b are opposed to each other across a dielectric layer 514, thereby forming an electrostatic capacitance. Therefore, an electrostatic capacitance can be obtained between the first external electrode 524a and the second external electrode 524b connected to the first inner electrode layer 516a and the third external electrode 525a and the fourth external electrode 525b connected to the second inner electrode layer 516b, exhibiting the characteristics of a capacitor.

[0288] (Thin film layer)

[0289] The thin film layer 526 has a first thin film layer 526a and a second thin film layer 526b.

[0290] The thin film layer 527 has a third thin film layer 527a and a fourth thin film layer 527b.

[0291] The first thin film layer 526a is configured to cover a portion of the first main surface 512a of the laminate 512 covering the first side surface 512c and the third side surface 512e, but does not cover the first side surface 512c and the third side surface 512e of the laminate 12.

[0292] The second thin film layer 526b is configured to cover a portion of the first main surface 512a of the laminate 512 covering the second side 512d side and the fourth side 512f side, but does not cover the second side 512d and the fourth side 512f.

[0293] The third thin film layer 527a is configured to cover a portion of the first main surface 512a of the laminate 512 covering the first side 512c side and the fourth side 512f side, but does not cover the first side 512c side and the fourth side 512f side.

[0294] The fourth thin film layer 527b is configured to cover a portion of the first main surface 512a of the laminate 512 covering the third side 512e side and the second side 512d side, but does not cover the third side 512e and the second side 512d.

[0295] Each of the first thin film layers 526a to the fourth thin film layers 527b is preferably a thin film layer on which metal particles are deposited, formed by sputtering, vapor deposition, or the like. Therefore, the thickness of the first thin film layers 526a to the fourth thin film layers 527b in the direction connecting the first main surface 512a and the second main surface 512b of the laminate 512 can be set to 1 μm or less, which can sufficiently reduce the dimension in the height direction x of the laminated ceramic capacitor 510, thus enabling the laminated ceramic capacitor 510 to be made shorter.

[0296] Furthermore, the method for measuring the dimension in the height direction x of the first thin film layer 526a to the fourth thin film layer 527b can be performed as follows: When the thin film layers are formed by the deposition of metal particles, the thickness can be calculated based on the given element concentration using a fluorescence X-ray apparatus and a calibration line method for that metal type. Alternatively, the thickness can be measured based on the observed image by observing the cross-section of the FIB-based component using a scanning microscope.

[0297] Furthermore, when the first thin film layer 526a to the fourth thin film layer 527b are formed by the thin film formation method, these thin film layers can be composed of metals such as Cu, Cr, Au, Pt, Ag, Sn, Ti or Ni.

[0298] The first thin film layer 526a to the fourth thin film layer 527b can be configured with their respective functions in mind. For example, considering the adhesion to the laminate 512, they can be made of NiCr or the like. For example, considering the adhesion to the laminate 12, NiCr or NiCu is preferably used as the main component. Furthermore, the first thin film layer 526a to the fourth thin film layer 527b can be multiple sheets, or it can be a two-layer structure of NiCr and NiCu.

[0299] Thin film layers 526 and 527 can also be thin film layers containing dielectric materials and metallic components, formed by methods such as screen printing, CVD, and ALD. Based on these methods, the adhesion between the laminate and the external electrode can be further improved through ceramic bonding of thin film layer 26 and the laminate 12. In this case, thin film layers 526 and 527 can also have a discontinuous shape. Discontinuity refers to a shape that is not continuous when viewed from a direction perpendicular to the length direction.

[0300] For example, when thin film layers 526 and 527 are formed from ceramic-containing materials, methods include: after cross-sectional grinding, obtaining cross-sectional photographs using a digital microscope (Keyence VHX-5000), and calculating the thickness based on these photographs. Alternatively, methods include: using a scanning microscope to examine the cross-section of the FIB-based component and determining the thickness based on the observed image.

[0301] Furthermore, by ensuring that each of the first thin film layer 526a to the fourth thin film layer 527b contains the same main component as the dielectric layer 514, the adhesion can be further improved by simultaneously firing the laminate 512 and each of the first to fourth thin film layers. In this case, Ni, Cu, etc., are preferred as the metal component, but can be appropriately changed depending on the metal component of the internal electrode layer 516.

[0302] (plating layer)

[0303] The plating layer 530 includes a first plating layer 530a and a second plating layer 530b.

[0304] The first coating layer 530a is configured to cover the first thin film layer 526a and the first side surface 512c and the third side surface 512e of the laminate 512.

[0305] The second coating layer 530b is configured to cover the second thin film layer 526b and the second side surface 512d and the fourth side surface 512f of the laminate 512.

[0306] The plating layer 531 includes a third plating layer 531a and a fourth plating layer 531b.

[0307] The third coating layer 531a is configured to cover the first side 512c and the fourth side 512f of the third thin film layer 527a and the laminate 512.

[0308] The fourth coating layer 531b is configured to cover the second side 512d and the third side 512e of the fourth thin film layer 527b and the laminate 512.

[0309] The plating layers 530 and 531 are each formed in multiple layers. That is, plating layer 530 has an upper plating layer 534 and a surface plating layer 536. Plating layer 531 has an upper plating layer 535 and a surface plating layer 537.

[0310] The upper plating layer 534 includes the first upper plating layer 534a included in the first plating layer 530a and the second upper plating layer 534b included in the second plating layer 530b. The surface plating layer 536 includes the first surface plating layer 536a included in the first plating layer 530a and the second surface plating layer 536b included in the second plating layer 530b.

[0311] The upper plating layer 535 includes the third upper plating layer 535a included in the third plating layer 531a and the fourth upper plating layer 535b included in the fourth plating layer 531b. The surface plating layer 537 includes the third surface plating layer 537a included in the third plating layer 531a and the fourth surface plating layer 537b included in the fourth plating layer 531b.

[0312] The first upper plating layer 534a of the upper plating layer 534 is configured to be covered with a first thin film layer 526a.

[0313] The second upper plating layer 534b of the upper plating layer 534 is configured to be covered by the second thin film layer 526b.

[0314] The third upper plating layer 535a of the upper plating layer 535 is configured to be covered by a third thin film layer 527a.

[0315] The fourth upper plating layer 535b of the upper plating layer 535 is configured to be covered by the fourth thin film layer 527b.

[0316] The upper plating layer 534 and the upper plating layer 535 are preferably Ni plating layers used to prevent solder corrosion.

[0317] The first surface plating layer 536a of the surface plating layer 536 is configured as the first upper plating layer 534a covered by the upper plating layer 534.

[0318] The second surface plating layer 536b of the surface plating layer 536 is configured as a second upper plating layer 534b8 covered by the upper plating layer 534.

[0319] The third surface plating layer 537a of the surface plating layer 537 is configured as the third upper plating layer 535a covered by the upper plating layer 535.

[0320] The fourth surface plating layer 537b of the surface plating layer 537 is configured as the fourth upper plating layer 535b covered by the upper plating layer 535.

[0321] The surface plating layers 536 and 537 are preferably Sn plating layers that have good adhesion to the solder used when mounting the multilayer ceramic capacitor 510. Alternatively, the surface plating layers 536 and 537 can also be Cu plating layers. In this case, the adhesion to the vias formed when embedding the multilayer ceramic capacitor 510 into the mounting substrate can be improved.

[0322] Alternatively, the plating layer 530 may consist only of the surface plating layer 536. In this case, the first surface plating layer 536a of the surface plating layer 536 is configured to be coated with a first thin film layer 526a, and the second surface plating layer 536b of the surface plating layer 536 is configured to be coated with a second thin film layer 526b. Similarly, the plating layer 531 may consist only of the surface plating layer 537. In this case, the third surface plating layer 537a of the surface plating layer 537 is configured to be coated with a third thin film layer 527a, and the fourth surface plating layer 537b of the surface plating layer 537 is configured to be coated with a fourth thin film layer 527b.

[0323] The metal content per unit volume of plating layer 530 and plating layer 531 is preferably 99% or more by volume.

[0324] The thickness of each of the plating layers 530 and 531 is preferably 1.0 μm or more and 10.0 μm or less.

[0325] The dimension of the stacked ceramic capacitor 510, which includes the stacked body 512, the external electrode 524, and the external electrode 525, in the length direction z is set as dimension L. The dimension of the stacked ceramic capacitor 510 in the height direction x is set as dimension T. The dimension of the stacked ceramic capacitor 510 in the width direction y is set as dimension W.

[0326] Preferably, the dimensions of the multilayer ceramic capacitor 510 are as follows: the length dimension L in the z-direction is 0.1 mm or more and 1.6 mm or less; the height dimension T in the x-direction is 10 μm or more and 100 μm or less; and the width dimension W in the y-direction is 0.1 mm or more and 1.6 mm or less. The dimensions of the multilayer ceramic capacitor 510 are preferably set to 7 / 10 ≤ L / W ≤ 10 / 7. This results in a roughly cubic crystalline shape for the laminate 512, thus increasing the flexibility of its installation.

[0327] Furthermore, in this embodiment, the effect of the present invention can be effectively achieved when the T dimension in the height direction x of the stacked ceramic capacitor 510 is 100 μm or less, and it becomes even more effective when it is 55 μm or less or 50 μm or less.

[0328] exist Figure 14 In the stacked ceramic capacitor 510 shown, in the external electrode 524, a first thin film layer 528a is disposed on the first main surface 512a and the second main surface 512b of the stack 512, and a second thin film layer 528b is disposed on the first main surface 512a and the second main surface 512b of the stack 512.

[0329] Furthermore, in the multilayer ceramic capacitor 510, in the external electrode 525, the third thin film layer 529a is disposed on the first main surface 512a and the second main surface 512b of the multilayer body 512, and the fourth thin film layer 529b is disposed on the first main surface 512a and the second main surface 512b of the multilayer body 512.

[0330] Furthermore, in the multilayer ceramic capacitor 510, the electrical connection between the external electrode 524 and the internal electrode layer 516 is not made through the first thin film layer 528a to the fourth thin film layer 529b respectively, but through the plating layers 530 and 531 disposed on the first side surface 512c to the fourth side surface 512f.

[0331] The shapes of the external electrodes 524 and 525 can also follow the shape of the outer shape of the laminate 512. That is, when the first protrusion 540a and the second protrusion 540b are formed, the external electrodes 524 and 525 can also be provided with protrusions and concaves in the same way as the shapes of the first side surface 512c, the second side surface 512d, the third side surface 512e and the fourth side surface 512f of the laminate 512.

[0332] Figure 14 The laminated ceramic capacitor 510 shown in the second embodiment has the same effect as the laminated ceramic capacitor 10.

[0333] Alternatively, the multilayer ceramic capacitor 510 according to the second embodiment of the present invention may also be combined with all or part of the first to fourth modifications of the multilayer ceramic capacitor 10 of the first embodiment, as well as the other modifications shown in the figures.

[0334] 2. Manufacturing method of multilayer ceramic capacitors

[0335] Hereinafter, a method for manufacturing a multilayer ceramic capacitor, which is an example of a multilayer ceramic capacitor according to the second embodiment, will be described.

[0336] First, prepare a conductive paste for the dielectric sheet and internal electrodes. The conductive paste for the dielectric sheet and internal electrode layer contains an adhesive (e.g., a known organic adhesive) and a solvent (e.g., a known organic adhesive).

[0337] Next, a conductive paste for the internal electrodes is printed onto the dielectric sheet in a given pattern, for example, by screen printing or gravure printing, to form an internal electrode pattern. Specifically, a paste containing a conductive material is applied to the dielectric sheet using the aforementioned printing method, thereby forming a conductive paste layer. The paste containing the conductive material is, for example, a paste made by adding organic binders and organic solvents to metal powder. Additionally, a dielectric sheet for an outer layer without the internal electrode pattern is also manufactured.

[0338] Thus, a dielectric sheet having an internal electrode pattern corresponding to the first internal electrode layer 516a and a dielectric sheet having an internal electrode pattern corresponding to the second internal electrode layer 516b are prepared.

[0339] More specifically, a screen printing plate for printing the first internal electrode layer 516a and a screen printing plate for printing the second internal electrode layer 516b can be prepared separately, and the internal electrode layers of the present invention can be printed using a printing press that enables the two screen printing plates to be printed separately.

[0340] A laminate is fabricated using dielectric sheets with internal electrode patterns formed on them. Specifically, a given number of outer dielectric sheets without internal electrode patterns are laminated to form the first main surface side outer layer 515b1 on the first main surface 512a side. Dielectric sheets with internal electrode patterns corresponding to the first inner electrode layer 516a and those with internal electrode patterns corresponding to the second inner electrode layer 516b are alternately laminated on top to form the inner layer 515a. Then, a given number of outer dielectric sheets without internal electrode patterns are laminated on top to form the second main surface side outer layer 515b2. This fabricates a laminate.

[0341] Furthermore, laminated blocks are produced by pressing laminated sheets in the lamination direction using methods such as isostatic pressing.

[0342] Next, the stacked blocks are cut to the given dimensions to cut out stacked pieces. Then, a wet roller can be used to round the corners and edges of the stacked pieces.

[0343] For creating conical shapes from stacked pieces, a slicer is used when cutting the stacked blocks into small pieces. This is done by using a tapered blade to create angled end faces. Regarding the angle of the tapered shape, a blade with an angle between 10° and 80° is used, instead of a non-tapered blade with a 0° angle. The tapered shape of the blade and the angle of the end face of the cut piece may not necessarily correspond, so fine adjustments to the tapered angle are made for the target angle.

[0344] Therefore, all the sides are tilted so that they widen at the ends from the first main surface side toward the second main surface side. As a result, the internal electrode pattern exposed from all the sides can be identified from the direction of view from the first main surface side.

[0345] Next, the stacked sheets are fired to produce the stack 512. The firing temperature also depends on the ceramic and the material of the internal electrodes, but is preferably above 900°C and below 1400°C.

[0346] Next, the fired stacked sheets are arranged on the adhesive tape with the first main surface facing upwards. For example, taking advantage of the fact that the internal electrode layer 516 can be seen from all sides when the first main surface is facing upwards, appearance screening is performed and orientation is arranged.

[0347] The abrasive is blasted onto the first main surface at an angle perpendicular to it, and then ground. At this time, the outer layer near the first main surface of all sides is easily removed. However, the outer layer near the second main surface of all sides is difficult to remove because the exposed internal electrode layer 516 forms an umbrella shape. Furthermore, the cutting chips from the blasting tend to accumulate and are difficult to remove. Therefore, the ease of removal differs between the outer layer on the first main surface and the outer layer on the second main surface, allowing the formation of the first inclined portion 540 and the second inclined portion 542 on all sides. For the abrasive, alumina abrasive, zirconia-alumina abrasive, silicon carbide abrasive, etc., can be used.

[0348] After sandblasting, the cutting chips adhering to the stacked small pieces are removed. The removal of cutting chips is done, for example, by blowing air.

[0349] Next, the stacked pieces with protrusions are removed from the adhesive tape. At this time, for example, if a foam release sheet is used for the adhesive tape, multiple stacked pieces can be removed at the same time by heating.

[0350] Next, the laminate 512 having the first protrusion 540a and the second protrusion 540b is arranged on a worktable, and thin film layers 526 and 527 are formed on the first main surface 512a by sputtering.

[0351] Next, the upper plating layer 534 and the upper plating layer 535, and the surface plating layer 536 and the surface plating layer 537 are formed in sequence.

[0352] That is, the first upper plating layer 534a forming the upper plating layer 534 covers a portion of the first main surface 512a of the laminate 512, and the first surface plating layer 536a forming the surface plating layer 536 covers the first upper plating layer 534a.

[0353] The second upper plating layer 534b forming the upper plating layer 534 covers a portion of the second thin film layer 526b disposed on the first main surface 512a of the laminate 512, and the second surface plating layer 536b forming the surface plating layer 536 covers the second upper plating layer 534b.

[0354] The third upper plating layer 535a forms an upper plating layer 535 such that a third thin film layer 527a is disposed on a portion of the first main surface 512a of the laminate 512, and the third surface plating layer 537a forms a surface plating layer 537 such that it covers the third upper plating layer 535a.

[0355] The fourth upper plating layer 535b forming the upper plating layer 535 covers a portion of the fourth thin film layer 527b disposed on the first main surface 512a of the laminate 512, and the fourth surface plating layer 537b forming the surface plating layer 537 covers the fourth upper plating layer 535b.

[0356] Specifically, the upper plating layer 534 and the upper plating layer 535 are formed as Ni plating by electrolytic plating or electroless plating, and the surface plating layer 536 and the surface plating layer 537 are formed as Sn plating.

[0357] As described above, it can be manufactured Figure 14 The second embodiment shown relates to a multilayer ceramic capacitor 510.

[0358] According to the manufacturing method of the multilayer ceramic capacitor of this embodiment, the thickness of the external electrode 524 and external electrode 525 formed on the first main surface 512a and the second main surface 512b in the height direction x dimension T can be reduced, thus providing a multilayer ceramic capacitor with a low height without compromising the installability during installation.

[0359] C. Third Implementation

[0360] 1. Multilayer ceramic capacitor

[0361] Next, an example of a multilayer ceramic capacitor 610 according to the third embodiment of the present invention will be described.

[0362] Figure 24 This is a perspective view showing an example of a multilayer ceramic capacitor according to the third embodiment of the present invention. Figure 25 yes Figure 24 The diagram shows a cross-sectional view at the line XXV-XXV, and is used to illustrate the construction of an example of a multilayer ceramic capacitor according to the third embodiment of the present invention. Figure 26 yes Figure 24 The diagram shows a cross-sectional view along line XXVI-XXVI, and is used to illustrate the construction of an example of a multilayer ceramic capacitor according to the third embodiment of the present invention.

[0363] The third embodiment of the present invention relates to a multilayer ceramic capacitor 610, which includes a multilayer body 12 having the same structure as the multilayer ceramic capacitor 10 of the first embodiment, and an external electrode 24. However, the multilayer ceramic capacitor 610, compared to the multilayer ceramic capacitor 10 of the first embodiment, has an altered relationship between the size of the L dimension and the W dimension, with the W dimension being larger than the L dimension.

[0364] Having a structure as described above Figure 24The stacked ceramic capacitor 610 shown has the same effect as the stacked ceramic capacitor 10 of the first embodiment.

[0365] Furthermore, the multilayer ceramic capacitor according to the third embodiment of the present invention is preferably configured such that the external electrode 24 of the multilayer ceramic capacitor 610 is the same as all or part of the first to fourth modifications of the multilayer ceramic capacitor 10 of the first embodiment, and is configured to combine all or part of them.

[0366] 2. Manufacturing method of multilayer ceramic capacitors

[0367] Hereinafter, a method for manufacturing a multilayer ceramic capacitor, which is an example of a multilayer ceramic capacitor according to the third embodiment, will be described.

[0368] The manufacturing method of the multilayer ceramic capacitor according to the third embodiment is the same as that of the multilayer ceramic capacitor according to the first embodiment. However, the dimensions of L and W are interchanged compared to the multilayer ceramic capacitor 10 of the first embodiment.

[0369] As described above, it is possible to manufacture Figure 24 The third embodiment shown relates to a multilayer ceramic capacitor 610.

[0370] According to the manufacturing method of the multilayer ceramic capacitor of this embodiment as described above, the thickness of the T dimension in the height direction x of the external electrode 24 formed on the first main surface 12a can be reduced, thus providing a multilayer ceramic capacitor with further reduced height.

[0371] Furthermore, as described above, embodiments of the present invention have been disclosed in the above description, but the present invention is not limited thereto.

[0372] That is, various changes can be made to the above-described embodiments and variations in terms of mechanism, shape, material, quantity, position or configuration without departing from the technical concept and scope of the present invention, and these changes are also included in the present invention.

[0373] <1>

[0374] A multilayer ceramic capacitor, comprising:

[0375] A laminate includes a plurality of stacked dielectric layers and a plurality of internal electrode layers stacked on the dielectric layers, and has a first main surface and a second main surface opposite to each other in the stacking direction of the plurality of dielectric layers, a first side surface and a second side surface opposite to each other in a width direction orthogonal to the stacking direction, and a first end surface and a second end surface opposite to each other in a length direction orthogonal to the stacking direction and the width direction.

[0376] A first external electrode is disposed on the first main surface and the first end surface of the laminate; and

[0377] The second external electrode is disposed on the first main surface and the second end surface of the laminate.

[0378] The first end face and the second end face have inclined surfaces that widen at the ends from the first main face toward the second main face.

[0379] The inclined surface has a first inclined portion disposed on the first main surface side and a second inclined portion disposed on the second main surface side.

[0380] The tilt angle of the first inclined portion relative to the length direction is different from the tilt angle of the second inclined portion relative to the length direction.

[0381] <2>

[0382] according to <1> The aforementioned multilayer ceramic capacitor, wherein,

[0383] The tilt angle of the first inclined portion is smaller than the tilt angle of the second inclined portion.

[0384] <3>

[0385] according to <1> or <2> The aforementioned multilayer ceramic capacitor, wherein,

[0386] The laminate comprises:

[0387] Inner layer; and

[0388] The outer layer is configured to sandwich the inner layer from the stacking direction.

[0389] The outer layer has:

[0390] The outer layer portion on the first main surface side is disposed on the first main surface side; and

[0391] The outer layer portion on the second main surface side is disposed on the second main surface side.

[0392] The first inclined portion is formed on the outer layer of the first main surface.

[0393] <4>

[0394] according to <1> to <3> The multilayer ceramic capacitor described in any one of the following statements, wherein,

[0395] The laminate comprises:

[0396] Inner layer; and

[0397] The outer layer is configured to sandwich the inner layer from the stacking direction.

[0398] The outer layer has:

[0399] The outer layer portion on the first main surface side is disposed on the first main surface side; and

[0400] The outer layer portion on the second main surface side is disposed on the second main surface side.

[0401] The second inclined portion is formed on the outer layer of the second main surface.

[0402] <5>

[0403] according to <1> to <4> The multilayer ceramic capacitor described in any one of the following statements, wherein,

[0404] The inner electrode layer is exposed in the first inclined portion.

[0405] <6>

[0406] according to <1> to <5> The multilayer ceramic capacitor described in any one of the following statements, wherein,

[0407] The inner electrode layer is exposed in the second inclined portion.

[0408] <7>

[0409] according to <1> to <6> The multilayer ceramic capacitor described in any one of the following statements, wherein,

[0410] The first inclined portion and the second inclined portion are formed continuously.

[0411] <8>

[0412] according to <1> to <7> The multilayer ceramic capacitor described in any one of the following statements, wherein,

[0413] The first external electrode has a first electrode disposed on the first main surface.

[0414] The second external electrode has a second electrode disposed on the first main surface.

[0415] <9>

[0416] A multilayer ceramic capacitor, comprising:

[0417] A laminate comprising a plurality of stacked dielectric layers, and having a first main surface and a second main surface opposite each other in the stacking direction of the plurality of dielectric layers, a first side surface and a second side surface opposite each other in a width direction orthogonal to the stacking direction, and a third side surface and a fourth side surface opposite each other in a length direction orthogonal to the stacking direction and the width direction; and

[0418] At least four external electrodes are disposed on any two or more of the six surfaces of the laminate: the first main surface and the second main surface, the first side surface and the second side surface, the third side surface and the fourth side surface.

[0419] Any two of the first, second, third, and fourth side surfaces have an inclined surface that widens at the end from the first main surface toward the second main surface.

[0420] The inclined surface has a first inclined portion disposed on the first main surface side and a second inclined portion disposed on the second main surface side.

[0421] The tilt angle of the first inclined portion relative to the length direction or the width direction is different from the tilt angle of the second inclined portion relative to the length direction or the width direction.

[0422] <10>

[0423] according to <9> The aforementioned multilayer ceramic capacitor, wherein,

[0424] The first inclined portion and the second inclined portion are formed on the first side, the second side, the third side, and the fourth side.

[0425] <11>

[0426] according to <9> or <10> The aforementioned multilayer ceramic capacitor, wherein,

[0427] The first inclined portion and the second inclined portion are formed continuously.

[0428] <12>

[0429] according to <1> to <8> The multilayer ceramic capacitor described in any one of the following statements, wherein,

[0430] The dimension in the width direction is larger than the dimension in the length direction.

[0431] Explanation of reference numerals in the attached figures

[0432] 10, 10A, 10B, 10C, 10D, 10E, 10F, 510, 610: Multilayer ceramic capacitors;

[0433] 12, 512: Layered bodies;

[0434] 12a, 512a: First principal face;

[0435] 12b, 512b: Second main face;

[0436] 12c, 512c: First side view;

[0437] 12d, 512d: Second side view;

[0438] 12e: First end face;

[0439] 12f: Second end face;

[0440] 14, 514: Dielectric layer;

[0441] 15a, 515a: Inner layer;

[0442] 15b1, 515b1: Outer layer of the first main surface;

[0443] 15b2, 515b2: Outer layer of the second main surface;

[0444] 16, 516: Internal electrode layer;

[0445] 16a, 516a: First internal electrode layer;

[0446] 16b, 516b: Second internal electrode layer;

[0447] 18a, 518a: First opposing electrode section;

[0448] 18b, 518b: Second opposing electrode section;

[0449] 20a, 520a: First lead-out electrode section;

[0450] 20b, 520b: Second lead-out electrode section;

[0451] 22a, 522a, 522b: Side part;

[0452] 22b: End;

[0453] 24, 524, 525: External electrodes;

[0454] 24a, 524a: First external electrode;

[0455] 24b, 524b: Second external electrode;

[0456] 26, 526, 527: Thin film layer;

[0457] 26a, 526a: First thin film layer;

[0458] 26b, 526b: Second thin film layer;

[0459] 28: Substrate electrode layer;

[0460] 28a: First base electrode layer;

[0461] 28b: Second base electrode layer;

[0462] 28: Direct plating layer;

[0463] 28a: First direct plating layer;

[0464] 28b: Second direct plating layer;

[0465] 30, 530, 531: Plating layer;

[0466] 30a, 530a: First plating layer;

[0467] 30b, 530b: Second plating layer;

[0468] 32: Lower plating layer;

[0469] 32a: First lower plating layer;

[0470] 32b: Second lower plating layer;

[0471] 34, 534, 535: Top plating layer;

[0472] 34a, 534a: the first upper plating layer;

[0473] 34b, 534b: Second upper plating layer;

[0474] 36, 536, 537: Surface plating;

[0475] 36a, 536a: First plating layer;

[0476] 36b, 536b: Second plating layer;

[0477] 512e: Third side;

[0478] 512f: Fourth side view;

[0479] 521a: Third lead-out electrode section;

[0480] 521b: Fourth lead-out electrode section;

[0481] 525a: Third external electrode;

[0482] 525b: Fourth external electrode;

[0483] 527a: Third thin film layer;

[0484] 527b: Fourth thin film layer;

[0485] 531a: Third plating layer;

[0486] 531b: Fourth plating layer;

[0487] 535a: Third upper plating layer;

[0488] 535b: Fourth upper plating layer;

[0489] 537a: Third surface plating layer;

[0490] 537b: Surface 4 plating.

Claims

1. A multilayer ceramic capacitor, comprising: A laminate includes a plurality of stacked dielectric layers and a plurality of internal electrode layers stacked on the dielectric layers, and has a first main surface and a second main surface opposite to each other in the stacking direction of the plurality of dielectric layers, a first side surface and a second side surface opposite to each other in a width direction orthogonal to the stacking direction, and a first end surface and a second end surface opposite to each other in a length direction orthogonal to the stacking direction and the width direction. A first external electrode is disposed on the first main surface and the first end surface of the laminate; and The second external electrode is disposed on the first main surface and the second end surface of the laminate. The first end face and the second end face have inclined surfaces that widen at the ends from the first main face toward the second main face. The inclined surface has a first inclined portion disposed on the first main surface side and a second inclined portion disposed on the second main surface side. The tilt angle of the first inclined portion relative to the length direction is different from the tilt angle of the second inclined portion relative to the length direction.

2. The multilayer ceramic capacitor according to claim 1, wherein, The tilt angle of the first inclined portion is smaller than the tilt angle of the second inclined portion.

3. The multilayer ceramic capacitor according to claim 1 or claim 2, wherein, The laminate comprises: Inner layer; and The outer layer is configured to sandwich the inner layer from the stacking direction. The outer layer has: The outer layer portion on the first main surface side is disposed on the first main surface side; and The outer layer portion on the second main surface side is disposed on the second main surface side. The first inclined portion is formed on the outer layer of the first main surface.

4. The multilayer ceramic capacitor according to any one of claims 1 to 3, wherein, The laminate comprises: Inner layer; and The outer layer is configured to sandwich the inner layer from the stacking direction. The outer layer has: The outer layer portion on the first main surface side is disposed on the first main surface side; and The outer layer portion on the second main surface side is disposed on the second main surface side. The second inclined portion is formed on the outer layer of the second main surface.

5. The multilayer ceramic capacitor according to any one of claims 1 to 4, wherein, The inner electrode layer is exposed in the first inclined portion.

6. The multilayer ceramic capacitor according to any one of claims 1 to 5, wherein, The inner electrode layer is exposed in the second inclined portion.

7. The multilayer ceramic capacitor according to any one of claims 1 to 6, wherein, The first inclined portion and the second inclined portion are formed continuously.

8. The multilayer ceramic capacitor according to any one of claims 1 to 7, wherein, The first external electrode has a first electrode disposed on the first main surface. The second external electrode has a second electrode disposed on the first main surface.

9. A multilayer ceramic capacitor as described above, comprising: A laminate comprising a plurality of stacked dielectric layers, and having a first main surface and a second main surface opposite each other in the stacking direction of the plurality of dielectric layers, a first side surface and a second side surface opposite each other in a width direction orthogonal to the stacking direction, and a third side surface and a fourth side surface opposite each other in a length direction orthogonal to the stacking direction and the width direction; and At least four external electrodes are disposed on any two or more of the six surfaces of the laminate: the first main surface and the second main surface, the first side surface and the second side surface, the third side surface and the fourth side surface. Any two of the first, second, third, and fourth side surfaces have an inclined surface that widens at the end from the first main surface toward the second main surface. The inclined surface has a first inclined portion disposed on the first main surface side and a second inclined portion disposed on the second main surface side. The tilt angle of the first inclined portion relative to the length direction or the width direction is different from the tilt angle of the second inclined portion relative to the length direction or the width direction.

10. The multilayer ceramic capacitor according to claim 9, wherein, The first inclined portion and the second inclined portion are formed on the first side, the second side, the third side, and the fourth side.

11. The multilayer ceramic capacitor according to claim 9 or claim 10, wherein, The first inclined portion and the second inclined portion are formed continuously.

12. The multilayer ceramic capacitor according to any one of claims 1 to 8, wherein, The dimension in the width direction is larger than the dimension in the length direction.

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