Ultrasonic transmitting chip integrated with impedance matching circuit, system and impedance matching method

Abstract

The invention provides an ultrasonic transmitting chip and system integrated with an impedance matching circuit and an impedance matching method, and relates to the technical field of ultrasonic transmitting chips, in particular to a programmable capacitor array composed of a plurality of capacitor branches connected in parallel, and the impedance matching circuit is integrated in the chip. Each branch comprises a high-voltage switch and a matching capacitor. On-off of each high-voltage switch is independently controlled through a digital control interface, and the equivalent shunt capacitance value accessed from the high-voltage output end of the chip can be dynamically adjusted. The internal matching circuit and the external simplified matching network work cooperatively to realize impedance matching with the ultrasonic transducer together. Partial matching functions are integrated in the chip, the number of external discrete components is remarkably reduced, the problems that in a traditional scheme, the system is large in size and high in cost, and a multi-channel system is complex in wiring are effectively solved, meanwhile, the impedance change of the transducer can be dynamically compensated, and the ultrasonic imaging quality and the system reliability are improved.

Description

Technical Field

[0001] This invention relates to the field of ultrasonic transmitting chip technology, specifically to an ultrasonic transmitting chip, system, and impedance matching method with integrated impedance matching circuit, and particularly to an ultrasonic transmitting chip suitable for ultrasonic imaging systems. Background Technology

[0002] The ultrasonic transducer is the core component of an ultrasonic imaging system, converting electrical signals into ultrasonic waves. However, the impedance characteristics of an ultrasonic transducer are typically capacitive and dynamically change with operating frequency, temperature, and environmental factors. This leads to impedance mismatch between the transducer and the ultrasonic transmitting chip with a fixed output impedance, resulting in voltage phase mismatch and current phase mismatch. This mismatch reduces acoustic wave transmission power, increases system power consumption, and degrades image quality. Therefore, in ultrasonic imaging systems, impedance matching networks for the ultrasonic transducer need to be designed, employing circuits such as L-type, T-type, or reconfigurable circuits.

[0003] Chinese patent document CN120090591A discloses a reconfigurable L-type dynamic impedance matching network, such as... Figure 1 As shown, it utilizes multiple single-pole double-throw switches to modify capacitor and inductor arrays, ultimately achieving various impedance matching networks. Chinese patent document CN117240244A discloses a T-type matching network, such as... Figure 2 As shown, dynamic impedance matching is achieved by adjusting the parameters of the impedance matching components. However, these existing technical solutions all share a common limitation: their matching networks are entirely built from external discrete components. This leads to two main problems: (1) it increases the area of ​​the system board and the cost of components, which is not conducive to the miniaturization of the equipment; (2) in multi-element systems, the wiring and consistency control of a large number of external components are extremely complex. Summary of the Invention

[0004] To address the shortcomings of existing technologies, the present invention aims to provide an ultrasonic transmitting chip, system, and impedance matching method with integrated impedance matching circuit.

[0005] An ultrasonic transmitting chip with an integrated ultrasonic transducer impedance matching circuit according to the present invention includes: The ultrasonic transmitter chip output stage is used to generate high-voltage pulse signals and output them from the high-voltage output terminal to drive an external ultrasonic transducer. An impedance matching circuit integrated inside the chip includes a programmable capacitor array, which consists of multiple parallel capacitor branches. Each capacitor branch includes a high-voltage switch and a matching capacitor connected in series. One end of all capacitor branches is connected to the high-voltage output terminal, and the other end is grounded. The ultrasonic transmitting chip is used to dynamically adjust the equivalent parallel capacitance value connected from the high voltage output terminal by independently controlling the on / off state of each high voltage switch, and works in conjunction with an external matching network to achieve impedance matching of the ultrasonic transducer.

[0006] Preferably, the ultrasonic transmitting chip output stage includes: The voltage output stage includes a power switch array consisting of high-voltage PMOS transistors and high-voltage NMOS transistors, used to output high-voltage pulses with peak voltages up to ±100V. The output homing switch is configured to clamp the high-voltage output terminal to a defined reference potential during the high-voltage pulse emission interval. An echo receiver switch is configured to be turned on during the echo reception phase in preparation for receiving low-voltage echo signals from the ultrasonic transducer. Noise suppression diodes are used to suppress noise during echo reception.

[0007] Preferably, the voltage output stage is implemented using an H-bridge or half-bridge structure.

[0008] Preferably, the matching capacitors in the programmable capacitor array are MIM capacitors or PIP capacitors.

[0009] Preferably, the matching capacitance values ​​of each branch in the programmable capacitor array are set in a binary weighted manner.

[0010] Preferably, the high-voltage switch is manufactured using the same circuit structure and process as the switch in the output stage of the ultrasonic transmitting chip.

[0011] Preferably, the ultrasonic transmitting chip further includes a digital control interface for receiving digital signals sent by an external microcontroller and converting the digital signals into control voltages to drive the gates of each high-voltage switch via a decoding circuit.

[0012] An ultrasonic transmitting system according to the present invention includes the ultrasonic transmitting chip and further includes: An external matching network is connected between the high-voltage output terminal of the ultrasonic transmitting chip and the ultrasonic transducer. Ultrasonic transducer; The ultrasonic transmitting chip works in conjunction with an external matching network through an internally integrated programmable capacitor array to achieve impedance matching with the ultrasonic transducer, and dynamically optimizes the overall load impedance by adjusting the equivalent capacitance value of the programmable capacitor array.

[0013] Preferably, the external matching network is a T-type matching network, comprising two inductors and one capacitor.

[0014] An ultrasonic transducer impedance matching method according to the present invention, applied to the ultrasonic transmitting chip, is characterized in that the method comprises: The ultrasonic transmitting chip output stage generates a high-voltage pulse signal to drive the ultrasonic transducer. By controlling the on / off state of each high-voltage switch in the programmable capacitor array, the equivalent parallel capacitance value integrated inside the chip is dynamically adjusted. Through the synergistic effect of the internal programmable capacitor array and the external matching network, dynamic matching and optimization of the ultrasonic transducer impedance are achieved.

[0015] Compared with the prior art, the present invention has the following beneficial effects: 1. This invention integrates impedance matching circuits on a chip, internalizing some impedance matching functions that were traditionally implemented by external components. This directly reduces the number of discrete components on the system circuit board, lowers the cost of the ultrasound imaging system, and at the same time, the reduction in size creates conditions for realizing more compact ultrasound equipment, especially portable or handheld devices.

[0016] 2. This invention achieves channel-level impedance matching control by integrating an independent impedance matching unit inside each transmitter channel chip. This architecture significantly alleviates the high-density wiring problem caused by external matching circuits in multi-element, multi-channel systems, and improves the feasibility of building ultrasound systems with higher channel counts and higher imaging resolution.

[0017] 3. The impedance matching circuit integrated in this invention can be flexibly controlled by external digital signals to achieve dynamic impedance matching optimization for different impedance matching networks and ultrasonic transducers of different frequencies and models, ensuring that the ultrasonic energy transmission efficiency is always kept at a high level, thereby improving the echo signal strength and signal-to-noise ratio, and ultimately improving the quality of ultrasonic images. Attached Figure Description

[0018] Other features, objects, and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings: Figure 1 This is a schematic diagram of a reconfigurable L-shaped dynamic impedance matching network in the prior art; Figure 2 This is a schematic diagram of a T-shaped matching network in the prior art; Figure 3 This is an overall circuit diagram in an embodiment of the present invention; Figure 4 This is a specific implementation circuit diagram of the anti-matching circuit in an embodiment of the present invention; Figure 5 This is a block diagram of the collaborative working system of the ultrasonic transmitting chip, external matching network, and ultrasonic transducer in an embodiment of the present invention; Figure 6 This is a schematic diagram of the equivalent circuit model of the impedance matching circuit based on the ultrasonic system in an embodiment of the present invention. Detailed Implementation

[0019] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all fall within the protection scope of the present invention.

[0020] This embodiment provides an ultrasonic transmitting chip solution integrating an ultrasonic transducer impedance matching circuit, referencing... Figure 3 Its core lies in the integrated impedance matching circuit 302 inside the chip. This impedance matching circuit 302 is designed in conjunction with the output stage 301 of the ultrasonic transmitter chip and is connected to the high voltage output port HVOUT.

[0021] 1. Specific implementation method of ultrasonic transmitter chip output stage 301 The ultrasonic transmitting chip output stage 301 integrates high-voltage output drive and echo reception control functions. Specifically, the output stage includes: The voltage output stage 3011 is implemented using a classic H-bridge or half-bridge structure, specifically comprising a power switch array consisting of high-voltage PMOS transistors (MP1, MP2) and high-voltage NMOS transistors (MN1, MN2). These power transistors are preferably manufactured using high-voltage processes to ensure they can withstand and output high-voltage pulse signals with peak voltages of ±100V.

[0022] The output zero-return switch 3012 is implemented by a high-voltage switching transistor and its timing is coordinated by digital control logic. During the transmission phase, the corresponding power transistor is turned on to bring the output voltage back to near 0V.

[0023] The echo receiver switch 3014 is also implemented by a high-voltage switching transistor and its timing is coordinated by digital control logic: during the receiving phase, the power transistors (MP1, MP2, MN1, MN2) are turned off, the receive return-to-zero switch is turned on, and the HVOUT port is clamped to a defined reference potential (such as ground or a low voltage) to prepare for receiving the echo signal.

[0024] The noise suppression diode 3013 can be a parasitic diode or a separately designed Schottky diode, used to suppress noise during reception, thereby improving the signal-to-noise ratio and overall quality of the received signal.

[0025] The timing of all the switches is coordinated by the internal digital control logic of the chip to ensure correct and orderly switching between the transmission and reception phases.

[0026] 2. Specific implementation of impedance matching circuit 302 refer to Figure 4 In this embodiment, the impedance matching circuit 302 is specifically implemented as a programmable capacitor array, which contains n (e.g., n=4, for 8 or 16) parallel capacitor branches. Each branch is connected to a high-voltage switch ( , used for , for..., for ) and a matching capacitor ( , used for , for..., for It consists of series components. The impedance matching circuit can also be replaced with an inductor or other active components depending on the system requirements.

[0027] High-voltage switch: It can adopt the same circuit structure and manufacturing process as other switches in the output stage 301 of the ultrasonic transmitter chip (such as the output zero return switch 3012) to achieve design reuse and ensure voltage withstand consistency and reliability.

[0028] Matching capacitors: Standard on-chip capacitors such as MIM (Metal-Insulator-Metal) capacitors or PIP (Polysilicon-Insulator-Polysilicon) capacitors can be used, or capacitors integrated into the chip package. The capacitance values ​​of each branch can be designed as binary weighted (e.g., C, 2C, 4C, 8C...) to achieve a wider adjustment range and finer resolution.

[0029] Control method: The chip is equipped with a digital control interface to receive digital signals from an external microcontroller. These digital signals are decoded and converted into gate voltages that drive high-voltage switches, thus independently controlling the on / off state of each branch. By programming and sending different digital signals, the total capacitance value connected to the HVOUT terminal can be changed. This enables dynamic impedance matching.

[0030] It should be noted that although this embodiment uses a programmable capacitor array as an example, the impedance matching circuit of the present invention is not limited thereto. Depending on different system requirements, this circuit can also be replaced or extended to a matching network that includes inductors or other active devices.

[0031] 3. Collaborative working mechanism and parameter design with external matching networks refer to Figure 5 and Figure 6In practical applications, the output terminal HVOUT of the ultrasonic transmitting chip 501 is connected to an external matching network 502 via circuit board traces, which then drives the ultrasonic transducer 503. The advantage of this invention is that the internal programmable capacitor array 302 can match and dynamically compensate for the overall impedance, allowing the external matching network 502 to have a simpler structure (e.g., using fewer inductors and capacitors), thereby simplifying board-level design and reducing system cost and size.

[0032] In a preferred embodiment, the external matching network 502 adopts a T-shaped structure, including an inductor... ,inductance and capacitor The theoretical mechanism of their collaborative work can be obtained through... Figure 6 The equivalent circuit model is used for analysis: The T-shaped external matching network 502 and the ultrasonic transducer (which can be equivalent to a static capacitor) and a dynamic inductor Dynamic capacitor and dynamic resistance The branches (connected in series) together present the equivalent impedance of the external network of the ultrasonic transmitting chip. . It is a frequency-dependent complex impedance. The internal programmable capacitor can be equivalent to a series switched resistor. and programmable capacitors .

[0033] When the internal programmable capacitor is working, the overall equivalent impedance from the ultrasonic transmitter chip output HVOUT to the load is... Will be and Series branch and They are jointly determined. Their mathematical relationship is as follows:

[0034] in: The imaginary unit, This is the operating frequency of the ultrasonic transducer. The equivalent resistance of the switch is not considered. equivalent impedance It can be simplified to:

[0035] This invention utilizes the adjustment of an internal programmable capacitor To change the overall impedance The imaginary part of the signal can effectively compensate for the impedance changes of the ultrasonic transducer caused by changes in operating frequency, individual differences of transducers, or fluctuations in ambient temperature, even when the external compensation network is fixed. It can always optimize the impedance matching state at or near the maximum power transmission point, thereby improving the sound wave emission efficiency, reducing system power consumption, and ultimately improving the ultrasonic imaging quality.

[0036] This invention integrates part of the impedance matching circuit of the ultrasound imaging system into the ultrasound transmitting chip, which can solve the problems of traditional ultrasound systems in terms of size, cost, wiring and scalability, and has high practical value and innovation.

[0037] Specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art can make various changes or modifications within the scope of the claims, which do not affect the essence of the present invention. Unless otherwise specified, the embodiments and features described in this application can be arbitrarily combined with each other.

Claims

1. An ultrasonic transmitting chip with integrated impedance matching circuit, characterized in that, include: The ultrasonic transmitter chip output stage is used to generate high-voltage pulse signals and output them from the high-voltage output terminal to drive an external ultrasonic transducer. An impedance matching circuit integrated inside the chip includes a programmable capacitor array, which consists of multiple parallel capacitor branches. Each capacitor branch includes a high-voltage switch and a matching capacitor connected in series. One end of all capacitor branches is connected to the high-voltage output terminal, and the other end is grounded. The ultrasonic transmitting chip is used to dynamically adjust the equivalent parallel capacitance value connected from the high voltage output terminal by independently controlling the on / off state of each high voltage switch, and works in conjunction with an external matching network to achieve impedance matching of the ultrasonic transducer.

2. The ultrasonic transmitting chip with integrated impedance matching circuit according to claim 1, characterized in that, The ultrasonic transmitting chip output stage includes: The voltage output stage includes a power switch array consisting of high-voltage PMOS transistors and high-voltage NMOS transistors, used to output high-voltage pulses with peak voltages up to ±100V. The output homing switch is configured to clamp the high-voltage output terminal to a defined reference potential during the high-voltage pulse emission interval. An echo receiver switch is configured to be turned on during the echo reception phase in preparation for receiving low-voltage echo signals from the ultrasonic transducer. Noise suppression diodes are used to suppress noise during echo reception.

3. The ultrasonic transmitting chip with integrated impedance matching circuit according to claim 2, characterized in that, The voltage output stage is implemented using an H-bridge or half-bridge structure.

4. The ultrasonic transmitting chip with integrated impedance matching circuit according to claim 1, characterized in that, The matching capacitors in the programmable capacitor array are either MIM capacitors or PIP capacitors.

5. The ultrasonic transmitting chip with integrated impedance matching circuit according to claim 1, characterized in that, The matching capacitance values ​​of each branch in the programmable capacitor array are set in a binary weighted manner.

6. The ultrasonic transmitting chip with integrated impedance matching circuit according to claim 1, characterized in that, The high-voltage switch is manufactured using the same circuit structure and process as the switch in the output stage of the ultrasonic transmitting chip.

7. The ultrasonic transmitting chip with integrated impedance matching circuit according to claim 1, characterized in that, The ultrasonic transmitting chip also includes a digital control interface for receiving digital signals sent by an external microcontroller and converting the digital signals into control voltages that drive the gates of each high-voltage switch via a decoding circuit.

8. An ultrasonic transmission system, characterized in that, The ultrasonic transmitting chip, comprising the integrated impedance matching circuit as described in any one of claims 1 to 7, further comprises: An external matching network is connected between the high-voltage output terminal of the ultrasonic transmitting chip and the ultrasonic transducer. Ultrasonic transducer; The ultrasonic transmitting chip works in conjunction with an external matching network through an internally integrated programmable capacitor array to achieve impedance matching with the ultrasonic transducer, and dynamically optimizes the overall load impedance by adjusting the equivalent capacitance value of the programmable capacitor array.

9. The ultrasonic transmitting system according to claim 8, characterized in that, The external matching network is a T-type matching network, which includes two inductors and one capacitor.

10. An ultrasonic transducer impedance matching method, applied to an ultrasonic transmitting chip with an integrated impedance matching circuit as described in any one of claims 1 to 7, characterized in that, The method includes: The ultrasonic transmitting chip output stage generates a high-voltage pulse signal to drive the ultrasonic transducer. By controlling the on / off state of each high-voltage switch in the programmable capacitor array, the equivalent parallel capacitance value integrated inside the chip is dynamically adjusted. Through the synergistic effect of the internal programmable capacitor array and the external matching network, dynamic matching and optimization of the ultrasonic transducer impedance are achieved.

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