Circuit and display panel

Abstract

The invention relates to a circuit and a display panel. The circuit comprises a source electrode driving circuit, wherein the source electrode driving circuit comprises a switching module and a driving circuit; the time sequence controller is used for sending a first control signal to the switching module in a voltage detection period, and the first control signal is used for representing that sensing lines of multiple columns of sub-pixel units of the display panel are switched to be connected with the driving circuit based on a preset detection sequence; the time schedule controller is used for sending a second control signal to the driving circuit in a voltage detection period, the second control signal is used for representing detection and sending a sensing signal of a plurality of columns of sub-pixel units to the time schedule controller, and the sensing signal is a voltage signal of a source electrode of a driving transistor of the sub-pixel units; and the driving transistors are used for representing state switching of the driving transistors of the sub-pixel units. The circuit solves the technical problem that in the prior art, different columns of sub-pixel units in a display panel need different driving circuits to detect sensing signals, and consequently the driving cost is too high.

Description

Technical Field

[0001] This application relates to the field of organic light-emitting display technology, and more particularly to a circuit and a display panel. Background Technology

[0002] Currently, Organic Light Emitting Display (OLED) is one of the hot topics in the field of flat panel display research as a new generation of display panels. Compared with traditional Liquid Crystal Display (LCD) panels, OLED has advantages such as low energy consumption, low production cost, self-illumination, wide viewing angle and fast response speed.

[0003] In large-size organic light-emitting display panels, the 3T1C architecture of the smallest pixel unit (sub-pixel unit) is as follows: Figure 1 As shown, T1 is a data transistor responsible for charging and discharging the storage capacitor C; T2 is a driving transistor responsible for controlling the current reaching the organic light-emitting diode (OLED), thereby controlling the brightness of the OLED; and T3 is a sensing transistor, which uses a driving circuit (…). Figure 1 The circuit in the dashed box is the driving circuit. It detects the sensing signal of the sub-pixel unit (the sensing signal is the voltage signal of the source of the driving transistor of the sub-pixel unit, and can represent the state switching of the driving transistor). Based on the sensing signal of the sub-pixel unit, it determines the threshold voltage of the driving transistor T2 of the sub-pixel unit, and then determines the magnitude of the compensation data signal. The compensation data signal is applied to the data line DL to complete the threshold voltage compensation of the driving transistor T2.

[0004] like Figure 2 As shown, GL1, GL2, GL3, GL4, etc. represent scan lines. Among them, scan lines GL1 and GL3 are used to connect to the gate of the data transistor, and scan lines GL2 and GL4 are used to connect to the gate of the data transistor. DL1 to DL9 represent data lines, and SL1 to SL9 represent sensing lines. For a display panel, each sub-pixel unit has a driving transistor, and each driving transistor requires a sensing transistor. Thus, the data transistor of each column of sub-pixel units is connected to a sensing line, and each sensing line is connected to a driving circuit in the source driving circuit to detect the sensing signal of the detection sub-pixel unit of that column of sub-pixel units. This results in too many driving circuits for the display panel, and the more driving circuits there are, the higher the driving cost will be. Summary of the Invention

[0005] This application provides a circuit, a display panel, and a display device to solve the technical problem in the prior art where different driving circuits are required to detect sensing signals for different columns of sub-pixel units in a display panel, resulting in excessively high driving costs.

[0006] In a first aspect, this application provides a circuit applied to a display panel, the circuit comprising: a source driving circuit, the source driving circuit comprising: a switching module and a driving circuit; and a timing controller, the timing controller being configured to send a first control signal to the switching module during a voltage detection period, the first control signal being configured to indicate that the sensing lines of multiple columns of sub-pixel units of the display panel are connected to the driving circuit based on a predetermined detection sequence, the timing controller being configured to send a second control signal to the driving circuit during the voltage detection period, the second control signal being configured to indicate that sensing signals of multiple columns of the sub-pixel units are detected and sent to the timing controller, the sensing signals being voltage signals of the sources of the driving transistors of the sub-pixel units, and being configured to indicate the state switching of the driving transistors of the sub-pixel units.

[0007] Optionally, the predetermined detection order includes: the order of color channels, the order of row numbers from smallest to largest, and a preset numbering order. The preset numbering order consists of multiple numbers in a numbering sequence arranged from smallest to largest, and the absolute value of the difference between adjacent numbers in the preset numbering order is greater than 1. The numbering sequence is an arithmetic sequence with the first term being 1, the last term being N, and a common difference of 1. Here, N represents the Nth sub-pixel unit in the same color channel of a row of sub-pixel units. The circuit further includes a non-volatile memory. The timing controller is used to: during the voltage detection period, store the sensing signals of all measured sub-pixel units in the non-volatile memory. The measured sub-pixel units are the sub-images whose numbers are located in the preset numbering order. The method involves: 1) Obtaining the sensing signals of all measured sub-pixel units from the non-volatile memory during the voltage detection period; 2) Determining the threshold voltage of the driving transistor of each measured sub-pixel unit based on the sensing signals of each measured sub-pixel unit and the initial data signal on the data line of each measured sub-pixel unit; 3) Calculating the threshold voltage of the driving transistor of all unmeasured sub-pixel units using a linear interpolation algorithm based on the threshold voltages of the driving transistors of all measured sub-pixel units during the voltage detection period, wherein the unmeasured sub-pixel units are those whose numbers are not in the preset numbering order; and 4) Storing the threshold voltages of the driving transistors of all sub-pixel units in the non-volatile memory during the voltage detection period.

[0008] Optionally, the circuit further includes: a volatile memory; the timing controller is configured to: during a voltage compensation period, acquire and store the threshold voltages of the driving transistors of all the sub-pixel units in the non-volatile memory to the volatile memory; during the voltage compensation period, acquire the threshold voltages of the driving transistors of each sub-pixel unit from the volatile memory respectively, and determine the compensation data signal corresponding to each sub-pixel unit based on the threshold voltages of the driving transistors of each sub-pixel unit and the initial data signal on the data line of the sub-pixel unit respectively, wherein the amplitude of the compensation data signal corresponding to the sub-pixel unit is greater than the threshold voltage of the driving transistor of the sub-pixel unit, and the compensation data signal corresponds one-to-one with the sub-pixel unit.

[0009] Optionally, the timing controller is used to send a third control signal to the driving circuit during the voltage detection period, the third control signal being used to characterize the source of the driving transistor of the multiple rows of sub-pixel units of the display panel that outputs the first reference voltage value.

[0010] Optionally, the driving circuit includes: a first switch, a second switch, a voltage follower, a first voltage source, and an analog-to-digital converter module. The first switch has a stationary terminal and a moving terminal, and the stationary terminal of the first switch is connected to the switching module. The second switch has a stationary terminal and a moving terminal, and the stationary terminal of the second switch is electrically connected to the input terminal of the voltage follower. The first voltage source is used to provide the first reference voltage value. The output terminal of the analog-to-digital converter module is connected to the timing controller. The voltage detection period includes multiple consecutive sub-voltage detection periods, one sub-voltage detection period corresponding to one sub-pixel unit. The timing controller is used to send a first control signal to the switching module during the voltage detection period, including: sending a first sub-control signal to the switching module. The first sub-control signal indicates that the first terminal of the sensing transistor of the sub-pixel unit corresponding to the sub-voltage detection period is connected to the stationary terminal of the first switch, and the second terminal of the sensing transistor of the sub-pixel unit is connected to the source of the driving transistor of the sub-pixel unit. The timing controller is used to... The timing controller sends a third control signal to the driving circuit during the voltage detection period, including: sending a second sub-control signal to the first switch, the second sub-control signal indicating that the moving end of the first switch is connected to the output end of the voltage follower during the initial period of the sub-voltage detection period; sending a third sub-control signal to the second switch, the third sub-control signal indicating that the moving end of the second switch is connected to the first voltage source during the sub-voltage detection period; the timing controller sends a second control signal to the driving circuit during the voltage detection period, including: sending a fourth sub-control signal to the first switch, the fourth sub-control signal indicating that the moving end of the first switch is connected to the input end of the analog-to-digital conversion module during the detection period of the sub-voltage detection period, the detection period including all times in the sub-voltage detection period except the initial period; sending a fifth sub-control signal to the analog-to-digital conversion module, the fifth sub-control signal indicating that the sensing signal of the sub-pixel unit corresponding to the sub-voltage detection period is detected and sent to the timing controller.

[0011] Optionally, the timing controller is configured to: send a fourth control signal to the switching module during a voltage compensation period, the fourth control signal indicating that the sensing lines of multiple columns of the sub-pixel units of the display panel are connected to the driving circuit based on a predetermined compensation order, the predetermined compensation order including: the order of color channels, the order of row numbers, and the order of column numbers; and send a fifth control signal to the driving circuit during the voltage compensation period, the fifth control signal indicating that a second reference voltage value is output to the source of the driving transistor of the multiple columns of the sub-pixel units of the display panel.

[0012] Optionally, the driving circuit includes: a first switch, a second switch, a voltage follower, and a second voltage source. The first switch has a stationary terminal and a moving terminal, and the stationary terminal of the first switch is used to connect to the switching module. The second switch has a stationary terminal and a moving terminal, and the stationary terminal of the second switch is used to electrically connect to the input terminal of the voltage follower. The second voltage source is used to provide the second reference voltage value. The voltage compensation period includes multiple consecutive sub-voltage compensation periods, one sub-voltage compensation period corresponding to one sub-pixel unit. The timing controller is used to send a fourth control signal to the switching module during the voltage compensation period, including: sending a sixth sub-control signal to the switching module, the sixth sub-control signal being used for... The timing controller is configured to connect the first terminal of the sensing transistor of the sub-pixel unit corresponding to the sub-voltage compensation period to the stationary terminal of the first switch, and the second terminal of the sensing transistor of the sub-pixel unit to the source of the driving transistor of the sub-pixel unit; the timing controller is configured to send a fifth control signal to the driving circuit during the voltage compensation period, including: sending a seventh sub-control signal to the first switch, the seventh sub-control signal being configured to connect the moving terminal of the first switch to the output terminal of the voltage follower during the sub-voltage compensation period; and sending an eighth sub-control signal to the second switch, the eighth sub-control signal being configured to connect the moving terminal of the second switch to the second voltage source during the sub-voltage compensation period.

[0013] Optionally, the cathodes of the light-emitting diodes of all the sub-pixel units are connected to the same negative power supply terminal. The timing controller is used to: send a sixth control signal to the negative power supply terminal at the initial moment of the voltage detection period. The sixth control signal is used to characterize the output of a first predetermined voltage value. The difference between the first reference voltage value and the first predetermined voltage value is less than the threshold voltage of the organic light-emitting diodes of all the sub-pixel units.

[0014] Secondly, this application provides a display panel, the display panel comprising: a plurality of scan lines, one scan line corresponding to a row of sub-pixel units, one scan line being connected to the gate of a data transistor of the corresponding row of sub-pixel units, and being connected to the gate of a sensing transistor of the corresponding row of sub-pixel units; and any of the circuits described above.

[0015] Thirdly, this application provides a display device, which includes the aforementioned display panel.

[0016] In this embodiment, a switching module is provided in the source driving circuit. The switching module can switch the connection between the sensing lines of multiple columns of sub-pixel units and the driving circuit, thereby realizing the use of the same driving circuit to detect the sensing signals of multiple columns of sub-pixel units, thus reducing the driving cost and solving the problem of excessively high driving cost caused by different driving circuits for different columns of sub-pixel units in the display panel in the prior art. Attached Figure Description

[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0020] Figure 1 A schematic diagram of a prior art circuit provided for an embodiment of this application; Figure 2 A schematic diagram of a pixel circuit of a prior art display panel provided for an embodiment of this application; Figure 3 A control timing diagram of a prior art circuit provided for embodiments of this application; Figure 4 A schematic diagram of a circuit provided for an embodiment of this application; Figure 5(a) is a schematic diagram of a circuit provided in the initial period of voltage detection according to an embodiment of this application; Figure 5(b) is a control timing diagram of a circuit during the initial period of voltage detection provided in an embodiment of this application; Figure 6(a) is a schematic diagram of a circuit during the detection period of a voltage detection period provided in an embodiment of this application; Figure 6(b) is a control timing diagram of a circuit during the detection period of a voltage detection period provided in an embodiment of this application; Figure 7(a) is a schematic diagram of a circuit during the voltage compensation period provided in an embodiment of this application; Figure 7(b) is a control timing diagram of a circuit during the voltage compensation period provided in an embodiment of this application; Figure 8(a) is a schematic diagram of a circuit during the display period provided in an embodiment of this application; Figure 8(b) is a control timing diagram of a circuit during the display compensation period provided in an embodiment of this application; Among them, 100 is the display panel; 101 is the pixel unit; 200 is the source driving circuit; 201 is the switching module; 202 is the driving circuit; 300 is the timing controller; 400 is the non-volatile memory; and 500 is the volatile memory. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0022] The following disclosure provides numerous different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of the invention. Furthermore, reference numerals and / or letters may be repeated in different examples. Such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed.

[0023] In the existing technology, for a display panel, each sub-pixel unit has a driving transistor, and each driving transistor requires a sensing transistor. Thus, the data transistor of each column of sub-pixel units is connected to a sensing line, and each sensing line is connected to a driving circuit in the source driving circuit to detect the sensing signal of the detection sub-pixel unit of that column of sub-pixel units. This results in too many driving circuits for the display panel, and the more driving circuits there are, the higher the driving cost will be.

[0024] Furthermore, in existing technologies, such as Figure 1 and Figure 3 As shown, where, Figure 3 The timing signals from top to bottom sequentially represent the voltage changes of the scan line GL1, scan line GL2, gate G of driving transistor T2, and source S of driving transistor T2 in the sub-pixel unit. The voltage detection period of the sub-pixel unit requires at least 4 time periods.

[0025] During period t1: Both scan lines GL1 and GL2 output high-level signals, data transistor T1 and sensing transistor T3 are both turned on, first switch K1 is turned on, second switch K2 is turned off, and data line DL charges the gate G of driving transistor T2 with a high voltage V. g The power supply VREF charges the source S of the driving transistor T2 with the reference voltage Vpre.

[0026] During period t2: Both scan lines GL1 and GL2 output high-level signals, data transistor T1 and sensing transistor T3 are turned on, first switch K1 is turned on, second switch K2 is turned on, data line DL continuously charges the gate G of driving transistor T2 with a high voltage Vg, sensing line SL is floating, driving transistor T2 is turned on, and the positive power supply terminal ELVDD of the sub-pixel unit causes the voltage of the source S of driving transistor T2 to rise.

[0027] During period t3: Both scan lines GL1 and GL2 output high-level signals, both data transistor T1 and sensing transistor T3 are turned on, the first switch K1 is turned on, the second switch K2 is turned on, and the analog-to-digital converter (ADC) detects that the voltage at the source S of the driving transistor T2 is Vs.

[0028] t4 time period: like Then, the voltage of the gate G of the driving transistor T2 needs to be reduced from Vg to Vg' via the data line DL, until... (If driving transistor T2 is turned off), then the threshold voltage of driving transistor T2 in the sub-pixel unit is: .

[0029] As can be seen from the above, in the prior art, when performing voltage detection on sub-pixel units, each sub-pixel unit needs to complete several stages from t1 to t4, which results in a large amount of time being spent on voltage detection. In addition, each sub-pixel unit has a set of data that needs to be stored, requiring a large amount of storage devices, which increases the cost.

[0030] To address the technical problem of high driving costs caused by the need for different driving circuits to detect sensing signals for different columns of sub-pixel units in the display panel in the prior art, this application provides a circuit, a display panel, and a display device that can use the same driving circuit to detect sensing signals of multiple columns of sub-pixel units, thereby reducing driving costs.

[0031] Figure 1 A circuit provided in this application embodiment is applied to a display panel 100, such as... Figure 2 and Figure 4As shown, the display panel 100 is composed of multiple rows of sub-pixel units 101. Each sub-pixel unit 101 consists of a data transistor T1, a storage capacitor C, a driving transistor T2, a sensing transistor T3, and an organic light-emitting diode (R, G, B). Three sub-pixel units constitute one pixel unit, as shown below. Figure 4 As shown, the circuit described above includes: Source drive circuit 200, which includes: switching module 201 and drive circuit 202; Specifically, such as Figure 4 As shown, the switching module 201 is connected to the sensing line SL of the multi-column sub-pixel unit 101 and to the driving circuit 202. The switching module 201 can be a device with line switching capability, such as a multiplexer (MUX).

[0032] A timing controller 300 is configured to send a first control signal to the switching module 201 during a voltage detection period. The first control signal indicates that the sensing lines of multiple columns of sub-pixel units 101 of the display panel 100 are connected to the driving circuit 202 based on a predetermined detection sequence. The timing controller 300 is also configured to send a second control signal to the driving circuit 202 during the voltage detection period. The second control signal indicates that sensing signals of multiple columns of sub-pixel units 101 are detected and sent to the timing controller 300. The sensing signals are voltage signals of the source S of the driving transistor T2 of the sub-pixel unit 101 and are used to indicate the state switching of the driving transistor T2 of the sub-pixel unit 101.

[0033] Through the above embodiments, a switching module is set in the source driving circuit. The switching module can switch the connection between the sensing lines of multiple columns of sub-pixel units and the driving circuit, realizing the use of the same driving circuit to detect the sensing signals of multiple columns of sub-pixel units, thereby reducing the driving cost and solving the problem of excessively high driving cost caused by different driving circuits for different columns of sub-pixel units in the display panel in the prior art.

[0034] To reduce the voltage detection time of sub-pixel units, in an optional embodiment, the predetermined detection order includes: the order of color channels, the order of row numbers from smallest to largest, and a preset numbering order. The preset numbering order consists of multiple numbers in a numbering sequence arranged from smallest to largest, and the absolute value of the difference between adjacent numbers in the preset numbering order is greater than 1. The numbering sequence is an arithmetic sequence with the first term being 1, the last term being N, and a common difference of 1, where N represents the Nth sub-pixel unit in the same color channel within a row of sub-pixel units. Figure 4 As shown, the circuit also includes: 400 non-volatile memory; Specifically, the non-volatile memory can be eMMC (Embedded Multi Media Card).

[0035] The timing controller 300 described above is used for: During the voltage detection period, the sensing signals of all measured sub-pixel units are stored in the non-volatile memory 400. The measured sub-pixel units are the sub-pixel units 101 whose numbers are located in the preset numbering order. During the voltage detection period, the sensing signals of all the measured sub-pixel units are obtained from the non-volatile memory 400, and the threshold voltage of the driving transistor T2 of each measured sub-pixel unit is determined based on the sensing signals of each measured sub-pixel unit and the initial data signal on the data line DL of the measured sub-pixel unit. During the voltage detection period, based on the threshold voltage of the driving transistor T2 of all the measured sub-pixel units, a linear interpolation algorithm is used to calculate the threshold voltage of the driving transistor T2 of all unmeasured sub-pixel units. The unmeasured sub-pixel units are the sub-pixel units 101 whose numbers are not located in the preset numbering order. During the voltage detection period, the threshold voltage of the driving transistor T2 of all the sub-pixel units is stored in the non-volatile memory 400.

[0036] Specifically, non-volatile memory is used for power-down storage. During the voltage compensation period, the display panel needs to be powered on again. Therefore, the threshold voltage of the driving transistors of all sub-pixel units needs to be stored in non-volatile memory.

[0037] Specifically, regarding the order of color channels in the predetermined detection sequence, for example, ... Figure 4 As shown, the detection sequence first detects the sub-pixel unit 101 of the red channel (organic light-emitting diode R), then the sub-pixel unit 101 of the green channel (organic light-emitting diode G), and finally the sub-pixel unit 101 of the blue channel (organic light-emitting diode B), or other detection sequences. For a predetermined detection sequence, the sub-pixel units in the first row, second row, third row, and so on, are detected sequentially from smallest to largest row number, up to the last row. For a preset numbering order, for example... Figure 4As shown, for each row, the detection order can be as follows: the first red channel sub-pixel unit, the third red channel sub-pixel unit, the fifth red channel sub-pixel unit, ..., or the second red channel sub-pixel unit, the fourth red channel sub-pixel unit, the sixth red channel sub-pixel unit, ..., or the first red channel sub-pixel unit, the fourth red channel sub-pixel unit, the seventh red channel sub-pixel unit, or other detection orders.

[0038] Specifically, for a predetermined detection order, for example, if each row has 5 red channel sub-pixel units, during the voltage detection period, the red channel sub-pixel units are detected first, followed by the detection of the first row, second row, third row, fourth row, and fifth row sub-pixel units in sequence. For each row, the first red channel sub-pixel unit, the third red channel sub-pixel unit, and the fifth red channel sub-pixel unit are detected in sequence. For each row, the threshold voltage of the first red channel sub-pixel unit is... The threshold voltage of the third red channel sub-pixel unit is Based on linear interpolation algorithm The threshold voltage of the second red channel sub-pixel unit was calculated to be: The threshold voltages for the remaining sub-pixel units are calculated similarly.

[0039] In this embodiment, for multiple columns of sub-pixel units, only the threshold voltage of the driving transistors of some columns of sub-pixel units is detected, and the threshold voltage of the driving transistors of the remaining sub-pixel units is derived from the threshold voltage of the driving transistors of the detected sub-pixel units. This reduces the voltage detection time of the sub-pixel units, and only some columns of sub-pixel units need to store data, thus reducing storage costs.

[0040] To reduce the voltage compensation time of sub-pixel units, in one optional embodiment, such as Figure 4 As shown, the circuit also includes: 500 volatile memory; Specifically, the volatile memory can be DDR (Double Data Rate Synchronous Dynamic Random-Access Memory).

[0041] The timing controller 300 described above is used for: During the voltage compensation period, the threshold voltage of the driving transistor T2 of all the sub-pixel units 101 in the non-volatile memory 500 is acquired and stored in the volatile memory 500. During the voltage compensation period, the threshold voltage of the driving transistor T2 of each sub-pixel unit 101 is obtained from the volatile memory 500. Based on the threshold voltage of the driving transistor T2 of each sub-pixel unit 101 and the initial data signal on the data line DL of the sub-pixel unit 101, the compensation data signal corresponding to each sub-pixel unit 101 is determined. The amplitude of the compensation data signal corresponding to the sub-pixel unit 101 is greater than the threshold voltage of the driving transistor T2 of the sub-pixel unit 101. The compensation data signal corresponds one-to-one with the sub-pixel unit 101.

[0042] In this embodiment, during the voltage detection period, the threshold voltages of the driving transistors of all sub-pixel units are stored in non-volatile memory. Since the timing controller accesses volatile memory quickly, during the voltage compensation period, after the display panel is powered on, the threshold voltages of the driving transistors of all sub-pixel units are stored in volatile memory. The timing controller obtains the threshold voltages of the driving transistors of the sub-pixel units from the volatile memory to calculate the compensation data signal of the sub-pixel units, thereby accelerating the calculation speed of the compensation data signal of the sub-pixel units and reducing the voltage compensation time of the sub-pixel units.

[0043] In order to provide a first reference voltage value to the source of the driving transistor of the sub-pixel unit during the voltage detection period, in an optional embodiment, such as Figure 4 As shown, the timing controller 300 is used to send a third control signal to the driving circuit 202 during the voltage detection period. The third control signal is used to characterize the source S of the driving transistor T2 of the multiple rows of sub-pixel units 101 of the display panel 100 that outputs the first reference voltage value.

[0044] In this embodiment, as Figure 4 As shown, during the voltage detection period, the driving circuit needs to provide a first reference voltage value to the source S of the driving transistor T2 of the sub-pixel unit 101.

[0045] In order to detect the threshold voltage of the driving transistor of the sub-pixel unit, in an optional embodiment, such as Figure 4 As shown, the driving circuit 202 includes: The system comprises a first switch K1, a second switch K2, a voltage follower VF, a first voltage source VREF1, and an analog-to-digital converter (ADC). The first switch K1 has a stationary terminal and a moving terminal, and the stationary terminal of the first switch K1 is connected to the switching module 201. The second switch K2 has a stationary terminal and a moving terminal, and the stationary terminal of the second switch K2 is electrically connected to the input terminal of the voltage follower VF. The first voltage source VREF1 is used to provide the first reference voltage value. The output terminal of the analog-to-digital converter (ADC) is connected to the timing controller 300. The voltage detection period includes multiple consecutive sub-voltage detection periods, one of which corresponds to one sub-pixel unit 101. The timing controller 300 is used to send a first control signal to the switching module 201 during the voltage detection period, including: Send a first sub-control signal to the switching module 201. The first sub-control signal is used to indicate that the first terminal of the sensing transistor T3 of the sub-pixel unit 101 corresponding to the sub-voltage detection period is connected to the stationary terminal of the first switch K1, and the second terminal of the sensing transistor T3 of the sub-pixel unit 101 is connected to the source S of the driving transistor T2 of the sub-pixel unit 101. Specifically, for a sub-pixel unit, the first and second ends of the sensing transistor are the source and drain of the sensing transistor, respectively, or the drain and source of the sensing transistor, respectively.

[0046] The timing controller 300 is used to send a third control signal to the drive circuit 202 during the voltage detection period, including: Send a second sub-control signal to the first switch K1. The second sub-control signal is used to indicate that during the initial period of the sub-voltage detection period, the moving end of the first switch K1 is connected to the output end of the voltage follower VF. A third sub-control signal is sent to the second switch K2. The third sub-control signal is used to indicate that the moving end of the second switch K2 is connected to the first voltage source VREF1 during the sub-voltage detection period. The timing controller 300 is used to send a second control signal to the drive circuit 202 during the voltage detection period, including: A fourth sub-control signal is sent to the first switch K1. The fourth sub-control signal is used to indicate that during the detection period of the sub-voltage detection period, the moving end of the first switch K1 is connected to the input end of the analog-to-digital converter module ADC. The detection period includes all times in the sub-voltage detection period except for the initial period. A fifth sub-control signal is sent to the aforementioned analog-to-digital converter (ADC). The fifth sub-control signal is used to characterize the detection and sending of the sensing signal of the aforementioned sub-pixel unit 101 corresponding to the aforementioned sub-voltage detection period to the aforementioned timing controller 300.

[0047] In this embodiment, the sub-voltage detection period is used to detect the sensing signal of the corresponding sub-pixel unit, such as... Figure 4 As shown in Figures 5(a) and 5(b), the timing signals from top to bottom in Figure 5(b) represent the voltage changes of the scan line GL of the sub-pixel unit 101, the gate G of the driving transistor T2, and the source S of the driving transistor T2. During the sub-voltage detection period, in the initial period, the second switch K2 is connected to the first voltage source VREF1, and the first switch K1 is connected to the output terminal of the voltage follower VF. The first voltage source VREF1 charges the source S (anode of the organic light-emitting diode OLED) of the driving transistor T2 to the first reference voltage value V. pre1 The timing controller 300 controls the gate driving circuit of the display panel 100 to drive the scan line GL of the sub-pixel unit 101 to output a high-level signal. The data transistor T1 and the sensing transistor T3 are turned on. The timing controller 300 controls the source driving circuit 200 (through the digital-to-analog converter module DAC in the source driving circuit) to drive the data line DL of the sub-pixel unit 101 to output the initial data signal V0. The gate G of the driving transistor T2 is charged to V0 through the storage capacitor C. At this time, V0 and V pre1 If the difference is less than the threshold voltage of driving transistor T2, driving transistor T2 is turned off. In Figure 5(b), "X" indicates that driving transistor T2 is off. The dashed line with arrows indicates the direction of current flow. During the detection period, such as... Figure 4 As shown in Figures 6(a) and 6(b), the timing signals from top to bottom in Figure 6(b) represent the voltage changes of the scan line GL of the sub-pixel unit 101, the gate G of the driving transistor T2, and the source S of the driving transistor T2. The second switch K2 is connected to the first voltage source VREF1, and the first switch K1 is connected to the input terminal of the analog-to-digital converter (ADC). The timing controller 300 controls the gate driving circuit of the display panel 100 to drive the scan line GL of the sub-pixel unit 101 to scan every frame. When the scan line GL outputs a high-level signal, the data transistor T1 and the sensing transistor T3 are turned on. The timing controller 300 controls the source driving circuit (through the digital-to-analog converter (DAC) in the source driving circuit) to drive the data line DL of the sub-pixel unit 101 to gradually increase the voltage to the gate G of the driving transistor T2 from V0 to V1 through the storage capacitor C. Once it exceeds a certain limit, the driving transistor T2 is turned on, and the positive power supply terminal ELVDD of the sub-pixel unit charges the source S of the driving transistor T2. The voltage of the source S of the driving transistor T2 increases from V0 to V1. pre1When the voltage is increased to V', the analog-to-digital converter (ADC) detects the voltage change at the source S of the driving transistor T2 (i.e., the sensing signal, indicating that the driving transistor T2 has switched from the off state to the on state). The ADC converts the analog signal into a digital signal and sends it to the timing controller 300. The timing controller 300 stores the sensing signal in a non-volatile memory. The dashed line with arrows in Figure 6(b) indicates the direction of current flow.

[0048] To compensate for the threshold voltage of the sub-pixel unit driving transistor, in one optional embodiment, such as Figure 4 As shown, the timing controller described above is used for: During the voltage compensation period, a fourth control signal is sent to the switching module 201. The fourth control signal is used to indicate that the sensing lines of multiple columns of sub-pixel units 101 of the display panel 100 are connected to the driving circuit 202 based on a predetermined compensation order. The predetermined compensation order includes: the order of color channels, the order of row numbers, and the order of column numbers. During the voltage compensation period, a fifth control signal is sent to the driving circuit 202. The fifth control signal is used to characterize the source S of the driving transistor T2 of the multiple rows of sub-pixel units 101 of the display panel 100, which outputs the second reference voltage value.

[0049] In this embodiment, during the voltage compensation period, the timing controller controls the switching module 201 to switch the sensing lines of the multiple columns of sub-pixel units 101 of the display panel 100 to the driving circuit 202 based on a predetermined compensation order, and controls the driving circuit 202 to provide a second reference voltage value to the source S of the driving transistor T2.

[0050] To compensate for the threshold voltage of the driving transistors of the sub-pixel units, in one optional embodiment, such as Figure 4 As shown, the driving circuit 202 includes: The system comprises a first switch K1, a second switch K2, a voltage follower VF, and a second voltage source VREF2. The first switch K1 has a stationary terminal and a moving terminal, and the stationary terminal of the first switch K1 is used to connect to the switching module 201. The second switch K2 has a stationary terminal and a moving terminal, and the stationary terminal of the second switch K2 is used to electrically connect to the input terminal of the voltage follower VF. The second voltage source VREF2 is used to provide the second reference voltage value. The voltage compensation period includes multiple consecutive sub-voltage compensation periods, one of which corresponds to one sub-pixel unit 101. The timing controller is used to send a fourth control signal to the switching module 201 during the voltage compensation period, including: A sixth sub-control signal is sent to the switching module 201. The sixth sub-control signal is used to indicate that the first terminal of the sensing transistor T3 of the sub-pixel unit 101 corresponding to the sub-voltage compensation period is connected to the stationary terminal of the first switch K1, and the second terminal of the sensing transistor T3 of the sub-pixel unit 101 is connected to the source of the driving transistor of the sub-pixel unit 101. The timing controller described above is used to send a fifth control signal to the drive circuit 202 during the voltage compensation period, including: A seventh sub-control signal is sent to the first switch K1. The seventh sub-control signal is used to indicate that during the sub-voltage compensation period, the moving end of the first switch K1 is connected to the output end of the voltage follower VF. The eighth sub-control signal is sent to the second switch K2. The eighth sub-control signal is used to indicate that the moving end of the second switch K2 is connected to the second voltage source VREF2 during the sub-voltage compensation period.

[0051] In this embodiment, the sub-voltage compensation period is used to perform threshold voltage compensation on the driving transistor of the corresponding sub-pixel unit. During the sub-voltage compensation period, such as Figure 4 As shown in Figures 7(a) and 7(b), in Figure 7(b), the timing signals from top to bottom represent the voltage changes of the scan line GL of the sub-pixel unit 101, the gate G of the driving transistor T2, and the source S of the driving transistor T2. The second switch K2 is connected to the second voltage source VREF2, and the first switch K1 is connected to the output terminal of the voltage follower VF. The second voltage source VREF2 charges the source S (anode of the organic light-emitting diode OLED) of the driving transistor T2 to the second reference voltage VREF2. The timing controller 300 controls the gate drive of the display panel. The driving circuit drives the scan line GL of the sub-pixel unit 101 to output a high-level signal, the data transistor T1 and the sensing transistor T3 are turned on, and the timing controller 300 controls the source driving circuit (through the digital-to-analog converter module DAC in the source driving circuit) to drive the data line SL of the sub-pixel unit 101 to output a compensation data signal V3. The gate G of the driving transistor T2 is charged to V3 through the storage capacitor C, thus completing the threshold voltage compensation of the driving transistor T2. V3 is greater than the threshold voltage of the driving transistor T2. The dashed line with arrows in Figure 7(b) indicates the direction of current flow.

[0052] To ensure that only the detected sub-pixel units emit light during the voltage detection period, the cathodes of the light-emitting diodes of all the aforementioned sub-pixel units are connected to the negative power supply terminal. In an optional embodiment, at the initial moment of the aforementioned voltage detection period, a sixth control signal is sent to the aforementioned negative power supply terminal. The aforementioned sixth control signal is used to characterize the output of a first predetermined voltage value. The difference between the aforementioned first reference voltage value and the aforementioned first predetermined voltage value is less than the threshold voltage of the organic light-emitting diodes of all the aforementioned sub-pixel units.

[0053] In this embodiment, as Figure 4 As shown, at the initial moment of the voltage detection period, the negative power supply terminal ELVSS is pulled high to output a first predetermined voltage value, ensuring that the organic light-emitting diodes (OLEDs) of all sub-pixel units 101 do not emit light. During the voltage detection period, when the driving transistor T2 is turned on, the positive power supply terminal ELVDD of the sub-pixel unit 101 charges the source S of the driving transistor T2, reaching the threshold voltage of the organic light-emitting diode (OLED), and the organic light-emitting diode (OLED) emits light, thereby ensuring that only the detected sub-pixel units emit light during the voltage detection period.

[0054] To ensure that only the sub-pixel units that undergo threshold voltage compensation emit light during the voltage compensation period, the cathodes of the light-emitting diodes of all the aforementioned sub-pixel units are connected to the negative power supply terminal. In an optional embodiment, at the initial moment of the aforementioned voltage compensation period, a seventh control signal is sent to the aforementioned negative power supply terminal. The aforementioned seventh control signal is used to characterize the output of a second predetermined voltage value. The difference between the aforementioned second reference voltage value and the aforementioned two predetermined voltage values ​​is less than the threshold voltage of the organic light-emitting diodes of all the aforementioned sub-pixel units.

[0055] In this embodiment, as Figure 4 As shown, at the initial moment of the voltage compensation period, the negative power supply terminal ELVSS is pulled high to output a second predetermined voltage value, ensuring that the organic light-emitting diodes (OLEDs) of all sub-pixel units 101 do not emit light. During the voltage compensation period, when the driving transistor T2 is turned on, the positive power supply terminal ELVDD of the sub-pixel unit 101 charges the source S of the driving transistor T2, reaching the threshold voltage of the organic light-emitting diode (OLED), and the organic light-emitting diode (OLED) emits light, thereby ensuring that only the sub-pixel units that are subjected to voltage compensation emit light during the voltage compensation period.

[0056] Specifically, during the display period, such as Figure 4As shown in Figures 8(a) and 8(b), in Figure 8(b), the timing signals from top to bottom represent the voltage changes of the scan line GL of the sub-pixel unit 101, the gate G of the driving transistor T2, and the source S of the driving transistor T2. The timing controller 300 controls the gate driving circuit of the display panel 100 to drive the scan line GL of the sub-pixel unit 101 to output a low-level signal. The data transistor T1 and the sensing transistor T3 are turned off. The driving transistor T2 determines how much current to pass through according to the voltage of the gate G of the driving transistor T2 (the voltage on the storage capacitor C) V3, thereby controlling the organic light-emitting diode OLED to emit light. In Figure 8(b), Ve is the second predetermined voltage value, and Vf is the threshold voltage of the organic light-emitting diode. When the voltage of the source S of the driving transistor T2 (the voltage of the anode of the organic light-emitting diode OLED) is Ve+Vf, the organic light-emitting diode OLED is turned on and emits light. In Figure 8(b), "X" indicates that the data transistor T1 and the sensing transistor T3 are turned off, and the dashed line with arrows indicates the direction of current flow.

[0057] This embodiment also provides a display panel, which includes: Multiple scan lines, one of which corresponds to a row of sub-pixel units, and the other scan line is connected to the gate of the data transistor of the sub-pixel unit in the corresponding row, and is also connected to the gate of the sensing transistor of the sub-pixel unit in the corresponding row. The circuit described above.

[0058] In this embodiment, since the data transistor and sensing transistor of the sub-pixel unit are turned on or off simultaneously, the scan line that provides the scan signal to the data transistor of the sub-pixel unit and the scan line that provides the scan signal to the sensing transistor of the sub-pixel unit are combined into one to reduce driving costs.

[0059] This embodiment also provides a display device, which includes: The aforementioned display panel.

[0060] The beneficial effects of this application are as follows: 1) A switching module is set in the source driving circuit. The switching module can switch the connection between the sensing line of the multi-column sub-pixel unit and the driving circuit, so as to use the same driving circuit to detect the sensing signal of the multi-column sub-pixel unit, thereby reducing the driving cost. 2) For multi-column sub-pixel units, only the threshold voltage of the driving transistor of a portion of the sub-pixel units is detected, and the threshold voltage of the driving transistor of the remaining sub-pixel units is obtained from the threshold voltage of the driving transistor of the detected sub-pixel units, so as to reduce the voltage detection time of the sub-pixel units, and only a portion of the sub-pixel units need to store data, thus reducing storage costs. 3) During the voltage compensation period, after the display panel is powered on, the threshold voltage of the driving transistor of all sub-pixel units is stored in the volatile memory. The timing controller obtains the threshold voltage of the driving transistor of the sub-pixel unit from the volatile memory to calculate the compensation data signal of the sub-pixel unit, so as to speed up the calculation speed of the compensation data signal of the sub-pixel unit and thus reduce the voltage compensation time of the sub-pixel unit.

[0061] It should be understood that the terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “described” as used herein may also include the plural forms. The terms “comprising,” “including,” “containing,” and “having” are inclusive and therefore indicate the presence of the stated features, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components, and / or combinations thereof. The method steps, processes, and operations described herein are not construed as requiring them to be performed in a particular order described or illustrated unless the order of performance is explicitly indicated. It should also be understood that additional or alternative steps may be used.

[0062] The above description is merely a specific embodiment of the present invention, enabling those skilled in the art to understand or implement the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A circuit applied to a display panel, characterized in that, The circuit includes: A source drive circuit, the source drive circuit comprising: a switching module and a drive circuit; A timing controller is configured to send a first control signal to the switching module during a voltage detection period. The first control signal is configured to indicate that the sensing lines of multiple columns of sub-pixel units of the display panel are connected to the driving circuit based on a predetermined detection sequence. The timing controller is configured to send a second control signal to the driving circuit during the voltage detection period. The second control signal is configured to indicate that sensing signals of multiple columns of the sub-pixel units are detected and sent to the timing controller. The sensing signals are voltage signals of the sources of the driving transistors of the sub-pixel units and are configured to indicate the state switching of the driving transistors of the sub-pixel units.

2. The circuit according to claim 1, characterized in that, The predetermined detection order includes: the order of color channels, the order of row numbers from smallest to largest, and a preset numbering order. The preset numbering order consists of multiple numbers in a number sequence arranged from smallest to largest, and the absolute value of the difference between adjacent numbers in the preset numbering order is greater than 1. The numbering sequence is an arithmetic sequence with the first term being 1, the last term being N, and a common difference of 1. Here, N represents the Nth sub-pixel unit in the same color channel within a row of sub-pixel units. The circuit further includes: Non-volatile memory; The timing controller is used for: During the voltage detection period, the sensing signals of all measured sub-pixel units are stored in the non-volatile memory, and the measured sub-pixel units are the sub-pixel units whose numbers are located in the preset numbering order; During the voltage detection period, the sensing signals of all the measured sub-pixel units are obtained from the non-volatile memory, and the threshold voltage of the driving transistor of each measured sub-pixel unit is determined based on the sensing signal of each measured sub-pixel unit and the initial data signal on the data line of the measured sub-pixel unit. During the voltage detection period, based on the threshold voltage of the driving transistor of all the measured sub-pixel units, a linear interpolation algorithm is used to calculate the threshold voltage of the driving transistor of all unmeasured sub-pixel units. The unmeasured sub-pixel units are the sub-pixel units whose numbers are not located in the preset numbering order. During the voltage detection period, the threshold voltages of the driving transistors of all the sub-pixel units are stored in the non-volatile memory.

3. The circuit according to claim 2, characterized in that, The circuit also includes: Volatile memory; The timing controller is used for: During the voltage compensation period, the threshold voltage of the driving transistor of all the sub-pixel units in the non-volatile memory is acquired and stored in the volatile memory. During the voltage compensation period, the threshold voltage of the driving transistor of each sub-pixel unit is obtained from the volatile memory. Based on the threshold voltage of the driving transistor of each sub-pixel unit and the initial data signal on the data line of the sub-pixel unit, a compensation data signal corresponding to each sub-pixel unit is determined. The amplitude of the compensation data signal corresponding to the sub-pixel unit is greater than the threshold voltage of the driving transistor of the sub-pixel unit. The compensation data signal corresponds one-to-one with the sub-pixel unit.

4. The circuit according to claim 1, characterized in that, The timing controller is used to send a third control signal to the driving circuit during the voltage detection period. The third control signal is used to characterize the source of the driving transistor of the multiple rows of sub-pixel units of the display panel that outputs the first reference voltage value.

5. The circuit according to claim 4, characterized in that, The driving circuit includes: The system comprises a first switch, a second switch, a voltage follower, a first voltage source, and an analog-to-digital converter module. The first switch has a stationary terminal and a moving terminal, and the stationary terminal of the first switch is connected to the switching module. The second switch has a stationary terminal and a moving terminal, and the stationary terminal of the second switch is electrically connected to the input terminal of the voltage follower. The first voltage source is used to provide the first reference voltage value. The output terminal of the analog-to-digital converter module is connected to the timing controller. The voltage detection period includes multiple consecutive sub-voltage detection periods, each sub-voltage detection period corresponding to one sub-pixel unit. The timing controller is used to send a first control signal to the switching module during the voltage detection period, including: Send a first sub-control signal to the switching module. The first sub-control signal is used to indicate that the first terminal of the sensing transistor of the sub-pixel unit corresponding to the sub-voltage detection period is connected to the stationary terminal of the first switch, and the second terminal of the sensing transistor of the sub-pixel unit is connected to the source of the driving transistor of the sub-pixel unit. The timing controller is used to send a third control signal to the drive circuit during the voltage detection period, including: Send a second sub-control signal to the first switch, the second sub-control signal being used to indicate that the moving end of the first switch is connected to the output end of the voltage follower during the initial period of the sub-voltage detection period; Send a third sub-control signal to the second switch, the third sub-control signal being used to indicate that the moving end of the second switch is connected to the first voltage source during the sub-voltage detection period; The timing controller is used to send a second control signal to the drive circuit during the voltage detection period, including: A fourth sub-control signal is sent to the first switch. The fourth sub-control signal is used to indicate that the moving end of the first switch is connected to the input end of the analog-to-digital conversion module during the detection period of the sub-voltage detection period. The detection period includes all times in the sub-voltage detection period except for the initial period. A fifth sub-control signal is sent to the analog-to-digital conversion module. The fifth sub-control signal is used to detect and send the sensing signal of the sub-pixel unit corresponding to the sub-voltage detection period to the timing controller.

6. The circuit according to claim 4, characterized in that, The timing controller is used for: During the voltage compensation period, a fourth control signal is sent to the switching module. The fourth control signal is used to indicate that the sensing lines of multiple columns of the sub-pixel units of the display panel are connected to the driving circuit based on a predetermined compensation order. The predetermined compensation order includes: the order of color channels, the order of row numbers, and the order of column numbers. During the voltage compensation period, a fifth control signal is sent to the driving circuit. The fifth control signal is used to characterize the source of the driving transistor of the multiple rows of sub-pixel units of the display panel that outputs the second reference voltage value.

7. The circuit according to claim 6, characterized in that, The driving circuit includes: The system comprises a first switch, a second switch, a voltage follower, and a second voltage source. The first switch has a stationary terminal and a moving terminal. The stationary terminal of the first switch is used to connect to the switching module. The second switch has a stationary terminal and a moving terminal. The stationary terminal of the second switch is used to electrically connect to the input terminal of the voltage follower. The second voltage source is used to provide the second reference voltage value. The voltage compensation period includes multiple consecutive sub-voltage compensation periods, each sub-voltage compensation period corresponding to one sub-pixel unit. The timing controller is used to send a fourth control signal to the switching module during the voltage compensation period, including: A sixth sub-control signal is sent to the switching module. The sixth sub-control signal is used to indicate that the first terminal of the sensing transistor of the sub-pixel unit corresponding to the sub-voltage compensation period is connected to the stationary terminal of the first switch, and the second terminal of the sensing transistor of the sub-pixel unit is connected to the source of the driving transistor of the sub-pixel unit. The timing controller is used to send a fifth control signal to the drive circuit during the voltage compensation period, including: A seventh sub-control signal is sent to the first switch, the seventh sub-control signal being used to indicate that the moving end of the first switch is connected to the output end of the voltage follower during the sub-voltage compensation period; Send an eighth sub-control signal to the second switch, the eighth sub-control signal being used to indicate that the moving end of the second switch is connected to the second voltage source during the sub-voltage compensation period.

8. The circuit according to claim 4, wherein the cathodes of all the light-emitting diodes of the sub-pixel units are connected to the same negative power supply terminal, characterized in that, The timing controller is used for: At the initial moment of the voltage detection period, a sixth control signal is sent to the negative power supply terminal. The sixth control signal is used to characterize the output of a first predetermined voltage value. The difference between the first reference voltage value and the first predetermined voltage value is less than the threshold voltage of the organic light-emitting diodes of all the sub-pixel units.

9. A display panel, characterized in that, The display panel includes: Multiple scan lines, one scan line corresponds to a row of sub-pixel units, one scan line is connected to the gate of the data transistor of the sub-pixel unit in the corresponding row, and is also connected to the gate of the sensing transistor of the sub-pixel unit in the corresponding row; The circuit according to any one of claims 1-8.

10. A display device, characterized in that, The display device includes: The display panel as claimed in claim 9.

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