A ripple suppression pi loop control method, storage medium and device

Abstract

The application relates to a PI loop control method for ripple suppression, a storage medium and a device, which comprises filtering based on a secondary second-order generalized integrator and a Park transformation, extracting a double-frequency component in inverter power flow, determining a reverse compensation amount at each moment based on the double-frequency component and a battery connected with a DC circuit, and finally determining a current reference instantaneous value after reverse compensation at each moment of a current inner loop input to each bridge arm based on the sum of the reverse compensation amount at each moment and an original reference current value output by a voltage outer loop of each bridge arm of the DC circuit. The method obtains a double-frequency component of pure ripple information with high dynamic performance, obtains a reverse compensation amount for suppressing ripple in loop control according to the extracted double-frequency component and battery parameters, and adds the reverse compensation amount to a voltage outer loop, so that ripple suppression with good dynamic performance and good suppression effect in loop control is realized.

Description

Technical Field

[0001] This application relates to the field of ripple suppression, and in particular to a PI loop control method, storage medium, and apparatus for ripple suppression. Background Technology

[0002] In an energy storage system, the DC circuit acts as a stabilizing bus, which in turn transmits power rhythm to the DC terminal, generating a large current rhythm, i.e., a large current ripple. Large current ripple can cause significant damage to the battery and also negatively impact the design of the preceding circuitry, so it needs to be suppressed.

[0003] In DC loop control, to suppress interference from second harmonic ripple, a PR controller or notch filter is typically used to process the bus error signal for compensation. The bus signal has a complex composition, including not only DC components but also second harmonic ripple information. Furthermore, due to the presence of the PV (Power Transmission) module, the power frequency disturbance on the bus is no longer a simple second harmonic signal. Therefore, ripple suppression based on the bus signal will affect the suppression effect. Moreover, it is difficult to balance DC suppression and dynamic response performance using a PR controller or notch filter. The notch filter introduces additional phase lag, and by reducing bandwidth, the controller's dynamic performance will also be compromised. Summary of the Invention

[0004] The embodiments of this application aim to provide a PI loop control method, storage medium, and device for ripple suppression, which can improve the ripple suppression effect and ensure good system dynamic performance.

[0005] To address the aforementioned technical problems, this application provides the following technical solutions:

[0006] In a first aspect, embodiments of this application provide a PI loop control method for ripple suppression, applied to an energy storage system, the energy storage system including an electrically connected multi-channel interleaved parallel DC circuit and an inverter circuit, the method comprising:

[0007] Based on filtering and Parker transform of a second-order generalized integrator, the second harmonic component in the inverter power flow is extracted.

[0008] Based on the second harmonic component and the battery connected to the DC circuit, the reverse compensation amount of the outer voltage loop of the DC circuit at each moment is determined.

[0009] Based on the sum of the reverse compensation amount at each moment and the original reference current value output by the outer voltage loop on each bridge arm of the DC circuit, the instantaneous reference current value after reverse compensation at each moment is determined.

[0010] In some embodiments, determining the reverse compensation amount of the outer voltage loop of the DC circuit at each moment, based on the second harmonic component and the battery connected to the DC circuit, includes:

[0011] The adjustment coefficient is determined based on the battery voltage of the battery connected to the DC circuit and the average discharge efficiency of the battery.

[0012] Based on the product of the adjustment coefficient and the second harmonic component, the reverse compensation amount of the voltage outer loop of the DC circuit at each moment is determined.

[0013] In some embodiments, an adjustment coefficient is determined based on the battery voltage of the battery connected to the DC circuit and the average discharge efficiency of the battery, as follows:

[0014] ;

[0015] Among them, K DC V is the adjustment coefficient. bat η is the battery voltage of the battery. avg The average discharge efficiency is denoted as .

[0016] In some embodiments, the method further includes:

[0017] Determine the ripple suppression result of the previous time step and the adjustment coefficient of the previous time step;

[0018] Determine the preset ripple suppression result at the current moment;

[0019] Obtain the ratio between the preset ripple suppression result at the current time and the ripple suppression result at the previous time.

[0020] The adjustment coefficient at the current time is obtained by multiplying the ratio by the adjustment coefficient at the previous time.

[0021] In some embodiments, the extraction of the second harmonic component from the inverter power flow based on filtering and Parker transform using a second-order generalized integrator includes:

[0022] The inverter power flow is input into the second-order generalized integrator to obtain the first harmonic component result of the second harmonic component, which includes the first in-phase component and the first quadrature component.

[0023] The first harmonic component result is then input into a second-order generalized integrator to obtain the second harmonic component result of the second harmonic component, which includes a second in-phase component and a second quadrature component.

[0024] The second harmonic angle of the Parker transform is determined based on the self-varying angle of the power frequency of the energy storage system at each moment and the preset phase shift adjustment angle.

[0025] Based on the second harmonic angle, the second in-phase component, and the second quadrature component, calculate the Parker transform result;

[0026] Perform an inverse Parker transform on the Parker transform result to obtain the second harmonic component.

[0027] In some embodiments, the method further includes:

[0028] When the number of working bridge arms of the DC circuit is less than the total number of bridge arms of the DC circuit, and when the instantaneous reference current value on any working bridge arm is greater than the preset current upper limit value, the number of working bridge arms is increased.

[0029] When all bridge arms of the DC circuit are working, and the instantaneous reference current value on any bridge arm is greater than the preset current upper limit, the instantaneous reference current value on that bridge arm is subjected to time-domain equalization compensation within a period to obtain the final instantaneous reference current value at each moment.

[0030] In some embodiments, the method further includes determining the power frequency self-varying angle, including:

[0031] When the energy storage system is in an off-grid state, the current power frequency self-change angle is determined based on the operating frequency of the inverter circuit, the operating frequency of the main control unit of the energy storage system, and the power frequency self-change angle of the previous moment.

[0032] When the energy storage system is in grid-connected state, the self-varying angle of the power frequency at each moment is determined to be the angle of the grid voltage at each moment.

[0033] In some embodiments, the current power frequency self-variation angle is determined as:

[0034] ;

[0035] in, The angle of self-varying power frequency at the previous moment. The angle of self-varying power frequency at the current moment. The operating frequency of the inverter circuit is [value]. This refers to the operating frequency of the main control unit of the energy storage system.

[0036] In some embodiments, the output of the inner current loop of the DC circuit in the PI loop control method is:

[0037] Based on the instantaneous reference current value output by the outer voltage loop, determine the instantaneous reference current value of the inner current loop allocated to each bridge arm;

[0038] The current error value of each bridge arm is determined based on the instantaneous reference current value of each bridge arm and the current sampling value on each bridge arm.

[0039] The current error value of each bridge arm is controlled by PI to obtain the modulation voltage value of each bridge arm.

[0040] The output of each bridge arm in the inner current loop is determined based on the difference between the modulation voltage value and the feedback value of each bridge arm.

[0041] In a second aspect, embodiments of this application provide a computer-readable storage medium storing a computer program, the computer program including program instructions that, when executed by a processor, cause the processor to perform the ripple suppression PI loop control method as described above.

[0042] In a third aspect, embodiments of this application provide a ripple-suppressing PI loop control device applied to an energy storage system. The energy storage system includes an electrically connected multi-channel interleaved parallel DC circuit and an inverter circuit. The ripple-suppressing PI loop control device includes:

[0043] The extraction module is used to extract the second harmonic component from the inverter power flow based on filtering and Parker transform using a second-order generalized integrator.

[0044] The first determining module is used to determine the reverse compensation amount of the voltage outer loop of the DC circuit at each moment based on the second harmonic component and the battery connected to the DC circuit.

[0045] The second determining module is used to determine the instantaneous reference current value after reverse compensation at each moment based on the sum of the reverse compensation amount at each moment and the original reference current value output by the voltage outer loop on each bridge arm of the DC circuit.

[0046] In various embodiments of this application, the ripple suppression PI loop control method is applied to an energy storage system, which includes an electrically connected multi-channel interleaved parallel DC circuit and an inverter circuit. The method includes firstly, based on filtering and Parker transform of a second-order generalized integrator, extracting the second harmonic component in the inverter power flow; then, based on the second harmonic component and the battery connected to the DC circuit, determining the reverse compensation amount of the voltage outer loop of the DC circuit at each moment; and finally, based on the reverse compensation amount at each moment and the sum of the original reference current value output by the voltage outer loop on each bridge arm of the DC circuit, determining the instantaneous reference current value of the current inner loop input to each bridge arm after reverse compensation at each moment.

[0047] Compared to using the difference in bus voltage as the error for ripple suppression, this PI loop control method directly filters and Parker transforms the inverter power flow on the inverter side through two second-order generalized integrators, resulting in a purer second harmonic component with no large DC component. That is, the PI loop control method of this application obtains a pure second harmonic component with high dynamic performance regarding ripple information. Then, based on the extracted second harmonic component and battery parameters, the reverse compensation amount used to suppress ripple in the loop control is obtained. The reverse compensation amount is then accumulated to the voltage outer loop, thereby achieving ripple suppression with good dynamic performance and good suppression effect in the loop control. Attached Figure Description

[0048] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0049] Figure 1 This is a schematic diagram of the circuit structure of one of the energy storage systems provided in the embodiments of this application;

[0050] Figure 2 This is a schematic flowchart of one of the ripple suppression PI loop control methods provided in the embodiments of this application;

[0051] Figure 3 yes Figure 2 A flowchart illustrating step S10;

[0052] Figure 4 yes Figure 2 A flowchart illustrating step S20;

[0053] Figure 5 This is a schematic diagram of the control loop of one of the DC circuits provided in the embodiments of this application;

[0054] Figure 6 This is a timing diagram of one of the instantaneous current reference values ​​provided in the embodiments of this application;

[0055] Figure 7 This is a schematic flowchart of one of the ripple suppression PI loop control methods provided in the embodiments of this application;

[0056] Figure 8 This is a schematic flowchart of one of the reference current compensation methods provided in the embodiments of this application;

[0057] Figure 9 yes Figure 8 A flowchart illustrating step S63;

[0058] Figure 10This is a schematic diagram of the structure of one of the ripple suppression PI loop control devices provided in the embodiments of this application;

[0059] Figure 11 This is a schematic diagram of the structure of one of the reference current compensation devices provided in the embodiments of this application;

[0060] Figure 12 This is a schematic diagram of the hardware structure of one of the controllers provided in the embodiments of this application. Detailed Implementation

[0061] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0062] Please see Figure 1 This application provides a circuit structure diagram of an energy storage system, as shown in the embodiment. Figure 1 As shown, the energy storage system includes a battery BAT, a DC circuit 10, a bus balancing circuit 20, and an inverter circuit 30 connected in sequence.

[0063] DC circuit 10 can be an N-channel interleaved parallel DC-DC converter circuit, where N is an integer greater than 1. Figure 1 The example shown is a three-way interleaved parallel DC-DC converter circuit. Each bridge arm includes two MOSFETs. The midpoint of each bridge arm is connected to the positive terminal of the battery BAT via an inductor. The gate of each MOSFET is connected to the controller.

[0064] The output of DC circuit 10 is connected to bus balancing circuit 20. Bus balancing circuit 20 includes two MOSFETs and an inductor. Bus balancing circuit 20 is used to balance bus voltage.

[0065] The output of the bus balancing circuit 20 is connected to the inverter circuit 30, which can be a half-bridge or full-bridge circuit. Figure 1 Taking a two-phase half-bridge as an example, each bridge arm includes two MOSFETs, and the midpoint of each bridge arm is connected to the power grid or load via an LC filter.

[0066] When the energy storage system is off-grid, the battery BAT outputs low-voltage DC power. This low-voltage DC power passes through DC circuit 10, which raises the voltage to the rated voltage of the DC bus to maintain bus voltage stability. Inverter circuit 30 then inverts the DC power from the bus into AC power that matches the load. After LC filtering, the AC power is supplied to the AC load. If there is a DC load, it draws power directly from the DC bus without going through inverter circuit 30.

[0067] If the load power changes suddenly, the bus voltage will drop instantaneously. The bus balancing circuit 20 responds quickly and suppresses voltage fluctuations by using the MOSFET in the bus balancing circuit 20 to maintain the stability of the bus voltage.

[0068] When the energy storage system is connected to the grid, the battery BAT can be boosted to the bus voltage via DC circuit 10. The inverter circuit 30 operates in grid-connected inverter mode, converting the bus voltage into AC power that is in phase and frequency with the grid, so as to discharge to the grid. If the energy storage system is connected to a load, the local load will be supplied first if there is demand, and excess energy will be fed into the grid. If the grid restricts power, only the local load needs to be met.

[0069] In the inverter circuit 30 described above, the two phases are 180° out of phase. This causes the peak power of the inverter to be superimposed when it is charging or discharging simultaneously, resulting in a large power-frequency oscillation of twice the power frequency. Figure 1 In the energy storage system shown, the DC circuit 10 serves as a stabilizing bus, thus the power rhythm is transmitted to the DC end, generating a large current rhythm, i.e. a large current ripple. A large current ripple is more damaging to the battery and has an adverse effect on the design of the front-end circuit, so it needs to be suppressed.

[0070] In DC loop control, to suppress interference from second harmonic ripple, a PR controller or notch filter is typically used to process the bus error signal for compensation. The bus signal has a complex composition, including not only DC components but also second harmonic ripple information. Furthermore, due to the presence of the PV (Power Transmission) module, the power frequency disturbance on the bus is no longer a simple second harmonic signal. Therefore, ripple suppression based on the bus signal will affect the suppression effect. Moreover, it is difficult to balance DC suppression and dynamic response performance using a PR controller or notch filter. The notch filter introduces additional phase lag, and by reducing bandwidth, the controller's dynamic performance will also be compromised.

[0071] To address the aforementioned problems, this application provides a PI loop control method for ripple suppression. This PI loop control method for ripple suppression can be executed by a controller in an energy storage system, by another separately configured controller, or by an electronic device. The following embodiments illustrate this method using a controller as an example. Figure 2 The PI loop control method for ripple suppression includes the following steps S10 to S30.

[0072] Step S10: Based on filtering and Parker transform of the second-order generalized integrator, extract the second harmonic component in the inverter power flow.

[0073] Step S20: Based on the second harmonic component and the battery connected to the DC circuit, determine the reverse compensation amount of the voltage outer loop of the DC circuit at each moment.

[0074] Step S30: Based on the sum of the reverse compensation amount at each moment and the original reference current value output by the voltage outer loop on each bridge arm of the DC circuit, determine the instantaneous reference current value after reverse compensation at each moment of the input current inner loop on each bridge arm.

[0075] In this application, compared to using the difference in bus voltage as the error for ripple suppression, the PI loop control method directly filters and Parker transforms the inverter power flow on the inverter side through two second-order generalized integrators. The resulting second harmonic component is relatively pure and has no large DC component. That is, the PI loop control method of this application obtains a pure second harmonic component with high dynamic performance regarding ripple information. Then, based on the extracted second harmonic component and battery parameters, the reverse compensation amount used to suppress ripple in the loop control is obtained. The reverse compensation amount is then accumulated to the voltage outer loop, thereby achieving ripple suppression with good dynamic performance and good suppression effect in the loop control.

[0076] For step S10: Based on the filtering and Parker transform of the second-order generalized integrator, extract the second harmonic component in the inverter power flow.

[0077] First, determine the inverter power flow on the inverter side of the inverter circuit. The inverter side is the AC side of the inverter circuit, i.e., the port of the inverter circuit used to connect to the load or the power grid. Collect the instantaneous values ​​of the inverter current and inverter voltage on the inverter side. Multiply the instantaneous values ​​of the inverter current and inverter voltage to obtain the inverter power, which is also the instantaneous power. For off-grid operation, the inverter power is the real-time power on the load; for grid-connected operation, the inverter power corresponds to the power transmitted to or absorbed from the power grid.

[0078] If the inverter side has two phases, the final inverter power is obtained by averaging the inverter power of the two phases, which is calculated using the following formula:

[0079] (1)

[0080] In this circuit, InvPowerFlow represents the final inverter power, Grid1 represents the inverter power of one phase on the inverter side of the inverter circuit, and Grid2 represents the inverter power of the other phase on the inverter side of the inverter circuit.

[0081] After obtaining the inverter power flow, the second harmonic component in the inverter power flow is extracted by filtering and Parker transform based on the second-order generalized integrator.

[0082] like Figure 3 As shown, for step S10, the second harmonic component in the inverter power flow is extracted based on the filtering and Parker transform of the second-order generalized integrator, including the following steps S11 to S15.

[0083] After obtaining the power flow input value, this paper uses a second-order generalized integrator (SOGI) filter for processing. The principle of SOGI is to extract a specific frequency component of the input signal (referring to the second harmonic of the power frequency) and output its quadrature component. For the power flow we obtain, its (specific frequency component) frequency has two cases: when off-grid, its frequency is twice the off-grid self-adjustment value (custom-adjusted frequency); when in non-phase-locked state, it is a fixed value, denoted as... ( This refers to the off-grid self-adjustment value. When connected to the grid, its frequency is twice the grid-connected frequency, denoted as... ( (This is the grid frequency), which allows the SOGI filter to follow the actual frequency (in off-grid mode, it follows the off-grid self-adjustment value). When connected to the grid, it follows the grid frequency. This increases the stability of the strategy.

[0084] Step S11: Input the inverter power flow into the second-order generalized integrator to obtain the first harmonic component result of the second harmonic component, the first harmonic component result including the first in-phase component and the first quadrature component.

[0085] Step S12: Input the initial harmonic component result into the second-order generalized integrator to obtain the second harmonic component result of the second harmonic component, wherein the second harmonic component result includes a second in-phase component and a second quadrature component.

[0086] The SOGI filter internally generates a signal with the same frequency as the input and a signal with a 90° lag through integration and feedback mechanisms. This structure gives it a certain degree of adaptability to the frequency of the input signal and inherent filtering characteristics, effectively suppressing high-order harmonics.

[0087] The principle of the SOGI filter is to extract a specific frequency component (second harmonic component) of the input signal and output its quadrature component. Specifically, by setting the center frequency parameter of the SOGI filter to the specific frequency component to be extracted and inputting the input signal into the SOGI filter, the filter will output the specific frequency component and its quadrature component. This allows the SOGI filter to follow the frequency F of the inverter power flow, increasing the stability of the strategy. In this embodiment, an SOGI filter is used to extract the second harmonic component of the inverter power flow.

[0088] When the inverter power is input into the SOGI filter, the first harmonic component of the second harmonic is obtained. This first harmonic component includes an initial in-phase component and an initial quadrature component. The in-phase component is relatively pure, but the quadrature component contains a significant DC component, which will lead to abnormalities in subsequent compensation strategies. This situation may be caused by inappropriate damping coefficient (a parameter of the SOGI filter) settings or inaccurate center frequency. When the damping coefficient is adjusted to a lower level, the suppression of the DC component is better, but reducing the damping coefficient also reduces the filter's response speed, leading to a loss of dynamic performance. Under sudden load changes, the SOGI filter takes a long time to reach a stable and accurate output state, resulting in unstable strategy implementation.

[0089] To address the aforementioned issues, in this embodiment, the inverter power flow is filtered through a cascaded SOGI to obtain a second-order in-phase component and a second-order quadrature component. Specifically, the inverter power flow is input to a first-order SOGI, filtered by the first-order SOGI to obtain a first-order in-phase component and a first-order quadrature component. These first-order in-phase and first-order quadrature components are then input to a second-order SOGI, and filtered again by another SOGI to obtain the second harmonic component result, which includes both the second-order in-phase component and the second-order quadrature component.

[0090] After passing through a second SOGI filter, relatively pure in-phase and quadrature components are obtained. At the same time, there is no need to reduce the damping coefficient and sacrifice dynamic performance. Therefore, passing the inverter power flow through a second SOGI filter can obtain relatively pure in-phase and quadrature components, thereby improving the accuracy of subsequent compensation and thus improving the ripple suppression effect, while also ensuring good dynamic performance.

[0091] Step S13: Determine the second harmonic angle of the Parker transformation based on the self-variation angle of the power frequency of the energy storage system at each moment and the preset phase shift adjustment angle.

[0092] If the energy storage system operates off-grid, the self-varying angle of the power frequency is determined by the inverter circuit itself; if the energy storage system operates on-grid, the self-varying angle of the power frequency is determined by the power grid.

[0093] Specifically, when the energy storage system is in an off-grid state, the current power frequency self-change angle is determined based on the operating frequency of the inverter circuit, the operating frequency of the main control unit of the energy storage system, and the power frequency self-change angle of the previous moment.

[0094] In some embodiments, the current power frequency self-variation angle is determined by the following formula:

[0095] (2)

[0096] in, The angle of self-varying power frequency at the previous moment. The angle of self-varying power frequency at the current moment. This is the operating frequency of the inverter circuit. The operating frequency of the main control unit of the energy storage system. Pi is the mathematical constant of a circle.

[0097] When the energy storage system is in grid-connected mode, the self-varying angle of the power frequency at each moment is determined as the angle of the grid voltage at each moment. The grid voltage is sampled to obtain the sampled voltage, and the sampled voltage is processed by a phase-locked loop (PLL) to obtain the angle of the grid voltage.

[0098] The second harmonic angle can be obtained using the following formula:

[0099] (3)

[0100] Where θ is the second harmonic angle, β c Ph is the angle of self-varying power frequency at the current moment. Theta To adjust the angle for phase shifting.

[0101] Phase shift adjustment angle Ph Theta This is to compensate for issues such as sampling signal delay, control activation delay of the switching transistor in the DC circuit, and inductor current lag in the DC circuit. It can be an empirical value, such as 170°, but for a specific system, the phase shift adjustment angle Ph needs to be determined through individual adjustments. Theta .

[0102] Step S14: Calculate the Park transform result based on the second harmonic angle, the second in-phase component, and the second quadrature component.

[0103] Based on the second harmonic angle, Parker transform is performed on the second in-phase component and the second quadrature component to obtain the Parker transform result, i.e., the d-axis component.

[0104] The Parker transformation is performed using the following formula:

[0105] (4)

[0106] in, For the d-axis component, It is a second-phase component. These are quadratic orthogonal components.

[0107] Step S15: Perform an inverse Parker transform on the Parker transform result to obtain the second harmonic component.

[0108] After obtaining the d-axis component, perform an inverse Parker transform on the d-axis component to obtain the second harmonic component using the following formula:

[0109] (5)

[0110] in, It is a second harmonic component. θ is the d-axis component, and θ is the second harmonic angle.

[0111] Therefore, by performing a second SOGI operation on the inverter power flow, two in-phase and two quadrature components are obtained. Then, based on a determined second harmonic angle, Parker transform and inverse Parker transform are performed on the two in-phase and quadrature components to obtain a relatively pure second harmonic component in the inverter power flow with high dynamic performance, which is suitable for phase-shift compensation. This component can be used for direct compensation of the DC-DC reference current.

[0112] The second harmonic component is adjusted based on the battery voltage of the DC circuit to obtain the reverse compensation amount at each moment. Specifically, for step S20, based on the second harmonic component and the battery connected to the DC circuit, the reverse compensation amount of the outer voltage loop of the DC circuit at each moment is determined, such as... Figure 4 As shown, step S20 includes the following steps S21 to S22.

[0113] Step S21: Determine the adjustment coefficient based on the battery voltage of the battery connected to the DC circuit and the average discharge efficiency of the battery.

[0114] In some embodiments, efficiency conversion also needs to be considered. The adjustment coefficient is determined using the battery voltage and average discharge efficiency of the battery connected to the DC circuit. The adjustment coefficient is determined by the following formula:

[0115] (6)

[0116] Among them, K DC V is the adjustment coefficient. bat η is the battery voltage. avg This represents the average discharge efficiency.

[0117] Among them, the average discharge efficiency η avg The adjustment coefficient K is used to characterize the efficiency of battery discharge to the inverter circuit. DC The presence of a negative sign is precisely the cause of current ripple in DC circuits. Therefore, it needs to be counteracted. Furthermore, this adjustment coefficient K needs to be dynamically adjusted based on actual conditions, such as the ripple suppression results. DC .

[0118] In some embodiments, the adjustment coefficient K is linearly adjusted based on the ripple suppression result. DCFirst, determine the ripple suppression result and the adjustment coefficient of the previous time step. Then, determine the preset ripple suppression result of the current time step. Obtain the ratio between the preset ripple suppression result of the current time step and the ripple suppression result of the previous time step. Finally, multiply the ratio by the adjustment coefficient of the previous time step to obtain the adjustment coefficient of the current time step.

[0119] Ripple suppression results can be expressed as a percentage, which is a comparison of the ripple current under the same load conditions with the ripple current without ripple suppression measures, characterizing the degree of reduction in ripple current. For example, if the ripple current without ripple suppression measures is 100%, and the ripple current can be reduced by 70% after adding the ripple suppression measures of this application, then the ripple suppression result can be expressed as 70%, indicating that 70% of the ripple current can be suppressed.

[0120] If the ripple suppression result at the previous time step was 70%, and the preset ripple suppression result at the current time step is 35%, then the ratio is 1 / 2. If the adjustment coefficient K at the previous time step... DC If A is the adjustment coefficient K at the current moment, then... DC The value is A / 2.

[0121] Therefore, the adjustment coefficient K can be dynamically optimized and adjusted during the ripple suppression process. DC This allows it to meet the ripple suppression requirements at the current moment.

[0122] Step S22: Based on the product of the adjustment coefficient and the second harmonic component, determine the reverse compensation amount of the voltage outer loop of the DC circuit at each moment.

[0123] In some embodiments, the product of the adjustment coefficient and the second harmonic component is determined as the reverse compensation amount of the voltage outer loop of the DC circuit at each moment. That is, the reverse compensation amount is obtained by the following formula:

[0124] (7)

[0125] Where InvPFFOut is the inverse compensation amount, InvPowerSHG is the second harmonic component, and K... DC This is the adjustment coefficient.

[0126] Step S30: Based on the sum of the reverse compensation amount at each moment and the original reference current value output by the voltage outer loop on each bridge arm of the DC circuit, determine the instantaneous reference current value after reverse compensation at each moment of the input current inner loop on each bridge arm.

[0127] A schematic diagram of the control loop of a DC circuit is shown below. Figure 5 As shown, the PI control loop of the DC circuit includes a voltage outer loop 51, a current inner loop 52, and a feedback loop 53.

[0128] The control process of the outer voltage loop 51 is as follows: The outer voltage loop 51 calculates the deviation between the sampled bus voltage value Vbus and the target voltage busref using PI control, and outputs the original reference current of the inner current loop 52 to ensure that the bus voltage is stable at the rated value. The original reference current is superimposed with the reverse compensation amount InvPFFOut at each moment to obtain the instantaneous reference current value at each moment, and the instantaneous reference current value at each moment is used as the input of the inner current loop 52 on each bridge arm.

[0129] In the feedback loop 53, the feedback value dcFFout = 1 - Vbat / Vbus, where Vbat is the battery voltage and Vbus is the sampled value of the bus voltage. Before compensation, the inner current loop 52 tracks the original reference current output by the outer voltage loop 51 in real time. The output of the inner current loop 52 is compared with the triangular wave signal to obtain the drive signal of the power switch (MOS transistor) of each bridge arm of the DC circuit, quickly adjusting the output current of the DC circuit while limiting the output current to not exceed the safety threshold to avoid overcurrent damage to the devices.

[0130] Taking a three-way interleaved parallel DC-DC converter circuit as an example, the control process of the inner current loop 52 is explained. Each DC channel of the three-way interleaved parallel DC-DC converter circuit corresponds to one bridge arm.

[0131] The voltage outer loop 51 obtains the instantaneous reference current value and distributes it evenly to each working bridge arm. When all three bridge arms are working, the balance coefficient K of the three bridge arms is the same.

[0132] The control process of the inner current loop 52 is as follows:

[0133] Based on the instantaneous reference current value output from the outer voltage loop, the instantaneous reference current value of the inner current loop allocated to each bridge arm is determined. The instantaneous reference current value of the inner current loop allocated to each bridge arm is obtained by the following formula:

[0134] (8)

[0135] Where I is the instantaneous reference current value of the inner current loop of each bridge arm, I' is the instantaneous reference current value of the outer voltage loop output, I0 is the original reference current value, InvPFFOut is the reverse compensation amount, and K is the equalization coefficient.

[0136] Based on the instantaneous reference current value of each bridge arm and the sampled current value on each bridge arm, the current error value of each bridge arm is determined. The current error value of each bridge arm is obtained by the following formula:

[0137] (9)

[0138] in, I dci Let I be the current error value of the i-th bridge arm, and let I be the instantaneous reference current value of the inner current loop of each bridge arm. dci Let be the current sample value of the i-th bridge arm, where i is an integer from 1 to 3.

[0139] The current error value of each bridge arm is controlled by PI to obtain the modulation voltage value of each bridge arm.

[0140] The output of each arm of the inner current loop is determined based on the difference between the modulation voltage and the feedback value of each arm. The output of each arm of the inner current loop is obtained using the following formula:

[0141] (10)

[0142] in, U i Ui is the output of the i-th bridge arm of the inner current loop, Ui is the modulation voltage value of the i-th bridge arm, dcFFout is the feedback value, and dcFFout=1-Vbat / Vbus, where Vbat is the battery voltage and Vbus is the bus voltage sampling value.

[0143] It is worth noting that the instantaneous current reference value of each bridge arm is the product of the instantaneous current reference value output by the outer voltage loop and the equalization coefficient K.

[0144] Furthermore, the output of each bridge arm is compared with the triangular wave signal to obtain the drive signal of the upper switching transistor of each bridge arm of the DC circuit.

[0145] Among them, the SOGI filter has a very low control output delay, which is at the switching cycle level and can be almost ignored for energy exchange. This makes the system have good dynamic performance and can ensure ripple suppression when the power at the load end changes drastically, such as during sudden loading and unloading.

[0146] It is worth noting that the above compensation strategy can be perfectly executed under ideal conditions. However, there are additional issues that need to be considered in actual engineering. Due to factors such as cost, the current of each DC bridge arm is not infinite and there is a hardware limit. Therefore, when the instantaneous reference current value is greater than the hardware limit, the compensation strategy cannot be executed correctly, which will affect the ripple suppression effect.

[0147] The timing diagram of the instantaneous reference current value is as follows: Figure 6As shown, curve L1 represents the instantaneous reference current value, which includes both the DC component and the frequency multiplication compensation component. The straight line L2 represents the hardware limit. When the instantaneous reference current value exceeds the hardware limit, the portion exceeding the limit is not executed correctly, leading to two adverse consequences: First, the overall ripple of the DC-side current in the DC circuit increases, exhibiting a state where the DC component is superimposed on the negative half-cycle of a sine wave, affecting the ripple suppression effect. Second, insufficient energy is delivered to the bus by the DC circuit, causing a drop in the total bus voltage and potentially triggering a fault.

[0148] Based on the above issues, measures need to be taken to prevent the instantaneous current reference value from exceeding the hardware limit, or to compensate for the instantaneous current reference value that exceeds the hardware limit, so as to avoid affecting the ripple suppression effect.

[0149] like Figure 7 As shown, the PI loop control method for ripple suppression further includes the following steps S40 to S50.

[0150] Step S40: When the number of working bridge arms of the DC circuit is less than the total number of bridge arms of the DC circuit, and when the instantaneous reference current value on any working bridge arm is greater than the preset current upper limit value, then increase the number of working bridge arms.

[0151] In a DC circuit, each DC branch corresponds to one bridge arm. For example, if a DC circuit includes three branches, the total number of bridge arms is 3. If only one bridge arm in a DC circuit is in operation, the number of bridge arms in operation is 1. If two bridge arms in a DC circuit are in operation, the number of bridge arms in operation is 2. If all three bridge arms in a DC circuit are in operation, the number of bridge arms in operation is 3.

[0152] When the number of working bridge arms is less than the total number of bridge arms in the DC circuit, it indicates that the bridge arms in the DC circuit are not fully engaged. At this time, the circuit is under light or medium load conditions. Therefore, it is necessary to avoid the saturation limit of a certain bridge arm. That is, the single-circuit adjustment should reserve a certain margin for compensation reference.

[0153] When the instantaneous reference current value on any bridge arm during operation exceeds the preset current upper limit, the number of working bridge arms is increased. For example, if the total number of bridge arms in the DC circuit is 3, and the number of working bridge arms is 1 (meaning only a single bridge arm is currently in operation), then when the instantaneous reference current value of that working bridge arm exceeds the preset current upper limit, the number of working bridge arms is increased to 2, i.e., the DC circuit is switched to dual-bridge arm mode. When the instantaneous reference current values ​​of both working bridge arms exceed the preset current upper limit, the number of working bridge arms is increased to 3, i.e., the DC circuit is switched to three-bridge arm mode.

[0154] The preset current upper limit can be set as needed. It is determined based on the hardware limit. For example, if the hardware limit is 25A, then the preset current upper limit is 25A.

[0155] In some embodiments, the number of working bridge arms can be increased by comparing the inverter power flow with the rated power of the working bridge arms. For example, when the inverter power flow is greater than or equal to a preset percentage of the rated power of the working bridge arms, the number of working bridge arms is increased. The preset percentage can be set as needed; in this embodiment, the preset percentage is 60%.

[0156] Step S50: When all bridge arms of the DC circuit are working, and the instantaneous reference current value on any bridge arm is greater than the preset current upper limit, perform time-domain equalization compensation on the instantaneous reference current value on that bridge arm within a period to obtain the final instantaneous reference current value at each moment.

[0157] When all arms of the DC circuit are working, it indicates that the circuit is under heavy load. If the instantaneous reference current value on any arm is greater than the preset current upper limit, it indicates that the instantaneous reference current value still exceeds the hardware limit, and a time-domain equalization compensation strategy within the cycle is adopted.

[0158] In one embodiment, see Figure 8 The PI loop control method further includes step S60: a reference current compensation method, which includes the following steps S61 to S63:

[0159] Step S61: Based on the extracted second harmonic component, determine the reverse compensation amount of the voltage loop of the DC circuit at each moment.

[0160] Step S62: Based on the reverse compensation amount and the original current reference value at each moment, determine the instantaneous current reference value of the inner current loop of each bridge arm of the multiple DC circuits input to the energy storage system. The instantaneous current reference values ​​at different moments form a sinusoidal signal or a cosine signal.

[0161] Step S63: When all the bridge arms of the DC circuit are working and the instantaneous current reference value of any bridge arm exceeds the preset current upper limit, perform time-domain equalization compensation on the bridge arm: the excess amount of the instantaneous current reference value of the first half-cycle relative to the preset current upper limit is evenly compensated to the instantaneous current reference value of the second half-cycle.

[0162] It is worth noting that the second harmonic component in step S61 is solved using the method in step S10 of the PI loop control method described above. After obtaining the second harmonic component, the reverse compensation amount at each moment is determined using the method in step S20 described above. For step S62, the instantaneous reference current value of the inner current loop of each bridge arm is the sum of the reverse compensation amount and the original reference current value at each moment.

[0163] Specifically, such as Figure 9 As shown, step S63 includes steps S631 to S635.

[0164] Step S631: Based on the power frequency self-change angle of the energy storage system at each moment and the preset phase shift adjustment angle, determine the first angle region corresponding to the instantaneous current reference value being greater than the preset current upper limit value.

[0165] Specifically, based on the self-changing angle of the power frequency of the energy storage system at each moment and the preset phase shift adjustment angle, the second harmonic angle is determined. The second harmonic angle θ is determined by the above formula (3), which will not be repeated here. The first angle region is determined, wherein the instantaneous reference current value corresponding to any second harmonic angle in the first angle region is greater than the preset current upper limit value LIMIT.

[0166] It is worth noting that the instantaneous reference current value at each moment is related to the reverse compensation amount at each moment, and the reverse compensation amount at each moment is related to the extracted second harmonic component. The second harmonic component is related to the aforementioned second harmonic angle. Therefore, each second harmonic angle corresponds to a current reference instantaneous value. Thus, the second harmonic angle of the current reference instantaneous value that is greater than the preset current upper limit value LIMIT is one of the angle values ​​in the first angle region.

[0167] Please continue reading Figure 6 , Figure 6 The instantaneous reference current value changes with the second harmonic angle. Since the second harmonic angle is different at each moment, the instantaneous reference current value changes with each instant. The corresponding time-series curve for the instantaneous reference current value is curve L1, which is a sine curve. The instantaneous reference current value is not a stable value but fluctuates continuously. The first angle region exceeding the preset current limit is designated as region A. This first angle region is in the upper half of the cycle. The integral over time of the product of the current loss area in region A and the output voltage represents the energy that the bus should have compensated but did not. Figure 6 Points P1 and P2 in the diagram belong to the first angular region corresponding to region A. The instantaneous reference current values ​​of points P1 and P2 are greater than the preset current upper limit value LIMIT. Figure 6 Taking a preset current limit of 25A as an example, points P1 and P2 correspond to the second harmonic angles of the horizontal axis, which belong to the first angle region.

[0168] As mentioned earlier, the instantaneous reference current value forms a sinusoidal or cosine-shaped waveform. Therefore, the average current value over one cycle is zero. Directly cutting off the over-limit value exceeding the preset current limit in the first half of the cycle will lead to an imbalance in energy supply, affecting the control loop output and causing a drop in bus voltage. Furthermore, the initial compensation of the reference current in the inner current loop using reverse compensation is performed across the entire loop. Directly cutting off the over-limit value without evenly compensating for the cut-off over-limit value across other time domain positions will also affect the overall loop control process.

[0169] Therefore, a second angle region is needed to provide equalization compensation for the first angle region.

[0170] Step S632: Obtain the second angle region based on the sum of the first angle region and 180 degrees.

[0171] Understandably, the instantaneous reference current value is a sinusoidal waveform, exhibiting symmetry between the upper and lower half-cycles. The second angular region differs from the first angular region by 180 degrees; therefore, this symmetry is used to determine the second angular region.

[0172] See Figure 6 Line L3 corresponds to the original reference current value, and line L2 corresponds to the DC hardware limit value of the preset upper current limit. Using the central axis of line L3 as the reference axis, we obtain the symmetrical line L4. Figure 6 Taking an original reference current value of 20A as an example, and a preset current upper limit value of 25A as another example, the current value corresponding to line L4 is 15A. It should be noted that... Figure 6 The examples shown are only 20A, 25A, and 15A, and do not limit the specific values ​​of the original reference current or the preset upper limit current. The straight line L4 and the curve L1 together form region B in the lower half of the cycle. Regions A and B are symmetrical within the cycle time, and region B is the second angle region. Figure 6 Points P1' and P2' belong to region B, and the second harmonic angles corresponding to points P1' and P2' on the horizontal axis belong to the second angle region. The energy lost in region A during the first half of the cycle is compensated back in region B during the second half of the cycle, that is, the excess of the instantaneous reference current value in the first half of the cycle relative to the preset upper limit of the current is evenly compensated into the instantaneous reference current value in the second half of the cycle.

[0173] Step S633: Obtain the current difference value corresponding to node a at each moment in the first angle region.

[0174] See Figure 6Node a is any node belonging to the first angle region. The current difference corresponding to node a at each moment is the instantaneous reference current value corresponding to node a at each moment minus the preset current upper limit value.

[0175] If the instantaneous reference current value corresponding to each time node a in the first angular region is Ia, and its corresponding second harmonic angle is θa, and the preset current upper limit value is LIMIT, then the current difference is... Ia = Ia - LIMIT.

[0176] Step S634: Determine the instantaneous value of the current reference instantaneous value of node a at each moment in the first angle region after adjustment. The instantaneous value is the preset current upper limit value.

[0177] The instantaneous reference value of the current at node a at each moment is adjusted to the preset current upper limit value LIMIT.

[0178] Step S635: Determine the adjusted instantaneous value of the current reference instantaneous value of each instantaneous node b belonging to the second angular region as the sum of the current difference corresponding to each instantaneous node a, which is periodically symmetrical with each instantaneous node b in the sinusoidal or cosine signal, and the current reference instantaneous value of each instantaneous node b.

[0179] In sinusoidal or cosine signals, node b is periodically symmetrical to node a. For example, if node a is point P1, then node b is point P1'. The current difference at each moment corresponding to node a is obtained. Ia = Ia - LIMIT, where the instantaneous reference current value corresponding to node a at each time step is Ia, and LIMIT is the preset upper limit value of the current.

[0180] Then, obtain the instantaneous reference current value Ib of node b before adjustment at each time step, and compare the instantaneous reference current value Ib with the current difference. The sum of Ia is determined as the adjusted reference instantaneous value of the current at node b at each moment.

[0181] Therefore, in order to suppress the interference of second harmonic ripple information, the reference current compensation method compensates the instantaneous reference current value of the inner current loop. However, when the compensated instantaneous reference current value of any bridge arm of the DC circuit exceeds the hardware limit under heavy load conditions, the method performs time-domain equalization compensation on that bridge arm to improve the ripple suppression effect.

[0182] It should be noted that in the above embodiments, there is no necessarily a certain order between the steps. Those skilled in the art can understand from the description of the embodiments of this application that the above steps may have different execution orders in different embodiments, that is, they may be executed in parallel or in turn, etc.

[0183] As another aspect of the embodiments of this application, this application provides a ripple-suppressing PI loop control device applied to the aforementioned controller. The ripple-suppressing PI loop control device can be a software module, which includes several instructions stored in a memory. A processor can access the memory, call the instructions, and execute them to complete the ripple-suppressing PI loop control method described in the various embodiments above.

[0184] In some embodiments, the ripple-suppressing PI loop control device can also be constructed from hardware components. For example, the ripple-suppressing PI loop control device can be constructed from one or more chips, which can work in coordination to complete the ripple-suppressing PI loop control method described in the various embodiments above. As another example, the ripple-suppressing PI loop control device can also be constructed from various logic devices, such as general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), microcontrollers, ARM (Acorn RISC Machine) or other programmable logic devices, discrete gate or transistor logic, discrete hardware components, or any combination of these components.

[0185] Please see Figure 10 , Figure 10 This is a schematic diagram of the structure of a PI loop control device for ripple suppression provided in an embodiment of this application, as shown below. Figure 10 As shown, the PI loop control device 200 for ripple suppression includes an extraction module 201, a first determination module 202, and a second determination module 203.

[0186] The extraction module 201 is used to extract the second harmonic component in the inverter power flow based on filtering and Parker transform of the second-order generalized integrator. The first determination module 202 is used to determine the reverse compensation amount of the voltage outer loop of the DC circuit at each moment based on the second harmonic component and the battery connected to the DC circuit. The second determination module 203 is used to determine the reverse-compensated instantaneous current reference value of the current inner loop of each bridge arm of the DC circuit at each moment based on the reverse compensation amount at each moment and the sum of the original reference current value output by the voltage outer loop on each bridge arm of the DC circuit.

[0187] It should be noted that since the ripple suppression PI loop control device and the ripple suppression PI loop control method in the above embodiments are based on the same inventive concept, the corresponding contents in the above method embodiments are also applicable to the device embodiments, and will not be described in detail here.

[0188] In summary, the PI loop control device for ripple suppression directly filters and Parker transforms the inverter power flow on the inverter side through two second-order generalized integrators, resulting in a relatively pure second harmonic component with no large DC component. That is, the PI loop control device of this application obtains a pure second harmonic component with high dynamic performance regarding ripple information. Then, based on the extracted second harmonic component and battery parameters, the reverse compensation amount used for ripple suppression in the loop control is obtained. The reverse compensation amount is then accumulated to the voltage outer loop, thereby achieving ripple suppression with good dynamic performance and good suppression effect in the loop control.

[0189] Please see Figure 11 , Figure 11 This is a schematic diagram of a reference current compensation device provided in an embodiment of this application, as shown below. Figure 11 As shown, the reference current compensation device 300 includes a third determining module 301, a fourth determining module 302, and a balance compensation module 303.

[0190] The third determining module 301 is used to determine the reverse compensation amount of the voltage loop of the DC circuit at each moment based on the extracted second harmonic component. The fourth determining module 302 is used to determine the instantaneous current reference value of the inner current loop of each bridge arm of the multiple DC circuits input to the energy storage system based on the reverse compensation amount and the original current reference value at each moment. The instantaneous current reference values ​​at different moments form a sine wave signal or a cosine wave signal. The equalization compensation module 303 is used to perform time-domain equalization compensation on the bridge arm when all the bridge arms of the DC circuit are working and the instantaneous current reference value of any bridge arm exceeds the preset current upper limit value: the excess amount of the instantaneous current reference value of the first half cycle relative to the preset current upper limit value is evenly compensated to the instantaneous current reference value of the second half cycle.

[0191] In order to suppress the interference of second harmonic ripple information, the reference current compensation device compensates the instantaneous reference current value of the inner current loop. However, under heavy load conditions, when the compensated instantaneous reference current value of any bridge arm of the DC circuit exceeds the hardware limit, the device performs time-domain equalization compensation on that bridge arm to improve the ripple suppression effect.

[0192] Please see Figure 12 , Figure 12 This is a schematic diagram of the structure of a controller provided in an embodiment of this application. Figure 12 As shown, the controller 400 includes one or more processors 401 and a memory 402. Wherein, Figure 12 Take a processor 401 as an example.

[0193] The processor 401 and the memory 402 can be connected via a bus or other means. Figure 12 Taking the example of a connection between China and Israel via a bus.

[0194] The memory 402, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as the program instructions / modules corresponding to the ripple-suppressing PI loop control device in the embodiments of this application. The processor 401 executes various functional applications and data processing of the ripple-suppressing PI loop control device by running the non-volatile software programs, instructions, and modules stored in the memory 402, thereby realizing the functions of the ripple-suppressing PI loop control method provided in the above method embodiments and the various modules or units in the above device embodiments.

[0195] Memory 402 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, memory 402 may optionally include memory remotely located relative to processor 401, which can be connected to processor 401 via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0196] The program instructions / modules are stored in the memory 402. When executed by one or more processors 401, they perform the PI loop control method for ripple suppression in any of the above method embodiments.

[0197] This application also provides a non-transitory computer-readable storage medium storing computer-executable instructions that are executed by one or more processors, for example... Figure 12 One of the processors 401 can enable the one or more processors to execute the ripple suppression PI loop control method in any of the above method embodiments.

[0198] This application also provides a non-volatile computer storage medium storing computer-executable instructions that are executed by one or more processors, for example... Figure 12 One of the processors 401 can enable the one or more processors to execute the ripple suppression PI loop control method in any of the above method embodiments.

[0199] This application also provides a computer program product, which includes a computer program stored on a non-volatile computer-readable storage medium. The computer program includes program instructions that, when executed by a controller, cause the controller to perform any of the ripple suppression PI loop control methods described in the present invention.

[0200] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented using software and a general-purpose hardware platform, or of course, using hardware. Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program in a computer program product instructing related hardware. The computer program can be stored in a non-transitory computer-readable storage medium. The computer program includes program instructions, which, when executed by the UAV, cause the UAV to execute the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.

[0201] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and not to limit them; under the concept of this application, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of this application as described above, which are not provided in detail for the sake of brevity; although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A PI loop control method for ripple suppression, characterized in that, Applied to an energy storage system, the energy storage system comprising an electrically connected multi-channel interleaved parallel DC circuit and an inverter circuit, the method includes: Based on filtering and Parker transform of a second-order generalized integrator, the second harmonic component in the inverter power flow is extracted. Based on the second harmonic component and the battery connected to the DC circuit, the reverse compensation amount of the outer voltage loop of the DC circuit at each moment is determined. Based on the sum of the reverse compensation amount at each moment and the original reference current value output by the voltage outer loop on each bridge arm of the DC circuit, the instantaneous reference current value after reverse compensation at each moment is determined. The method for determining the reverse compensation amount of the outer voltage loop of the DC circuit at each moment, based on the second harmonic component and the battery connected to the DC circuit, includes: The adjustment coefficient is determined based on the battery voltage of the battery connected to the DC circuit and the average discharge efficiency of the battery. Based on the product of the adjustment coefficient and the second harmonic component, the reverse compensation amount of the voltage outer loop of the DC circuit at each moment is determined.

2. The method according to claim 1, characterized in that, Based on the battery voltage of the battery connected to the DC circuit and the average discharge efficiency of the battery, the adjustment coefficient is determined as follows: ； Among them, K DC V is the adjustment coefficient. bat η is the battery voltage of the battery. avg The average discharge efficiency is denoted as .

3. The method according to claim 2, characterized in that, The method further includes: Determine the ripple suppression result of the previous time step and the adjustment coefficient of the previous time step; Determine the preset ripple suppression result at the current moment; Obtain the ratio between the preset ripple suppression result at the current time and the ripple suppression result at the previous time. The adjustment coefficient at the current time is obtained by multiplying the ratio by the adjustment coefficient at the previous time.

4. The method according to claim 1, characterized in that, Based on filtering and Parker transform using a second-order generalized integrator, the second harmonic component in the inverter power flow is extracted, including: The inverter power flow is input into the second-order generalized integrator to obtain the first harmonic component result of the second harmonic component, which includes the first in-phase component and the first quadrature component. The first harmonic component result is then input into a second-order generalized integrator to obtain the second harmonic component result of the second harmonic component, which includes a second in-phase component and a second quadrature component. The second harmonic angle of the Parker transform is determined based on the self-varying angle of the power frequency of the energy storage system at each moment and the preset phase shift adjustment angle. Based on the second harmonic angle, the second in-phase component, and the second quadrature component, calculate the Parker transform result; Perform an inverse Parker transform on the Parker transform result to obtain the second harmonic component.

5. The method according to claim 1, characterized in that, The method further includes: When the number of working bridge arms of the DC circuit is less than the total number of bridge arms of the DC circuit, and when the instantaneous reference current value on any working bridge arm is greater than the preset current upper limit value, the number of working bridge arms is increased. When all bridge arms of the DC circuit are working, and the instantaneous reference current value on any bridge arm is greater than the preset current upper limit, the instantaneous reference current value on that bridge arm is subjected to time-domain equalization compensation within a period to obtain the final instantaneous reference current value at each moment.

6. The method according to claim 4, characterized in that, The method further includes determining the power frequency self-varying angle, including: When the energy storage system is in an off-grid state, the current power frequency self-change angle is determined based on the operating frequency of the inverter circuit, the operating frequency of the main control unit of the energy storage system, and the power frequency self-change angle of the previous moment. When the energy storage system is in grid-connected state, the self-varying angle of the power frequency at each moment is determined to be the angle of the grid voltage at each moment.

7. The method according to claim 6, characterized in that, The current power frequency self-variation angle is determined as follows: ； in, The angle of self-varying power frequency at the previous moment. The angle of self-varying power frequency at the current moment. The operating frequency of the inverter circuit is [value]. The operating frequency of the main control unit of the energy storage system.

8. The method according to any one of claims 1 to 7, characterized in that, The output of the inner current loop of the DC circuit in the PI loop control method is: Based on the instantaneous reference current value output by the outer voltage loop, determine the instantaneous reference current value of the inner current loop allocated to each bridge arm; The current error value of each bridge arm is determined based on the instantaneous reference current value of each bridge arm and the current sampling value on each bridge arm. The current error value of each bridge arm is controlled by PI to obtain the modulation voltage value of each bridge arm. The output of each bridge arm in the inner current loop is determined based on the difference between the modulation voltage value and the feedback value of each bridge arm.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, the computer program including program instructions that, when executed by a processor, cause the processor to perform the ripple suppression PI loop control method as described in any one of claims 1 to 8.

10. A PI loop control device for ripple suppression, characterized in that, Applied to an energy storage system, the energy storage system includes an electrically connected multi-channel interleaved parallel DC circuit and an inverter circuit, and the ripple-suppressing PI loop control device includes: The extraction module is used to extract the second harmonic component from the inverter power flow based on filtering and Parker transform using a second-order generalized integrator. A first determining module is configured to determine the reverse compensation amount of the outer voltage loop of the DC circuit at each moment based on the second harmonic component and the battery connected to the DC circuit; wherein, determining the reverse compensation amount of the outer voltage loop of the DC circuit at each moment based on the second harmonic component and the battery connected to the DC circuit includes: determining an adjustment coefficient based on the battery voltage of the battery connected to the DC circuit and the average discharge efficiency of the battery; and determining the reverse compensation amount of the outer voltage loop of the DC circuit at each moment based on the product of the adjustment coefficient and the second harmonic component. The second determining module is used to determine the instantaneous reference current value after reverse compensation at each moment based on the sum of the reverse compensation amount at each moment and the original reference current value output by the voltage outer loop on each bridge arm of the DC circuit.

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