Audio power amplifier chip, control method thereof and electronic equipment

Abstract

The invention discloses an audio power amplifier chip, a control method thereof and electronic equipment, and belongs to the technical field of audio amplification. The audio power amplifier chip is characterized in that the audio power amplifier chip comprises a signal input end for accessing an audio input signal; the signal output end is connected with the loudspeaker; an impedance module; a power amplifier input end of the power amplifier module is connected with the signal input end, a first power amplifier output end of the power amplifier module is connected with the signal output end, and a second power amplifier output end of the power amplifier module is connected with the signal output end through an impedance module; wherein the power amplifier module generates a power amplifier signal according to an audio input signal, and the output impedance of the power amplifier module is adjusted by switching a power amplifier output end for outputting the power amplifier signal. The embodiment of the invention can support the adjustment of the output impedance of the power amplifier module, and is favorable for adapting to the power amplifier output requirements in different audio output application scenarios.

Description

Technical Field

[0001] This invention relates to the field of audio amplification technology, and in particular to an audio power amplifier chip and its control method and electronic equipment. Background Technology

[0002] In devices employing TDD (Time Division Duplex) technology, the audio amplifier and RF module share the power system and PCB layout space. In TDD mode, the periodic switching between transmit (TX) and receive (RX) signals causes instantaneous current surges in the RF module, creating targeted TX / RX switching noise. This noise contains both power supply ripple and electromagnetic interference (EMI). This noise intrudes into the input, gain, and output stages of the audio amplifier through shared power coupling, PCB space radiation, and signal line crosstalk, resulting in periodic noise (manifested as a "click" or "hum") superimposed on the audio amplifier's output signal, synchronized with the TX / RX switching timing, severely degrading audio quality.

[0003] Currently, to achieve TDD noise suppression, common methods include power supply filter capacitors, PCB layout optimization, and setting limiting circuits. However, current TDD noise suppression methods all provide static noise suppression and cannot flexibly adjust the power amplifier output, making it difficult to adapt to the power amplifier output requirements of different audio output application scenarios. Summary of the Invention

[0004] This invention provides an audio power amplifier chip and its control method and electronic device to support the adjustment of the output impedance of the power amplifier module, which is beneficial to adapting to the power amplifier output requirements in different audio output application scenarios.

[0005] In a first aspect, embodiments of the present invention provide an audio power amplifier chip, comprising:

[0006] The signal input terminal is used to connect audio input signals;

[0007] Connect the speaker to the signal output terminal;

[0008] Impedance module;

[0009] A power amplifier module, wherein the power amplifier input terminal of the power amplifier module is connected to the signal input terminal, the first power amplifier output terminal of the power amplifier module is connected to the signal output terminal, and the second power amplifier output terminal of the power amplifier module is connected to the signal output terminal through the impedance module; wherein, the power amplifier module generates a power amplifier signal according to the audio input signal, and adjusts the output impedance of the power amplifier module by switching the power amplifier output terminal that outputs the power amplifier signal.

[0010] Optionally, the power amplifier input terminal includes: a first power amplifier input terminal and a second power amplifier input terminal, both of which are connected to the signal input terminal;

[0011] The power amplifier module includes:

[0012] A first power amplifier is connected between the input terminal and the output terminal of the first power amplifier; when the first power amplifier is enabled, it generates the power amplifier signal according to the audio input signal and outputs it from the output terminal of the first power amplifier.

[0013] A second power amplifier is connected between the input terminal and the output terminal of the second power amplifier; when the second power amplifier is enabled, it generates the power amplifier signal according to the audio input signal and outputs it from the output terminal of the second power amplifier.

[0014] In the power amplifier module, the output terminal of the power amplifier signal is switched by switching the enabled power amplifier.

[0015] Optionally, the power amplifier module further includes: a mode switching control unit, wherein a first input terminal of the mode switching control unit is connected to the input terminal of the first power amplifier, a second input terminal of the mode switching control unit is connected to the input terminal of the second power amplifier, and a drive output terminal of the mode switching control unit is respectively connected to the first power amplifier and the second power amplifier; wherein, when the first power amplifier is enabled, the mode switching control unit connects the first input terminal and the drive output terminal, and when the second power amplifier is enabled, the mode switching control unit connects the second input terminal and the drive output terminal;

[0016] The audio amplifier chip also includes:

[0017] The first input module is connected between the signal input terminal and the first power amplifier input terminal;

[0018] The first feedback module is connected between the output terminal and the input terminal of the first power amplifier;

[0019] The second input module is connected between the signal input terminal and the second power amplifier input terminal;

[0020] The second feedback module is connected between the output terminal and the input terminal of the second power amplifier.

[0021] Optionally, both the first power amplifier and the second power amplifier are differential power amplifiers; the signal input terminal includes a positive signal input terminal and a negative signal input terminal, and the signal output terminal includes a positive signal output terminal and a negative signal output terminal; the first power amplifier input terminal includes a first positive power amplifier input terminal and a first negative power amplifier input terminal, the second power amplifier input terminal includes a second positive power amplifier input terminal and a second negative power amplifier input terminal, the first power amplifier output terminal includes a first positive power amplifier output terminal and a first negative power amplifier output terminal, and the second power amplifier output terminal includes a second positive power amplifier output terminal and a second negative power amplifier output terminal;

[0022] The first input module includes: a first resistor and a second resistor; the first resistor is connected between the positive signal input terminal and the first positive power amplifier input terminal, and the second resistor is connected between the negative signal input terminal and the first negative power amplifier input terminal;

[0023] The second input module includes a third resistor and a fourth resistor; the third resistor is connected between the positive signal input terminal and the second positive power amplifier input terminal, and the fourth resistor is connected between the negative signal input terminal and the second negative power amplifier input terminal.

[0024] The first feedback module includes a fifth resistor and a sixth resistor; the fifth resistor is connected between the output terminal of the first negative power amplifier and the input terminal of the first positive power amplifier; the sixth resistor is connected between the output terminal of the first positive power amplifier and the input terminal of the first negative power amplifier.

[0025] The second feedback module includes a seventh resistor and an eighth resistor; the seventh resistor is connected between the output terminal of the second negative power amplifier and the input terminal of the second positive power amplifier; the eighth resistor is connected between the output terminal of the second positive power amplifier and the input terminal of the second negative power amplifier.

[0026] The impedance module includes a ninth resistor and a tenth resistor; the ninth resistor is connected between the output terminal of the second negative power amplifier and the output terminal of the positive signal, and the tenth resistor is connected between the output terminal of the second positive power amplifier and the output terminal of the negative signal; the output terminal of the first negative power amplifier is connected to the output terminal of the positive signal, and the output terminal of the first positive power amplifier is connected to the output terminal of the negative signal.

[0027] In the mode switching control unit, the first input terminal includes a first positive input terminal and a first negative input terminal, the second input terminal includes a second positive input terminal and a second negative input terminal, and the drive output terminal includes a positive drive output terminal and a negative drive output terminal; the first positive input terminal is connected to the first positive power amplifier input terminal, the first negative input terminal is connected to the first negative power amplifier input terminal, the second positive input terminal is connected to the second positive power amplifier input terminal, and the second negative input terminal is connected to the second negative power amplifier input terminal; the negative drive output terminal is connected to the positive input terminal of the first power amplifier and the negative input terminal of the second power amplifier, and the positive drive output terminal is connected to the negative input terminal of the first power amplifier and the positive input terminal of the second power amplifier; the positive output terminal of the first power amplifier is connected to the first negative power amplifier output terminal, the negative output terminal of the first power amplifier is connected to the first positive power amplifier output terminal, the positive output terminal of the second power amplifier is connected to the second positive power amplifier output terminal, and the negative output terminal of the second power amplifier is connected to the second negative power amplifier output terminal.

[0028] Optionally, the mode switching control unit includes:

[0029] The switch subunit includes: a first switch, a second switch, a third switch, and a fourth switch;

[0030] The first input stage is connected to the first positive input terminal;

[0031] The second input stage is connected to the first negative input terminal;

[0032] The third input stage is connected to the second positive input terminal;

[0033] The fourth input stage is connected to the second negative input terminal;

[0034] Wherein, the first end of the first switch is connected to the output of the first input stage, the first end of the second switch is connected to the output of the second input stage, the first end of the third switch is connected to the output of the third input stage, and the first end of the fourth switch is connected to the output of the fourth input stage; the second ends of the first switch and the second ends of the third switch are connected to a first node; the second ends of the second switch and the second ends of the fourth switch are connected to a second node; the first node and the second node are connected one-to-one to the positive drive output and the negative drive output.

[0035] Optionally, the mode switching control unit further includes:

[0036] At least one first amplification stage; when the number of stages of the first amplification stage is odd, each first amplification stage is cascaded between the first node and the positive drive output terminal; when the number of stages of the first amplification stage is even, each first amplification stage is cascaded between the first node and the negative drive output terminal.

[0037] At least one second amplification stage, the number of stages of the second amplification stage being the same as the number of stages of the first amplification stage; when the number of stages of the second amplification stage is odd, each second amplification stage is cascaded between the second node and the negative drive output terminal; when the number of stages of the second amplification stage is even, each second amplification stage is cascaded between the second node and the positive drive output terminal.

[0038] Optionally, the first input stage includes: a first transistor, the gate of the first transistor being connected to the first positive input terminal, and the second terminal of the first transistor being connected to the first terminal of the first switch;

[0039] The second input stage includes: a second transistor, the gate of which is connected to the first negative input terminal, and the second terminal of which is connected to the first terminal of the second switch;

[0040] The third input stage includes: a third transistor, the gate of which is connected to the second positive input terminal, and the second terminal of which is connected to the first terminal of the third switch;

[0041] The fourth input stage includes: a fourth transistor, the gate of which is connected to the second negative input terminal, and the second terminal of which is connected to the first terminal of the fourth switch;

[0042] Wherein, the first terminal of the first transistor, the first terminal of the second transistor, the first terminal of the third transistor, and the first terminal of the fourth transistor are connected to the third node;

[0043] The mode switching control unit also includes:

[0044] The first current source is connected between the power supply terminal and the first node;

[0045] A second current source is connected between the power supply terminal and the second node;

[0046] A third current source is connected between the grounding terminal and the third node;

[0047] The first amplification stage includes a fifth transistor and a fourth current source, which are connected in series between the power supply terminal and the ground terminal; wherein, the gate of the fifth transistor serves as the input terminal of the first amplification stage, and the connection node between the fifth transistor and the fourth current source serves as the output terminal of the first amplification stage.

[0048] The second amplification stage includes a sixth transistor and a fifth current source, which are connected in series between the power supply terminal and the ground terminal; wherein the gate of the sixth transistor serves as the input terminal of the second amplification stage, and the connection node between the sixth transistor and the fifth current source serves as the output terminal of the second amplification stage.

[0049] Optionally, the first power amplifier is a Class D power amplifier and the second power amplifier is a Class AB power amplifier; or, both the first power amplifier and the second power amplifier are Class D power amplifiers.

[0050] Secondly, embodiments of the present invention also provide a control method for an audio power amplifier chip, applicable to the audio power amplifier chip provided in any embodiment of the present invention; the control method for the audio power amplifier chip includes:

[0051] In speaker mode, the power amplifier module is controlled to output the power amplifier signal through the first power amplifier output terminal;

[0052] In earpiece mode, the power amplifier module is controlled to output the power amplifier signal through the second power amplifier output terminal.

[0053] Thirdly, embodiments of the present invention also provide an electronic device, including: a controller, a speaker, and an audio amplifier chip as provided in any embodiment of the present invention; the audio amplifier chip is connected to the speaker, and the controller is connected to the amplifier module.

[0054] The audio amplifier chip provided in this embodiment of the invention includes an amplifier module and an impedance module. The amplifier module can adjust its output impedance by switching the output terminal of the amplifier signal, enabling the audio amplifier chip to support dynamic switching of operating modes according to application scenarios. Specifically, for applications more sensitive to TDD power ripple, such as earpiece mode, the output can be switched to the channel containing the second amplifier output terminal. An impedance module is connected in series on this channel to increase the output impedance and reduce TDD noise. For applications with high audio power requirements, such as speaker mode, the output can be switched to the channel containing the first amplifier output terminal. This channel has no impedance module, avoiding power suppression and preventing audio distortion caused by accidentally cutting off the peak value of the amplifier signal due to noise peak suppression. Therefore, this embodiment of the invention supports adjustment of the amplifier module's output impedance, which is beneficial for adapting to the amplifier output requirements of different audio output application scenarios.

[0055] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0056] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0057] Figure 1 This is a schematic diagram of the structure of an audio power amplifier chip provided in an embodiment of the present invention;

[0058] Figure 2 This is a schematic diagram of another audio power amplifier chip provided in an embodiment of the present invention;

[0059] Figure 3 This is a schematic diagram of the structure of another audio power amplifier chip provided in an embodiment of the present invention;

[0060] Figure 4 This is a schematic diagram of the structure of another audio power amplifier chip provided in an embodiment of the present invention;

[0061] Figure 5 This is a schematic diagram of the structure of another audio power amplifier chip provided in an embodiment of the present invention;

[0062] Figure 6 This is a schematic diagram illustrating the connection relationship between an audio power amplifier chip and a speaker in related technologies.

[0063] Figure 7 This is a schematic diagram illustrating the connection relationship between another audio amplifier chip and a speaker in related technologies;

[0064] Figure 8 This is a schematic diagram of the structure of a mode switching control unit provided in an embodiment of the present invention;

[0065] Figure 9 This is a schematic diagram of another mode switching control unit provided in an embodiment of the present invention;

[0066] Figure 10 This is a flowchart illustrating a control method for an audio power amplifier chip provided in an embodiment of the present invention;

[0067] Figure 11 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0068] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0069] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion.

[0070] This invention provides an audio power amplifier chip with output impedance switching function, which can adapt to the power amplifier output requirements of different audio output application scenarios. Figure 1 This is a schematic diagram of the structure of an audio power amplifier chip provided in an embodiment of the present invention. See also... Figure 1 The audio power amplifier chip 100 includes: a signal input terminal PIN, a signal output terminal POUT, a power amplifier module PA, and an impedance module 10.

[0071] The signal input terminal PIN is connected to the audio input signal SIN. The signal output terminal POUT is connected to the speaker 200. The power amplifier module PA's power amplifier input terminal IN is connected to the signal input terminal PIN. The first power amplifier output terminal OUT1 of the power amplifier module PA is connected to the signal output terminal POUT. The second power amplifier output terminal OUT2 of the power amplifier module PA is connected to the signal output terminal POUT through the impedance module 10. The power amplifier module PA generates a power amplifier signal based on the audio input signal SIN and adjusts the output impedance of the power amplifier module PA by switching the power amplifier output terminal that outputs the power amplifier signal.

[0072] Specifically, the power amplifier module PA may include power amplification devices for amplifying the audio input signal SIN to obtain a power signal for driving the speaker 200. The impedance module 10 is a functional module with a certain impedance; one end is connected to the second power amplifier output terminal OUT2, and the other end is connected to the signal output terminal POUT. When the power amplifier module PA outputs through the first power amplifier output terminal OUT1, the output signal of the first power amplifier output terminal OUT1 is directly supplied to the speaker 200, ensuring the driving power and efficiency of the speaker 200. Therefore, this output channel through the first power amplifier output terminal OUT1 is more suitable for scenarios with high audio power and efficiency requirements. When the power amplifier module PA outputs through the second power amplifier output terminal OUT2, the output signal of the second power amplifier output terminal OUT2 is provided to the speaker 200 after passing through the impedance module 10. Passing through the impedance module 10 effectively increases the output impedance. The series connection of the impedance module 10 in the output channel can reduce TDD noise. Therefore, this output channel through the second power amplifier output terminal OUT2 is more suitable for scenarios with low audio signal amplitude and greater sensitivity to TDD power supply ripple.

[0073] For example, when the speaker 200 operates in loudspeaker mode, given the high audio power requirements (e.g., 1-5W) and efficiency requirements in loudspeaker mode, the power amplifier module PA can be controlled to output the power amplifier signal through the first power amplifier output terminal OUT1, and the output channel does not pass through the impedance module 10, thereby ensuring output power and efficiency. When the speaker 200 operates in earpiece mode, given the low audio signal amplitude (e.g., ≤1V) and greater sensitivity to TDD power supply ripple in earpiece mode, the power amplifier module PA can be controlled to output the power amplifier signal through the second power amplifier output terminal OUT2, and the TDD noise suppression effect is achieved through the impedance module 10 connected in series on the output channel. It is understood that the above application scenarios are only illustrative examples and are not intended to limit the invention. In other embodiments, any scenario with higher audio power requirements can output through the first power amplifier output terminal OUT1, and any scenario with higher TDD suppression requirements can output through the second power amplifier output terminal OUT2.

[0074] The audio amplifier chip 100 provided in this embodiment of the invention includes an amplifier module PA and an impedance module 10. The amplifier module PA can adjust its output impedance by switching the output terminal of the amplifier signal, enabling the audio amplifier chip 100 to support dynamic switching of operating modes according to application scenarios. Specifically, for applications more sensitive to TDD power ripple, such as handset mode, the output can be switched to the channel containing the second amplifier output terminal OUT2. The impedance module 10 is connected in series on this channel to increase the output impedance and reduce TDD noise. For applications with high audio power requirements, such as speaker mode, the output can be switched to the channel containing the first amplifier output terminal OUT1. This channel does not have an impedance module 10, avoiding power suppression and preventing audio distortion caused by accidentally cutting off the peak value of the amplifier signal due to noise peak suppression. Therefore, this embodiment of the invention supports adjustment of the output impedance of the amplifier module PA, which is beneficial for adapting to the amplifier output requirements of different audio output application scenarios.

[0075] Figure 2 This is a schematic diagram of another audio power amplifier chip provided in an embodiment of the present invention. See also... Figure 2 Based on the above embodiments, optionally, the power amplifier input terminals include: a first power amplifier input terminal IN1 and a second power amplifier input terminal IN2; both the first power amplifier input terminal IN1 and the second power amplifier input terminal IN2 are connected to the signal input terminal PIN. The power amplifier module PA includes: a first power amplifier PA1 and a second power amplifier PA2. The first power amplifier PA1 is connected between the first power amplifier input terminal IN1 and the first power amplifier output terminal OUT1; when enabled, the first power amplifier PA1 generates a power amplifier signal based on the audio input signal and outputs it from the first power amplifier output terminal OUT1. The second power amplifier PA2 is connected between the second power amplifier input terminal IN2 and the second power amplifier output terminal OUT2; when enabled, the second power amplifier PA2 generates a power amplifier signal based on the audio input signal and outputs it from the second power amplifier output terminal OUT2. The power amplifier module PA switches the power amplifier output terminal that outputs the power amplifier signal by switching the enabled power amplifier, thereby adjusting the output impedance of the power amplifier module PA. For example, an electronic device in which the audio power amplifier chip 100 is located may be equipped with a controller that enables the corresponding power amplifier in the power amplifier module PA according to the usage mode of the speaker 200, such as enabling the second power amplifier PA2 in earpiece mode and enabling the first power amplifier in speaker mode.

[0076] The first power amplifier PA1 and the second power amplifier PA2 can be selected according to actual needs, and the two types can be the same or different.

[0077] For example, in one implementation, the first power amplifier PA1 and the second power amplifier PA2 can both be configured as Class D power amplifiers to construct the power amplifier module PA at a lower cost.

[0078] Alternatively, in another implementation, the first power amplifier PA1 can be a Class D power amplifier, and the second power amplifier PA2 can be a Class AB power amplifier. While using a Class D power amplifier for the second power amplifier PA2 can effectively solve the TDD noise problem and is cost-effective, the switching characteristics of a Class D power amplifier cause a voltage drop across the series-connected impedance module 10 during the freewheeling phase. This causes the internal parasitic diodes of the power amplifier to conduct, thus affecting the THD (Total Harmonic Distortion) in this output mode. Therefore, it is preferable to set the second power amplifier PA2 to a Class AB power amplifier, as there is no freewheeling phase, preventing the internal diodes of the power amplifier from conducting, thereby improving audio processing performance.

[0079] Figure 3 This is a schematic diagram of the structure of another audio power amplifier chip provided in an embodiment of the present invention. See also... Figure 3 Based on the above embodiments, optionally, the power amplifier module further includes a mode switching control unit (OPA), wherein both power amplifiers are connected to their corresponding power input terminals via the mode switching control unit. Specifically, the first input terminal DIN1 of the mode switching control unit OPA is connected to the first power amplifier input terminal IN1, the second input terminal DIN2 of the mode switching control unit OPA is connected to the second power amplifier input terminal IN2, and the drive output terminal DOUT of the mode switching control unit OPA is connected to the first power amplifier PA1 and the second power amplifier PA2, respectively. When the first power amplifier PA1 is enabled, the mode switching control unit OPA connects the first input terminal DIN1 to the drive output terminal DOUT, and when the second power amplifier PA2 is enabled, it connects the second input terminal DIN2 to the drive output terminal DOUT.

[0080] Furthermore, the audio amplifier chip 100 also includes: a first input module 21, a second input module 22, a first feedback module 31, and a second feedback module 32. The first input module 21 is connected between the signal input terminal PIN and the first amplifier input terminal IN1; the first feedback module 31 is connected between the first amplifier output terminal OUT1 and the first amplifier input terminal IN1. The second input module 22 is connected between the signal input terminal PIN and the second amplifier input terminal IN2; the second feedback module 32 is connected between the second amplifier output terminal OUT2 and the second amplifier input terminal IN2.

[0081] When the mode switching control unit OPA connects the first input terminal DIN1 and the drive output terminal DOUT, the first power amplifier PA1 is enabled. At this time, the first input module 21, the mode switching control unit OPA, the first power amplifier PA1, and the first feedback module 31 constitute the first signal processing channel for the audio input signal. Gain adjustment of this first signal processing channel can be achieved by properly configuring the impedances of the first feedback module 31 and the first input module 21. When the mode switching control unit OPA connects the second input terminal DIN2 and the drive output terminal DOUT, the second power amplifier PA2 is enabled. At this time, the second input module 22, the mode switching control unit OPA, the second power amplifier PA2, the impedance module 10, and the second feedback module 32 constitute the second signal processing channel for the audio input signal. Gain adjustment of this second signal processing channel can be achieved by properly configuring the impedances of the second feedback module 32 and the second input module 22.

[0082] Based on the above embodiments, the audio power amplifier chip 100 may optionally be a single-ended processing chip, both power amplifiers may be single-ended power amplifiers, and other corresponding functional modules may also be set based on single-ended power amplifiers. Both the audio input signal and the power amplifier signal may be single-ended signals.

[0083] Alternatively, the audio power amplifier chip 100 can be a differential processing chip, and both power amplifiers can be differential power amplifiers. The corresponding other functional modules are also set based on the differential power amplifiers, and both the audio input signal and the power amplifier signal can be differential signals.

[0084] The following is an exemplary description of the specific structure of a differential audio power amplifier chip.

[0085] Figure 4 This is a schematic diagram of the structure of another audio power amplifier chip provided in an embodiment of the present invention. See also... Figure 4In one embodiment, optionally, the first power amplifier PA1 and the second power amplifier PA2 are both differential power amplifiers; the signal input terminals include a positive signal input terminal PIN+ and a negative signal input terminal PIN-, and the signal output terminals include a positive signal output terminal POUT+ and a negative signal output terminal POUT-; correspondingly, the audio input signal may include a differential first audio input signal and a second audio input signal, respectively provided to the positive signal input terminal PIN+ and the negative signal input terminal PIN-, and the power amplifier signal may include a differential first power amplifier signal and a second power amplifier signal, respectively provided to the positive signal output terminal POUT+ and the negative signal output terminal POUT-. Furthermore, the first power amplifier input terminals include a first positive power amplifier input terminal INP1 and a first negative power amplifier input terminal INN1, the second power amplifier input terminals include a second positive power amplifier input terminal INP2 and a second negative power amplifier input terminal INN2, the first power amplifier output terminals include a first positive power amplifier output terminal OUTP1 and a first negative power amplifier output terminal OUTN1, and the second power amplifier output terminals include a second positive power amplifier output terminal OUTP2 and a second negative power amplifier output terminal OUTP2.

[0086] Based on this, the first negative power amplifier output terminal OUTN1 is connected to the positive signal output terminal POUT+, and the first positive power amplifier output terminal OUTP1 is connected to the negative signal output terminal POUT-.

[0087] The impedance module includes: a ninth resistor R9 and a tenth resistor R10; the ninth resistor R9 is connected between the second negative power amplifier output terminal OUTN2 and the positive signal output terminal POUT+, and the tenth resistor R10 is connected between the second positive power amplifier output terminal OUTP2 and the negative signal output terminal POUT-.

[0088] The first input module includes a first resistor R1 and a second resistor R2. The first resistor R1 is connected between the positive signal input terminal PIN+ and the first positive power amplifier input terminal INP1, and the second resistor R2 is connected between the negative signal input terminal PIN- and the first negative power amplifier input terminal INN1. The resistance values ​​of the first resistor R1 and the second resistor R2 are equal.

[0089] The second input module includes a third resistor R3 and a fourth resistor R4. The third resistor R3 is connected between the positive signal input terminal PIN+ and the second positive power amplifier input terminal INP2, and the fourth resistor R4 is connected between the negative signal input terminal PIN- and the second negative power amplifier input terminal INN2. The resistance values ​​of the third resistor R3 and the fourth resistor R4 are equal.

[0090] The first feedback module includes a fifth resistor R5 and a sixth resistor R6. The fifth resistor R5 is connected between the first negative power amplifier output terminal OUTN1 and the first positive power amplifier input terminal INP1. The sixth resistor R6 is connected between the first positive power amplifier output terminal OUTP1 and the first negative power amplifier input terminal INP1. The resistance values ​​of the fifth resistor R5 and the sixth resistor R6 are equal.

[0091] The second feedback module includes a seventh resistor R7 and an eighth resistor R8. The seventh resistor R7 is connected between the second negative power amplifier output terminal OUTN2 and the second positive power amplifier input terminal INP2. The eighth resistor R8 is connected between the second positive power amplifier output terminal OUTP2 and the second negative power amplifier input terminal INP2. The resistance values ​​of the seventh resistor R7 and the eighth resistor R8 are equal.

[0092] For example, the resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3 and the fourth resistor R4 can be set to be equal, and the resistance values ​​of the fifth resistor R5, the sixth resistor R6, the seventh resistor R7 and the eighth resistor R8 can be set to be equal, so that the impedance difference between the two signal processing channels is only due to the presence or absence of the impedance module 10.

[0093] See also Figure 4 Based on the above embodiments, optionally, the audio amplifier chip 100 may further include a buffer as an input isolation device for the signal input terminal, connected between the signal input terminal and the two input modules, to isolate the audio input signal before providing it to the two input modules. Specifically, in the differential structure, the first input terminal INP of the buffer is connected to the positive signal input terminal PIN+, the second input terminal INN of the buffer is connected to the negative signal input terminal PIN-, the first output terminal OUTP of the buffer is connected to the first resistor R1 and the third resistor R3, and the second output terminal OUTN of the buffer is connected to the second resistor R2 and the fourth resistor R4.

[0094] See Figure 5 In the mode switching control unit OPA, the first input terminal includes a first positive input terminal and a first negative input terminal, the second input terminal includes a second positive input terminal and a second negative input terminal, and the drive output terminal includes a positive drive output terminal and a negative drive output terminal. See, for example... Figure 5For the mode switching control unit OPA, the four terminals on the left side, from top to bottom, are the first positive input terminal, the second positive input terminal, the second negative input terminal, and the first negative input terminal, respectively. The two terminals on the right side, from top to bottom, are the negative drive output terminal and the positive drive output terminal, respectively. Specifically, the first positive input terminal is connected to the first positive power amplifier input terminal INP1, the first negative input terminal is connected to the first negative power amplifier input terminal INN1, the second positive input terminal is connected to the second positive power amplifier input terminal INP2, and the second negative input terminal is connected to the second negative power amplifier input terminal INN2. The negative drive output terminal is connected to the positive input terminal of the first power amplifier PA1 and the negative input terminal of the second power amplifier PA2, and the positive drive output terminal is connected to the negative input terminal of the first power amplifier PA1 and the positive input terminal of the second power amplifier PA2. The positive output terminal of the first power amplifier PA1 is connected to the first negative power amplifier output terminal OUTN1, the negative output terminal of the first power amplifier PA1 is connected to the first positive power amplifier output terminal OUTP1, the positive output terminal of the second power amplifier PA2 is connected to the second positive power amplifier output terminal OUTP2, and the negative output terminal of the second power amplifier PA2 is connected to the second negative power amplifier output terminal OUTN2. This completes the internal connections of the power amplifier module PA. When the first input terminal is connected to the drive output terminal, the first positive input terminal is connected to one of the positive drive output terminal and the negative drive output terminal, and the first negative input terminal is connected to the other of the positive drive output terminal and the negative drive output terminal; when the second input terminal is connected to the drive output terminal, the second positive input terminal is connected to one of the positive drive output terminal and the negative drive output terminal, and the second negative input terminal is connected to the other of the positive drive output terminal and the negative drive output terminal.

[0095] In summary, to adapt to the TDD noise suppression requirements of different audio output scenarios, this embodiment of the invention provides an audio power amplifier chip 100 integrating a "dual-mode switching + TDD noise suppression" architecture. The signal processing channel is selected by switching between the first power amplifier input terminal (including INP1 and INN1) and the second power amplifier input terminal (including INP2 and INN2). This embodiment represents an optimization of the chip design architecture. Without changing the external interface, it achieves efficient noise suppression in different modes through internal hardware collaboration and parameter adaptation. Taking the earpiece mode and speaker mode as examples, the specific design is as follows:

[0096] Handpiece mode: To address the characteristics of low audio signal amplitude (typically ≤1V) and greater sensitivity to TDD power supply ripple in handpiece mode, an impedance module is integrated into the audio power amplifier output link. The specific implementation method is as follows: When the mode switching control unit OPA receives the "earpiece mode" command, it controls the second input terminal to connect with the drive output terminal. At this time, the positive signal input terminal PIN+ / negative signal input terminal PIN- is connected to the buffer, and then connected to the second positive power amplifier input terminal INP2 / second negative power amplifier input terminal INN2 of the power amplifier module PA through the third resistor R3 / fourth resistor R4. Then, the drive signal of the second power amplifier PA2 is generated through the link between the second input terminal of the mode switching control unit OPA and the drive output terminal. The second power amplifier PA2 outputs the first power amplifier signal / second power amplifier signal through the second positive power amplifier output terminal OUTP2 / second negative power amplifier output terminal OUTN2 of the power amplifier module PA, and then provides it to the negative signal output terminal POUT- / positive signal output terminal POUT+ through the ninth resistor R9 / tenth resistor R10 to drive the speaker 200 to produce sound; and the first power amplifier signal / second power amplifier signal is fed back to the second negative power amplifier input terminal INN2 / second positive power amplifier input terminal INP2 of the power amplifier module PA through the eighth resistor R8 / seventh resistor R7.

[0097] Speaker Mode: For situations where the audio power requirement (typically 1-5W) and efficiency requirement are high in speaker mode, when the mode switching control unit OPA receives the "speaker mode" command, it controls the first input terminal to connect with the drive output terminal. At this time, the positive signal input terminal PIN+ / negative signal input terminal PIN- is connected to the buffer, and then connected to the first positive power amplifier input terminal INP1 / first negative power amplifier input terminal INN1 of the power amplifier module PA through the first resistor R1 / second resistor R2. Then, the drive signal of the first power amplifier PA1 is generated through the link between the first input terminal of the mode switching control unit OPA and the drive output terminal. The first power amplifier PA1 outputs the first power amplifier signal / second power amplifier signal through the first positive power amplifier output terminal OUTP1 / first negative power amplifier output terminal OUTN1 of the power amplifier module PA, and provides it to the negative signal output terminal POUT- / positive signal output terminal POUT+ to drive the speaker 200 to produce sound; and the first power amplifier signal / second power amplifier signal is fed back to the first negative power amplifier input terminal INN1 / first positive power amplifier input terminal INP1 of the power amplifier module PA through the sixth resistor R6 / fifth resistor R5.

[0098] Understandably, the controller in the electronic device is also connected to the mode switching control unit OPA. The controller transmits a "speaker mode" command to the mode switching control unit OPA while enabling the first power amplifier PA1, and transmits a "earpiece mode" command to the mode switching control unit OPA while enabling the second power amplifier PA2.

[0099] In summary, in this embodiment, the mode switching control unit OPA is integrated inside the power amplifier module PA, which is equivalent to integrating the mode switching control function inside the power amplifier module PA. Specifically, when the earpiece mode is selected, INP2 / INN2 switches to the signal processing channel with the impedance module, and the signal processing channels of INP1 / INN1 are disconnected; when switching to speaker mode, INP1 / INN1 switches to the signal processing channel without the impedance module, and the signal processing channels of INP2 / INN2 are disconnected.

[0100] Currently, there are two main methods for solving TDD in related technologies:

[0101] 1. See Figure 6 The audio amplifier chip has two input terminals: a positive input terminal IN+ and a negative input terminal IN-. Its output terminals include a positive output terminal OUT+ and a negative output terminal OUT-. Impedance switching is achieved by connecting resistors in series at both output terminals and using parallel switching devices. This method requires switching devices with low conduction impedance, which are expensive and also increases the number of peripheral components and the overall footprint of the chip.

[0102] 2. See Figure 7 This method integrates a series resistor and a switching device connected in parallel with the resistor into the audio amplifier chip, positioned between the amplifier assembly and the output. While this reduces the number of peripheral components and the overall layout area, the integrated switch area is relatively large. Furthermore, the switching impedance reduces the output power and efficiency in speaker mode, affecting sound production in speaker mode.

[0103] In both of the above schemes, the switching device is connected to the output path of the power amplifier signal to the speaker. On the one hand, since the switching device itself has impedance, a certain impedance is also introduced into the output path in speaker mode, which will affect the playback efficiency (loudness) in speaker mode. In addition, there is loss on the switching device in the output path, which affects the output power. On the other hand, since the switching device is connected to the output path, and the power amplifier signal is a high-voltage signal after being amplified by the power amplifier, both of the above schemes in the related technologies need to use high-voltage switching devices, which are costly and have a large area.

[0104] The audio power amplifier chip 100 provided in this embodiment integrates the mode switching control function within the power amplifier module PA by setting a mode switching control unit OPA. It can be understood that the power amplifier itself is composed of power transistors, and the drive signal output by the drive output terminal of the mode switching control unit OPA is provided to the gate of the power transistors. That is, the output signal of the switching control unit OPA is the drive signal of the power amplifier. Therefore, in this embodiment, the mode switching control unit OPA related to switching is set on the drive path of the power amplifier, rather than on the output path of the power amplifier signal. Thus, the setting of this mode switching control unit OPA does not affect the output impedance of the power amplifier module PA, and will not affect the output power and efficiency in speaker mode like the switching devices in related technologies. Furthermore, since the mode switching control unit OPA is set on the drive path, it is equivalent to being set on a low-voltage path related to control rather than a high-voltage path related to output. Therefore, the voltage level of the switching devices in the mode switching control unit OPA is lower than the voltage level of the switching devices in related technologies, and low-voltage switching devices can be used, effectively reducing chip cost and area. Therefore, the present invention effectively avoids the problems in related technologies and specifically solves the core pain points of existing TDD noise suppression methods. By integrating the impedance module 10 and the mode switching control unit OPA into the chip, the cost can be effectively reduced and the number of peripheral devices on the chip can be reduced, and the output power and efficiency of the signal processing channel without the impedance module 10 can be optimized.

[0105] The specific structure of the mode switching control unit OPA is described below. Figure 8 This is a schematic diagram of the structure of a mode switching control unit provided in an embodiment of the present invention. See also: Figure 8In one embodiment, optionally, the mode switching control unit includes: a switch subunit 41, a first input stage 421, a second input stage 422, a third input stage 423, and a fourth input stage 424. The switch subunit 41 includes: a first switch SW1, a second switch SW2, a third switch SW3, and a fourth switch SW4; each switch can be constructed using any type of controllable switching device, and the control terminal of each switch can be connected to a controller. The first input stage 421 is connected to the first positive input terminal DINP1; the second input stage 422 is connected to the first negative input terminal DINN1; the third input stage 423 is connected to the second positive input terminal DINP2; and the fourth input stage 424 is connected to the second negative input terminal DINN2. Specifically, the first terminal of the first switch SW1 is connected to the output terminal of the first input stage 421; the first terminal of the second switch SW2 is connected to the output terminal of the second input stage 422; the first terminal of the third switch SW3 is connected to the output terminal of the third input stage 423; and the first terminal of the fourth switch SW4 is connected to the output terminal of the fourth input stage 424. The second terminals of the first switch SW1 and the third switch SW3 are connected to the first node N1; the second terminals of the second switch SW2 and the fourth switch SW4 are connected to the second node N2; and the first node N1 and the second node N2 are connected one-to-one to the positive drive output terminal DOUTP and the negative drive output terminal DOUTN. (See also...) Figure 8 As shown, when the mode switching control unit only includes the input stage, the first node N1 can be connected to the negative drive output terminal DOUTN, and the second node N2 can be connected to the positive drive output terminal DOUTP.

[0106] This embodiment is configured such that four switching devices select the link between different input terminals and drive output terminals in the mode switching control unit, and four input stages perform primary amplification processing on the signals from different input terminals of the mode switching control unit to form corresponding drive signals. Each input stage can have the same amplification circuit structure; any amplification circuit can be used, and no limitation is made here. Specifically, the first switch SW1 and the second switch SW2 operate synchronously, for example, simultaneously turning on or off; the third switch SW3 and the fourth switch SW4 operate synchronously, for example, simultaneously turning on or off; and the first switch SW1 and the third switch SW3 do not turn on simultaneously, and the second switch SW2 and the fourth switch SW4 do not turn on simultaneously.

[0107] Figure 9 This is a schematic diagram of another mode switching control unit provided in an embodiment of the present invention. See also... Figure 9Specifically, the first input stage 421 includes a first transistor T1, whose gate is connected to the first positive input terminal DINP1, and whose second terminal is connected to the first terminal of the first switch SW1. The second input stage 422 includes a second transistor T2, whose gate is connected to the first negative input terminal DINN1, and whose second terminal is connected to the first terminal of the second switch SW2. The third input stage 423 includes a third transistor T3, whose gate is connected to the second positive input terminal DINP2, and whose second terminal is connected to the first terminal of the third switch SW3. The fourth input stage 424 includes a fourth transistor T4, whose gate is connected to the second negative input terminal DINN2, and whose second terminal is connected to the first terminal of the fourth switch T4. The first terminals of the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 are connected to the third node N3. For example, the first transistor T1, the second transistor T2, the third transistor T3 and the fourth transistor T4 are all MOS transistors, for example, all NMOS transistors, specifically NMOS transistors of the same type.

[0108] The mode switching control unit also includes: a first current source IS1, connected between the power supply terminal VDD and the first node N1; a second current source IS2, connected between the power supply terminal VDD and the second node N2; and a third current source IS3, connected between the ground terminal GND and the third node N3. This ensures reliable operation of each input stage.

[0109] See also Figure 9 Based on the above embodiments, optionally, in order to improve the driving capability of the mode switching control unit, the mode switching control unit may further include: at least one first amplification stage 43 and at least one second amplification stage 44. Figure 9 The first amplification stage 43 and the second amplification stage 44 are given as examples, but are not intended to limit the invention.

[0110] When the number of stages of the first amplification stage 43 is odd, each of the first amplification stages 43 is cascaded between the first node N1 and the positive drive output terminal DOUTP; when the number of stages of the first amplification stage 43 is even, each of the first amplification stages 43 is cascaded between the first node N1 and the negative drive output terminal DOUTN.

[0111] The number of stages in the second amplifier stage 44 is the same as the number of stages in the first amplifier stage 43. When the number of stages in the second amplifier stage 44 is odd, each second amplifier stage 44 is cascaded between the second node N2 and the negative drive output terminal DOUTN; when the number of stages in the second amplifier stage 44 is even, each second amplifier stage 44 is cascaded between the second node N2 and the positive drive output terminal DOUTP.

[0112] It is understandable that, for any type of amplification stage, cascading multiple amplification stages means connecting the output of the previous amplification stage to the input of the next amplification stage. The first amplification stage 43 and the second amplification stage 44 can have the same structure.

[0113] For details, see Figure 9 The first amplification stage 43 includes a fifth transistor T5 and a fourth current source IS4, connected in series between the power supply terminal VDD and the ground terminal GND. The gate of the fifth transistor T5 serves as the input terminal of the first amplification stage 43, and the connection node between the fifth transistor T5 and the fourth current source IS4 serves as the output terminal of the first amplification stage 43. For example, the fifth transistor T5 is a MOSFET. The channel type of the fifth transistor T5 in the first amplification stage 43 is different from that of the transistors in the input stage, and the channel types of the fifth transistor T5 in adjacent first amplification stages 43 are also different.

[0114] The second amplification stage 44 includes a sixth transistor T6 and a fifth current source IS5, connected in series between the power supply terminal VDD and the ground terminal GND. The gate of the sixth transistor T6 serves as the input terminal of the second amplification stage 44, and the connection node between the sixth transistor T6 and the fifth current source IS5 serves as the output terminal of the second amplification stage 44. For example, the sixth transistor T6 is a MOSFET. The channel type of the sixth transistor T6 in the first-stage second amplification stage 44 is different from that of the transistors in the input stage, and the channel types of the sixth transistor T6 in adjacent second amplification stages 44 are different. The transistors in the same first amplification stage 43 and second amplification stage 44 are transistors of the same channel type, specifically, they can be transistors of the same model.

[0115] This invention provides a mode switching control unit composed of transistors and switches, wherein it is possible to determine whether an amplification stage is needed according to actual requirements, and to flexibly configure the number of amplification stages, and to configure the corresponding relationship between nodes and drive output terminals.

[0116] In summary, the embodiments of the present invention provide a TDD noise-suppressed, reconfigurable dual-amplifier switchable audio power amplifier chip. This effectively solves the following problems existing in related technologies:

[0117] 1. Adaptability and scalability: Related technologies employ methods such as fixed-value power filter capacitors or PCB layout optimization with preset paths, all of which achieve noise suppression through hardware design. These methods cannot adapt to the parameter differences in TDD modes across different devices. When the device needs to expand its audio power amplifier channels, the hardware interfaces and parameters of the existing suppression structure cannot be flexibly adjusted, resulting in limited system architecture expansion. However, the embodiments of this invention use a mode switching control unit and a power amplifier with control enablement to switch between different signal processing channels, providing different output impedance parameters to facilitate adaptation to different scenarios and support system architecture expansion.

[0118] 2. Hardware Costs and Resource Consumption: Traditional TDD noise suppression solutions often employ a "layered design" to improve performance, such as multi-stage filter capacitor combinations, double-layer shielding, and independent isolated power supplies, which significantly increases hardware material costs. This embodiment, through the design of the mode switching control unit, provides mode switching functionality on the low-voltage drive channel, achieving mode switching at a lower cost and with a smaller footprint.

[0119] 3. Audio Signal Fidelity: Some traditional TDD suppression methods, such as wideband ferrite beads in series and high-threshold limiting circuits, may cause non-targeted attenuation of the audio signal while suppressing TDD noise. If the threshold of the limiting circuit is not set properly, it may "accidentally cut off" the peak portion of the audio signal when suppressing noise spikes, causing distortion. This approach fails to simultaneously meet the dual requirements of noise suppression and audio fidelity. This embodiment, through a mode-switching design, provides a signal processing channel with an impedance module for scenarios requiring noise suppression, effectively achieving noise suppression. For high-power scenarios, it provides a signal processing channel without an impedance module, avoiding accidental cutting off of audio signal peaks, thus achieving a balance between noise suppression and audio fidelity.

[0120] This invention also provides a control method for an audio power amplifier chip, which can be applied to the audio power amplifier chip provided in any embodiment of this invention and has corresponding beneficial effects.

[0121] Figure 10 This is a flowchart illustrating a control method for an audio power amplifier chip provided in an embodiment of the present invention. (See attached diagram.) Figure 10 The control method for this audio amplifier chip includes:

[0122] S110. In speaker mode, the control amplifier module outputs the amplifier signal through the first amplifier output terminal.

[0123] S120. In earpiece mode, the control power amplifier module outputs the power amplifier signal through the second power amplifier output terminal.

[0124] The control method for an audio power amplifier chip provided in this invention is based on an audio power amplifier chip equipped with a power amplifier module and an impedance module, and supports dynamic switching of operating modes according to application scenarios. Specifically, for cases where TDD power ripple is more sensitive in earpiece mode, the output channel of the second power amplifier is switched for output. An impedance module is connected in series on this channel to increase the output impedance and reduce TDD noise. For applications with high audio power requirements in speaker mode, the output channel of the first power amplifier is switched for output. This channel has no impedance module, which avoids power suppression and audio distortion caused by accidentally cutting off the peak value of the power amplifier signal due to noise peak suppression. Therefore, this invention supports the adjustment of the output impedance of the power amplifier module, which is beneficial for adapting to the power amplifier output requirements of different audio output application scenarios.

[0125] It is understandable that a controller can be set in the electronic device where the audio power amplifier chip is located. This controller is connected to the power amplifier module, and the above control method can be executed by the controller.

[0126] Specifically, the power amplifier module may include a first power amplifier, a second power amplifier, and a mode switching control unit; the controller may be connected to the first power amplifier, the second power amplifier, and the mode switching control unit respectively. The controller can control whether the first power amplifier and the second power amplifier are enabled, and can also control the connected links in the mode switching control unit.

[0127] Specifically, taking a mobile phone as an example, the method includes:

[0128] When a user is answering a call, the controller determines whether the user has turned on the speakerphone; if so, it determines that the current mode is speakerphone mode; otherwise, it determines that the current mode is handset mode.

[0129] In speaker mode, the controller sends a "speaker mode" command to the audio amplifier chip and enables the first power amplifier. Upon receiving the "speaker mode" command, the audio amplifier chip selects the link between the first input terminal and the drive output terminal in the mode switching control unit.

[0130] In earpiece mode, the controller sends an "earpiece mode" command to the audio amplifier chip and enables the second power amplifier. Upon receiving the "listen mode" command, the audio amplifier chip selects the link between the second input terminal and the drive output terminal in the mode switching control unit.

[0131] This enables amplifier control in different sound output modes of electronic devices.

[0132] It should be noted that in the various embodiments of the audio power amplifier chip, some specific descriptions of the control method of the audio power amplifier chip are provided. For the contents not described in detail here, please refer to the explanations of the above embodiments. Repeated contents will not be repeated.

[0133] This invention also provides an electronic device, including the audio power amplifier chip provided in any embodiment of this invention, which has corresponding beneficial effects.

[0134] Figure 11 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. See also: Figure 11 The electronic device includes: a controller 300, a speaker 200, and an audio amplifier chip 100 as provided in any embodiment of the present invention; wherein the audio amplifier chip 100 is connected to the speaker 200, the controller 300 is connected to the amplifier module PA, and the controller 300 can be used to execute the control method of the audio amplifier chip provided in any embodiment of the present invention.

[0135] For example, the electronic device may be a mobile phone, computer or other audio device that supports different audio output application scenarios, such as supporting sound output scenarios with different power levels.

[0136] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0137] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. An audio power amplifier chip, characterized in that, include: The signal input terminal is used to connect audio input signals; Connect the speaker to the signal output terminal; Impedance module; A power amplifier module, wherein the power amplifier input terminal of the power amplifier module is connected to the signal input terminal, the first power amplifier output terminal of the power amplifier module is connected to the signal output terminal, and the second power amplifier output terminal of the power amplifier module is connected to the signal output terminal through the impedance module; wherein, the power amplifier module generates a power amplifier signal according to the audio input signal, and adjusts the output impedance of the power amplifier module by switching the power amplifier output terminal that outputs the power amplifier signal.

2. The audio power amplifier chip according to claim 1, characterized in that, The power amplifier input terminal includes: a first power amplifier input terminal and a second power amplifier input terminal, both of which are connected to the signal input terminal; The power amplifier module includes: A first power amplifier is connected between the input terminal and the output terminal of the first power amplifier; when the first power amplifier is enabled, it generates the power amplifier signal according to the audio input signal and outputs it from the output terminal of the first power amplifier. A second power amplifier is connected between the input terminal and the output terminal of the second power amplifier; when the second power amplifier is enabled, it generates the power amplifier signal according to the audio input signal and outputs it from the output terminal of the second power amplifier. In the power amplifier module, the output terminal of the power amplifier signal is switched by switching the enabled power amplifier.

3. The audio power amplifier chip according to claim 2, characterized in that, The power amplifier module further includes: a mode switching control unit, wherein a first input terminal of the mode switching control unit is connected to the first power amplifier input terminal, a second input terminal of the mode switching control unit is connected to the second power amplifier input terminal, and a drive output terminal of the mode switching control unit is respectively connected to the first power amplifier and the second power amplifier; wherein, when the first power amplifier is enabled, the mode switching control unit connects the first input terminal and the drive output terminal, and when the second power amplifier is enabled, it connects the second input terminal and the drive output terminal; The audio amplifier chip also includes: The first input module is connected between the signal input terminal and the first power amplifier input terminal; The first feedback module is connected between the output terminal and the input terminal of the first power amplifier; The second input module is connected between the signal input terminal and the second power amplifier input terminal; The second feedback module is connected between the output terminal and the input terminal of the second power amplifier.

4. The audio power amplifier chip according to claim 3, characterized in that, Both the first power amplifier and the second power amplifier are differential power amplifiers; the signal input terminal includes a positive signal input terminal and a negative signal input terminal, and the signal output terminal includes a positive signal output terminal and a negative signal output terminal; the first power amplifier input terminal includes a first positive power amplifier input terminal and a first negative power amplifier input terminal, the second power amplifier input terminal includes a second positive power amplifier input terminal and a second negative power amplifier input terminal, the first power amplifier output terminal includes a first positive power amplifier output terminal and a first negative power amplifier output terminal, and the second power amplifier output terminal includes a second positive power amplifier output terminal and a second negative power amplifier output terminal. The first input module includes: a first resistor and a second resistor; the first resistor is connected between the positive signal input terminal and the first positive power amplifier input terminal, and the second resistor is connected between the negative signal input terminal and the first negative power amplifier input terminal; The second input module includes a third resistor and a fourth resistor; the third resistor is connected between the positive signal input terminal and the second positive power amplifier input terminal, and the fourth resistor is connected between the negative signal input terminal and the second negative power amplifier input terminal. The first feedback module includes a fifth resistor and a sixth resistor; the fifth resistor is connected between the output terminal of the first negative power amplifier and the input terminal of the first positive power amplifier; the sixth resistor is connected between the output terminal of the first positive power amplifier and the input terminal of the first negative power amplifier. The second feedback module includes a seventh resistor and an eighth resistor; the seventh resistor is connected between the output terminal of the second negative power amplifier and the input terminal of the second positive power amplifier; the eighth resistor is connected between the output terminal of the second positive power amplifier and the input terminal of the second negative power amplifier. The impedance module includes a ninth resistor and a tenth resistor; the ninth resistor is connected between the output terminal of the second negative power amplifier and the output terminal of the positive signal, and the tenth resistor is connected between the output terminal of the second positive power amplifier and the output terminal of the negative signal; the output terminal of the first negative power amplifier is connected to the output terminal of the positive signal, and the output terminal of the first positive power amplifier is connected to the output terminal of the negative signal. In the mode switching control unit, the first input terminal includes a first positive input terminal and a first negative input terminal, the second input terminal includes a second positive input terminal and a second negative input terminal, and the drive output terminal includes a positive drive output terminal and a negative drive output terminal; the first positive input terminal is connected to the first positive power amplifier input terminal, the first negative input terminal is connected to the first negative power amplifier input terminal, the second positive input terminal is connected to the second positive power amplifier input terminal, and the second negative input terminal is connected to the second negative power amplifier input terminal; the negative drive output terminal is connected to the positive input terminal of the first power amplifier and the negative input terminal of the second power amplifier, and the positive drive output terminal is connected to the negative input terminal of the first power amplifier and the positive input terminal of the second power amplifier; the positive output terminal of the first power amplifier is connected to the first negative power amplifier output terminal, the negative output terminal of the first power amplifier is connected to the first positive power amplifier output terminal, the positive output terminal of the second power amplifier is connected to the second positive power amplifier output terminal, and the negative output terminal of the second power amplifier is connected to the second negative power amplifier output terminal.

5. The audio power amplifier chip according to claim 4, characterized in that, The mode switching control unit includes: The switch subunit includes: a first switch, a second switch, a third switch, and a fourth switch; The first input stage is connected to the first positive input terminal; The second input stage is connected to the first negative input terminal; The third input stage is connected to the second positive input terminal; The fourth input stage is connected to the second negative input terminal; Wherein, the first end of the first switch is connected to the output of the first input stage, the first end of the second switch is connected to the output of the second input stage, the first end of the third switch is connected to the output of the third input stage, and the first end of the fourth switch is connected to the output of the fourth input stage; the second ends of the first switch and the second ends of the third switch are connected to a first node; the second ends of the second switch and the second ends of the fourth switch are connected to a second node; the first node and the second node are connected one-to-one to the positive drive output and the negative drive output.

6. The audio power amplifier chip according to claim 5, characterized in that, The mode switching control unit also includes: At least one first amplification stage; when the number of stages of the first amplification stage is odd, each first amplification stage is cascaded between the first node and the positive drive output terminal; when the number of stages of the first amplification stage is even, each first amplification stage is cascaded between the first node and the negative drive output terminal. At least one second amplification stage, the number of stages of the second amplification stage being the same as the number of stages of the first amplification stage; when the number of stages of the second amplification stage is odd, each second amplification stage is cascaded between the second node and the negative drive output terminal; when the number of stages of the second amplification stage is even, each second amplification stage is cascaded between the second node and the positive drive output terminal.

7. The audio power amplifier chip according to claim 6, characterized in that, The first input stage includes: a first transistor, the gate of the first transistor being connected to the first positive input terminal, and the second terminal of the first transistor being connected to the first terminal of the first switch; The second input stage includes: a second transistor, the gate of which is connected to the first negative input terminal, and the second terminal of which is connected to the first terminal of the second switch; The third input stage includes: a third transistor, the gate of which is connected to the second positive input terminal, and the second terminal of which is connected to the first terminal of the third switch; The fourth input stage includes: a fourth transistor, the gate of which is connected to the second negative input terminal, and the second terminal of which is connected to the first terminal of the fourth switch; Wherein, the first terminal of the first transistor, the first terminal of the second transistor, the first terminal of the third transistor, and the first terminal of the fourth transistor are connected to the third node; The mode switching control unit also includes: The first current source is connected between the power supply terminal and the first node; A second current source is connected between the power supply terminal and the second node; A third current source is connected between the grounding terminal and the third node; The first amplification stage includes a fifth transistor and a fourth current source, which are connected in series between the power supply terminal and the ground terminal; wherein, the gate of the fifth transistor serves as the input terminal of the first amplification stage, and the connection node between the fifth transistor and the fourth current source serves as the output terminal of the first amplification stage. The second amplification stage includes a sixth transistor and a fifth current source, which are connected in series between the power supply terminal and the ground terminal; wherein the gate of the sixth transistor serves as the input terminal of the second amplification stage, and the connection node between the sixth transistor and the fifth current source serves as the output terminal of the second amplification stage.

8. The audio power amplifier chip according to claim 2, characterized in that, The first power amplifier is a Class D power amplifier, and the second power amplifier is a Class AB power amplifier; or, both the first power amplifier and the second power amplifier are Class D power amplifiers.

9. A control method for an audio power amplifier chip, characterized in that, The audio power amplifier chip is applied to any one of claims 1-8; the control method of the audio power amplifier chip includes: In speaker mode, the power amplifier module is controlled to output the power amplifier signal through the first power amplifier output terminal; In earpiece mode, the power amplifier module is controlled to output the power amplifier signal through the second power amplifier output terminal.

10. An electronic device, characterized in that, include: The controller, the speaker, and the audio amplifier chip as described in any one of claims 1-8; the audio amplifier chip is connected to the speaker, and the controller is connected to the amplifier module.

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