Methods for preparing solar cells, solar cells and photovoltaic modules

By forming voids on the BSG layer of the silicon wafer and combining it with alkaline polishing and acid washing, the damage problems of textured surface and boron-deposited passivation region caused by high-energy lasers were solved, realizing efficient patterning and low-damage fabrication of the battery, and improving the open-circuit voltage and conversion efficiency of the battery.

CN121568462BActive Publication Date: 2026-05-26ZHEJIANG JINKO SOLAR CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
ZHEJIANG JINKO SOLAR CO LTD
Filing Date
2026-01-22
Publication Date
2026-05-26

AI Technical Summary

Technical Problem

Existing high-energy laser processes cause damage to the textured surface structure and the boron diffusion passivation zone during boron diffusion on the silicon wafer surface, affecting the cell conversion efficiency.

Method used

Low-energy lasers are used to create voids in the BSG layer of the silicon wafer, and combined with alkaline polishing and acid pickling, the boron layer is selectively etched to preserve the BSG layer and reduce thermal damage.

Benefits of technology

It protects the textured surface, reduces lateral damage, and improves the battery's open-circuit voltage and conversion efficiency.

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Abstract

This application relates to the field of photovoltaic cell technology, and in particular to a method for fabricating solar cells, solar cells, and photovoltaic modules. The method for fabricating the solar cell includes: providing an N-type silicon substrate; forming a boron diffusion layer and a BSG layer on the back side of the N-type silicon substrate, and dividing the back side into alternating first and second regions; performing laser processing on the first region to form multiple voids in the BSG layer; and then performing alkaline polishing to selectively etch the boron diffusion layer in the first region while retaining the BSG layer. This fabrication method, by using a laser to form voids in the BSG layer of the first region instead of direct ablation, and utilizing these voids as channels for subsequent alkaline polishing to selectively etch away the underlying boron diffusion layer while retaining the BSG layer in the first region, minimizes damage to the silicon substrate structure and reduces lateral damage to the adjacent second region caused by laser thermal effects.
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Description

Technical Field

[0001] This application relates to the field of photovoltaic cell technology, and in particular to methods for preparing solar cells, solar cells, and photovoltaic modules. Background Technology

[0002] With the photovoltaic industry's continuous pursuit of higher cell conversion efficiency, high-efficiency crystalline silicon solar cell technologies such as back-contact (BC) cells and tunnel oxide passivated contact (TOPCon) cells have been widely applied. In these cell structures, selective boron diffusion is usually required in specific areas of the silicon wafer to form local emitters. To achieve this selective doping, a key process step is "boron diffusion patterning," which involves removing the BSG layer and the underlying boron diffusion layer in a specific area (hereinafter referred to as the first region, corresponding to the P-region in conventional processes) after completing boron diffusion across the entire surface and forming a borosilicate glass (BSG) layer, thereby defining the desired cell pattern.

[0003] In related technologies, high-energy lasers are typically used to directly ablate the BSG layer to achieve patterning in order to remove it. This high-energy laser process can thoroughly remove the BSG layer in the laser-scanned area, exposing the underlying boron layer or silicon substrate, thus creating conditions for subsequent alkaline solution etching to remove the boron layer.

[0004] However, the aforementioned high-energy laser patterning method has significant technical drawbacks. Due to the high laser energy, when applied to the surface of a silicon wafer with a pyramidal textured surface, the intense thermal effect severely damages the apical structure of the pyramids, leading to a deterioration of the textured surface morphology. More importantly, the large heat-affected zone of the high-energy laser causes significant lateral thermal damage to the surrounding boron diffusion layer. This damage disrupts the passivation effect formed by boron diffusion, leading to increased minority carrier recombination in the cell, ultimately resulting in a decrease in the cell's open-circuit voltage (Voc) and limiting further improvements in cell conversion efficiency. Therefore, how to achieve precise patterning of the boron diffusion region while minimizing damage to the textured structure and the boron diffusion passivation region caused by the laser process has become a pressing technical problem to be solved in this field. Summary of the Invention

[0005] Therefore, it is necessary to provide a method for fabricating solar cells, solar cells, and photovoltaic modules to address the damage caused by laser patterning technology to the textured surface structure and boron passivation region.

[0006] A method for preparing a solar cell, the method comprising the following steps:

[0007] S01. An N-type silicon substrate is provided, wherein the N-type silicon substrate includes a front side and a back side;

[0008] S02. Perform boron diffusion treatment on the back side to form a boron diffusion layer and a BSG layer on the back side, dividing the back side into multiple first regions and multiple second regions, with the first regions and second regions arranged alternately.

[0009] S03. Perform laser processing on the first region to form multiple voids in the BSG layer of the first region;

[0010] S04. Perform alkaline polishing on the back side to etch the boron extension layer in the first region while retaining the BSG layer in the first region.

[0011] In one embodiment, after the BSG layer in the first region forms multiple voids, a portion of the boron-expanded layer in the first region melts out from the voids.

[0012] In one embodiment, the preparation method further includes the following steps:

[0013] S05. The back side is subjected to acid pickling treatment, so that the BSG layer in the first region is etched and the BSG layer in the second region is thinned.

[0014] In one embodiment, before performing boron diffusion treatment on the back side, the N-type silicon substrate is texturized to form a pyramid structure on the N-type silicon substrate.

[0015] In one embodiment, after the first region is laser-processed, the voids formed on the BSG layer correspond to the apex of the pyramid structure.

[0016] In one embodiment, after performing boron diffusion treatment on the back side in step S02, the thickness of the BSG layer formed is 80nm-300nm.

[0017] In one embodiment, in step S03, the first region is subjected to laser processing, and the laser power used is 5W to 30W.

[0018] In one embodiment, in step S04, the solution used for the alkaline polishing treatment includes a potassium hydroxide solution and an alkaline polishing additive, wherein the concentration of the potassium hydroxide solution is 3%-30%, the concentration of the alkaline polishing additive is 1%-5%, and the alkaline polishing treatment time is 100s-900s.

[0019] In one embodiment, after alkaline polishing of the back surface in step S04, a portion of the N-type silicon substrate in the first region is also etched.

[0020] In one embodiment, in step S05, the pickling solution used includes a hydrofluoric acid solution with a concentration of 1%-10%, and the pickling time is 100s-300s.

[0021] A solar cell is prepared using the solar cell preparation method described above.

[0022] A photovoltaic module, the photovoltaic module comprising the aforementioned solar cell.

[0023] The aforementioned method for fabricating solar cells uses lasers to create gaps in the BSG layer of the first region instead of directly ablating and removing it. These gaps are then used as channels for subsequent alkaline polishing to selectively etch away the underlying boron extension layer while preserving the BSG layer in the first region. This minimizes damage to the silicon substrate structure and reduces lateral damage to the adjacent second region caused by laser thermal effects. As a result, while completing the patterning, the passivation quality of the cell is effectively protected, which is beneficial for improving the open-circuit voltage and final conversion efficiency of the cell. Attached Figure Description

[0024] Figure 1 This is a schematic diagram of the structure of an N-type silicon substrate provided in an embodiment of this application.

[0025] Figure 2 This is a schematic diagram of the structure of an N-type silicon substrate after texturing, provided in an embodiment of this application.

[0026] Figure 3 This is a schematic diagram of the structure of an N-type silicon substrate after boron diffusion, provided in an embodiment of this application.

[0027] Figure 4 This is a schematic diagram of the partitioning of an N-type silicon substrate provided in an embodiment of this application.

[0028] Figure 5 This is a schematic diagram of the structure of an N-type silicon substrate after laser treatment, provided in an embodiment of this application.

[0029] Figure 6 A scanning electron microscope image of an N-type silicon substrate after laser treatment, provided in an embodiment of this application.

[0030] Figure 7 This is a schematic diagram of the structure of an N-type silicon substrate after acid washing according to an embodiment of this application.

[0031] The reference numerals in the detailed embodiments are as follows:

[0032] 10. N-type silicon substrate; 20. Boron extension layer; 30. BSG layer;

[0033] 11. Pyramid structure; 111. Pyramid tip; 31. Void;

[0034] 12. Front; 13. Back;

[0035] 100, Zone 1; 200, Zone 2. Detailed Implementation

[0036] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0037] In the description of this application, it should be understood that if terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" appear, these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0038] Furthermore, where the terms "first" and "second" appear, these terms are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, where the term "multiple" appears, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0039] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0040] In this application, unless otherwise expressly specified and limited, the use of descriptions such as "above" or "below" the second feature indicates that the first and second features are in direct contact or indirect contact via an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. Similarly, "below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0041] It should be noted that if an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. If an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. If so, the terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this application are for illustrative purposes only and do not represent the only possible implementation.

[0042] This application provides a method for preparing a solar cell, the method comprising the following steps:

[0043] Provides an N-type silicon substrate 10. See also Figure 1 , Figure 1 This is a schematic diagram of the structure of an N-type silicon substrate 10 in one embodiment of the present application. The N-type silicon substrate 10 includes a front side 12 and a back side 13.

[0044] According to some embodiments of this application, the N-type silicon substrate 10 is texturized. Combined with... Figure 2 , Figure 2 This is a schematic diagram of the structure of an N-type silicon substrate after texturing in one embodiment of this application. After texturing, a pyramid structure 11 is formed on the back side 13 of the N-type silicon substrate 10.

[0045] Boron diffusion treatment is performed on the back surface 13 of the N-type silicon substrate 10. (See attached document) Figure 3 , Figure 3 This is a schematic diagram of the structure of an N-type silicon substrate after boron diffusion in one embodiment of this application. After boron diffusion treatment, a boron extension layer 20 and a BSG layer 30 are formed on the back side 13 of the N-type silicon substrate 10. It should be noted that the N-type silicon substrate 10 can be texturized before the boron diffusion treatment, or the N-type silicon substrate 10 can be left untextured and the boron diffusion treatment can be performed directly on its smooth or otherwise structured back side 13. This application does not limit this.

[0046] The back surface 13 of the N-type silicon substrate 10 is partitioned. See [reference needed] Figure 4 , Figure 4 This is a schematic diagram of the partitioning of an N-type silicon substrate 10 in one embodiment of this application. The back surface 13, after partitioning, is divided into multiple first regions 100 and multiple second regions 200, with the first regions 100 and second regions 200 arranged alternately. Figure 4 Only one first region 100 and one second region 200 are shown as an example. In the actual structure, multiple first regions 100 and multiple second regions 200 are arranged alternately and at intervals on the back surface 13.

[0047] Laser processing is applied to the first region 100. (See attached document.) Figure 5 , Figure 5 This is a schematic diagram of the structure of an N-type silicon substrate after laser treatment in one embodiment of this application. Figure 5 In the process, after laser processing, multiple voids 31 are formed on the BSG layer 30 of the first region 100.

[0048] The back side (13) was subjected to alkaline polishing. (Combined with...) Figure 5 , Figure 5 The image shows the structural state of the solar cell before alkaline polishing. After alkaline polishing, the boron extension layer 20 of the first region 100 will be etched, while the BSG layer 30 of the first region 100 will be retained.

[0049] The aforementioned preparation method uses laser to create multiple micro-voids 31 on the BSG layer 30 of the first region 100 instead of completely ablating it. This allows the alkaline polishing solution to penetrate through these voids 31 and selectively etch away the underlying boron extension layer 20 during subsequent alkaline polishing, while preserving the BSG layer 30 of the first region 100. This combined process of "micro-film opening + selective wet etching" effectively avoids many problems caused by the direct ablation of the BSG layer 30 of the first region 100 by traditional high-energy lasers. On the one hand, the laser leaves multiple voids 31 only on the BSG layer 30 of the first region 100, with almost no damage to the underlying pyramid structure 11, allowing the pyramid structure 11 to be completely preserved. For the textured silicon wafer, the BSG layer 30 of the first region 100 is only partially "damaged" rather than completely peeled off; therefore, the light-trapping ability of the pyramid textured surface is not affected. On the other hand, the small heat-affected zone of the laser reduces lateral thermal damage to the adjacent second region 200. Traditional high-energy lasers can easily cause lateral damage to the boron extended layer 20, which in turn affects the passivation effect and ultimately the open-circuit voltage of the battery.

[0050] In addition, the BSG layer 30 retained above the first region 100 acts as a "mask" during alkaline polishing, guiding the etching reaction to act precisely on the target area, preventing the alkaline solution from causing excessive etching of the silicon substrate in the first region 100, and also helping to control the longitudinal depth and lateral uniformity of the etching.

[0051] Therefore, the preparation method provided in this application, by realizing local openings on the BSG layer 30 of the first region 100 and coupling the selectivity of wet chemical etching, effectively protects the textured structure of the silicon substrate, reduces lateral thermal damage, and is conducive to improving the passivation quality and final conversion efficiency of the cell. It is especially suitable for the preparation of high-efficiency solar cells with high requirements for surface passivation.

[0052] See Figure 6 , Figure 6 This is a scanning electron microscope (SEM) image of an N-type silicon substrate after laser treatment in one embodiment of this application. Figure 6 In the process, after the BSG layer 30 of the first region 100 forms multiple voids 31, part of the boron extension layer 20 of the first region 100 will melt out from the voids 31. The seepage of the melt helps to expand the voids 31, making it easier for the alkaline polishing solution to enter and preferentially react with the boron extension layer 20 of the first region 100.

[0053] This phenomenon occurs because the melting point of the boron-depleted layer 20 (mainly composed of monocrystalline silicon) is approximately 1414°C, lower than that of the BSG layer 30 above it (mainly composed of silicon dioxide, with a melting point of approximately 1700°C). Under the influence of laser energy, the boron-depleted layer 20 preferentially reaches a molten state, while the BSG layer 30 only experiences localized damage, forming voids 31 (cracks). The molten boron-depleted layer 20 seeps out from these voids 31 under thermodynamic action, forming localized protrusions or "leakage points." Due to the low laser energy and short action time used, the molten area is limited to the very shallow surface layer below the BSG layer 30 in the first region 100, preventing thermal damage to the deep structure of the N-type silicon substrate 10 and thus avoiding destruction of the pyramid structure 11.

[0054] According to some embodiments of this application, the method for preparing the solar cell further includes the following step: acid washing of the back side 13.

[0055] See Figure 7 , Figure 7 This is a schematic diagram of the structure of an N-type silicon substrate after acid washing in one embodiment of this application. Figure 7 In the process, the BSG layer 30 in the first region 100 is etched, while the BSG layer 30 in the second region 200 is thinned. Since the preceding laser processing has created multiple voids 31 on the BSG layer 30 in the first region 100, while the BSG layer 30 in the second region 200 remains relatively dense and intact, the etching behavior of the acid on the two regions is significantly different during the subsequent acid pickling process.

[0056] For the first region 100, the acid can contact and erode the BSG layer 30 from multiple directions through the gaps 31 or channels formed by laser and alkaline polishing. Therefore, its etching rate is relatively fast, and the complete removal of the BSG layer 30 in the first region 100 can be achieved within a controllable time. However, for the second region 200, the acid can only etch from the surface. Therefore, within the same time, only the BSG layer 30 can be thinned, but not completely removed.

[0057] This selective acid pickling process has several positive effects on the process. It can not only completely remove the residual BSG layer 30 in the first region 100, exposing a clean silicon surface in that region, thus creating favorable conditions for subsequent interface passivation or electrode fabrication, but also improve the interface characteristics of the second region 200 by thinning the BSG layer 30, while maintaining its function as a mask and protective layer.

[0058] According to some embodiments of this application, after laser processing of the first region 100, the void 31 formed on the BSG layer 30 corresponds to the apex 111 of the pyramid structure 11. This is because the curvature is greatest and stress is concentrated at the apex 111 of the pyramid structure 11. Under the same laser energy, the apex 111 will preferentially experience local damage, forming a through or semi-through void 31.

[0059] Furthermore, since the pyramid structure 11 is naturally formed and evenly distributed during the flocking process, the gap 31 formed at the corresponding position of the pyramid tip 111 ensures the adaptive matching between the laser processing and the flocking structure. This not only reduces the stringent requirements for laser positioning accuracy, but also improves the stability and repeatability of the process.

[0060] According to some embodiments of this application, after boron diffusion treatment of the back side 13, the thickness of the resulting BSG layer 30 is 80nm-300nm. This thickness ensures that the BSG layer 30 has good continuity and density, effectively protecting the underlying silicon substrate and boron diffusion layer 20 before laser processing. If the BSG layer 30 is too thin, it may be prematurely and completely penetrated under laser irradiation, losing its protective function for the underlying structure, or even causing direct damage to the silicon substrate by the laser energy. If the BSG layer 30 is too thick, higher laser energy may be required to form effective voids 31, increasing the heat-affected zone and hindering low-damage processing. The thickness range selected in this application allows for the formation of local voids 31 in the BSG layer 30 without causing overall peeling at lower laser energies.

[0061] Furthermore, during alkaline polishing, the BSG layer 30 acts as an effective barrier layer, protecting the boron-expanded layer 20 in the second region 200 from etching. During acid etching, this thickness allows for complete removal of the BSG layer 30 in the first region 100 and controlled thinning of the BSG layer 30 in the second region 200 by controlling the etching time. Therefore, controlling the thickness of the BSG layer 30 to 80nm-300nm ensures both the doping effect of boron diffusion and provides a suitable material basis for subsequent laser processing and wet etching.

[0062] According to some embodiments of this application, the first region 100 is laser-processed using a laser power of 5W to 30W. Preferably, the laser is a green nano laser. This power range is key to achieving low-damage patterning in this application. By using a lower laser power, tiny voids 31 or cracks can be selectively formed on the BSG layer 30 without completely ablating or removing it from the first region 100. This "micro-film opening" strategy significantly reduces heat input during laser processing, thereby effectively avoiding direct damage to the underlying silicon substrate pyramid textured surface structure by high-energy lasers and protecting the integrity of the pyramid tip 111. Simultaneously, the lower laser power also helps limit the lateral diffusion of the laser heat-affected zone. Compared to traditional high-energy laser processes, this application achieves partial penetration of the BSG layer 30 in the first region 100 while significantly reducing lateral thermal damage to the boron extension layer 20 already formed in the second region 200. This creates conditions for subsequent selective etching and ultimately helps maintain high passivation quality and carrier lifetime of the battery.

[0063] Mechanistically, within this power range, the laser energy is sufficient to melt the boron-doped layer 20 beneath the BSG layer 30 in the first region 100, while the BSG layer 30, with its higher melting point, primarily undergoes localized breakage rather than overall melting. This allows the molten doped silicon (boron-doped layer 20) to seep out from the voids 31 in the BSG layer 30, forming channels for subsequent alkaline polishing chemical penetration while preventing complete stripping of the BSG layer 30 in the first region 100. Structurally, this acts as a "mask," guiding the subsequent alkaline polishing process precisely to the target region.

[0064] Therefore, setting the laser power between 5W and 30W is the guarantee for achieving the approach of "low-energy laser-induced micro-damage, combined with subsequent wet chemical etching to complete patterning" in this application. It not only solves the problems of textured surface damage and lateral damage in traditional methods, but also provides a reliable and efficient solution for achieving high-precision, low-loss patterning on complex textured structures.

[0065] In one embodiment, the laser used is preferably a green nanolaser with a wavelength of 532 nm, a pulse width of 10 ns-200 ns, and a scanning speed of 1 m / s-10 m / s. This combination of parameters aims to achieve a fine, low-damage processing effect: the shorter pulse width helps limit the duration of single-pulse energy, reducing heat accumulation; the moderate scanning speed ensures uniform distribution and controllable deposition of laser energy on the surface of the BSG layer 30, and can induce the formation of local micro-voids 31 or cracks in the BSG layer 30, while avoiding large-area ablation or peeling.

[0066] In one embodiment, the alkaline polishing process uses a solution comprising potassium hydroxide solution and an alkaline polishing additive. Its mechanism utilizes the voids 31 formed on the BSG layer 30 in the first region 100 after laser treatment as chemical channels. Specifically, the potassium hydroxide solution and the alkaline polishing additive penetrate through these voids 31 to the interface of the boron-expanded layer 20 beneath the BSG layer 30, and react chemically with the silicon in the boron-expanded layer 20 to generate soluble silicates, thereby achieving selective etching removal of the boron-expanded layer 20 in this region. Simultaneously, since the main component of the BSG layer 30 is silicon dioxide, its etching rate in the same alkaline environment is lower than that of the silicon material in the boron-expanded layer 20. Therefore, it is retained in the first region 100, providing local masking and protection. This mechanism enables the alkaline polishing process to precisely and regionally remove the boron-expanded layer 20 in the first region 100 while maintaining the structural integrity and coverage continuity of the BSG layer 30 to the greatest extent possible.

[0067] The concentration of potassium hydroxide solution used in the alkaline polishing process is 3%-30%, the concentration of the alkaline polishing additive is 1%-5%, and the alkaline polishing time is 100s-900s. This process window setting ensures that the solution used in the alkaline polishing process selectively etches the underlying boron extension layer 20 from the laser-formed gap 31, while ensuring that the structure of the second region 200 is preserved.

[0068] In one embodiment, after alkaline polishing of the back surface 13, a portion of the N-type silicon substrate 10 in the first region 100 is also etched. This is because after the alkaline polishing solution removes the boron extension layer 20 in the first region 100, it continues to react with the exposed N-type silicon substrate 10 below, resulting in slight etching of the surface of the N-type silicon substrate 10. However, since the laser energy used in this application is relatively low, the resulting heat-affected zone is shallow, so the etching depth of the silicon substrate by alkaline polishing is easy to control and will not cause excessive damage to the silicon substrate.

[0069] In one embodiment, the pickling solution used includes a hydrofluoric acid solution with a concentration of 1%-10%, and the pickling time is 100s-300s. These process parameters are designed to selectively etch the BSG layer 30 in the first region 100 and the second region 200. The lower concentration of hydrofluoric acid combined with the appropriate processing time fully utilizes the structural difference between the porous BSG layer 30 in the first region 100 and the dense and intact BSG layer 30 in the second region 200 after alkaline polishing. This allows the BSG layer 30 in the first region 100 to be completely removed due to the multi-directional penetration of the acid, while the BSG layer 30 in the second region 200 only undergoes controlled surface thinning. Simultaneously, the wider process window provides good controllability for actual production, adapting to process fluctuations while balancing surface cleaning and impurity removal.

[0070] This application also provides a solar cell fabricated using the solar cell fabrication method described above. The back structure of the solar cell includes a plurality of alternately arranged first regions 100 and second regions 200, wherein the first region 100 is the silicon substrate region exposed after removing the boron extension layer 20 and the BSG layer 30, and the second region 200 is the region where the boron extension layer 20 and the BSG layer 30 are retained (after thinning).

[0071] In the first region 100, due to the use of low-power laser, only a few tiny voids 31 are formed on the BSG layer 30. Subsequent alkaline polishing and acid washing completely remove the boron extension layer 20 and the BSG layer 30, allowing the silicon substrate surface beneath this region to be cleanly exposed. Importantly, the silicon substrate surface in this region maintains an intact pyramidal textured structure, especially the apex 111, which remains undamaged, thus preserving excellent light-trapping ability and improving the short-circuit current of the battery. Simultaneously, due to the small laser heat-affected zone, the lattice damage on the silicon surface in this region is extremely low, and the interface state density is low, providing a high-quality interface foundation for subsequent deposition of passivation layers or electrode fabrication, helping to reduce surface recombination and improve carrier lifetime.

[0072] In the second region 200, the boron extended layer 20 and the BSG layer 30 above it are completely preserved. The BSG layer 30 is appropriately thinned after acid washing, but still remains continuous and dense, effectively protecting the underlying boron extended layer 20 from the effects of subsequent processes. Because a low-power laser is used in the laser processing, and the first region 100 and the second region 200 are arranged alternately, the lateral thermal damage of the boron extended layer 20 in the second region 200 caused by the laser thermal effect is significantly suppressed, thereby maintaining the original electrical properties of the boron extended layer 20 and improving the open-circuit voltage of the battery.

[0073] The solar cell obtained by the above-described fabrication method has a clear and precise patterned structure on its back side 13, with a distinct interface between the first region 100 and the second region 200. The well-formed textured structure and clean silicon surface of the first region 100, combined with the high-quality boron-diffused emitter of the second region 200, jointly optimize the cell's carrier collection efficiency and surface passivation effect. This structural design achieves a good balance between optical and electrical performance, ultimately resulting in an overall improvement in open-circuit voltage, fill factor, and short-circuit current, thereby significantly enhancing the photoelectric conversion efficiency of the solar cell.

[0074] This application also provides a photovoltaic module, which includes the solar cell described in any of the above embodiments. The solar cell prepared using the above-described method allows the photovoltaic module to retain the structural and performance advantages derived from the cell at the module level. Specifically, because the back surface 13 of the cell has alternating first regions 100 and second regions 200, and the silicon substrate surface texture in the first region 100 is intact with high interface quality, while the boron extension layer 20 in the second region 200 has minimal lateral damage, the cell itself possesses a high open-circuit voltage and photoelectric conversion efficiency. During the module encapsulation process, multiple such cells are connected in series or parallel, and their excellent electrical performance can be directly translated into higher output power and better response characteristics for the module.

[0075] Furthermore, the optimization of the structure on the back of the battery 13 also helps to improve the reliability of the module in long-term use. The clean and low-damage silicon substrate surface of the first region 100 is conducive to enhancing the interfacial adhesion with encapsulation materials (such as encapsulant film and backsheet), reducing the risk of interlayer peeling or corrosion; the BSG layer 30 retained in the second region 200 can act as a protective barrier, enhancing the battery's resistance to adverse factors such as moisture and ions in the environment, thereby delaying performance degradation and improving the long-term weather resistance and operational stability of the module.

[0076] In terms of optics, the intact pyramidal textured surface on the back of the cell enhances multiple reflections and absorptions of incident light, maintaining high light capture efficiency even after module encapsulation. Combined with the light transmission and gain effects of optical materials such as the module's glass cover and encapsulating film, the overall optical performance of the module can be further optimized, achieving higher energy output.

[0077] Therefore, the photovoltaic modules in this application not only possess high initial power output but also exhibit significant advantages in long-term reliability, environmental adaptability, and energy returns. This technological integration from cell fabrication methods to end-product modules provides a practical solution for building efficient and reliable photovoltaic power generation systems.

[0078] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0079] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A method for producing a solar cell, characterized by, The preparation method includes the following steps: S01. An N-type silicon substrate is provided, the N-type silicon substrate including a front side and a back side, the back side being provided with a pyramid structure; S02. Perform boron diffusion treatment on the back side to form a boron diffusion layer and a BSG layer on the back side, dividing the back side into multiple first regions and multiple second regions, with the first regions and second regions arranged alternately. S03. Laser processing is performed on the first region to form multiple voids in the BSG layer of the first region, the voids corresponding to the apex of the pyramid structure; S04. Perform alkaline polishing on the back side to etch the boron extension layer in the first region while retaining the BSG layer in the first region.

2. The method of producing a solar cell according to claim 1, wherein Before the back side is subjected to alkaline polishing, after the BSG layer in the first region forms multiple voids, a portion of the boron-expanded layer in the first region melts out from the voids.

3. The method of claim 1, wherein the method further comprises: The preparation method further includes the following steps: S05. The back side is subjected to acid pickling treatment, so that the BSG layer in the first region is etched and the BSG layer in the second region is thinned.

4. The method of producing a solar cell according to claim 1, wherein Before performing boron diffusion treatment on the back side, the N-type silicon substrate is texturized to form the pyramid structure on the N-type silicon substrate.

5. The method of producing a solar cell according to claim 1, wherein In step S02, after the back side is subjected to boron diffusion treatment, the thickness of the BSG layer formed is 80nm-300nm.

6. The method of producing a solar cell according to claim 1, wherein In step S03, the first region is subjected to laser processing, and the laser power used is 5W to 30W.

7. The method of producing a solar cell according to claim 1, wherein In step S04, the solution used for the alkaline polishing treatment includes a potassium hydroxide solution and an alkaline polishing additive. The concentration of the potassium hydroxide solution is 3%-30%, the concentration of the alkaline polishing additive is 1%-5%, and the alkaline polishing treatment time is 100s-900s.

8. The method of producing a solar cell according to claim 1, wherein In step S04, after alkaline polishing of the back surface, a portion of the N-type silicon substrate in the first region is also etched.

9. The method of producing a solar cell according to claim 3, wherein In step S05, the pickling solution used includes a hydrofluoric acid solution with a concentration of 1%-10%, and the pickling time is 100s-300s.

10. A solar cell, characterized by, It is prepared using the method for preparing a solar cell as described in any one of claims 1-9.

11. A photovoltaic module, characterized in that, The photovoltaic module includes the solar cell as described in claim 10.