On-line anti-interference processing and verification method for equidirectional trigger signal of encoder

Abstract

The invention provides an encoder equiazimuth trigger signal on-line anti-interference processing and verification method, which comprises the following steps: converting encoder signals into high and low level signals in real time, detecting rising edges of Z, A and B signals of an encoder in real time, waiting for XZ, XA and XB seconds after the rising edges are detected, detecting whether the corresponding Z, A and B signals are in high level or not again, and if the signals are true, judging whether the corresponding Z, A and B signals are in high level or not. And if not, determining that the pulse signal is true, otherwise, determining that the rising edge is false triggering of the interference signal, and continuing to detect the rising edges of the Z, A and B signals in real time. The method is simple in calculation logic, facilitates real-time online calculation of high-speed laws such as an FPGA and the like, can effectively filter burrs of encoder signals in real time, prevents false triggering, and greatly improves the real-time anti-interference capability of the encoder signals.

Description

TECHNICAL FIELD

[0001] The application belongs to the field of encoder anti-interference, and particularly relates to an online anti-interference processing and verification method for an encoder equal-azimuth trigger signal. BACKGROUND

[0002] An encoder is a sensor device used to measure rotary or linear motion. Its main function is to convert mechanical displacement into electrical signals, thereby achieving precise control of parameters such as position and speed. Common encoders include absolute value encoders and incremental encoders, which are two types suitable for different application scenarios. The incremental encoder is usually composed of a rotating shaft, a rotating shaft, a light source, a photoelectric sensor, etc. In order to improve accuracy and determine direction, the incremental encoder usually outputs two sets of pulse signals with a phase difference of 90 degrees (A, B channels). In this way, the direction of rotation can be determined by detecting the phase relationship between the two signals. In each complete rotation period, a larger opaque area is designed on the grating disc to generate a reference pulse (Z channel). This signal is usually used for zero calibration or position zeroing. The light signal received by the photoelectric sensor is amplified, shaped, and processed into a standard square wave signal (such as TTL or CMOS level). Incremental encoders are widely used in industrial automation, robot control, servo motor positioning, etc. Their main advantages include high accuracy, fast response, and relatively low cost.

[0003] In actual applications, incremental encoders are susceptible to noise interference and other factors, resulting in a large number of jitter error pulses in the output signal, which will cause false triggering in control and lead to errors in measuring the speed and position of rotating mechanisms such as rotors. Moreover, this error may also accumulate.

[0004] In order to overcome the above problems, a method and device for making encoders resistant to interference (CN103063237A) can automatically adjust the parameters of the adaptive filter system in real time according to the speed of the rotating mechanism, and use corresponding processing algorithms for filtering, greatly improving the measurement accuracy of the encoder. The implementation path of this invention is to detect interference by sampling and accumulating Z, A, and B signals according to the sampling frequency, such as accumulating M=1000, and then comparing with the threshold value to determine whether there is interference in this section of pulses. If there is interference, the filter coefficients are generated and an adaptive filter is generated to perform adaptive filtering on the copied encoder signal. This method can improve the accuracy of the encoder, but the update of the filter coefficients must wait for the sampling and accumulation of Z, A, and B signals. Each time M numbers of accumulations are reached, it is determined whether there is interference, so it will inevitably produce a large time delay. It is more suitable for offline analysis and other application scenarios after data collection, and is not suitable for online real-time control applications based on each pulse. SUMMARY

[0005] In order to solve the problem that the adaptive interference rejection in the prior art is not suitable for online real-time control application based on each pulse, the present application provides an online anti-interference processing and verification method of encoder azimuth trigger signal, which aims to detect the encoder signal of a rotating part such as a rotor or a motor in real time, generate a Z / A / B signal trigger instruction, and obtain rotating speed and rotating position information according to the trigger instruction. The method can also be used for azimuth acquisition, azimuth output, signal synchronization between boards, control cycle interruption, and other operations, supporting servo control of the motor and realizing functions such as azimuth acquisition of response signals, azimuth output of control signals, synchronization between boards, synchronization between systems, and control cycle interruption in applications such as rotor vibration reduction and noise reduction of trailing edge flaps. The technical solution is as follows: In the first aspect, the online anti-interference processing and verification method of encoder azimuth trigger signal is provided, which converts the encoder signal into a high or low level signal in real time, detects the rising edge of the Z, A, and B signals of the encoder in real time, waits for XZ, XA, and XB seconds after detecting the rising edge, and then detects whether the corresponding Z, A, and B signals are high level again. If true, it is determined that the pulse signal is true, otherwise, it is determined that the rising edge is a false trigger of the interference signal, and the rising edge of the Z, A, and B signals is continuously detected in real time.

[0006] Further, the Z, A, and B signals are counted to detect whether there is interference in the execution process. If there is still interference, the high level waiting time XZ, XA, and XB is adjusted to achieve complete anti-interference, which can be used in azimuth angle-based azimuth sampling and azimuth control applications.

[0007] Optionally, the method specifically includes: Step 1: assigning an initial value to a variable for counting the trigger times of the Z, A, and B signals, setting pulse high level waiting time parameters, Z, A, and B signal isochronous sampling rate of the encoder, and high and low level threshold value; Step 2: high-frequency sampling the Z, A, and B signals of the encoder according to the set sampling rate, and converting the collected Z, A, and B continuous digital signals into high and low level square wave signals according to the high and low level threshold value; Step 3: introducing a Z signal trigger loop to the Z signal converted into a square wave. In the loop, first wait for the rising edge of the Z signal (from 0 to 1 as the rising edge), and if true, go to step 4. (The Z signal trigger loop is introduced to obtain the zero point of the azimuth angle of the rotating part, so that the control instruction signal of the D / A output based on the encoder signal and the feedback signal of the A / D acquisition can obtain the absolute zero point corresponding to the real physical environment, so that the control output of the control system after each startup can start from the absolute zero point.) Step 4: Wait for XZ seconds, collect the encoder Z signal again, and judge whether it is high or not. If it is high, execute step 5. If it is low, consider that this rising edge is a false trigger of interference signal, and execute step 3; (This step is one of the cores of the application. By detecting the rising edge of the signal, after detecting the rising edge of the signal, waiting for XZ seconds, and collecting the Z signal again, if it is an interference glitch signal, generally its waveform is a triangular wave, and the high level is short. When it is low again, it can be judged that it is a glitch. If it is still high, it is true) Step 5: Accumulate the count of Z signal trigger times and generate Z signal related event trigger instruction. Compare the Z, A, and B trigger cumulative count variables to determine whether the Z / A / B signal trigger is normal, and return to step 3; Step 6: Enter the A / B signal trigger loop, wait for the rising edge of the A / B signal, and if it is true, proceed to step 7; (The purpose of this step is to detect the rising edge of the signal in real time through high-frequency sampling and high-frequency loop program) Step 7: Wait for XA / XB seconds, collect the encoder A / B signal again, and judge whether it is high or not. Step 8: Accumulate the count of A / B signal trigger times, generate A / B signal related event trigger instruction, and return to step 6.

[0008] Optionally, in step 1, send initialization instruction to FPGA in CPU processor, initialize the encoder signal processing program in I / O board card with FPGA processor, set SZ=0, SA=0, SB=0, SZ, SA, and SB represent the cumulative number of Z, A, and B signal true triggers; At the same time, transfer the pulse high level waiting time parameters XZ, XA, and XB set in the CPU processor to the FPGA to avoid time-consuming waiting when debugging XZ, XA, and XB parameters, XZ, XA, and XB represent the waiting time of Z, A, and B after detecting the rising edge again to detect whether it is high or not; According to the rotational speed of the rotating part, the isochronous sampling rate of the Z, A, and B signals of the encoder is set to ensure that the Z, A, and B signals have enough sampling points when the signal high level is high. According to the size of the Z, A, and B signal levels of the encoder, set the threshold of high and low levels in the CPU and transfer them to the FPGA.

[0009] Optionally, in step 2, in the FPGA processor, the Z, A, B signals of the encoder are high-frequency sampled according to the set sampling rate, and for each sampling point of the collected Z, A, B signals of the encoder, the collected continuous digital signals of Z, A, B are converted into high-low square wave signals composed of 0 and 1 according to the threshold of high-low level, so as to facilitate the subsequent program to accurately judge the rising edge. (According to the set high-low level threshold, the signal is converted from the amplitude continuous digital signal to the amplitude discrete square wave signal composed of 0 and 1, so as to filter most of the small amplitude glitch interference signals) Optionally, in step 3, the rising edge of the Z signal is waited, and if it is false, the rising edge of the Z signal is continued to be waited.

[0010] Optionally, in step 4, it is judged whether the encoder Z signal is a high level, if it is a low level, it is considered that the rising edge is an interference signal false trigger, and step 3 is executed.

[0011] Optionally, in step 5, the Z signal trigger times are accumulated and counted, that is, SZ=SZ+1, and the Z signal related event trigger instruction is generated, then the variables SZ, SA, SB of the Z, A, B trigger cumulative count are compared, it is judged whether (SZ-1)*M is equal to SA, (SZ-1)*M is equal to SB, if both are true, the monitoring interface displays the “Z / A / B signal trigger normal” indicator light, otherwise, the monitoring interface displays the “Z / A / B signal trigger abnormal” indicator light, finally, the cycle is ended, and step 3 is returned, wherein M represents the pulse number of A, B signal rotation 1 circle.

[0012] Optionally, in step 6, the A / B signal trigger cycle is entered, the rising edge of the A / B signal is waited, and if it is false, the rising edge of the A / B signal is continued to be waited.

[0013] Optionally, in step 7, XA / XB seconds are waited, the encoder A / B signal is collected again, and it is judged whether it is a high level, if it is a high level and SZ is greater than 0, step 8 is executed, otherwise, it is considered to be an interference signal (corresponding to the low level case) or the “0” position of the encoder has not been detected (when SZ is greater than 0 for the first time, it indicates that the “0” position is detected, that is, the pulse of the Z signal), step 6 is executed. (By judging whether SZ is greater than 0, it is judged whether the rotating part reaches the “0” position, only when the part reaches the “0” position, that is, SZ is greater than 0, the A / B signal counts the true trigger, so as to calculate the current position angle of the rotating part through counting).

[0014] The beneficial effects of the application are at least: For various glitch interference signals that may occur in the encoder Z, A, B, in order to prevent the encoder signal processing program from mistakenly considering the glitch signal as the azimuth trigger pulse signal, first, by reasonably setting the high and low level threshold, most of the small amplitude glitch signals are filtered, and Z, A, B signals are converted into square wave signals composed of 0 and 1 according to the high and low level; then for the possible glitch signal with large amplitude, according to the characteristics that the glitch signal waveform is similar to the triangular wave and the high level duration is short, when detecting the real azimuth pulse signal, the rising edge of the square wave signal is detected first, and after X seconds are waited for when the rising edge is detected, the high and low level of Z, A, B is detected again, the glitch signal with large amplitude in Z, A, B signal that is identified as 1 is filtered. Finally, in order to judge whether the parameters such as the high level waiting time of Z, A, B are reasonable, and whether the encoder signal is mis-triggered, the trigger times of Z, A, B signals when the rotating part rotates 1 circle are compared to judge. If mis-triggering is found in the test, the high level waiting time of Z, A, B can be adjusted for optimization, so as to achieve the purpose of accurately identifying Z, A, B signals in real-time azimuth control and other applications.

[0015] The application has simple calculation and logic, can be calculated online in real time by FPGA and other high-speed devices, can effectively filter the glitches of the encoder signal in real time, prevent mis-triggering, greatly improve the real-time anti-interference ability of the encoder signal, and has been verified in practical application. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 The figure is a flowchart of the application. DETAILED DESCRIPTION

[0017] In order to make the purpose, technical scheme and advantages of the embodiments of the application clearer, the technical scheme in the embodiments of the application will be described clearly and completely in combination with the drawings in the embodiments of the application. Obviously, the described embodiments are part of the embodiments of the application, not all the embodiments. Based on the embodiments in the application, all other embodiments obtained by those skilled in the art without creative labor belong to the protection scope of the application.

[0018] The features and exemplary embodiments of the various aspects of the present application will be described in detail below. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present application. However, it will be apparent to one of ordinary skill in the art that the present application can be practiced without some or all of these specific details. The description of the embodiments is merely intended to provide a more detailed understanding of the present application. The present application is in no way limited to any particular set of the specific details described below. Rather, the present application covers any modifications, equivalents, and alternatives falling within the spirit of the present application. In the drawings and the following description, well-known structures and techniques have not been shown in order to avoid unnecessary obscurity of the present application.

[0019] It should be noted that the embodiments of the present application and the features in the embodiments can be combined with each other without conflict, and each embodiment can be referred to and cited by each other.

[0020] The present application will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0021] The present application provides a computationally efficient, logically simple, and anti-interference encoder signal online real-time detection method, which can monitor whether the encoder signal is triggered by mistake. The method can be used in applications such as motor and other rotating parts, speed, position, real-time requirements, and high-accuracy servo control, especially in applications such as the control signal and rotor azimuth angle real-time strong correlation in the vibration and noise reduction control system of the trailing edge flap rotor.

[0022] The present application provides an online anti-interference processing and verification method for azimuth trigger signals such as encoders. First, the encoder signal is converted into a high-low level signal in real time, and then the rising edge of the Z, A, and B signals of the encoder is detected in real time. The key point is that after detecting the rising edge, waiting for XZ, XA, and XB seconds, and then detecting whether the corresponding Z, A, and B signals are high level again. If true, it is considered that the pulse signal is true, otherwise, it is considered that this rising edge is an interference signal triggered by mistake, and the initial step of the loop is returned, that is, the rising edge of the Z, A, and B signals is continuously detected in real time. By counting the Z, A, and B signals, it is detected in real time whether interference that cannot be excluded is mixed in the execution process. If there is still interference, the waiting time of the high level XZ, XA, and XB can be adjusted to achieve the purpose of complete anti-interference, so as to be used in azimuth-based azimuth sampling and azimuth control applications.

[0023] Referring to Figure 1 The method of the present application specifically includes the following steps: Step 1: initialization, send initialization instructions in the CPU processor to the FPGA, initialize the encoder signal processing program in the I / O board card with FPGA processor, assign initial values to the variables that count the number of Z, A, B triggers: SZ = 0, SA = 0, SB = 0, and at the same time, transfer the pulse high level waiting time parameters XZ, XA, XB set in the CPU processor to the FPGA to avoid time-consuming waiting when debugging XZ, XA, XB parameters, where SZ, SA, SB represent the cumulative number of Z, A, B true triggers, and XZ, XA, XB represent the waiting time for Z, A, B to detect high level again after detecting the rising edge; set the encoder Z, A, B signal sampling rate according to the speed of rotating parts such as rotors and motors to ensure that there are enough sampling points when the Z, A, B signal is high; set the high and low level threshold in the CPU according to the size of the encoder Z, A, B signal level and transfer it to the FPGA.

[0024] Step 2: in the FPGA processor, sample the Z, A, B signals of the encoder at high frequency according to the set sampling rate, and convert the collected Z, A, B signals into high and low square wave signals composed of 0 and 1 according to the high and low level threshold, so that the subsequent program can accurately judge the rising edge; according to the set high and low level threshold, convert the signal from continuous digital signal to discrete square wave signal composed of 0 and 1, so as to filter most of the small amplitude glitch interference signals.

[0025] Step 3: introduce the Z signal converted into square wave into the Z signal trigger loop, in the loop, first wait for the rising edge of Z signal, if true, go to step 4, if false, continue the current step and continue to wait for the rising edge of Z signal (from 0 to 1 is the rising edge); (first enter the Z signal trigger loop to get the zero point of the azimuth of the rotating part, so that the control instruction signal of the D / A output based on the encoder signal and the feedback signal of the A / D acquisition can get the absolute zero point corresponding to the real physical environment, so that the control output of the control system after each start can start from the absolute zero point).

[0026] Step 4: Wait for XZ seconds, collect the encoder Z signal again, and judge whether it is high level, if it is high level, it is true, execute step 5, if it is low level, it is considered that this rising edge is a false trigger of interference signal, it is false, execute step 3; this step detects the rising edge of the method signal, after detecting the rising edge of the signal, waits for XZ seconds, and judges the collected Z signal again, if it is an interference glitch signal, generally its waveform is a triangular wave, the high level is short, and when it is detected again after waiting for XZ seconds, it is low, so it can be judged that it is a glitch, if it is high, it is true.

[0027] Step 5: Accumulate the count of Z signal trigger times, SZ = SZ+1, and generate Z signal related event trigger instruction, then compare the accumulated count variables SZ, SA, SB of Z, A, B triggers (SZ-1)*M whether equal to SA, (SZ-1)*M whether equal to SB, wherein M represents the number of pulses of A, B signal rotation 1 circle, if both are true, the monitoring interface displays "Z / A / B signal trigger normal" indicator light, otherwise, the monitoring interface displays "Z / A / B signal trigger abnormal" indicator light, finally, end this cycle step and return to step 3.

[0028] Step 6: Enter A / B signal trigger cycle, wait for the rising edge of A / B signal, if it is true, execute step 7, if it is false, continue the current step and continue to wait for the rising edge of A / B signal; the purpose of this step is to detect the rising edge of the signal in real time through high-frequency sampling and high-frequency cycle program.

[0029] Step 7: Wait for XA / XB seconds, collect the encoder A / B signal again, and judge whether it is high level, if it is high level and SZ is greater than 0, it is true, execute step 8, otherwise, it is false, it is considered that this is an interference signal (corresponding to the low level case) or the "0" position of the encoder has not been detected (when SZ is greater than 0 for the first time, it means that the "0" position has been detected, that is, the pulse of Z signal), execute step 6. By judging whether SZ is greater than 0, it is judged whether the rotating part reaches the "0" position, only when the part reaches the "0" position, that is, SZ is greater than 0, the A / B signal counts the true trigger, so as to calculate the azimuth angle of the current rotating part through counting.

[0030] Step 8: Accumulate the count of A / B signal trigger times, SA = SA+1 or SB = SB+1, and generate A / B signal related event trigger instruction, then return to step 6.

[0031] For example, for a certain model rotor, the target control rotating speed is 600 rev / min~960 rev / min, the encoder is an incremental encoder, the Z signal triggers once per circle, the A and B signals each trigger M=1000 times per circle, through high-frequency sampling of the Z, A and B signals of the encoder, the high and low level proportion of the encoder signal is obtained, for example, the high level angle proportion of the Z signal and 360 degrees of rotation per circle is 1:360, the high level of a single pulse of the A and B signals and 360 degrees of rotation per circle is 1:2000, then according to the target control rotating speed and the high level proportion of the Z, A and B signals, the waiting time XZ, XA and XB can be set to an ideal range: XZ<173.61 us, XA<31.25 us, XB<31.25 us, then XZ=50 us, XA=10 us and XB=10 us can be set. The encoder signal processing adopts an I / O board card with an FPGA, and the control task and main program work in the CPU processor. The specific implementation process of the present application is as follows: Step 1: initialization, according to the initialization instruction sent by the CPU processor, the initial value of the variable for counting the Z, A and B trigger times in the FPGA processor is assigned: SZ=0, SA=0 and SB=0, and the pulse high level waiting time parameters XZ=50 us, XA=20 us and XB=20 us set are sent from the CPU processor to the FPGA processor; according to the rotating speed of the rotor, motor and other rotating parts 600 rev / min~960 rev / min and the high level of a single pulse of the Z, A and B signals of the encoder and 360 degrees of rotation per circle, the isochronous sampling rate of the Z, A and B signals is set to 200000 points / s, that is, the sampling interval is 5 us; step 2: high-frequency sampling of the Z, A and B signals of the encoder, the Z, A and B signals of the encoder are converted into high and low square wave signals according to the high and low levels, for example, when the level is greater than 3V, it is considered as a high level, and the encoder signal sampling point collected at this time is assigned a value of 1, when the voltage is less than 0.5V, it is considered as a low level, and the encoder signal sampling point collected at this time is assigned a value of 0; Step 3: enter the Z signal trigger loop, according to the square wave signal generated by the Z signal obtained in step 2, wait for the rising edge of the Z signal, when the signal changes from 0 to 1, it is considered that the rising edge is detected, if the rising edge is detected, it is true, enter step 4, if it is false, end this loop step and return to the beginning of the loop to continue detection and wait for the rising edge of the Z signal; Step 4: wait for XZ=50 us seconds, collect the Z signal of the encoder again and judge whether it is a high level, if it is a high level, it is true, execute step 5, if it is a low level, it is considered as an interference signal, it is false, execute step 3; Step 5: Accumulate the count of Z signal trigger times, SZ = SZ+1, and generate Z signal related event trigger instruction, and compare the accumulated count variables SZ, SA, SB of Z, A, B triggers (SZ-1)*M whether equal to SA, (SZ-1)*M whether equal to SB, if both are true, the monitoring interface displays the "Z / A / B signal trigger normal" indicator light, otherwise, the monitoring interface displays the "Z / A / B signal trigger abnormal" indicator light, and finally end this cycle part and return to step 3; Step 6: Enter A / B signal trigger loop respectively, wait for the rising edge of A / B signal according to the square wave signal converted by A / B, if the rising edge is detected, it is true, enter step 7, if the rising edge is not detected, it is false, then end this cycle step and return to the beginning of the loop to continue waiting for the rising edge of A / B signal. Step 7: Wait for XA=10us / XB=10us seconds, collect the encoder A / B signal again, and judge whether it is high level, if it is high level and SZ is greater than 0, it is true, execute step 8, otherwise it is false, it is considered to be an interference signal or the "0" position of the encoder has not been detected, end this cycle step and return to step 6. The purpose of judging whether SZ is greater than 0 is to start counting the true trigger of the detected A, B signal after detecting the rising edge of Z signal, that is, the "0" position of the rotating motor or rotor, so that the absolute position angle position of A, B trigger can be determined from the "0" position.

[0032] Step 8: Accumulate the count of A / B signal trigger times, SA = SA+1 or SB = SB+1, and generate A / B signal related event trigger instruction, and return to step 6.

[0033] The above only expresses the embodiment of the application, which is described in detail and in detail, but cannot be understood as limiting the scope of the patent. It should be noted that for ordinary skilled in the art, without departing from the concept of the present application, a number of modifications and improvements can be made, which belong to the protection scope of the present application. In addition, the parts not described in detail of the present application are all conventional technologies.

Claims

1. A method for online anti-interference processing and verification of encoder azimuth trigger signals, characterized in that, The encoder signal is converted into high and low level signals in real time. The rising edge of the encoder's Z, A, and B signals is detected in real time. After the rising edge is detected, wait for XZ, XA, and XB seconds, and then check whether the corresponding Z, A, and B signals are high. If they are true, the pulse signal is confirmed to be true. Otherwise, the rising edge is determined to be a false triggering of an interference signal, and the rising edge of the Z, A, and B signals is detected in real time.

2. The method according to claim 1, characterized in that, The Z, A, and B signals are counted to detect and determine in real time whether interference that could not be eliminated has been mixed in during the execution process. If interference still exists, the waiting time XZ, XA, and XB of the high level are adjusted to achieve complete anti-interference.

3. The method according to claim 1, characterized in that, The method specifically includes: Step 1: Assign initial values ​​to the variables used to count the number of triggers for the Z, A, and B signals, and set the pulse high-level wait time parameter, the isochronous sampling rate of the encoder's Z, A, and B signals, and the threshold values ​​for high and low levels; Step 2: Perform high-frequency sampling of the encoder's Z, A, and B signals according to the set sampling rate, and convert the collected continuous digital signals of Z, A, and B into high and low level square wave signals according to the high and low level thresholds. Step 3: Introduce the Z signal trigger loop to the Z signal converted into a square wave. During the loop, first wait for the rising edge of the Z signal. If it is true, proceed to step 4. Step 4: Wait XZ seconds, then acquire the encoder Z signal again and determine whether it is high. If it is high, proceed to step 5; if it is low, consider this rising edge to be an interference signal that is falsely triggered, and proceed to step 3. Step 5: Accumulate and count the number of Z signal triggers and generate Z signal related event trigger commands. Then compare the accumulated counts of Z, A, and B triggers to determine whether the Z / A / B signal triggers are normal, and return to step 3. Step 6: Enter the A / B signal trigger loop, wait for the rising edge of the A / B signal, if true, proceed to step 7; Step 7: Wait XA / XB seconds, then collect the encoder A / B signal again and determine whether it is high. Step 8: Accumulate the number of times the A / B signal is triggered, generate the A / B signal related event trigger command, and then return to step 6.

4. The method according to claim 3, characterized in that, In step 1, an initialization command is sent from the CPU processor to the FPGA to initialize the encoder signal processing program in the I / O board with the FPGA processor. SZ=0, SA=0, SB=0, where SZ, SA, and SB represent the cumulative number of actual triggers of the Z, A, and B signals. At the same time, the pulse high-level wait time parameters XZ, XA, and XB set in the CPU processor are transmitted to the FPGA. XZ, XA, and XB represent the wait time for Z, A, and B to check whether they are high-level again after detecting the rising edge. The isochronous sampling rate of the encoder's Z, A, and B signals is set according to the rotational speed of the rotating component to ensure that there are enough sampling points for the Z, A, and B signals when the signal is high. Based on the magnitude of the encoder's Z, A, and B signal levels, high and low level thresholds are set in the CPU and transmitted to the FPGA.

5. The method according to claim 3, characterized in that, In step 2, the FPGA processor performs high-frequency sampling of the encoder's Z, A, and B signals according to the set sampling rate. For each sampling point of the acquired encoder's Z, A, and B signals, the acquired continuous digital signals of Z, A, and B are converted into high and low level square wave signals composed of 0 and 1 according to the high and low level thresholds, so that the subsequent program can accurately determine the rising edge.

6. The method according to claim 3, characterized in that, In step 3, wait for the rising edge of the Z signal. If it is false, continue to wait for the rising edge of the Z signal.

7. The method according to claim 3, characterized in that, In step 4, it is determined whether the encoder Z signal is high. If it is low, it is considered that this rising edge is an interference signal that is falsely triggered, and step 3 is executed.

8. The method according to claim 3, characterized in that, In step 5, the number of Z signal triggers is accumulated, i.e., SZ = SZ + 1, and a Z signal related event trigger command is generated. Then, the variables SZ, SA, and SB, which are the cumulative counts of Z, A, and B triggers, are compared to determine whether (SZ-1)*M equals SA and whether (SZ-1)*M equals SB. If both are true, the monitoring interface displays the "Z / A / B signal triggering normal" indicator light; otherwise, the monitoring interface displays the "Z / A / B signal triggering abnormal" indicator light. Finally, the loop ends and returns to step 3, where M represents the number of pulses for one rotation of the A and B signals.

9. The method according to claim 3, characterized in that, In step 6, the A / B signal trigger loop is entered, and the rising edge of the A / B signal is waited for. If it is false, the waiting for the rising edge of the A / B signal continues.

10. The method according to claim 3, characterized in that, In step 7, wait for XA / XB seconds, then collect the encoder A / B signal again and determine whether it is high. If it is high and SZ is greater than 0, proceed to step 8; otherwise, consider it an interference signal or the encoder's "0" position has not been detected, and proceed to step 6.

Images