Temperature sensor and temperature detection method

Abstract

The invention provides a temperature sensor and a temperature detection method. The temperature sensor comprises a temperature sensing module, a current frequency conversion module and a counting module. The temperature sensing module comprises a first P-type MOSFET, a second P-type MOSFET and a bias unit, the source end of the first P-type MOSFET is connected to power supply voltage, and the gate end and the drain end of the first P-type MOSFET are in short circuit; the source end of the second P-type MOSFET is connected to the power supply voltage, and the gate end and the drain end of the second P-type MOSFET are in short circuit; the bias unit is used for providing bias current, so that the first P-type MOSFET and the second P-type MOSFET respectively generate first temperature sensing current and second temperature sensing current which are related to temperature and have different temperature coefficients under the action of the bias current; the current frequency conversion module is used for converting the first temperature-sensing current and the second temperature-sensing current into a first clock signal and a second clock signal after mirror image duplication is carried out on the first temperature-sensing current and the second temperature-sensing current respectively; the counting module is used for counting the first clock signal and the second clock signal and reading temperature data.

Description

Technical Field

[0001] This disclosure relates to the fields of circuit design and temperature sensor technology, and in particular to a low-power temperature sensor and temperature detection method based on subthreshold current ratio. Background Technology

[0002] Currently, widely used CMOS (Complementary Metal-Oxide-Semiconductor) temperature sensor architectures are mainly divided into voltage / current domain readout CMOS temperature sensors and time / frequency domain readout CMOS temperature sensors. Traditional voltage / current domain readout CMOS temperature sensors mostly utilize ADC (Analog-to-Digital Converter) structures to quantize temperature-related voltages / currents. This type of architecture often employs traditional mixed-signal integrated circuit design technology, offering advantages such as good stability and high accuracy. However, the supply voltage for ADC information processing is limited, and as resolution increases, the circuit generates significant power consumption and occupies a large area. Traditional time / frequency domain readout CMOS temperature sensors can reduce the supply voltage, converting temperature-related voltages or currents into signals with delays and frequencies that can be directly processed by digital circuits in the subthreshold region, achieving low-power design. However, traditional time-domain conversion-based CMOS temperature sensors have a large area; traditional frequency-domain conversion-based CMOS temperature sensors typically have larger errors due to circuit nonlinearity and voltage sensitivity issues. Summary of the Invention

[0003] In view of the above, in order to at least partially solve at least one of the aforementioned technical problems, this disclosure provides a low-power temperature sensor and temperature detection method based on subthreshold current ratio. To achieve the above objective, the technical solution of this disclosure is as follows:

[0004] According to one embodiment of this disclosure, a temperature sensor is provided, including a temperature sensing module, a current-frequency conversion module, and a counting module. The temperature sensing module includes: a first P-type MOSFET with its source terminal connected to a power supply voltage and its gate and drain terminals shorted; a second P-type MOSFET with its source terminal connected to the power supply voltage and its gate and drain terminals shorted, wherein the drain terminals of the second P-type MOSFET and the first P-type MOSFET are interconnected and a bias node is provided at the interconnection point; and a bias unit connected between the bias node and ground, the bias unit being used to provide a bias current, such that the first P-type MOSFET and the second P-type MOSFET generate a first temperature-sensing current and a second temperature-sensing current, respectively, which are temperature-related and have different temperature coefficients, under the action of the bias current; the current-frequency conversion module is used to mirror and copy the first temperature-sensing current and the second temperature-sensing current, respectively, and convert them into a first clock signal and a second clock signal; the counting module is used to count the first clock signal and the second clock signal and read temperature data.

[0005] According to embodiments of this disclosure, the bias current is in the nanoampere range. The bias current is provided to the first P-type MOSFET and the second P-type MOSFET through the zero-bias leakage current of the metal-oxide-semiconductor field-effect transistor.

[0006] According to an embodiment of this disclosure, the bias unit includes: a first N-type MOSFET with its drain connected to the bias node and its gate and source shorted; and a third P-type MOSFET with its drain grounded and its gate and source shorted, wherein the gates of the third P-type MOSFET and the first N-type MOSFET are interconnected, and the source of the third P-type MOSFET and the first N-type MOSFET are interconnected.

[0007] According to an embodiment of this disclosure, the zero-bias leakage current generated by the first N-type MOSFET provides bias current for the first P-type MOSFET and the second P-type MOSFET. The first P-type MOSFET and the second P-type MOSFET have different threshold voltages, such that the first P-type MOSFET and the second P-type MOSFET respectively generate a first temperature-sensitive current and a second temperature-sensitive current that are related to temperature and have different temperature coefficients. The ratio between the first temperature-sensitive current and the second temperature-sensitive current is linearly related to the temperature.

[0008] According to embodiments of this disclosure, the factors affecting the threshold voltage between the first P-type MOSFET and the second P-type MOSFET include the size of the first P-type MOSFET and the second P-type MOSFET. The threshold voltage difference between the two MOSFETs can be adjusted by adjusting the size of the first P-type MOSFET and / or the second P-type MOSFET.

[0009] According to an embodiment of this disclosure, the current frequency conversion module includes a first current frequency conversion branch and a second current frequency conversion branch. The first current frequency conversion branch replicates the first temperature-sensing current through a current mirror structure to obtain a first mirror temperature-sensing current, and converts the first mirror temperature-sensing current into a first clock signal through a relaxation oscillator structure. The second current frequency conversion branch replicates the second temperature-sensing current through a current mirror structure to obtain a second mirror temperature-sensing current, and converts the second mirror temperature-sensing current into a second clock signal through a relaxation oscillator structure.

[0010] According to an embodiment of this disclosure, the first current-frequency conversion branch further includes a first leakage current compensation unit, and the second current-frequency conversion branch further includes a second leakage current compensation unit. The first leakage current compensation unit and / or the second leakage current compensation unit can compensate for the first mirror temperature sensing current and / or the second mirror temperature sensing current when the linearity of the frequency ratio between the first clock signal and the second clock signal fluctuates abnormally.

[0011] In another aspect, this disclosure provides a temperature detection method, comprising: providing a nanoampere-level bias current; causing a first P-type MOSFET and a second P-type MOSFET to generate a first temperature-sensing current and a second temperature-sensing current, respectively, with different temperature coefficients and related to temperature, using a threshold voltage under the action of the bias current; replicating the first temperature-sensing current and the second temperature-sensing current through a current mirror structure to obtain a first mirror temperature-sensing current and a second mirror temperature-sensing current; converting the first mirror temperature-sensing current and the second mirror temperature-sensing current into a first clock signal and a second clock signal, respectively; and counting the first clock signal and the second clock signal and reading temperature data.

[0012] According to embodiments of this disclosure, the temperature detection method further includes compensating for the first mirror-image temperature sensing current and / or the second mirror-image temperature sensing current. Attached Figure Description

[0013] The above and other objects, features and advantages of this disclosure will become clearer from the following description of embodiments with reference to the accompanying drawings, in which:

[0014] Figure 1 This is a schematic diagram of the composition of a temperature sensor according to an embodiment of this disclosure.

[0015] Figure 2 This is a schematic diagram of the specific circuit structure of the temperature sensor according to an embodiment of the present disclosure.

[0016] Figure 3 This is a schematic diagram illustrating the generation principle of subthreshold current in an embodiment of this disclosure.

[0017] Figure 4 The linearity of the temperature sensing module in this embodiment of the present disclosure is related to the first P-type MOSFET M. P1 Second P-type MOSFET M P2 Threshold voltage difference ΔV th A diagram illustrating the relationship between the two.

[0018] Figure 5 This is a schematic diagram of the size-induced effect of the temperature sensing module according to an embodiment of the present disclosure.

[0019] Figure 6 This is a schematic flowchart of a temperature detection method according to an embodiment of the present disclosure.

[0020] Figure 7 This is a Monte Carlo diagram illustrating the linearity of the temperature sensing module according to an embodiment of the present disclosure.

[0021] Figure 8 This is a schematic diagram showing the relationship between the temperature digital codes output under different process angles in an embodiment of this disclosure.

[0022] Figure 9 This is a schematic diagram illustrating the error of two-point calibration of the temperature digital code output under different process angles in embodiments of this disclosure. Detailed Implementation

[0023] This disclosure provides a temperature sensor and temperature detection method based on subthreshold current ratio. It employs a low-power CMOS temperature sensor design based on subthreshold current ratio. The temperature sensing module utilizes the threshold voltage difference between different MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) to generate two sensing currents with different temperature coefficients. Two current-to-frequency conversion modules then convert these two sensing currents into two frequency signals, the ratio of which is proportional to the temperature. Finally, a counter converts the frequency signals into digital codes for output. This temperature sensor achieves low power consumption and small area within a sensing range of 0℃-100℃, while ensuring small error and good process robustness.

[0024] For high-performance processor chips (such as AI chips), temperature variations have a significant impact on their performance, and heat dissipation issues caused by high power consumption are one of the main obstacles to improving chip computing power. Monitoring data from an integrated CMOS temperature sensor can be used to adjust and optimize processor performance, control the operation of allocation modules to improve computing power, and ensure that the chip operates stably and efficiently within a safe temperature range. Therefore, this disclosure provides a low-power (3.5nW) CMOS temperature sensor and temperature detection method that can operate at low supply voltages (0.5V).

[0025] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.

[0026] In this disclosure embodiment, a temperature sensor is provided, such as... Figure 1 As shown, the temperature sensor includes a temperature sensing module 10, a current-frequency conversion module 20, and a counting module 30.

[0027] The temperature sensing module includes a first P-type MOSFET M P1 The second P-type MOSFET M P2 and bias unit 11. Among them, the first P-type MOSFET M P1 The source terminal is connected to the power supply voltage, and the gate and drain terminals are shorted; the second P-type MOSFET M P2 The source terminal of the first P-type MOSFET is connected to the power supply voltage, and the gate and drain terminals are shorted. The drain terminal of the second P-type MOSFET is interconnected with the drain terminal of the first P-type MOSFET, and a bias node A0 is provided at the interconnection point. The bias unit 11 is connected between the bias node A0 and ground. The bias unit is used to provide bias current, so that the first P-type MOSFET M... P1 and the second P-type MOSFET M P2 Under the action of the bias current, a first sensing current I1 and a second sensing current I2, which are related to temperature and have different temperature coefficients, are generated respectively.

[0028] The current-frequency conversion module 20 is used to mirror and copy the first temperature sensing current I1 and the second temperature sensing current I2, and then convert them into the first clock signal f. CLK1 Second clock signal f CLK2 ;

[0029] The counting module 30 is used to count the first clock signal f CLK1 Second clock signal f CLK2 Perform counting and read temperature data.

[0030] According to embodiments of this disclosure, the bias current provided by bias unit 11 is in the nanoampere range. The zero-bias leakage current of the MOSFET can be used to determine the magnitude of the bias current of the first P-type MOSFET M. P1 Second P-type MOSFET M P2 Provides bias current, first P-type MOSFET M P1 Second P-type MOSFET M P2 With different threshold voltages, under the action of bias current, the first P-type MOSFET M... P1 Second P-type MOSFET M P2 Subthreshold sensing currents are generated respectively.

[0031] Figure 3 A schematic diagram illustrating the generation principle of subthreshold current is shown, such as... Figure 3 As shown, it includes two subthreshold current generation branches, one on the left and one on the right. Each subthreshold current generation branch consists of two P-type MOSFETs operating in the subthreshold region connected in series. Figure 3 The left-hand branch consists of P-type MOSFETs M1 and M3. The bias current of this branch is provided by the zero-bias leakage current of P-type MOSFET M3, which then acts on the diode-connected P-type MOSFET M1 to generate a subthreshold current I. REF1 The subthreshold current I REF1 It facilitates mirror replication via a current mirror structure; Figure 3 The P-type MOSFET M1 in the left-hand subthreshold current generation branch and the P-type MOSFET M2 in the right-hand subthreshold current generation branch can use two different types or sizes of MOSFETs to obtain threshold voltages with different temperature characteristics to generate the sensing current. Based on this subthreshold current generation principle, a high-precision temperature sensing unit design can be achieved over a wide temperature measurement range. Figure 3 available:

[0032] (1);

[0033] ;

[0034] Where μ1 is the carrier mobility of P-type MOSFET M1, μ2 is the carrier mobility of P-type MOSFET M2, and C OX1 It is the gate oxide capacitance per unit area of ​​the P-type MOSFET M1, C OX2 This is the gate oxide capacitance per unit area of ​​the P-type MOSFET M2. W1 and L1 represent the channel width and channel length per unit area of ​​the P-type MOSFET M1, respectively. th1This represents the threshold voltage of the P-type MOSFET M1, and W2 and L2 represent the unit channel width and unit channel length of the P-type MOSFET M2, respectively. th2 V represents the threshold voltage of P-type MOSFET M2, m1 is the subthreshold slope factor of P-type MOSFET M1, and m2 is the subthreshold slope factor of P-type MOSFET M2; T Represents thermal voltage, V T = kT / q, where k represents the Boltzmann constant and q represents the charge carried by a single electron.

[0035] By combining the subthreshold current equations, we can obtain the subthreshold current I of the P-type MOSFET M2. REF2 and the subthreshold current I of P-type MOSFET M1 REF1 The expression for the current ratio between them is:

[0036]

[0037] Where β1 represents the transconductance parameter of the P-type MOSFET M1, β1 = µ1 C OX1 W1 / L1; β2 represents the transconductance parameter of the P-type MOSFET M2, β2 = µ2 C OX2 W2 / L2;m represents the subthreshold slope factor. The threshold voltage exhibits very good linearity within a certain temperature range. The threshold voltage V of the P-type MOSFET M1 is... th1 and the threshold voltage V of P-type MOSFET M2 th2 The voltage difference is:

[0038] V th1 - V th2 =b(T-T0)+a (3.2;

[0039] T represents the ambient temperature variable, T0 represents the Kelvin temperature corresponding to zero degrees Celsius, and a is the threshold voltage V of the P-type MOSFET M1 when T=T0. th1 and the threshold voltage of P-type MOSFET M2 V th2 The difference in threshold voltages, where b is the threshold voltage V of the P-type MOSFET M1. th1 and the threshold voltage V of P-type MOSFET M2 th2 The difference in temperature coefficients, combined with formulas (3.1) and (3.2) and subjected to a second-order Taylor expansion at temperature T1, yields:

[0040]

[0041]

[0042] Where K0, K1, and K2 are all temperature-independent coefficients, and only the temperature-dependent second-order term affects the linearity of the equation, where K0 = exp(q / mkT0), K1=-q / mkT0 2 K2=q / 2mkT0 2 q represents the amount of charge carried by a single electron. denoted as the subthreshold slope factor, and k represents the Boltzmann constant.

[0043] Based on the above principle of subthreshold current generation, we obtain the following... Figure 1 The linearity R of the temperature sensing module 10 shown is obtained through simulation based on a 65nm process. 2 With the first P-type MOSFET M P1 Second P-type MOSFET M P2 Threshold voltage difference ΔV th Relationship such as Figure 4 As shown, this allows selection of the first P-type MOSFET M. P1 and the second P-type MOSFET M P2 The optimal range of threshold voltage difference, such as Figure 4 As shown, ΔV th The optimal range is -80mV to -20mV. In the temperature sensor of this disclosure, the bias current in the temperature sensing module 10 is supplied by the first N-type MOSFET M. N1 The zero-bias leakage current is provided and then acts on the first P-type MOSFET M, which is connected in diode form. P1 Second P-type MOSFET M P2 This generates two subthreshold sensing currents (i.e., the first sensing current I1 and the second sensing current I2). Considering process compatibility under different manufacturing conditions, the temperature sensing module 10 does not use different types of MOSFETs; instead, it uses two P-type MOSFETs of different sizes to generate a threshold voltage difference ΔV. th (ΔV) th =V th1 -V th2 This is to satisfy the high linearity subthreshold sensing current ratio condition. Since the process dependence of the MOSFET's transconductance parameter and subthreshold slope factor on the overall sensing current ratio is almost negligible, this means that the process skew of the two sensing current ratios generated by the temperature sensing module is mainly due to the first P-type MOSFET M... P1 Threshold voltage V th1 and the second P-type MOSFET M P2 Threshold voltage V th2The threshold voltage difference determines the first P-type MOSFET M. P1 and the second P-type MOSFET M P2 The linearity of the generated two subthreshold sensing current ratios is mainly determined by the threshold voltage difference between the two P-type MOSFETs. To ensure that the threshold voltage difference remains within a high linearity range under different processes and to improve the process robustness of the temperature sensing module, it is necessary to reduce the process dependence of the threshold voltage difference. Combined with... Figure 5 The size-induced effect shown indicates that the difference V between the threshold voltage and the fast process angles... th，SS-FF This is a function of MOSFET size, decreasing as the unit channel width W of the MOSFET increases and increasing as the unit channel length increases. Furthermore, the process skew of the threshold voltage is determined only by the unit channel length and width of the MOSFET, and is not affected by the number of parallel MOSFETs N. Therefore, it can be adjusted by changing the first P-type MOSFET M. P1 and the second P-type MOSFET M P2 The unit channel width and length are used to control the first P-type MOSFET M P1 The threshold voltage and the second P-type MOSFET M P2 The difference in threshold voltage between slow and fast process angles (V) th2 -V th1 ) SS-FF The value of this value is used to control the process skew of the temperature sensing current ratio. Furthermore, given a specific width and length, this can be achieved by adjusting the value of the first P-type MOSFET M. P1 The number of parallel MOSFETs N1 and the second P-type MOSFET M P2 The temperature skew of the subthreshold current ratio is controlled by the ratio between the number of parallel connections N2.

[0044] The first temperature sensing current obtained in the temperature sensing module 10 Second sensing current The expression is as follows:

[0045] ;

[0046] ;

[0047]

[0048] Among them, V GS1 Indicates the first P-type MOSFET M P1 The gate-source voltage, V GS2 Indicates the second P-type MOSFET M P2The gate-source voltage. As the process node decreases, the supply voltage continuously decreases. Under low supply voltage, the linearity of the temperature sensing module is more significantly affected by the DIBL (Drain-Induced Barrier Lowering) effect. Therefore, the above formula needs to be modified to incorporate the influence of the DIBL effect.

[0049]

[0050]

[0051]

[0052] in, Indicates the first P-type MOSFET M P1 The gate-source voltage, V GS2 Indicates the second P-type MOSFET M P2 Gate-source voltage, Indicates the first P-type MOSFET M P1 The drain-source voltage, Indicates the second P-type MOSFET M P2 The drain-source voltage, m is the subthreshold slope factor, and the first P-type MOSFET M under the same process. P1 Second P-type MOSFET M P2 Since the subthreshold slope factors are the same, to reduce the impact of the DIBL effect on the current ratio linearity, a single-sensing-circuit structure is used in the temperature sensor to simultaneously generate two subthreshold sensing currents. In the sensing module, a first P-type MOSFET M with different threshold voltages is selected. P1 Second P-type MOSFET M P2 The first P-type MOSFET M P1 Second P-type MOSFET M P2 The drain terminals of the first P-type MOSFET M are connected to each other, making the drain terminals of the first P-type MOSFET M... P1 Drain-source voltage V DS1 and the second P-type MOSFET M P2 Drain-source voltage V DS2 By maintaining consistency, the effect of the DIBL effect on the ratio of the first sensing current I1 to the second sensing current I2 can be approximately ignored.

[0053] According to an embodiment of this disclosure, the biasing unit 11 includes a first N-type MOSFET M. N1 and the third P-type MOSFET M P3 The first N-type MOSFET M N1 The drain of the third P-type MOSFET is connected to the bias node A0, and the gate and source are shorted;P3 The drain is grounded, and the gate and source are shorted. The first N-type MOSFET M N1 and the third P-type MOSFET M P3 Gate interconnect, first N-type MOSFET M N1 and the third P-type MOSFET M P3 The source-end interconnect is achieved through the first N-type MOSFET M. N1 The zero-bias leakage current generated is the first P-type MOSFET M P1 and the second P-type MOSFET M P2 Provides bias current due to the first P-type MOSFET M P1 and the second P-type MOSFET M P2 Having different threshold voltages makes the first P-type MOSFET M P1 and the second P-type MOSFET M P2 A first temperature-sensing current I1 and a second temperature-sensing current I2 are generated, each with a temperature coefficient that is temperature-dependent. The ratio of the first temperature-sensing current I1 to the second temperature-sensing current I2 is linearly related to temperature. The first P-type MOSFET M... P1 and the second P-type MOSFET M P2 Factors affecting the threshold voltage include the first P-type MOSFET M P1 and the second P-type MOSFET M P2 The setting size is determined by adjusting the first P-type MOSFET M. P1 and / or the second P-type MOSFET M P2 Size adjustment threshold voltage difference.

[0054] To facilitate the stable mirroring and replication of the temperature-sensing current generated by the temperature-sensing module 10 to the current-frequency conversion module 20, the first P-type MOSFET M... P1 and the second P-type MOSFET M P2 A P-type MOSFET device is used to form a single temperature sensing unit based on subthreshold difference. This single temperature sensing unit's circuit design not only effectively reduces overall power consumption but also improves the current stability of the temperature sensing module. When changes in the operating frequency of the current-frequency conversion module cause voltage fluctuations at the temperature sensing node, the circuit structure of the temperature sensing unit can maintain the first P-type MOSFET M... P1 Second P-type MOSFET M P2 To ensure consistent gate-drain voltage changes, thereby reducing disturbances to the output current. Furthermore, to enhance the stability of the temperature sensing module circuit under voltage fluctuations, and to reduce feedback from the current-frequency conversion module causing issues with the first P-type MOSFET M... P1 and the second P-type MOSFET MP2 To mitigate the impact of gate voltage fluctuations, a first N-type MOSFET M is introduced into the temperature sensing unit circuit. N1 To ensure reliable operation under low supply voltage, the leakage current generation branch does not use a traditional diode-connected N-type MOSFET, but instead employs a zero-bias, low-threshold third P-type MOSFET M. P3 With low threshold first N-type MOSFET M N1 The combination generates a subthreshold leakage current to provide a stable leakage current output and further suppress errors caused by voltage fluctuations.

[0055] According to embodiments of this disclosure, in conjunction with Figure 1 and Figure 2 As shown, the current-frequency conversion module 20 includes two current-frequency conversion branches: a first current-frequency conversion branch and a second current-frequency conversion branch. Each current-frequency conversion branch converts the current signal into a frequency signal through a relaxation oscillator structure. The composition and connection relationship of the current-frequency conversion module 20 are as follows: Figure 2 As shown, the first current-frequency conversion branch includes a first leakage current compensation unit 21, a first capacitor C1, and a fourth P-type MOSFET M. P4 The third switch SW3, the first comparator 23, and the first delay chain 25. The second current-frequency conversion branch includes a second leakage current compensation unit 22, a second capacitor C2, and a fifth P-type MOSFET M. P5 The fourth switch SW4, the second comparator 24, and the second delay chain 26. Among them, the fourth P-type MOSFET M... P4 and the fifth P-type MOSFET M P5 Respectively with the first P-type MOSFET M P1 Second P-type MOSFET M P2 A current mirror structure is constructed to mirror the first temperature-sensing current I1 and the second temperature-sensing current I2 generated in the temperature-sensing module into the first current-frequency conversion branch and the second current-frequency conversion branch, respectively, to obtain the first mirrored temperature-sensing current and the second mirrored temperature-sensing current. The first leakage current compensation unit 21 and the second leakage current compensation unit 22 can generate the first compensation current and the second compensation current, respectively, to be used in response to the first clock signal f. CLK1 Second clock signal f CLK2 When the linearity of the frequency ratio between the two fluctuates abnormally, compensation is made for the first mirror temperature sensing current and / or the second mirror temperature sensing current to minimize the deviation between the first mirror temperature sensing current and the first sensing current I1, the second mirror temperature sensing current and the second sensing current I2. For example, dynamic adjustment of leakage current deviation caused by temperature changes can be achieved to correct the error caused by the drift of the switching voltage of the first comparator 23 and / or the second comparator 24, thereby effectively improving the linearity of the frequency ratio.

[0056] Specifically, in combination Figure 1 and Figure 2 As shown, the first leakage current compensation unit 21 is connected between the power supply terminal VDD and the first terminal of the first capacitor C1. The first leakage current compensation unit 21 includes a second N-type MOSFET M. N2 And the first switch SW1, the second N-type MOSFET M N2 With the gate and source terminals shorted and the drain terminal connected to the power supply VDD, the second N-type MOSFET M... N2 The source terminal of the first P-type MOSFET is connected to the source terminal of the first switching transistor SW1, the drain terminal of the first switching transistor SW1 is connected to the first terminal of the first capacitor C1, the second terminal of the first capacitor C1 is grounded to GND, and a first node A1 is provided between the drain terminal of the first switching transistor SW1 and the first terminal of the first capacitor C1. The fourth P-type MOSFET M P4 The source terminal is connected to the power supply terminal VDD, and the gate is connected to the first P-type MOSFET M. P1 The gate is connected to the first P-type MOSFET M. P1 A current mirror structure is formed to mirror the first temperature-sensing current I1 generated in the temperature-sensing module 10 into the first current-frequency conversion branch; the fourth P-type MOSFET M P4 The drain of the fourth P-type MOSFET M is connected to the first node A1. P4 The drain of the first comparator 23 is also connected to the drain of the third switch SW3, and the source of the third switch SW3 is grounded. The input of the first comparator 23 is connected to the first node A1. The first comparator 23 includes a first transistor M1 and a second transistor M2. The gates of the first transistor M1 and the second transistor M2 are interconnected and connected to the first node A1. The source of the first transistor M1 is connected to the power supply terminal VDD, and its drain is connected to the drain of the second transistor M2. The source of the second transistor M2 is grounded. One of the first transistor M1 and the second transistor M2 is a P-type MOSFET, and the other is an N-type MOSFET. The first comparator 23, composed of the first transistor M1 and the second transistor M2, can compare the first node voltage V input from the first node A1. SW1 The first delay chain 25 is connected to the output of the first comparator 23. The first delay chain 25 includes multiple inverters 251 connected in series to form a multi-stage delay chain. The output of the first delay chain 25 outputs a first voltage signal V. out1 The first voltage signal V out1 This is applied to the gate of the third switch SW3 to control its on / off state, thereby causing the first delay chain 25 to ultimately output the first clock signal f. CLK1 .

[0057] Combination Figure 1 and Figure 2 As shown, the second leakage current compensation unit 22 is connected between the power supply terminal VDD and the first terminal of the second capacitor C2. The second leakage current compensation unit 22 includes a third N-type MOSFET M. N3 Second switch SW2, third N-type MOSFET M N3 With the gate and source terminals shorted and the drain terminal connected to the power supply VDD, the third N-type MOSFET M... N3 The source terminal of the first P-type MOSFET is connected to the source terminal of the second switching transistor SW2. The drain terminal of the second switching transistor SW2 is connected to the first terminal of the second capacitor C2. The second terminal of the second capacitor C2 is grounded to GND. A second node A2 is provided between the drain terminal of the second switching transistor SW2 and the first terminal of the second capacitor C2. P5 The source terminal is connected to the power supply terminal VDD, and the gate is connected to the second P-type MOSFET M. P2 The gate is connected to the second P-type MOSFET M. P2 A current mirror structure is formed to mirror and copy the second temperature-sensing current I2 generated in the temperature-sensing module 10 into the second current-frequency conversion branch; the fifth P-type MOSFET M P5 The drain of the fifth P-type MOSFET M is connected to the second node A2. P5 The drain of the first transistor is also connected to the drain of the fourth switch SW4, and the source of the fourth switch SW4 is grounded. The input of the second comparator 24 is connected to the second node A2. The second comparator 24 includes a third transistor M3 and a fourth transistor M4. The gates of the third transistor M3 and the fourth transistor M4 are interconnected and connected to the second node A2. The source of the third transistor M3 is connected to the power supply terminal VDD, and its drain is connected to the drain of the fourth transistor M4. The source of the fourth transistor M4 is grounded. One of the third transistor M3 and the fourth transistor M4 is a P-type MOSFET, and the other is an N-type MOSFET. The second comparator 24, composed of the third transistor M3 and the fourth transistor M4, can compare the second node voltage VDD input from the second node A2. SW2 The second delay chain 26 is connected to the output of the second comparator 24. The second delay chain 26 includes multiple inverters 261 connected in series, forming a multi-stage delay chain. The output of the second delay chain 26 outputs the second voltage signal V. out2 The second voltage signal V out2 This is applied to the gate of the fourth switch SW4 to control its on / off state, thereby causing the second delay chain 26 to ultimately output the second clock signal f. CLK2 .

[0058] As can be seen from the above, the first current-frequency conversion branch obtains the first mirror temperature sensing current by mirroring the first temperature sensing current I1 through a current mirror structure, and converts the first mirror temperature sensing current into the first clock signal f through a relaxation oscillator structure. CLK1 The second current-frequency conversion branch mirrors the second temperature-sensing current I2 using a current mirror structure to obtain a second mirror temperature-sensing current, and then converts the second mirror temperature-sensing current into a second clock signal f using a relaxation oscillator structure. CLK2 .

[0059] The current-to-frequency conversion module 20 uses a relaxation oscillator structure to form two current-to-frequency conversion branches. The temperature-sensing current generated by the temperature-sensing module is mirrored into the current-to-frequency conversion module via a current mirror to charge the capacitor in the relaxation oscillator structure. Each current-to-frequency conversion branch uses a relaxation oscillator structure to charge and discharge only one capacitor, resulting in lower power consumption. The relaxation oscillator output frequency... The fundamental calculation formula is as follows:

[0060]

[0061] Among them, C L V is the capacitance value of the charging and discharging capacitor in the relaxation oscillator. SW t is the switching voltage of the comparator in the relaxation oscillator; TC The delay time of the relaxation oscillator is determined by the delay chain within the relaxation oscillator.

[0062] The operation of the relaxation oscillator consists of two cycles: a capacitor charging phase and a discharge / reset phase. Taking the first current-frequency conversion branch as an example, the charging phase is explained as follows: the temperature-related sensing current I1 generated by the temperature sensing module is mirrored to obtain the first mirror sensing current. The first mirror sensing current charges and discharges the first capacitor C1 in the first current-frequency conversion branch. When the first capacitor C1 is charged, the first node voltage V at the first node A1 is increased. SW1 The voltage gradually increases, and during this process, the output node of the first comparator 23 remains at a high level. When the voltage V at the first node A1... SW1 When the voltage rises to the flip threshold voltage of the first comparator 23, the output level of the first comparator 23 flips, and the first clock signal f output by the first delay chain 25... CLK1 When the voltage level changes to high, the third switch SW3, which acts as a capacitor reset switch, is turned on, and the first capacitor C1 transitions from the charging phase to the discharging phase. During the discharge reset phase, the first capacitor C1 is rapidly discharged through the third switch SW3 until the first node voltage V at the first node A1 is reached. SW1When the voltage drops to the threshold voltage at which the first comparator 23 flips again, the third switch SW3 turns off, and the first capacitor C1 re-enters the charging stage, thus achieving oscillation. To ensure that the first capacitor C1 can be fully discharged, the reset time of the first capacitor C1 should be designed to be less than the delay time of the first delay chain 25. Since the discharge time of the first capacitor C1 is much shorter than the charging time, the discharge process can be regarded as instantaneous. Therefore, the output frequency of the first current-frequency conversion branch is mainly determined by the charging time of the first capacitor C1 and is proportional to the first mirror temperature sensing current I1. The relaxation oscillator uses two transistors to form an inverter as a comparator, which has high bandwidth and high gain characteristics and can achieve rapid voltage flipping during oscillation. However, during the capacitor charging stage, due to the slow voltage change, the first transistor M1 (e.g., a P-type MOSFET) and the second transistor M2 (e.g., an N-type MOSFET) inside the first comparator are both in the conducting state, resulting in large power consumption during the comparison process. Therefore, to reduce the overall power consumption of the current-to-frequency conversion module, an inverter composed of an "inverting transistor" structure (i.e., the channel length L of the first transistor M1 and the second transistor M2 is greater than the channel width W) is used as the comparator. This structure can significantly reduce the dynamic power consumption during the switching process while ensuring comparison accuracy, thereby improving the overall energy efficiency of the current-to-frequency conversion module.

[0063] The two temperature-related sensing currents output by the temperature sensing module 10 are respectively input to two current-frequency conversion branches in the current-frequency conversion module. Each current-frequency conversion branch converts the corresponding sensing current into a clock signal output, thereby maintaining the temperature characteristics of the sensing current and realizing the frequency inheritance of the current-temperature characteristics. Specifically, the first clock signal f CLK1 Second clock signal f CLK2 The ratio is proportional to the ratio of the first sensing current I1 and the second sensing current I2, as follows:

[0064] (13);

[0065] ;

[0066] Where ∝ represents the proportionality sign, V SW1 V represents the first node voltage at the first node A1. SW2 This represents the second node voltage at node A2. During the operation of the current-frequency conversion branch based on the relaxation oscillator, the charging and discharging time of the capacitor is determined by the magnitude of the charging current. When the charging current is different, the threshold voltage (i.e., the switching voltage point) of the comparator during voltage switching may have slight differences. Because the first P-type MOSFET M... P1 and the second P-type MOSFET M P2The generated subthreshold temperature-sensing currents, namely the first temperature-sensing current I1 and the second temperature-sensing current I2, exhibit an exponential relationship with temperature. Under high-temperature conditions, the difference between the first temperature-sensing current I1 and the second temperature-sensing current I2 increases, leading to an increase in the difference between the first and second mirror temperature-sensing currents mirrored in the current-frequency conversion module. This causes a deviation of less than 5% in the comparator's switching voltage, thus affecting the linearity of the output frequency ratio. To improve the aforementioned nonlinear error, a leakage current compensation mechanism is introduced at different temperature points. By setting a first leakage current compensation unit 21 and a second leakage current compensation unit 22 at the first node A1 and the second node A2 respectively as compensation circuits, the deviation of the two temperature-sensing currents caused by temperature changes is dynamically adjusted to correct the error caused by the drift of the comparator's switching voltage, thereby effectively improving the linearity of the frequency ratio. The current-frequency conversion module can maintain a high linearity transfer between the input current and the output frequency; therefore, the accuracy of the CMOS temperature sensor based on the subthreshold current ratio mainly depends on the accuracy of the current ratio generated by the temperature-sensing module.

[0067] According to embodiments of this disclosure, to further reduce power consumption, the counting module 30 employs an asynchronous frequency divider counter composed of D flip-flops, which can effectively reduce dynamic power consumption compared to a synchronous counter. The first clock signal f generated by the current-frequency conversion module... CLK1 Second clock signal f CLK2 The output is sent to the counting module, which includes a free counter 31, a fixed counter 32, a first AND gate 33, a second AND gate 34, a first inverter 35, and a second inverter 36. During counting, the second clock signal f... CLK2 The first clock signal f is input to the fixed counter 32 through the second AND gate 34 for fixed counting. CLK1 The input is fed into the free counter 31 via the first AND gate 33 for free counting; the highest bit output of the fixed counter 32 is low, and one path is inverted to a high level by the first inverter 35, then compared with the first clock signal f. CLK1 The signal enters the free counter 31 through the first AND gate 33, and is then inverted to a high level by the second inverter 36 before being compared with the second clock signal f. CLK2 The counting module uses a second AND gate 34. When the output of the most significant bit of the free counter 31 is high, both the free counter 31 and the fixed counter 32 stop counting simultaneously. The output level signal of the free counter 31 at this time is read, and the corresponding temperature digital code is output. After the data reading is complete, a reset signal is used to clear the output signals of both counters, and the next counting cycle begins. Under logic control, the counting module counts two clock signals. When the fixed counter 32 reaches the preset value, the counting result of the other free counter 31 forms the temperature digital code.

[0068] The signal reading period of the fixed counter 32 is fixed at M, for example, M=2. 10 The signal reading period of the free counter 31 is N, and T1 is the first clock signal f. CLK1 The period, T2 is the second clock signal f CLK2 The period can be obtained from the counting method of the counter:

[0069] M×T2=N×T1 ;

[0070] ;

[0071] Where I1 is the first sensing current and I2 is the second sensing current, the resolution of the temperature sensor can be obtained. for:

[0072]

[0073] in, Indicates the temperature measurement range. Indicates the first clock signal f CLK1 Second clock signal f CLK2 The frequency ratio changes with the temperature measurement range. Indicating the conversion time, the temperature sensor outputs the following digital temperature code (DATA):

[0074]

[0075] In another aspect, this disclosure proposes a temperature detection method, such as... Figure 6 As shown, the temperature detection method includes operations S1-S5:

[0076] S1: Provides nanoampere-level bias current;

[0077] S2: Enable the first P-type MOSFET M P1 Second P-type MOSFET M P2 Under the action of the bias current, a first temperature sensing current and a second temperature sensing current, which are related to temperature and have different temperature coefficients, are generated by using the threshold voltage.

[0078] S3: The first and second temperature sensing currents are replicated using a current mirror structure to obtain a first mirror temperature sensing current and a second mirror temperature sensing current; the first mirror temperature sensing current and / or the second mirror temperature sensing current may be compensated.

[0079] S4: Convert the first mirror-sensing current and the second mirror-sensing current into a first clock signal and a second clock signal, respectively; and

[0080] S5: Count the first clock signal and the second clock signal and read the temperature data.

[0081] In another aspect of this disclosure, a design method for the above-mentioned temperature sensor is also provided, the design method comprising the following steps:

[0082] Step S10: Temperature Sensing Module Design. First, determine the first P-type MOSFET M in the temperature sensing module. P1 Second P-type MOSFET M P2 Geometric parameters, including the first P-type MOSFET M P1 The unit channel width W1 and channel length L1, the second P-type MOSFET M P2 Given the unit channel width W2 and channel length L2, the selected first P-type MOSFET M P1 Second P-type MOSFET M P2 The threshold voltage is within the range that meets the linearity requirements. Then, the first N-type MOSFET M in the bias unit is determined. N1 and the third P-type MOSFET M P3 The unit size was determined, and the bias current was set to the nA level to reduce the overall circuit power consumption to the nW level. After determining the bias current, the first P-type MOSFET M was determined based on the relationship between the two temperature-sensing currents. P1 Second P-type MOSFET M P2 The number of parallel connections. For example, the first P-type MOSFET M. P1 The unit channel width is 4µm, the unit channel length is 0.4µm, and the second P-type MOSFET M P2 The unit channel width is 0.5µm, the unit channel length is 4µm, and the number of parallel connections is 50. The first N-type MOSFET M N1 The unit channel length is 0.2 μm, the bit channel length is 8 μm, and it is the third P-type MOSFET M. P3 The unit channel width is 3µm, the unit channel length is 2µm, and the number of parallel channels is 20.

[0083] Step S20: Current-to-frequency conversion module design. The first sensing current I1 and the second sensing current I2 generated by the temperature sensing module are replicated using a current mirror structure to obtain two proportional subthreshold currents, namely the first mirror sensing current and the second mirror sensing current. Considering factors such as the power consumption, conversion time, and chip area of ​​the temperature sensor, the values ​​of the first capacitor C1 and the second capacitor C2 in the current-to-frequency conversion module, as well as the switching threshold voltages of the first comparator 23 and the second comparator 24, are determined. After determining the parameters of the first capacitor C1 and the second capacitor C2, the number of stages and the total delay time of the first delay chain 25 and the second delay chain 26 are designed based on the capacitor discharge time. To reduce the leakage current of the switching transistors, a third switching transistor SW3 and a fourth switching transistor SW4 with high threshold voltages and as small an aspect ratio as possible are used while ensuring the discharge speed.

[0084] Step S30: Counting Module Design. Based on the resolution design principles of the temperature sensor, the fixed timing time of the fixed counter 32 is determined without significantly increasing power consumption. To prevent reading overflow due to frequency fluctuations at high temperatures and different process angles, the output bit width of the free counter 31 is further designed to ensure the stability of the temperature digital code output and the integrity of the measurable temperature range.

[0085] The CMOS temperature sensor obtained by the above design method can achieve high linearity and good process robustness under low power conditions, and is suitable for on-chip temperature detection applications under ultra-low voltage.

[0086] Based on the principle of subthreshold temperature-sensing current ratio, this disclosure proposes an improved low-power CMOS temperature sensor, its design method, and its temperature detection method. By optimizing the structure of the temperature-sensing module, the linearity and process robustness of the sensing current are improved. The temperature-sensing module uses a single sensing unit to generate temperature-sensing currents with different temperature coefficients, thereby significantly reducing system power consumption while ensuring output accuracy. It also compensates for and corrects non-ideal factors in the temperature-sensing module to reduce errors caused by process deviations. Secondly, this invention simplifies the design of the current-to-frequency conversion module, using a simple relaxation oscillator structure to achieve efficient current-to-frequency conversion. To further reduce frequency output error, a leakage current compensation unit is introduced into the current-to-frequency conversion branch, thereby improving the linearity of the frequency ratio. Finally, a digital counting module is used to convert the subthreshold current ratio, which changes positively with temperature, into a temperature digital code output, realizing low-power digital reading of the temperature signal. The temperature sensor chip implemented in 65nm CMOS technology has a core circuit area of ​​approximately 0.065 mm², and consumes only 3.5 nW when operating at 25℃ and a supply voltage of 0.5 V. like Figure 7As shown, the average linearity of the two-channel temperature sensing current ratio is μ, μ=0.99946, and the variance is σ, σ=193.58×10 -6 ;like Figure 8 As shown, the temperature digital code output results are displayed under different process angles (TT represents the typical process angle, SS represents the slow process angle, and FF represents the fast process angle) in an environment of 0℃-100℃. The temperature measurement accuracy under different process angles is less than 0.1℃. Two-point calibration of the output temperature digital code at 25℃ and 80℃ was performed, resulting in a temperature measurement error of -1.3℃ to 0.9℃ under the TT process angle, -1.4℃ to 1.6℃ under the slow process angle, and -1.3℃ to 0.8℃ under the fast process angle. It can be seen that the temperature measurement error from 0℃ to 100℃ under different process angles is less than ±2℃. Figure 9 As shown, compared with existing CMOS temperature sensors, the temperature sensor of this application has significantly reduced power consumption. At the same time, it achieves a resolution of 0.1℃ in the temperature range of 0℃-100℃, and the error after two-point calibration is controlled within ±2℃, demonstrating small temperature measurement error and high energy efficiency.

[0087] The temperature sensor of this invention employs a single sensing unit architecture, achieving temperature sensing functionality based on subthreshold current ratio. While meeting ultra-low supply voltage operating requirements, it effectively reduces overall power consumption and circuit complexity. The threshold voltage difference is precisely controlled through the size-induced effect of the MOSFET devices in the sensing module, selecting a subthreshold operating point that meets linearity requirements. This ensures a good linear relationship between the sensing current and temperature, improving temperature conversion accuracy. The sensing module circuit consists of only a small number of MOSFETs, generating sensing currents with different temperature coefficients through different sizes and bias conditions. This results in a simple structure, strong controllability, and reduces the impact of process variations on linearity and accuracy. It significantly reduces power consumption while maintaining high accuracy, enabling stable operation under ultra-low supply voltage conditions, making it suitable for low-power, on-chip integrated temperature sensing systems.

[0088] This invention provides a CMOS temperature sensor and temperature detection method based on subthreshold current ratio. The temperature sensor comprises only a single sensing unit. By utilizing the transistor size-induced effect in the sensing unit to select the threshold voltage, and using the threshold voltage difference in the subthreshold current expression to construct a current ratio that meets linearity requirements, the sensor effectively reduces errors in the sensing module caused by process variations. A simplified MOSFET combination is employed to generate sensing currents with different temperature coefficients, achieving low power consumption while maintaining high accuracy. This significantly reduces the structural complexity of the temperature sensor at the system level, decreasing power consumption and chip area, thereby reducing overall manufacturing costs and increasing integration. The temperature sensor and temperature detection method proposed in this disclosure achieve an optimized balance between low power consumption, small area, high accuracy, and process robustness, making it suitable for on-chip temperature monitoring and thermal management applications in highly integrated AI processor chips.

[0089] The embodiments of this disclosure have been described in detail above with reference to the accompanying drawings. It should be noted that implementations not illustrated or described in the drawings or the main text of the specification are forms known to those skilled in the art and are not described in detail. Furthermore, the definitions of the various elements and methods described above are not limited to the specific structures, shapes, or methods mentioned in the embodiments, and those skilled in the art can easily modify or substitute them.

[0090] The specific embodiments described above further illustrate the purpose, technical solutions, and beneficial effects of this disclosure. It should be understood that the above descriptions are merely specific embodiments of this disclosure and are not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A temperature sensor, characterized by, The temperature sensor comprises a temperature sensing module, a current-to-frequency conversion module, and a counting module. The temperature sensing module comprises: a first P-type MOSFET, the source of which is connected to a power supply voltage, and the gate and the drain of which are shorted; a second P-type MOSFET, the source of which is connected to the power supply voltage, and the gate and the drain of which are shorted, the drain of the second P-type MOSFET and the drain of the first P-type MOSFET are interconnected, and a bias node is arranged at the interconnection; a bias unit connected between the bias node and the ground, the bias unit being configured to provide a bias current, so that the first P-type MOSFET and the second P-type MOSFET generate first and second temperature sensing currents respectively under the action of the bias current, the first and second temperature sensing currents being related to temperature and having different temperature coefficients; the current-to-frequency conversion module is configured to convert the first and second temperature sensing currents into first and second clock signals respectively after mirroring and copying the first and second temperature sensing currents; the counting module is configured to count the first and second clock signals and read temperature data.

2. The temperature sensor of claim 1, wherein, The bias current is in the order of nanoamperes.

3. The temperature sensor of claim 1, wherein, The zero-bias drain current of the metal-oxide-semiconductor field-effect transistor provides the bias current for the first and second P-type MOSFETs.

4. The temperature sensor of claim 1, wherein, The bias unit comprises: a first N-type MOSFET, the drain of which is connected to the bias node, and the gate and the source of which are shorted; and a third P-type MOSFET, the drain of which is connected to the ground, and the gate and the source of which are shorted, the gate of the first N-type MOSFET and the gate of the third P-type MOSFET are interconnected, and the source of the first N-type MOSFET and the source of the third P-type MOSFET are interconnected.

5. The temperature sensor of claim 3, the zero-bias drain current of the first N-type MOSFET provides the bias current for the first and second P-type MOSFETs, the first and second P-type MOSFETs have different threshold voltages, so that the first and second P-type MOSFETs generate first and second temperature sensing currents respectively, the first and second temperature sensing currents are related to temperature and have different temperature coefficients, and the ratio between the first and second temperature sensing currents is linearly related to temperature.

6. The temperature sensor of claim 1, wherein, The factors affecting the threshold voltage between the first and second P-type MOSFETs include the sizes of the first and second P-type MOSFETs, and the threshold voltage difference between the two MOSFETs can be adjusted by adjusting the size of the first and / or second P-type MOSFET.

7. The temperature sensor of claim 1, wherein, The current frequency conversion module comprises a first current frequency conversion branch and a second current frequency conversion branch, the first current frequency conversion branch replicates the first temperature sensing current through a current mirror structure to obtain a first mirror temperature sensing current, and converts the first mirror temperature sensing current into a first clock signal through a relaxation oscillator structure, and the second current frequency conversion branch replicates the second temperature sensing current through a current mirror structure to obtain a second mirror temperature sensing current, and converts the second mirror temperature sensing current into a second clock signal through a relaxation oscillator structure.

8. The temperature sensor of claim 7, wherein, The first current frequency conversion branch further comprises a first leakage current compensation unit, and the second current frequency conversion branch further comprises a second leakage current compensation unit, and the first leakage current compensation unit and / or the second leakage current compensation unit can compensate the first mirror temperature sensing current and / or the second mirror temperature sensing current when the linearity of the frequency ratio between the first clock signal and the second clock signal abnormally fluctuates.

9. A temperature detection method characterized by, Comprise: Provide nano-ampere level bias current; Make the first P-type MOSFET and the second P-type MOSFET generate first temperature sensing current and second temperature sensing current respectively related to temperature and different in temperature coefficient under the action of the bias current by using threshold voltage; Replicate the first temperature sensing current and the second temperature sensing current through a current mirror structure to obtain a first mirror temperature sensing current and a second mirror temperature sensing current; Convert the first mirror temperature sensing current and the second mirror temperature sensing current into a first clock signal and a second clock signal respectively; And Count the first clock signal and the second clock signal and read temperature data.

10. The temperature detection method of claim 1, further comprising compensating the first mirror temperature sensing current and / or the second mirror temperature sensing current.

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