Large-scale sequence sparse attention calculation method based on bidirectional LSH hash

By employing a sparse attention computation method based on bidirectional LSH hashing, the computational complexity and memory consumption issues of the Transformer architecture in long sequence data processing are resolved, achieving efficient parallel computing and low memory usage, and significantly improving the ability to process large-scale sequence data.

CN121597869APending Publication Date: 2026-03-03GUIZHOU QIANZHI INFORMATION
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202411910175.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-24
Publication Date
2026-03-03

AI Technical Summary

Technical Problem

The existing Transformer architecture has high computational complexity and large memory consumption when processing long sequence data, making it difficult to support large-scale sequence processing. Furthermore, existing sparse attention methods have shortcomings in adaptability and utilization of parallel computing resources.

Method used

We employ a large-scale sequence sparse attention computation method based on bidirectional LSH hashing. We generate random orthogonal basis vectors through Gram-Schmidt orthogonalization, dynamically adjust the bucket size and set an overlapping bucketing mechanism, and combine compressed sparse row format storage and multi-GPU parallel architecture to achieve efficient parallel computation and low memory consumption.

Benefits of technology

It significantly reduced computational complexity, improved computational efficiency by 7.5 times, reduced memory consumption by 85%, achieved a parallel speedup of 7.8 times, and successfully processed sequence data with a length of up to 1 million.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure HDA0005205446100000011
    Figure HDA0005205446100000011
  • Figure HDA0005205446100000021
    Figure HDA0005205446100000021
  • Figure HDA0005205446100000031
    Figure HDA0005205446100000031
Patent Text Reader

Abstract

The invention provides a large-scale sequence sparse attention calculation method based on bidirectional LSH hash, aiming at solving the technical problems of high calculation complexity and large memory occupation when an existing Transform architecture processes long sequence data. According to the method, a technical scheme of combining a bidirectional LSH hash function family and an adaptive bucket partitioning strategy is adopted, a random orthogonal basis vector is generated through a Gram-Schmidt orthogonalization method, and efficient sparse attention calculation is realized in combination with dynamic bucket size adjustment and an overlapping bucket partitioning mechanism; and meanwhile, block matrix operation and a multi-GPU pipeline parallel architecture are introduced, so that the calculation efficiency and the resource utilization rate are optimized. Experimental results show that compared with a traditional Transform architecture, the method has the advantages that the calculation efficiency is improved by 7.5 times, the memory occupation is reduced by 85%, the supported sequence length is expanded to 1 million, the calculation accuracy is kept, meanwhile, the 8-card near-linear speed-up ratio 7.8 is achieved, and an efficient solution is provided for large-scale sequence data processing.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of computer technology, specifically a large-scale sequence sparse attention computation method based on bidirectional LSH hashing. Background Technology

[0002] In recent years, with the rapid development of deep learning technology, the Transformer architecture has achieved remarkable results in fields such as natural language processing and computer vision due to its powerful sequence modeling capabilities. However, the standard Transformer model faces serious challenges in terms of computational complexity and memory consumption when processing long sequence data. The self-attention mechanism of the traditional Transformer requires calculating the correlation between all token pairs, resulting in a quadratic increase in computational complexity with the sequence length, which severely limits its application in long sequence scenarios.

[0003] To address this issue, researchers have proposed various optimization schemes. Early research mainly focused on local attention mechanisms such as sliding window attention, reducing computational complexity by limiting the computational scope of attention. For example, the Sparse Transformer proposed in 2019 uses a fixed-pattern sparse attention, reducing computational complexity from O(n²) to O(n√n). In 2020, Longformer achieved linear complexity while maintaining model expressiveness by combining local window attention and global attention. However, these methods often employ predefined sparse patterns and lack adaptability to data features, resulting in poor performance when handling dynamically changing sequential data.

[0004] Another optimization approach is based on approximation-based methods. The Performer, proposed in 2021, uses random features to approximate the kernel function to accelerate attention computation, but there is a trade-off between its approximation accuracy and computational efficiency. The LinearTransformer linearizes attention computation through kernel tricks, but still faces challenges in numerical stability for long sequences. While these methods theoretically achieve linear complexity, in practical applications they often require significant approximation errors to improve computational efficiency, making it difficult to achieve a good balance between accuracy and efficiency.

[0005] Recently, methods based on Locality Sensitive Hashing (LSH) have gained attention. LSH provides a data-driven partitioning basis for sparse attention by mapping similar data into the same bucket. Research in 2022 showed that LSH can effectively identify related elements in a sequence, providing a more accurate sparsity scheme for attention computation. However, most existing LSH attention methods use one-way hash functions, which are not ideal when dealing with bidirectional dependencies in sequence data. Furthermore, fixed bucketing strategies are difficult to adapt to the data distribution characteristics under different scenarios, affecting the generalization ability of the methods.

[0006] Furthermore, at the engineering implementation level, existing methods generally lack efficient utilization of parallel computing resources. With the development of hardware such as GPUs, how to fully leverage the advantages of multi-GPU parallel architectures and achieve optimal scheduling of computing resources has become a key factor in improving overall system performance. Especially in distributed environments, how to balance computational load, optimize communication overhead, and achieve near-linear speedup remains an unresolved technical challenge.

[0007] Another significant issue with existing technologies is memory usage efficiency. While sparse computation can reduce computational complexity, inappropriate sparse matrix storage formats and computational strategies can lead to significant memory fragmentation and bandwidth waste. This is especially true when processing extremely long sequences, where memory management efficiency directly impacts the system's scalability and usability.

[0008] Therefore, there is an urgent need to develop a new technical solution that can effectively address the aforementioned problems. This solution should be able to adaptively capture the bidirectional dependencies of sequence data, achieve an optimized balance between computational complexity and accuracy, fully utilize the parallel computing capabilities provided by modern hardware architectures, and maintain low memory overhead, thus providing a comprehensive solution for large-scale sequence data processing. Summary of the Invention

[0009] In view of the technical problems of high computational complexity, large memory consumption, and difficulty in supporting large-scale sequence processing when the existing Transformer architecture processes long sequence data, this invention is proposed.

[0010] Therefore, the technical problem solved by this invention is: how to significantly reduce the computational complexity and memory consumption of large-scale sequence processing while ensuring computational accuracy, and at the same time achieve efficient parallel computing.

[0011] To address the aforementioned technical problems, the present invention provides a large-scale sequence sparse attention calculation method based on bidirectional LSH hashing, comprising: a large-scale sequence sparse attention calculation method based on bidirectional LSH hashing, characterized in that it includes: receiving an input time-series data sequence; generating a family of LSH hash functions and performing bucketing calculation; performing sparse attention calculation; and outputting the processing result.

[0012] As a preferred embodiment of the large-scale sequence sparse attention computation method based on bidirectional LSH hashing described in this invention, the family of LSH hash functions for generating LSH hash functions includes:

[0013] Random orthogonal basis vectors are generated using the Gram-Schmidt orthogonalization method:

[0014] V={v1,v2,...,vk},vi·vj=0(i≠j)

[0015] Here, V represents the set of orthogonal basis vectors consisting of k vectors, where vi represents the i-th basis vector (i∈[1,k]), and k represents the dimension of the vector space; vi·vj=0 (i≠j) means that the dot product between any two different basis vectors vi and vj is zero, that is, these vectors are mutually orthogonal. These basis vectors are random orthogonal bases generated by the Gram-Schmidt orthogonalization method, which are used to construct a bidirectional LSH hash function family. Each basis vector has good orthogonal properties, which ensures the uniformity and independence of the hash function family and provides a mathematical basis for subsequent sparse attention calculation. After normalization, this set of orthogonal basis vectors will be used to calculate the hash value of the input sequence data, thereby realizing efficient similarity measurement and bucketing operation, thus significantly reducing the computational complexity of the attention mechanism.

[0016] The generated basis vectors are normalized:

[0017] ui=vi / ||vi||

[0018] The formula describes the normalization process of random orthogonal basis vectors, where u represents the normalized target vector, vi represents the original i-th basis vector, and |vi| represents the Euclidean norm (modulus) of the vector. By dividing the original vector by its modulus, the vector is normalized, ensuring that the length of the normalized vector ui is always 1. This step is crucial for ensuring the uniformity and orthogonality of the subsequent LSH hash function family. It not only eliminates the scale difference of the vectors but also provides a mathematical basis for the subsequent bucketing calculation and sparse attention mechanism, reflecting the innovative technical solution of this invention in the vector processing and data preprocessing stages.

[0019] As a preferred embodiment of the large-scale sequence sparse attention computation method based on bidirectional LSH hashing described in this invention, wherein: the bucketing computation includes:

[0020] Dynamically adjust bucket size based on data distribution characteristics:

[0021] B=min(max(α·log(N),Bmin),Bmax)

[0022] Where B represents the final determined dynamic bucket size, a positive integer value used to control the granularity of LSH hash bucketing; N represents the total length of the input data sequence, reflecting the scale of the data to be processed; α is an adjustable positive coefficient parameter used to control the proportion of bucket size growth with the amount of data, typically ranging from [0.1, 1.0]; Bmin represents the minimum allowed bucket size, a preset positive integer threshold used to ensure that the bucketing granularity is not too fine, thus reducing computational efficiency; Bmax represents the maximum allowed bucket size, also a preset positive integer threshold used to prevent the amount of data in a single bucket from being too large, thus affecting the efficiency of parallel computing; log(N) represents the logarithmic function with the natural logarithm e as the base, used to realize that the bucket size grows logarithmically with the amount of data. This growth method can maintain computational efficiency when the data scale expands; min and max represent the operations of taking the minimum and maximum values, respectively. This dual constraint mechanism ensures that the final bucket size always remains within a reasonable range, which can adapt to changes in data scale while ensuring computational performance.

[0023] Configure overlapping bucketing mechanism:

[0024] O=β·B

[0025] In this system, O represents the overlap between adjacent buckets, a key parameter used to control the degree of data sharing between different buckets, thereby improving the robustness and accuracy of the hash mapping; B represents the currently set bucket size, a value adaptively determined by the dynamic bucketing algorithm based on data distribution characteristics, reflecting the system's adaptability to the features of the input sequence; β is an important adjustment parameter called the overlap rate parameter, which typically ranges from 0 to 1 and is used to finely adjust the size of the overlapping region. A larger β value increases information sharing between buckets, which is beneficial for capturing long-range dependencies in the sequence, while a smaller β value can reduce redundant calculations and improve processing efficiency. By flexibly adjusting these parameters, the overlapping bucketing mechanism of this invention can achieve a good balance between ensuring computational accuracy and efficiency, providing strong support for sparse attention computation of large-scale sequence data.

[0026] As a preferred embodiment of the large-scale sequence sparse attention calculation method based on bidirectional LSH hashing described in this invention, the sparse attention calculation includes:

[0027] Determine the optimal block size for block matrix operations:

[0028] S = sqrt(M·N / P)

[0029] Where S represents the block size, i.e. the side length of each submatrix; M and N represent the number of rows and columns of the matrix to be processed, respectively, reflecting the scale of the original data; P represents the number of available processor cores, representing the parallel computing capability of the system. This formula calculates the theoretically optimal block size by balancing the matrix size and the number of processors, so as to achieve a balanced distribution of computing load. Specifically, the product M·N in the formula represents the total number of elements of the matrix, which is divided by the number of processors P and then the square root is taken. The resulting S value takes into account both the data scale and the degree of parallelism, which helps to achieve efficient parallel matrix operations in large-scale sequential sparse attention computing.

[0030] Achieving inter-block parallel computing:

[0031] Y[i,j]=∑(A[i,k]·B[k,j]),k∈[1,K]

[0032] Where A[i,k] represents the element of matrix A in the i-th row and k-th column, B[k,j] represents the element of matrix B in the k-th row and j-th column, k is the index variable of the accumulation term with a value range of [1,K], K represents the number of blocks, the symbol "∑" represents the accumulation and summation operation of k from 1 to K, and the symbol "·" represents the scalar multiplication operation. This formula realizes matrix multiplication calculation based on the block strategy. By decomposing large-scale matrix operations into multiple smaller-scale sub-block operations, each sub-block can be calculated independently and in parallel, thereby improving the computational efficiency. In the actual implementation, the value ranges of i and j are determined by the number of rows and columns of the result matrix Y, respectively. The entire calculation process can be executed in parallel on multiple processor cores, making full use of the parallel processing capabilities of modern computing hardware.

[0033] As a preferred embodiment of the large-scale sequence sparse attention computation method based on bidirectional LSH hashing described in this invention, it is characterized by further including a GPU acceleration strategy:

[0034] The sparse matrix is ​​stored using Compressed Sparse Row (CSR) format;

[0035] Implement CUDA kernel functions:

[0036] __global__void sparse_attention(float*input,float*output,int*indices)

[0037] Here, `input` is of type `float*`, representing the input data array containing the sequence information for which sparse attention computation is needed. `output` is also of type `float*`, used to store the calculated sparse attention result. `indices` is of type `int*`, storing the index information of the sparse matrix. This is consistent with the strategy of using Compressed Sparse Rows (CSR) format to store the sparse matrix. The function uses the `__global__` modifier, indicating that this is a kernel function that can be called from the CPU and executed on the GPU. In actual execution, the function will utilize the massive parallel processing capability of the GPU to perform sparse attention computation on the input data `input`, and efficiently generate the output result `output` according to the sparse pattern provided by `indices`. This method significantly reduces computational complexity, enabling the system to process sequence data of length up to 10^6 x 10^6 while maintaining high computational accuracy.

[0038] As a preferred embodiment of the large-scale sequence sparse attention computation method based on bidirectional LSH hashing described in this invention, it is characterized by further including a multi-GPU parallel architecture:

[0039] Implementing a data sharding mechanism:

[0040] shard_size=total_data_size / num_gpus

[0041] Here, shard_size represents the size of the data shard allocated to each GPU device, total_data_size represents the total amount of data to be processed, and num_gpus represents the number of GPU devices participating in parallel computing. Specifically, when the system receives input data of size total_data_size, it divides it evenly into num_gpus parts, each of size shard_size, to achieve parallel data processing. This data sharding mechanism ensures a balanced distribution of the computing load among multiple GPU devices, effectively improving the system's parallel processing capability. In practical applications, the value of shard_size directly affects the granularity and efficiency of parallel computing. A larger shard_size can reduce communication overhead between devices but may lead to unbalanced load, while a smaller shard_size can provide finer-grained load balancing but may increase communication overhead. Therefore, it is necessary to determine the optimal shard_size value based on the specific hardware configuration and data characteristics to achieve a balance between computing efficiency and resource utilization.

[0042] Gradient synchronization method is used:

[0043] grad_global=reduce_sum(grad_local) / num_gpus

[0044] Wherein, grad_global represents the final global gradient vector in a distributed multi-GPU parallel computing environment, representing the cumulative gradient result across all GPU computing units, and its dimension matches the model parameter space. grad_local represents the gradient vector independently generated by each independent GPU computing unit during local computation, reflecting the local estimation of the model parameter gradient by each GPU in data-parallel training. num_gpus represents the total number of GPUs in the parallel computing system, used to implement the gradient standardization and reduction operation, ensuring the unbiasedness and consistency of the final gradient estimate. Through this gradient synchronization mechanism, this invention effectively solves the key technical challenges of gradient aggregation and consistency propagation in distributed deep learning, and achieves efficient and accurate multi-GPU collaborative learning.

[0045] As a preferred embodiment of the large-scale sequence sparse attention computation method based on bidirectional LSH hashing described in this invention, the method is characterized by further including pipelined parallel optimization.

[0046] The computation process is divided into multiple stages, and each stage is executed in parallel.

[0047] Optimize communication overhead:

[0048] comm_time=data_size / bandwidth+latency

[0049] Here, comm_time represents the total time overhead of data communication, a key indicator for measuring data transmission efficiency in parallel computing systems, measured in seconds; data_size represents the total size of the data to be transmitted, usually in bytes, reflecting the amount of data that needs to be transmitted between different computing units; bandwidth represents the data transmission bandwidth of the communication channel, measured in bytes per second (Byte / s), reflecting the maximum throughput capacity of data transmission and is a fundamental parameter determining the data transmission rate; latency represents the basic delay time of the communication link, measured in seconds, representing the inherent time overhead before establishing a communication connection and starting data transmission, including the time required for basic communication preparation work such as network protocol establishment and packet routing. This formula accurately characterizes the time complexity of data communication in distributed parallel computing systems by adding the bandwidth limitation term (data_size / bandwidth) to the inherent latency term (latency), providing a theoretical basis for optimizing multi-GPU pipelined parallel architectures.

[0050] As a preferred embodiment of the large-scale sequence sparse attention computation method based on bidirectional LSH hashing described in this invention, the method is characterized by comprising: an LSH sparse attention computation module for performing sparse attention operations; a bidirectional hash function family generation module for generating LSH hash functions; a dynamic bucketing management module for implementing adaptive bucketing; and a parallel computing scheduling module for optimizing the allocation of computing resources.

[0051] A computer device includes: a memory and a processor; the memory stores a computer program, characterized in that: when the processor executes the computer program, it implements the steps of the large-scale sequence sparse attention calculation method based on bidirectional LSH hashing as described in any one of the present invention.

[0052] A computer-readable storage medium storing a computer program thereon, characterized in that: when the computer program is executed by a processor, it implements the steps of the large-scale sequential sparse attention calculation method based on bidirectional LSH hashing as described in any one of the present invention.

[0053] The beneficial effects of this invention are as follows: In terms of computational efficiency, it achieves a 7.5x improvement compared to the traditional Transformer architecture, thanks to the sparse attention mechanism and parallel computing optimization; in terms of memory usage, it reduces memory consumption by 85% through efficient sparse matrix storage and processing strategies; in terms of scalability, it successfully extends the processable sequence length to 1 million, breaking through the limitations of traditional architectures; and in terms of parallel acceleration, it achieves a near-linear speedup of 7.8 on 8 GPUs, demonstrating excellent parallel computing performance.

[0054] This invention not only solves key technical challenges in large-scale sequence processing but also provides new ideas and methods for the development of related fields. The technical solution has broad applicability and can play an important role in multiple fields such as natural language processing, time-series data analysis, and computer vision, possessing significant theoretical value and practical application significance. Through the implementation of this invention, the processing efficiency of large-scale sequence data can be significantly improved, computational resource consumption reduced, and a positive contribution made to the advancement of related technologies. Attached Figure Description

[0055] This invention provides several embodiments of a large-scale sequence sparse attention computation method based on bidirectional LSH hashing, illustrated in the accompanying figures.

[0056] Figure 1 This is a schematic diagram of the overall system architecture of the present invention, which shows the logical relationship and data flow between the LSH sparse attention calculation module, the bidirectional hash function family generation module, the dynamic bucket management module and the parallel computing scheduling module, and intuitively demonstrates the collaborative working mechanism of each functional module of the system.

[0057] Figure 2 This is a schematic diagram of the bidirectional LSH hash calculation method of the present invention, which describes the complete processing flow from the input sequence data, through generating a family of hash functions, performing bucket calculation, performing sparse attention operation, and finally outputting the processing result.

[0058] Figure 3 This is a schematic diagram of the adaptive bucketing strategy implementation of the present invention, which shows the specific implementation of the dynamic bucket size adjustment mechanism and the overlapping bucketing mechanism based on data distribution characteristics, including key parameters for bucket size calculation and overlapping area setting.

[0059] Figure 4 This is a schematic diagram of the block matrix computation structure of the present invention, which describes the block strategy, data partitioning method and inter-block parallel computing mechanism of large-scale sparse matrices in a multi-GPU environment.

[0060] Figure 5 This is a schematic diagram of the multi-GPU pipelined parallel architecture of the present invention, which shows the implementation architecture of the data sharding mechanism, gradient synchronization method and communication optimization strategy, as well as the collaborative working mode between computing nodes.

[0061] Figure 6 This is a schematic diagram of the performance test results of the present invention, which shows the test data of key performance indicators such as improved computational efficiency, reduced memory usage, and GPU acceleration ratio under different sequence lengths. Detailed Implementation

[0062] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0063] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.

[0064] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that is mutually exclusive with other embodiments.

[0065] Example 1 is an embodiment of the present invention, providing a large-scale sequence sparse attention computation method based on bidirectional LSH hashing, including:

[0066] S1: System Initialization and Data Preprocessing

[0067] S1.1: As Figure 1 As shown, the system first initializes the LSH sparse attention calculation module, the bidirectional hash function family generation module, the dynamic bucketing management module, and the parallel computing scheduling module. Data communication channels are established between the modules to ensure smooth data flow.

[0068] S1.2: The system receives large-scale input sequence data and performs data standardization processing. Specifically, this includes converting the input sequence into a standard vector form and performing dimension alignment to ensure that all sequences have the same feature dimensions.

[0069] S1.3: Based on the scale and distribution characteristics of the input data, the system initializes key system parameters, including the number of hash functions, initial bucket size, overlap rate, and other configuration parameters. These parameters will be used in subsequent calculations.

[0070] S2: Generation of bidirectional LSH hash function family

[0071] S2.1: As Figure 2 As shown, the system generates random orthogonal basis vectors using the Gram-Schmidt orthogonalization method. First, an initial set of vectors is randomly generated, and then a group of mutually orthogonal unit vectors is obtained through iterative calculation. These vectors will serve as the basis for the family of hash functions.

[0072] S2.2: The system normalizes the generated orthogonal basis vectors to ensure that the magnitude of all basis vectors is 1. This step is crucial for maintaining the uniformity and stability of the hash function.

[0073] S2.3: The system constructs a bidirectional hash function family. For each orthogonal basis vector, forward and reverse hash functions are constructed respectively, forming a paired hash function family. This bidirectional design can improve the detection accuracy of similar sequences.

[0074] S3: Implementation of Adaptive Bucketing Strategy

[0075] S3.1: As Figure 3 As shown, the system implements a dynamic bucket size adjustment mechanism. First, it analyzes the distribution characteristics of the input data, including statistical indicators such as data density and local similarity, and then dynamically calculates the optimal bucket size based on these characteristics.

[0076] S3.2: The system sets upper and lower limits for bucket size to prevent excessively large bucket sizes from increasing computational complexity, or excessively small bucket sizes from causing similar sequences to be incorrectly separated. Specifically, the lower limit for bucket size is set to the square root of the sequence dimension, and the upper limit is set to the logarithm of the sequence dimension.

[0077] S3.3: The system implements an overlapping bucketing mechanism. An overlapping region is set between adjacent buckets, and the overlap rate is dynamically adjusted according to the data distribution. This mechanism can effectively handle boundary effects in the sequence and improve the accuracy of hash mapping.

[0078] S4: Sparse Attention Matrix Calculation

[0079] S4.1: As Figure 4 As shown, the system employs a block matrix computation strategy. The large-scale sparse attention matrix is ​​divided into multiple computation blocks, the size of which is dynamically determined based on the GPU memory capacity and computational efficiency.

[0080] S4.2: The system performs sparse attention computation on each computation block. First, it calculates the similarity between the query vector and the key vector, and then filters out significant attention weights through a threshold to form a sparse attention pattern.

[0081] S4.3: The system uses Compressed Sparse Row (CSR) format to store sparse matrices. It efficiently represents sparse attention patterns through three arrays: row pointers, column indices, and non-zero element values, which significantly reduces memory usage.

[0082] S5: Multi-GPU Parallel Computing Optimization

[0083] S5.1: As Figure 5As shown, the system implements a multi-GPU pipelined parallel architecture. First, the computational task is divided into multiple stages, including data preprocessing, hash calculation, attention calculation, etc., and then these stages are allocated to different GPUs.

[0084] S5.2: The system implements a data sharding mechanism. Based on the number and performance characteristics of GPUs, the input sequence data is evenly distributed across the GPUs to ensure load balancing. Simultaneously, an efficient cross-GPU data transfer mechanism is implemented to minimize communication overhead.

[0085] S5.3: The system implements a gradient synchronization method. During backpropagation, each GPU independently calculates its local gradient, and then synchronizes the gradients through an efficient communication mechanism to ensure consistent updates of model parameters.

[0086] S6: Optimized Implementation of CUDA Kernel Functions

[0087] S6.1: The system is designed with dedicated CUDA kernel functions to accelerate sparse matrix operations on the GPU. The kernel functions are optimized for sparse data structures, making full use of the GPU's parallel computing capabilities.

[0088] S6.2: The system implements thread block scheduling optimization. Based on the distribution of non-zero elements in the sparse matrix, the size and organization of thread blocks are dynamically adjusted to maximize GPU resource utilization.

[0089] S6.3: The system implements shared memory optimization. Shared memory is used appropriately in CUDA kernel functions to cache frequently accessed data, reducing the number of global memory accesses and improving computational efficiency.

[0090] S7: Merging and Outputting Calculation Results

[0091] S7.1: The system collects partial results from the calculations of each GPU and combines them into a complete output using an efficient merging algorithm. The merging process takes into account the handling of overlapping regions to ensure the continuity and accuracy of the results.

[0092] S7.2: The system performs the final data format conversion and normalization process, converts the calculation results into the required output format, and performs necessary numerical verification to ensure the correctness of the output results.

[0093] S7.3: For example Figure 6 As shown, the system records various performance metrics during the computation process, including computation time, memory usage, and GPU utilization. This data can be used for subsequent performance optimization and system tuning.

[0094] Example 2 is an embodiment of the present invention, providing a large-scale sequence sparse attention computation method based on bidirectional LSH hashing, including:

[0095] 1. Experimental Environment

[0096] This embodiment uses a distributed cluster configuration for experimental verification. The hardware environment includes four computing nodes, each configured with two NVIDIA Tesla V100 GPUs (32GB VRAM), an Intel Xeon 8360Y CPU, and 128GB of RAM. The nodes are interconnected via a 100Gbps InfiniBand network. The software environment is an Ubuntu 20.04 operating system, CUDA 11.4, a distributed version of PyTorch 1.9.0, and the NCCL 2.10.3 communication library. The test data uses real-time sensor data streams from an industrial production line, including multi-dimensional indicators such as temperature, pressure, and flow rate. The data dimension is 256, the sequence length is 500,000, and the batch size is set to 16.

[0097] Explanation of Comparison Option 1

[0098] A distributed implementation of the traditional Transformer architecture is adopted, using standard data parallelism strategies and distributed training via PyTorch DistributedDataParallel. Attention computation uses the original scaled dot product mechanism without sparsity optimization.

[0099] Comparison of Scheme 2

[0100] A distributed implementation using the Reformer architecture employs the basic LSH attention mechanism, combined with a fixed bucketing strategy. It utilizes a hybrid distributed approach of model parallelism and data parallelism, but pipeline parallelism optimization is not implemented.

[0101] 2. Experimental Procedure

[0102] First, the real-time data stream is preprocessed, including outlier detection, normalization, and time window partitioning. Parameters for the bidirectional LSH hash function family are set, including 6 hash rounds, a random orthogonal basis vector dimension of 256, and an overlap rate of 0.25. A distributed training environment is started, initializing 8 GPU processes and configuring the NCCL backend. A dynamic bucketing strategy is implemented, setting the minimum bucket size to 64 and the maximum bucket size to 512, adaptively adjusting based on data distribution characteristics. In sparse attention computation, a 32×32 block matrix computation unit is used to achieve fine-grained task partitioning. Pipeline parallel parameters are configured, dividing the computation process into 4 stages to achieve overlap between computation and communication. Each experiment is repeated 10 times, and performance metrics are collected and fluctuation ranges are recorded.

[0103] 3. Test methods and standards

[0104] The evaluation primarily assesses four key performance metrics: throughput is measured in sequences per second; computation latency is the end-to-end processing time (ms) for a single batch of data; memory efficiency is monitored by peak GPU memory usage (GB); and computational accuracy is assessed using cosine similarity to the results of the standard Transformer. Distributed scalability is also evaluated, including weak scalability (fixed load per card) and strong scalability (fixed total load). Network communication overhead is measured using the NCCL-Tests tool.

[0105] 4. Experimental Results Table

[0106] Comparison of test items: Scheme 1 vs. Scheme 2; Performance improvement of the present invention's solution.

[0107] Test Project Comparison Option 1 Comparison Option 2 Invention Solution Performance improvement Throughput (sequences / s) 180±10 420±15 950±20 Increased by 5.3 times Calculate latency (ms) 3200±100 1100±50 380±15 Reduced by 88% Memory usage (GB / GPU) 26.8±0.4 12.5±0.3 5.8±0.2 Reduced by 78% Calculation accuracy (similarity) 1.000 0.962±0.003 0.985±0.002 Increased by 2.4% Weak scalability 76.5%±2% 82.3%±1.5% 94.8%±1% Increased by 24% Communication overhead (GB / s) 18.5±0.5 12.3±0.3 6.8±0.2 Reduced by 63%

[0108] 5. Interpretation of Experimental Results

[0109] This embodiment achieves significant performance improvements in a distributed environment. Through bidirectional LSH hashing and dynamic bucketing, computation latency is reduced from 3200ms to 380ms, a reduction of 88%. Regarding memory usage, thanks to sparse attention computation and efficient distributed memory management, memory usage per GPU is reduced from 26.8GB to 5.8GB. The computational accuracy reaches a similarity of 0.985, an improvement of 2.4 percentage points compared to the comparison scheme 2, validating the effectiveness of the bidirectional hashing strategy. In terms of distributed scalability, the weak scalability efficiency reaches 94.8%, significantly better than the comparison scheme. Communication overhead is reduced from 18.5GB / s to 6.8GB / s, a reduction of 63%, thanks to pipelined parallel optimization and an efficient gradient synchronization strategy. Experimental data demonstrate that this scheme exhibits excellent performance in large-scale distributed environments.

[0110] Example 3 is an embodiment of the present invention, providing a large-scale sequence sparse attention computation method based on bidirectional LSH hashing, including:

[0111] This embodiment demonstrates an extended application scheme in large-scale multimodal data processing scenarios. This implementation scheme employs a hybrid computing architecture, combining the bidirectional LSH hash sparse attention computation method of this invention with a deep learning model, thereby realizing a unified processing framework for multimodal data such as images, text, and videos.

[0112] In the specific implementation process, the input data of different modalities are first subjected to unified serialization preprocessing. For image data, the Vision Transformer's patch partitioning method is used to divide each image into a 14×14 image block sequence; for text data, a byte-level BPE tokenizer is used to convert the text into a token sequence; for video data, one frame is sampled every 0.5 seconds in the time dimension, and the same patch partitioning operation as for images is performed on each frame. Through this unified serialization processing, data of different modalities are converted into a standard sequence form.

[0113] In constructing the bidirectional LSH hash function family, this embodiment features specific optimizations to address the differences in multimodal features. A modality-aware mechanism is introduced during the generation of random orthogonal basis vectors to adaptively adjust the feature distributions of different modalities. Specifically, during Gram-Schmidt orthogonalization, the direction and scale of the orthogonal basis vectors are dynamically adjusted based on the statistical properties of different modal features. This optimization ensures that the hash function family can simultaneously capture the similarity structure of data from different modalities.

[0114] Regarding the bucketing strategy, this embodiment designs a hierarchical dynamic bucketing mechanism. First, coarse-grained bucketing is performed at the modality level, grouping data of the same modality into adjacent buckets. Then, within each modality, fine-grained bucketing is performed based on the local similarity of features. This hierarchical bucketing strategy not only improves the clustering effect of similar data but also effectively reduces the computational complexity of cross-modal attention. To handle intermodal correlations, a cross-modal overlapping region is specifically set up in the overlapping bucketing mechanism, enabling sufficient interaction of key information between different modalities.

[0115] In terms of computing architecture, this embodiment adopts a heterogeneous computing resource collaboration approach. The system is configured with four server nodes, each equipped with four NVIDIA A100 GPUs and two Intel Gaudi AI accelerator cards. The GPUs primarily handle general sequence processing and attention calculations, while the Gaudi accelerator cards are specifically optimized for handling feature extraction tasks of specific modalities. Through fine-grained task scheduling strategies, the system can automatically select the most suitable hardware resources for processing based on the characteristics of different computing tasks.

[0116] Regarding data parallelism, this embodiment implements a modality-aware dynamic batch processing mechanism. The system dynamically adjusts the proportion of different modalities in each batch based on the computational characteristics of different modalities, and ensures continuous and efficient utilization of computing resources through data prefetching and caching mechanisms. Simultaneously, an adaptive modality weight strategy is employed during gradient synchronization, enabling a good balance in the learning processes of different modalities.

[0117] To optimize communication overhead, this embodiment designs a modality-level gradient compression scheme. Different compression ratios and quantization strategies are employed for gradient information from different modalities, minimizing network bandwidth usage while ensuring model convergence. Furthermore, inter-modal gradient aggregation and asynchronous update mechanisms further improve the efficiency of distributed training.

[0118] Regarding pipeline parallelism, this embodiment implements a dynamic pipeline depth adjustment mechanism. The system adaptively adjusts the pipeline stage division by monitoring the computational load distribution of different modal data processing in real time, ensuring load balance across each computational stage. Simultaneously, through a fine-grained pipeline synchronization strategy, pipeline bubbles are minimized, improving overall computational efficiency.

[0119] Regarding anomaly handling mechanisms, this embodiment employs a multi-layered fault-tolerance scheme. At the data level, data verification and backup mechanisms ensure the integrity of multimodal data; at the computation level, checkpointing techniques and task rescheduling strategies handle hardware failures; and at the communication level, a resilient network connection recovery mechanism is implemented. These fault-tolerance designs ensure the system can operate stably in complex production environments.

Claims

1. A method for large-scale sequence sparse attention computation based on bidirectional LSH hashing, characterized in that, include: Receive input timing data sequence; Generate an LSH hash function family and perform bucketing calculations; Perform sparse attention computation; Output the processing results.

2. The large-scale sequence sparse attention computation method based on bidirectional LSH hashing as described in claim 1, characterized in that, The family of LSH hash functions includes: Random orthogonal basis vectors are generated using the Gram-Schmidt orthogonalization method: V={v1,v2,…,vk},vi·vj=0(i≠j) Where V represents the set of orthogonal basis vectors consisting of k vectors, where vi represents the i-th basis vector (i∈[1,k]), and k represents the dimension of the vector space; vi·vj=0 (i≠j) means that the dot product between any two different basis vectors vi and vj is zero, that is, these vectors are mutually orthogonal. These basis vectors are random orthogonal bases generated by the Gram-Schmidt orthogonalization method, which are used to construct a family of bidirectional LSH hash functions; The generated basis vectors are normalized: ui=vi / ||vi|| Where u represents the normalized target vector, vi represents the original i-th basis vector, and ||vi|| represents the Euclidean norm (modulus) of the vector.

3. The large-scale sequence sparse attention computation method based on bidirectional LSH hashing as described in claim 2, characterized in that, The execution of bucket calculation includes: Dynamically adjust bucket size based on data distribution characteristics: B=min(max(α·log(N),Bmin),Bmax) Where B represents the final determined dynamic bucket size; N represents the total length of the input data sequence; α is an adjustable positive coefficient parameter, usually ranging from [0.1, 1.0]; Bmin represents the minimum allowed bucket size; Bmax represents the maximum allowed bucket size; log(N) represents the logarithmic function with the natural logarithm e as the base; min and max represent the operations of taking the minimum and maximum values, respectively; Configure overlapping bucketing mechanism: O=β·B Where O represents the overlap between adjacent buckets; B represents the currently set bucket size; and β is an important adjustment parameter.

4. The large-scale sequence sparse attention calculation method based on bidirectional LSH hashing as described in claim 3, characterized in that, The sparse attention calculation includes: Determine the optimal block size for block matrix operations: S = sqrt(M·N / P) Where S represents the block size; M and N represent the number of rows and columns of the matrix to be processed, respectively; P represents the number of available processor cores; and the product M·N in the formula represents the total number of elements in the matrix. Achieving inter-block parallel computing: Y[i,j]=∑(A[i,k]·B[k,j]),k∈[1,K] Where A[i,k] represents the element of matrix A in the i-th row and k-th column, B[k,j] represents the element of matrix B in the k-th row and j-th column, k is the index variable of the cumulative term, with a value range of [1,K], K represents the number of blocks, the symbol "∑" represents the cumulative summation operation of k from 1 to K, and the symbol "·" represents the scalar multiplication operation.

5. The large-scale sequence sparse attention computation method based on bidirectional LSH hashing as described in claim 4, characterized in that, It also includes GPU acceleration strategies: The sparse matrix is ​​stored using Compressed Sparse Row (CSR) format; Implement CUDA kernel functions: global void sparse_attention(float*input,float*output,int*indices) Here, input is of type float*, output is also of type float*, indices is of type int*, and the function uses the __global__ modifier, indicating that this is a kernel function that can be called from the CPU and executed on the GPU.

6. The large-scale sequence sparse attention computation method based on bidirectional LSH hashing as described in claim 5, characterized in that, It also includes multi-GPU parallel architectures: Implementing a data sharding mechanism: shard_size=total_data_size / num_gpus Where shard_size represents the size of the data shard allocated on each GPU device, total_data_size represents the total amount of data to be processed, and num_gpus represents the number of GPU devices participating in parallel computing; Gradient synchronization method is used: grad_global=reduce_sum(grad_local) / num_gpus Where grad_global represents the final global gradient vector in a distributed multi-GPU parallel computing environment, grad_local represents the gradient vector independently generated by each independent GPU computing unit during local computation, and num_gpus represents the total number of GPUs in the parallel computing system.

7. The large-scale sequence sparse attention computation method based on bidirectional LSH hashing as described in claim 6, characterized in that, It also includes pipeline parallel optimization: The computation process is divided into multiple stages, and each stage is executed in parallel. Optimize communication overhead: comm_time=data_size / bandwidth+latency Wherein, comm_time represents the total time overhead of data communication, in time (seconds); data_size represents the total size of the data to be transmitted, usually in bytes; bandwidth represents the data transmission bandwidth of the communication channel, in bytes per second (Byte / s); and latency represents the basic latency of the communication link, in seconds.

8. A large-scale sequence sparse attention computation system based on bidirectional LSH hashing, characterized in that, include: The LSH sparse attention computation module is used to perform sparse attention operations; A bidirectional hash function family generation module is used to generate LSH hash functions; The dynamic bucket management module is used to implement adaptive bucketing; The parallel computing scheduling module is used to optimize the allocation of computing resources.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the large-scale sequence sparse attention computation method based on bidirectional LSH hashing as described in any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the large-scale sequential sparse attention computation method based on bidirectional LSH hashing as described in any one of claims 1 to 7.