Via hole structure design method, via hole structure, design device, computer equipment and medium
By using parametric differential via design, the number of segments, aperture, and length of the via structure are optimized, solving the impedance continuity problem of long vias and achieving more efficient signal transmission and improved electrical performance.
Patent Information
- Application Number
- CN202511772676.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-28
- Publication Date
- 2026-03-03
AI Technical Summary
In existing technologies, impedance control of long vias is difficult to meet impedance continuity requirements, and traditional designs cannot achieve dynamic adjustment in the Z-axis direction, resulting in problems such as high overall impedance and low impedance of the stub portion.
The parametric differential via design method is adopted. By constructing a basic model of parametric differential via, the number of via segments, via diameter and length are set as adjustable variables. Parameter sweep simulation is performed to optimize the differential impedance value and select the parameter combination that is closest to the target impedance as the optimal design parameters.
It improves the impedance continuity of via structures, reduces high-speed signal transmission loss, enhances product electrical performance, adapts to the design requirements of large and thick circuit boards, and meets the needs of higher-speed application scenarios.
Smart Images
Figure CN121598532A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of circuit board design technology, and in particular to a via structure design method, via structure, design device, computer equipment and medium. Background Technology
[0002] With the rapid development of electronic technology and the continuous improvement of high-speed signal rates, the thickness of circuit boards has also increased, posing a significant challenge to impedance control of long vias in circuits. Current technologies exhibit that long vias have a generally high impedance but a low impedance in the stub portion. Furthermore, current via designs all use the same aperture, making dynamic adjustment impossible when adapting to the Z-axis direction, thus failing to meet impedance continuity requirements. Summary of the Invention
[0003] The purpose of this invention is to overcome the shortcomings of existing via structures in meeting impedance continuity requirements, and to provide a via structure design method, via structure, design device, computer equipment and medium.
[0004] To solve the above-mentioned technical problems, the present invention adopts the following technical solution: In a first aspect, embodiments of the present invention provide a method for designing a via structure, comprising the following steps: Construct a parameterized differential via basic model; The number of segments, the diameter of each segment, and the length of each segment are set as adjustable variables in the parameterized differential via 3D model. Based on different parameter combinations of the three adjustable variables, a parameter sweep simulation is performed on the parameterized differential via basic model to obtain the differential impedance value corresponding to each parameter combination. The differential impedance value is compared with a preset target impedance; The combination of parameters of the three adjustable variables corresponding to the differential impedance values that are closest to the target impedance is used as the optimal design parameters for the via structure design.
[0005] Secondly, embodiments of the present invention also provide a via structure, the via structure comprising n via segments with different apertures, the number of via segments, apertures and lengths of the via segments being determined according to the via structure design method described above.
[0006] Thirdly, embodiments of the present invention also provide a via structure design apparatus, comprising: a construction unit, a setting unit, a simulation unit, a comparison unit, and a design unit; The building unit is used to build a parameterized differential via basic model; The setting unit is used to set the number of segments of each via, the diameter of each via segment, and the length of each via segment as adjustable variables in the parameterized differential via 3D model. The simulation unit is used to perform parameter scanning simulation on the parameterized differential via basic model based on different parameter combinations of the three adjustable variables, and obtain the differential impedance value corresponding to each parameter combination. The comparison unit is used to compare the differential impedance value with a preset target impedance; The design unit is used to take the parameter combination of the three adjustable variables corresponding to the differential impedance value that is closest to the target impedance as the optimal design parameters for the via structure design.
[0007] Fourthly, embodiments of the present invention also provide a computer device, the computer device including a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the via structure design method described above.
[0008] Fifthly, embodiments of the present invention also provide a storage medium storing a computer program, the computer program including program instructions, which, when executed by a processor, implement a via structure design method as described above.
[0009] The via structure design method, via structure, design device, computer equipment, and medium of the present invention have the following advantages compared with the prior art: through multi-variable combination optimization, the target impedance can be accurately matched, the via impedance continuity can be greatly improved, the high-speed signal transmission loss can be reduced, and the electrical performance of the product can be significantly improved. At the same time, it breaks the limitations of traditional single aperture design, improves the flexibility of via design, effectively adapts to the needs of large and thick circuit boards, and meets the application scenarios of higher speed via design.
[0010] The present invention will be further described below with reference to the accompanying drawings and specific embodiments. Attached Figure Description
[0011] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0012] Figure 1 A flowchart illustrating the design method of the via structure provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the via structure provided in an embodiment of the present invention; Figure 3 A schematic block diagram of a via structure design device provided in an embodiment of the present invention; Figure 4 A schematic block diagram of a computer device provided for an embodiment of the present invention. Detailed Implementation
[0013] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0014] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0015] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.
[0016] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.
[0017] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.
[0018] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.
[0019] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. The illustrative expressions of the above terms in this specification should not be construed as necessarily referring to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.
[0020] See Figure 1 As shown, the present invention provides a specific embodiment of a via structure design method, including the following steps S1 to S6: S1. Construct a parametric differential via basic model.
[0021] Specifically, step S1 includes: A parametric differential via basic model is established in a three-dimensional electromagnetic simulation software. The model includes at least via pillars and via pads.
[0022] The via pillar is the main channel for signal transmission, while the via pad is used to connect the via to the circuit board wiring. Together, they constitute the core structure of the via.
[0023] The material, total thickness, and copper foil thickness of the printed circuit board are set to fixed parameters.
[0024] These parameters are determined by the overall design requirements of the circuit board and are not adjusted during the via design phase to ensure that the model matches the physical characteristics of the actual circuit board. Setting the board material, total thickness, and copper foil thickness as fixed parameters eliminates interference from irrelevant variables, allowing subsequent optimizations to focus solely on the via's own structural parameters, thus improving design efficiency.
[0025] More specifically, the 3D electromagnetic simulation software is Ansys HFSS or CST Studio Suite. The performance of the 3D electromagnetic simulation software directly affects the accuracy and efficiency of via model simulation. Ansys HFSS and CST Studio Suite are recognized high-precision electromagnetic simulation software with powerful 3D modeling capabilities and electromagnetic field calculation functions. They can accurately simulate the transmission characteristics of high-speed signals in vias, including key indicators such as impedance, loss, and signal reflection. Choosing these two software programs as simulation tools ensures that the simulation results of the parameterized differential via basic model are realistic and reliable, providing accurate data support for subsequent parameter optimization and determination of optimal design parameters, and avoiding design deviations caused by insufficient accuracy of the simulation software.
[0026] S2. Set the number of segments of each via, the diameter of each via segment, and the length of each via segment as adjustable variables in the parameterized differential via 3D model.
[0027] By setting the number of segments, the aperture of each segment, and the length of each segment as adjustable variables, the design limitations of traditional single-aperture vias are broken, giving the via structure a multi-dimensional adjustment space. Through the optimization of these variables, the impedance of different regions of the via can be adjusted in a targeted manner, effectively improving the impedance continuity of long vias and resolving the contradiction between the overall high impedance and the low impedance of the stub section. At the same time, the setting of adjustable variables provides a basis for subsequent systematic scanning simulation, which can comprehensively explore the impact of different parameter combinations on impedance and provide the possibility of finding the optimal design scheme.
[0028] S3. Perform parameter scanning simulation on the parameterized differential via basic model based on different parameter combinations of the three adjustable variables to obtain the differential impedance value corresponding to each parameter combination.
[0029] Parametric sweep simulation is a method that systematically traverses different parameter combinations to obtain the target performance index (in this case, the differential impedance value) for each combination. Since the number of via segments, the diameter of each segment, and the length of each segment are interdependent, adjusting a single variable cannot comprehensively assess its effect on impedance. Therefore, sweep simulation with different parameter combinations is necessary to cover the entire design space and ensure that no possible optimization schemes are overlooked. Using a preset fixed step value for the traversal ensures the systematic nature and regularity of the simulation, making the obtained differential impedance values comparable and valuable for reference, providing comprehensive data support for subsequent selection of the optimal parameter combination.
[0030] In one embodiment, step S3 includes: Using a preset fixed step value, a systematic traversal simulation is performed on the three adjustable variables of number of segments, aperture and length to obtain differential impedance values under different parameter combinations that cover the design space.
[0031] In practice, the first step is to determine a fixed step value for each adjustable variable. For example, the step value for the number of segments is 1 (i.e., increasing sequentially from 1 segment to n segments), the step value for the aperture is 0.05mm (i.e., increasing by 0.05mm per step starting from the minimum set value), and the step value for the length is 0.1mm (i.e., adjusting by 0.1mm per step based on the number of segments and the total thickness). Then, using the parameter scanning function of 3D electromagnetic simulation software, all possible parameter combinations are generated according to the above step values. Electromagnetic simulation is performed on the parameterized differential via basic model corresponding to each parameter combination to simulate the transmission process of high-speed signals in the via structure. The differential impedance values corresponding to each parameter combination are calculated and recorded, ultimately forming a differential impedance dataset covering the design space.
[0032] S4. Compare the differential impedance value with the preset target impedance.
[0033] The core objective of via design is to make the differential impedance value close to the preset target impedance in order to ensure impedance matching during signal transmission and reduce signal reflection and attenuation.
[0034] In one embodiment, step S4 includes: Calculate the absolute difference between the differential impedance value obtained from each simulation and the preset target impedance.
[0035] Sort all parameter combinations in ascending order of their corresponding absolute differences.
[0036] By calculating and sorting the absolute differences, the deviation of different parameter combinations from the target impedance can be intuitively quantified, avoiding errors caused by subjective judgment and making the selection process more objective and accurate. The sorted list of parameter combinations can quickly identify the solution with better impedance performance, reducing the workload of subsequent selection of optimal parameters. S5. The parameter combination of the three adjustable variables corresponding to the differential impedance value that is closest to the target impedance is used as the optimal design parameter for the via structure design.
[0037] In one embodiment, step S5 includes: The parameter combination with the smallest absolute difference is selected as the optimal design parameter.
[0038] The parameter combination closest to the target impedance means that the corresponding via impedance characteristics best meet the design requirements, minimizing impedance abrupt changes and signal loss during signal transmission, and improving signal integrity. Selecting the parameter combination with the smallest absolute difference as the optimal design parameters ensures that the via impedance is closest to the target value, maximizing impedance continuity, reducing signal reflection and attenuation during high-speed signal transmission, and improving signal integrity.
[0039] The optimal design parameters are output to PCB design software to generate a printed circuit board design file with corresponding via structures.
[0040] Using this parameter combination as the optimal design parameters and outputting it to PCB design software is a key step in realizing the transition from simulation optimization to actual product design. It ensures that the optimized solution obtained in the simulation stage is accurately converted into the actual via structure, so that the design effect can be reflected in the actual circuit board. Ultimately, it solves the via impedance control problem in the existing technology and improves the electrical performance of the product.
[0041] Please see Figure 2 The present invention also provides a via structure, which includes n via segments 1 with different apertures. The number of via segments 1, apertures and lengths are determined according to the above-mentioned via structure design method.
[0042] This via structure, by setting n via segments with different diameters, can achieve dynamic impedance adaptation in the Z-axis direction, specifically addressing the issues of high overall impedance and low impedance in the stub portion of traditional single-diameter vias (n=1). The optimal value of n and the parameters of each via segment, selected through a design methodology, ensure excellent impedance continuity, reducing impedance abrupt changes at increasing frequencies and meeting the signal transmission requirements of thick, high-speed circuit boards. Here, n is a positive integer, and its value, along with the parameters of each via segment, must balance impedance optimization with practical manufacturing feasibility.
[0043] Please see Figure 3 The present invention also provides a via structure design device, including: a construction unit 10, a setting unit 20, a simulation unit 30, a comparison unit 40 and a design unit 50.
[0044] The building unit 10 is used to build a parameterized differential via basic model.
[0045] The setting unit 20 is used to set the number of segments of each via, the diameter of each via segment, and the length of each via segment as adjustable variables in the parameterized differential via 3D model.
[0046] The simulation unit 30 is used to perform parameter scanning simulation on the parameterized differential via basic model based on different parameter combinations of the three adjustable variables, and obtain the differential impedance value corresponding to each parameter combination.
[0047] The comparison unit 40 is used to compare the differential impedance value with a preset target impedance.
[0048] The design unit 50 is used to use the parameter combination of the three adjustable variables corresponding to the differential impedance value that is closest to the target impedance as the optimal design parameter for the via structure design.
[0049] In one specific embodiment, the building unit 10 is specifically used for: A parametric differential via basic model is established in a three-dimensional electromagnetic simulation software. The model includes at least via pillars and via pads. The material, total thickness, and copper foil thickness of the printed circuit board are set to fixed parameters.
[0050] In one specific embodiment, the simulation unit 30 is specifically used for: Using a preset fixed step value, a systematic traversal simulation is performed on the three adjustable variables of number of segments, aperture and length to obtain differential impedance values under different parameter combinations that cover the design space.
[0051] In one specific embodiment, the comparison unit 40 is specifically used for: Calculate the absolute difference between the differential impedance value obtained from each simulation and the preset target impedance; Sort all parameter combinations in ascending order of their corresponding absolute differences.
[0052] In one specific embodiment, the design unit 50 is specifically used for: The parameter combination with the smallest absolute difference is selected as the optimal design parameter; The optimal design parameters are output to PCB design software to generate a printed circuit board design file with corresponding via structures.
[0053] It should be noted that those skilled in the art can clearly understand that the specific implementation process of the above-mentioned via structure design device and its units, as well as the flow control synchronization device and its units, can be referred to the corresponding descriptions in the foregoing method embodiments. For the sake of convenience and brevity, these will not be repeated here.
[0054] The aforementioned via structure design device can be implemented as a computer program, which can be used in, for example... Figure 4 It runs on the computer device shown.
[0055] Please see Figure 4 , Figure 4 This is a schematic block diagram of a computer device 500 provided in an embodiment of this application; the computer device 500 can be a terminal or a server, wherein the terminal can be an electronic device with communication functions such as a smartphone, tablet computer, laptop computer, desktop computer, personal digital assistant, and wearable device. The server can be a standalone server or a server cluster composed of multiple servers.
[0056] Please see Figure 4The computer device 500 includes a processor 502, a memory, and a network interface 505 connected via a system bus 501. The memory may include a non-volatile storage medium 503 and internal memory 504.
[0057] The non-volatile storage medium 503 can store a command system 5031 and a computer program 5032. The computer program 5032 includes program instructions that, when executed, cause the processor 502 to perform a via structure design method.
[0058] The processor 502 provides computing and control capabilities to support the operation of the entire computer device 500.
[0059] The internal memory 504 provides an environment for the execution of the computer program 5032 in the non-volatile storage medium 503. When the computer program 5032 is executed by the processor 502, the processor 502 can execute a via structure design method.
[0060] This network interface 505 is used for network communication with other devices. Those skilled in the art will understand that... Figure 4 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device 500 to which the present application is applied. The specific computer device 500 may include more or fewer components than those shown in the figure, or may combine certain components in a specific pattern, or may have different component arrangements.
[0061] The processor 502 is used to run a computer program 5032 stored in the memory to perform the following steps: Construct a parameterized differential via basic model; The number of segments, the diameter of each segment, and the length of each segment are set as adjustable variables in the parameterized differential via 3D model. Based on different parameter combinations of the three adjustable variables, a parameter sweep simulation is performed on the parameterized differential via basic model to obtain the differential impedance value corresponding to each parameter combination. The differential impedance value is compared with a preset target impedance; The combination of parameters of the three adjustable variables corresponding to the differential impedance values that are closest to the target impedance is used as the optimal design parameters for the via structure design.
[0062] It should be understood that in the embodiments of this application, the processor 502 may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.
[0063] It will be understood by those skilled in the art that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program includes program instructions and can be stored in a storage medium, which is a computer-readable storage medium. The program instructions are executed by at least one processor in the computer system to implement the process steps of the embodiments of the above methods.
[0064] Therefore, the present invention also provides a storage medium. This storage medium can be a computer-readable storage medium. The storage medium stores a computer program, wherein the computer program includes program instructions that, when executed by a processor, can implement the above-described via structure design method. The storage medium stores a computer program, which includes program instructions that, when executed by a processor, can implement the above-described method. The program instructions include the following steps: Construct a parameterized differential via basic model; The number of segments, the diameter of each segment, and the length of each segment are set as adjustable variables in the parameterized differential via 3D model. Based on different parameter combinations of the three adjustable variables, a parameter sweep simulation is performed on the parameterized differential via basic model to obtain the differential impedance value corresponding to each parameter combination. The differential impedance value is compared with a preset target impedance; The combination of parameters of the three adjustable variables corresponding to the differential impedance values that are closest to the target impedance is used as the optimal design parameters for the via structure design.
[0065] The storage medium can be any computer-readable storage medium capable of storing program code, such as a USB flash drive, portable hard drive, read-only memory (ROM), magnetic disk, or optical disk.
[0066] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.
[0067] In the several embodiments provided by this invention, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For example, the division of each unit is merely a logical functional division, and other division methods may be used in implementation. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or skipped.
[0068] The steps in the method of this invention can be adjusted, merged, or deleted in order as needed. The units in the device of this invention can be merged, divided, or deleted as needed. Furthermore, the functional units in the various embodiments of this invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.
[0069] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, a terminal, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention.
[0070] The above embodiments are preferred implementations of the present invention. In addition, the present invention can be implemented in other ways. Any obvious substitutions without departing from the concept of the present technical solution are within the protection scope of the present invention.
Claims
1. A design method for a via structure, characterized in that, Includes the following steps: Construct a parameterized differential via basic model; The number of segments, the diameter of each segment, and the length of each segment are set as adjustable variables in the parameterized differential via 3D model. Based on different parameter combinations of the three adjustable variables, a parameter sweep simulation is performed on the parameterized differential via basic model to obtain the differential impedance value corresponding to each parameter combination. The differential impedance value is compared with a preset target impedance; The combination of parameters of the three adjustable variables corresponding to the differential impedance values that are closest to the target impedance is used as the optimal design parameters for the via structure design.
2. The design method for the via structure according to claim 1, characterized in that, The steps for constructing the parametric differential via basic model include: A parametric differential via basic model is established in a three-dimensional electromagnetic simulation software. The model includes at least via pillars and via pads. Set the board material, total thickness, and copper foil thickness of the printed circuit board to fixed parameters.
3. The design method for the via structure according to claim 1, characterized in that, The step of performing parameter sweep simulation on the parameterized differential via basic model based on different parameter combinations of the three adjustable variables to obtain the differential impedance value corresponding to each parameter combination includes: Using a preset fixed step value, a systematic traversal simulation is performed on the three adjustable variables of number of segments, aperture and length to obtain differential impedance values under different parameter combinations that cover the design space.
4. The design method for the via structure according to claim 1, characterized in that, The step of comparing the differential impedance value with the preset target impedance includes: Calculate the absolute difference between the differential impedance value obtained from each simulation and the preset target impedance; Sort all parameter combinations in ascending order of their corresponding absolute differences.
5. The design method for the via structure according to claim 4, characterized in that, The step of using the combination of parameters of the three adjustable variables corresponding to the differential impedance values closest to the target impedance as the optimal design parameters for the via structure design includes: The parameter combination with the smallest absolute difference is selected as the optimal design parameter; The optimal design parameters are output to PCB design software to generate a printed circuit board design file with corresponding via structures.
6. The design method for the via structure according to claim 2, characterized in that, The three-dimensional electromagnetic simulation software is Ansys HFSS or CST Studio Suite.
7. A via structure, characterized in that, The via structure includes n via segments with different apertures, and the number of via segments, apertures, and lengths are determined according to the via structure design method of any one of claims 1-6.
8. A design device for a via structure, characterized in that, include: Construction unit, setup unit, simulation unit, comparison unit, and design unit; The building unit is used to build a parameterized differential via basic model; The setting unit is used to set the number of segments of each via, the diameter of each via segment, and the length of each via segment as adjustable variables in the parameterized differential via 3D model. The simulation unit is used to perform parameter scanning simulation on the parameterized differential via basic model based on different parameter combinations of the three adjustable variables, and obtain the differential impedance value corresponding to each parameter combination. The comparison unit is used to compare the differential impedance value with a preset target impedance; The design unit is used to take the parameter combination of the three adjustable variables corresponding to the differential impedance value that is closest to the target impedance as the optimal design parameters for the via structure design.
9. A computer device, characterized in that, The computer device includes a memory and a processor. The memory stores a computer program, and when the processor executes the computer program, it implements a via structure design method as described in any one of claims 1-6.
10. A storage medium, characterized in that, The storage medium stores a computer program, which includes program instructions that, when executed by a processor, implement a via structure design method as described in any one of claims 1-6.