Large language model training method and device and HLS design space exploration method and device

Abstract

The invention discloses a large language model training method and an HLS design space exploration method and device.According to the large language model training method and device, an HLS knowledge corpus, a result quality reverse reasoning corpus, an instruction scheduling forward reasoning corpus and a Pareto frontier reasoning corpus are constructed, and three-layer progressive training is conducted on a large language model based on the constructed corpus; therefore, the large language model is not only a simple instruction generator any more, but has the complete optimization reasoning capability of diagnosing the HLS design bottleneck, analyzing the result quality influence, formulating a fine-grained instruction scheduling strategy, and carrying out macroscopic Pareto frontier exploration planning and multi-target tradeoff; by means of the method, a large language model can understand the complex relation between optimization instruction configuration and result quality information more deeply, and intelligent reasoning can be conducted on the basis of understanding an HLS optimization strategy.

Description

Technical Field

[0001] This invention relates to a large language model training method, an HLS design space exploration method and apparatus, belonging to the fields of design automation and artificial intelligence technology. Background Technology

[0002] In the process of exploring the HLS (High-Level Synthesis) design space, due to the complex trade-offs between hardware resources and performance metrics, finding and approximating the true Pareto front is crucial to achieving optimal synthesis metrics and meeting diverse design requirements. In recent years, some preliminary studies have attempted to apply Large Language Models (LLMs) to the HLS design space exploration field. For example, LLMs are used as "optimization instruction inserters," directly inserting or modifying optimization instructions into the HLS source code through multi-agent workflows or retrieval-enhanced generation. However, such LLMs cannot perform intelligent reasoning based on an understanding of HLS optimization strategies, severely hindering the practical application of LLMs in HLS design space exploration. Summary of the Invention

[0003] This invention provides a method for training large language models, a method and apparatus for exploring the HLS design space, and solves the problems disclosed in the background art.

[0004] According to one aspect of this application, a method for training a large language model is provided, comprising: Based on the known design space, we construct an HLS knowledge corpus, a result quality backward reasoning corpus, an instruction scheduling forward reasoning corpus, and a Pareto front reasoning corpus; where the design space is a list of configurations for optimizing instructions. The large language model LLM1 is trained once using corpora from all corpora; the training is used to enable the large language model to master the syntax and logic optimized by HLS design. Based on the Pareto frontier inference corpus, input-output pairs are generated, and the input-output pairs are used to perform secondary training on the large language model LLM1 to obtain the large language model LLM2. The secondary training is used to enable the large language model to master the configuration tuple of output optimization instructions according to the input instructions. The optimization instructions are the adjustable instructions in HLS used to control the hardware microarchitecture of code generation. Based on the Pareto front inference corpus, preference pairs are generated, and the large language model LLM2 is trained three times using these preference pairs to obtain the final large language model LLM3. The three training sessions are used to make the large language model tend to generate optimized instruction configuration tuples corresponding to the Pareto front.

[0005] Furthermore, the corpus in the HLS knowledge corpus includes the semantic definition of optimization instructions, the parameter description of optimization instructions, the application mode of optimization instructions, and the associated instances of optimization instruction configuration and corresponding code. The corpus for reverse reasoning of results quality includes knowledge of the causal relationship between optimized instruction configuration and HLS design quality indicators; The corpus of instruction scheduling forward inference includes the performance bottlenecks of HLS design, as well as the correlation between the desired optimization goal and the configuration of optimization instructions applied to achieve the optimization goal; The Pareto Front Inference Corpus contains Pareto fronts and inferences generated based on Pareto fronts using a general large language model.

[0006] Furthermore, the Pareto fronts in the Pareto front reasoning corpus are obtained based on dissimilarity sampling, the dissimilarity sampling process being as follows: A fast non-dominated sorting method is used to obtain the Pareto front from the known design space and construct an initial Pareto front pool. A clustering algorithm is used to cluster the Pareto fronts in the initial Pareto front pool; Select a representative Pareto front from each cluster and use it as the Pareto front in the Pareto front inference corpus; the representative Pareto front is the Pareto front within the cluster that is closest to its centroid.

[0007] Furthermore, the preference pairs include the corresponding input instructions, the optimization instruction configuration tuple corresponding to the Pareto front obtained by dissimilarity sampling, and the optimization instruction configuration tuple obtained by random sampling; the input instructions include the code and design space corresponding to the HLS design.

[0008] Furthermore, the input instructions in the input-output pair include the code and design space corresponding to the HLS design, and the output includes a chain of thought text that mimics the analysis of a hardware optimization expert and multiple structured optimization instruction configuration tuples.

[0009] According to another aspect of this application, a large language model training apparatus is provided, comprising: The corpus construction module, based on the known design space, constructs an HLS knowledge corpus, a result quality backward reasoning corpus, an instruction scheduling forward reasoning corpus, and a Pareto front reasoning corpus; where the design space is a configuration list of optimization instructions; One training module uses corpora from all corpora to train the large language model once, resulting in the large language model LLM1; this training is used to enable the large language model to master the syntax and logic optimized by HLS design. The secondary training module generates input-output pairs based on the Pareto frontier inference corpus, and uses the input-output pairs to perform secondary training on the large language model LLM1 to obtain the large language model LLM2. The secondary training is used to enable the large language model to learn to output optimized instruction configuration tuples based on input instructions. The three training modules generate preference pairs based on the Pareto front inference corpus, and use these preference pairs to train the large language model LLM2 three times to obtain the final large language model LLM3. The three training sessions are used to make the large language model tend to generate optimized instruction configuration tuples corresponding to the Pareto front.

[0010] According to another aspect of this application, an HLS design space exploration method is provided, comprising: The code structure features of the initial HLS design are extracted, and a design space is generated based on the extracted code structure features; wherein, the design space is a configuration list of optimization instructions; The code and design space of the initial HLS design are input into the large language model to obtain the optimized instruction configuration tuple. Based on the optimized instruction configuration tuple, the optimized HLS design is generated. The large language model is a model trained using the large language model training method described above.

[0011] According to another aspect of this application, an HLS design space exploration device is provided, comprising: The design space generation module extracts code structure features from the initial HLS design and generates a design space based on the extracted code structure features; the design space is a configuration list of optimization instructions. The HLS design generation module inputs the code and design space of the initial HLS design into the large language model to obtain the optimized instruction configuration tuple. Based on the optimized instruction configuration tuple, it generates the optimized HLS design. The large language model is a model trained using the large language model training method described above.

[0012] According to one aspect of this application, a computer-readable storage medium is provided that stores one or more programs, the one or more programs including instructions that, when executed by a computing device, cause the computing device to perform a large language model training method or an HLS design space exploration method.

[0013] According to one aspect of this application, a computer device is provided, including one or more processors and one or more memories, wherein one or more programs are stored in the one or more memories and configured to be executed by the one or more processors, and the one or more programs include instructions for performing a large language model training method or an HLS design space exploration method.

[0014] The beneficial effects achieved by this invention are as follows: By constructing an HLS knowledge corpus, a result quality reverse reasoning corpus, an instruction scheduling forward reasoning corpus, and a Pareto front reasoning corpus, this invention performs three-layer progressive training on a large language model based on the constructed corpus. This transforms the large language model from a simple instruction generator into a complete optimization reasoning capability, encompassing diagnosing HLS design bottlenecks, analyzing the impact of result quality, formulating fine-grained instruction scheduling strategies, and conducting macro-level Pareto front exploration planning and multi-objective trade-offs. This enables the large language model to more deeply understand the complex relationship between optimized instruction configuration and result quality information, and allows for intelligent reasoning based on an understanding of HLS optimization strategies. Attached Figure Description

[0015] Figure 1 A flowchart of a large language model training method; Figure 2 This is a flowchart of the dissimilarity sampling method; Figure 3 A block diagram of a large language model training device; Figure 4 A schematic diagram of the spatial exploration method designed for HLS; Figure 5 A block diagram of the space exploration installation designed for HLS. Detailed Implementation

[0016] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit this application or its application or use. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0017] Unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps described in these embodiments do not limit the scope of this application.

[0018] At the same time, it should be understood that, for ease of description, the dimensions of the various parts shown in the accompanying drawings are not drawn according to actual scale.

[0019] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0020] In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

[0021] It should be noted that similar symbols and letters in the following figures represent similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0022] Large Language Models (LLMs) are a type of deep learning-based artificial intelligence technique and a core research area in natural language processing. Their core principle is to train models using large-scale datasets, enabling them to generate natural language text or understand the meaning of spoken text. These models, through layered neural network structures, learn and simulate the complex rules of human language, achieving near-human-level text generation capabilities.

[0023] This application provides a method for training a large language model, aiming to enable the trained large language model to perform intelligent reasoning based on understanding HLS optimization strategies. This training method can be executed by a training device, which can be a terminal device or a server. The terminal device can include, but is not limited to, mobile phones, computers, etc. The server can be a standalone physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server providing basic cloud computing services such as cloud services, cloud databases, cloud computing, big data, and artificial intelligence platforms, etc., and is not limited in this application. Optionally, this training method can also be executed collaboratively by multiple electronic devices with computing power. For ease of explanation, subsequent embodiments will be described as being executed by a training device.

[0024] See Figure 1 , Figure 1 This is a flowchart of a large language model training method provided in an embodiment of this application. The training method can be executed by a training device and may include at least the following steps: Step 1: Based on the known design space, construct the HLS knowledge corpus, the result quality backward reasoning corpus, the instruction scheduling forward reasoning corpus, and the Pareto front reasoning corpus; where the design space is the configuration list of optimization instructions.

[0025] It should be noted that the core of building a high-quality dedicated corpus is to use the Pareto-aligned data augmentation paradigm. Through carefully designed cues that specify specific hints, it guides the generation of four types of corpora by powerful general-purpose language models currently on the market (such as Gemini) to encode hardware-optimized expertise.

[0026] In some embodiments, an HLS knowledge corpus is used: This corpus establishes a mapping relationship between the theoretical knowledge of HLS optimization instructions and their actual application in specific code structures (such as loops and arrays); the specific corpus may include the semantic definition of optimization instructions, parameter descriptions of optimization instructions, application patterns of optimization instructions, and associated instances of optimization instruction configurations and corresponding code. Through this corpus, the model can associate abstract optimization instruction definitions with specific code instances, thereby gaining a deep understanding of the underlying mechanisms and applicable scenarios of different optimization instructions in hardware design.

[0027] The corpus for reverse reasoning on result quality: Based on the optimized instruction configuration combination of the optimized HLS design and application, and the result quality information generated after synthesis (such as latency, resource utilization, power consumption, and critical path), it prompts the LLM to generate a reasoning analysis explaining "why this set of instructions leads to such result quality," for example, how a certain loop unrolling factor affects latency and resource consumption. Specific corpora can include causal relationship knowledge between optimized instruction configuration and HLS design quality indicators. This corpus endows the model with reverse causal reasoning capabilities, enabling it to have a coarse-grained awareness of the positive and negative effects of optimized instruction configuration and providing feedback adjustment for instruction scheduling.

[0028] The corpus for reverse reasoning about outcome quality: Based on the outcome quality information of the input HLS design and synthesis, it identifies computational bottlenecks in the general LLM code (such as the innermost loop and large-scale array access), and proposes specific instruction allocation schemes accordingly (e.g., "To improve throughput, the inner loop L4 should be piped and expanded, and arrays A and B should be partitioned into loops to support parallel access"). This reasoning details each combination of optimization instructions and parameters, and examines the alignment of these optimization instructions within the design structure (such as loops and arrays). Specific corpora may include performance bottlenecks in the HLS design, as well as the correlation between the desired optimization goals and the configuration of optimization instructions applied to achieve those goals. This corpus endows the model with forward diagnostic and fine-grained policy formulation capabilities.

[0029] The Pareto Front Inference Corpus aims to teach trained models to plan the entire exploration process, rather than focusing on individual design points. Based on Pareto front designs, it provides general LLM generative level inference suggestions, describing how to track and cover the entire Pareto front by systematically changing the combination of instructions (e.g., gradually transitioning from low-parallelism, low-resource-consumption configurations to high-parallelism, high-resource-consumption configurations). Specific corpora can include Pareto fronts and inferences generated using a general large language model based on Pareto fronts. These corpora constitute important guidance for teaching models to perform macro-strategic planning.

[0030] It should be noted that, in some embodiments, the Pareto front in the Pareto front inference corpus is obtained based on dissimilarity sampling, see [link to relevant documentation]. Figure 2 The specific process of dissimilarity sampling is as follows: 11) The fast non-dominated sorting method is used to obtain the Pareto front from the known design space and construct the initial Pareto front pool; 12) Use a clustering algorithm to cluster the Pareto fronts in the initial Pareto front pool; 13) Select a representative Pareto front from each cluster and use the representative Pareto front as the Pareto front in the Pareto front inference corpus; wherein, the representative Pareto front is the Pareto front within the cluster that is closest to its centroid.

[0031] The detailed algorithm is as follows:

[0032] In Step 1, a hardware optimization representation paradigm based on specified cues is adopted to construct a professional knowledge framework specifically for exploring high-level integrated design spaces. This framework aims to encode hardware optimization expertise and empower large-scale language models, integrating prior knowledge from multiple dimensions. First, it establishes a foundational knowledge system for the model regarding HLS optimization instructions, covering the definitions, functions, and application patterns of these instructions in different design architectures. Building upon this, the framework further develops bidirectional reasoning capabilities: on the one hand, through correlation analysis between optimization results and design schemes, it cultivates the model's macroscopic perception of the impact of optimization instructions on result quality, enabling it to infer possible optimization strategies from the final design performance and provide feedback adjustment for instruction scheduling; on the other hand, through bottleneck diagnosis of design code, it trains the model to formulate refined instruction configuration capabilities, enabling it to intelligently propose specific optimization schemes based on design characteristics. Furthermore, the framework incorporates global exploration strategy knowledge. By learning representative Pareto front design combinations, the model can deeply understand the trade-offs between different optimization objectives (such as performance and resources), thereby planning a macroscopic exploration path and guiding the model to allocate strategies among different optimization orientations. By integrating the expertise from these different levels, a comprehensive technical framework is ultimately formed to guide high-level integrated design space exploration, laying a solid foundation for subsequent model training.

[0033] By introducing the Pareto-aligned data augmentation paradigm, a dedicated corpus was constructed that includes HLS knowledge, result quality backward reasoning, instruction scheduling forward reasoning, and Pareto front reasoning. This enables the large language model trained subsequently to be more than just a simple instruction generator. Instead, it possesses complete optimization reasoning capabilities, from diagnosing HLS design bottlenecks, analyzing the impact of result quality, and formulating fine-grained instruction scheduling strategies, to conducting macro-level Pareto front exploration planning and multi-objective trade-offs. This opens up new paths for the in-depth application of large language models in the field of electronic design automation.

[0034] Step 2: Train the large language model LLM0 once using the corpus data from all corpora to obtain the large language model LLM1; the training is used to enable the large language model to master the syntax and logic of HLS design optimization.

[0035] It should be noted that the large language model LLM0 can use Qwen3-8B, which can be trained in one go. Figure 1 Hybrid semantic pre-training specifically involves fusing all the corpora to form a pre-training dataset. D PT Continuous pre-training of large language models.

[0036] The goal of this stage is to enable the model to absorb the general knowledge and multi-level reasoning patterns of HLS in the field of design space exploration, allowing it to capture the core semantics and impact of hardware optimization strategies. Specifically, each corpus entry can be segmented into a sequence optimization objective. x =( t 1, t 2,…, t T ), LLM parameters θ The loss function for training a large language model in one iteration is calculated by minimizing the negative log-likelihood on the dataset: ; The purpose of this formula is to measure the accuracy of the model's predictions: the closer the model's predictions are to the real corpus, the smaller the loss value calculated by the formula. The goal of the entire training process is to minimize this loss value by continuously adjusting the model parameters.

[0037] In the formula, The overall loss of the model in one training phase is the objective that needs to be minimized. This means calculating the average loss over all corpora in the dataset to ensure the model performs well across all knowledge sets. This means the model is based on the content above ( ,Right now t j The previous word successfully predicted the next correct word. tj Ability score, used to evaluate single-step prediction performance. T The number of lexical units. This objective is achieved by training the model on a given set of previous lexical units. Predicting each lexical unit within context enables it to learn the syntax and logic optimized by the HLS design. This hybrid paradigm of data generation and model training allows large language models to internalize the reasoning patterns of the optimized design system, thus laying the foundation for one-time generation of Pareto frontiers.

[0038] Step 3: Based on the Pareto frontier inference corpus, generate input-output pairs and use the input-output pairs to perform secondary training on the large language model LLM1 to obtain the large language model LLM2. The secondary training is used to enable the large language model to master the configuration tuple of output optimization instructions according to the input instructions. The optimization instructions are the adjustable instructions in HLS used to control the hardware microarchitecture of code generation. It should be noted that the secondary training here refers to... Figure 1 In instruction-response alignment training, to enable the model to output in a specific format, it is necessary to obtain input-output pairs from the Pareto Frontier Inference Corpus and construct an instruction fine-tuning dataset. D SFT ; where the input instruction in the input / output pair I This includes the code and design space corresponding to the HLS design. The output Ω is a sequence of answers in a specific format, which is mainly composed of two parts: a chain of thought text that imitates the analysis of a hardware optimization expert (here, the impact of key HLS optimization instructions such as loop pipeline instructions, loop unroll factor setting instructions, and array partitioning on the quality of the results will be emphasized) and multiple structured optimization instruction configuration tuples (these tuples adopt the feature vector form of optimization instructions and can be seamlessly parsed by subsequent processes).

[0039] The goal of this phase is to further optimize the LLM parameters after one training iteration. θ To adapt it to input instructions I The structure of the output Ω: ; The above describes the instructions used to fine-tune the loss function during this second training iteration. Its core function is to "shape the behavior" of the model, forcing it to learn "according to..." I The model generates a question-and-answer pattern called "Ω". When the answer generated by the model does not match the standard answer, the loss value increases, thereby driving the model to adjust its parameters.

[0040] In the formula, This represents the total loss of the model during the instruction fine-tuning phase. This represents the average loss calculated over all input-output pairs in the dataset. Indicates that given a complete input instruction I and the generated partial output Under these conditions, the model can correctly predict the next standard answer Ω. j The probability is given by |Ω|, where |Ω| represents the total number of lexical units in Ω.

[0041] Through this training phase, the model learns to "think before it acts" during optimization and outputs the final decision in a format that can be quickly parsed by subsequent processes, thereby achieving zero-conversion optimization.

[0042] Through instruction-response alignment training, the model can understand and respond to the user's optimization intent expressed in natural language, providing a cue word interface that allows for customization of optimization orientation based on specific hardware resource tolerances. Users can easily guide the model to generate performance-first, resource-first, or multi-objective trade-off HLS designs, achieving precise adaptation to cross-domain accelerator customization needs. This not only significantly reduces the professional barriers to hardware optimization, enabling developers without hardware backgrounds to participate efficiently in HLS design, but also, through the embedding of user intent throughout the entire process, reshapes the flexibility and controllability of design space exploration, providing cross-domain hardware designers with a simple and efficient intelligent collaborative optimization paradigm.

[0043] Step 4: Generate preference pairs based on the Pareto front inference corpus, and use the preference pairs to train the large language model LLM2 three times to obtain the final large language model LLM3; wherein, the three training sessions are used to make the large language model tend to generate the optimized instruction configuration tuples corresponding to the Pareto front.

[0044] It should be noted that the three training sessions were... Figure 1 In preference alignment training, to enable the trained model to generate higher-quality solutions, preference pairs need to be obtained from the Pareto Frontier Inference Corpus, thus constructing a preference dataset. D DPO Among them, preference pairs include corresponding input instructions. I The optimization instruction configuration tuple Ω corresponding to the Pareto front obtained by dissimilarity sampling w And the optimized instruction configuration tuple Ω obtained by random sampling l .

[0045] Preference alignment training by always prioritizing Ω w Instead of Ω l This allows the model to internalize the deep connections and features of the Pareto front. Here, the model obtained after instruction-response alignment training is used. As a benchmark to mitigate catastrophic forgetting: ; The core function of this formula lies in its inclusion of Ω. w and Ωl The model is further optimized using the preference data. This function encodes the preference criterion for high-quality solutions into the model parameters by maximizing the relative probability of the model generating a better solution versus a suboptimal solution, making the model more inclined to generate better optimization instruction configuration tuples during subsequent inference.

[0046] In the formula, This represents the total loss of the model across three training phases. This indicates that for all "" in the dataset I -Ω w -Ω l "The average loss calculated from the preference over the sample, Refers to the large language model currently being trained. Given input I Under the conditions, Ω is generated w The probability, Reference model as a benchmark (i.e., LLM2), generating Ω w The probability, and Similarly, Ω is generated to represent the current model and the reference model, respectively. l The probability, β To control the strength of the preference signal, σ The activation function is Ω. Preference alignment training maximizes the model's affinity for Ω. w Relative to Ω l The probability advantage allows the preference for "Pareto optimality" to be internalized into the model parameters, enabling it to make more intelligent choices during exploration.

[0047] By constructing a Pareto front inference corpus through dissimilarity sampling and combining it with preference alignment training, the model is able to better explore and cover multi-objective design spaces. Compared with traditional methods, this model can generate more comprehensive and concave Pareto fronts, meaning it can not only find near-optimal solutions but also ensure that these solutions provide a wider and more even trade-off between objectives such as performance and resource utilization. This provides designers with richer and more insightful design options to meet the complex trade-offs required in different application scenarios.

[0048] Steps 2-4 constitute the hierarchical training phase. First, all corpus content is merged to perform hybrid semantic pre-training on the large language model (Qwen3-8B). The goal of this stage is to enable the trained large language model to capture the core semantics and impact of hardware optimization strategies and learn how to allocate instruction configurations according to user-specified goals (such as performance priority or resource priority). Next, in the instruction-response alignment training phase, instruction-response question-answer pairs are extracted from the Pareto frontier inference corpus, and supervised fine-tuning is performed on the pre-trained model to align instructions. This method transfers explicit reasoning patterns to the pre-trained LLM model, significantly improving its adaptability to HLS design space exploration tasks, while enabling the LLM to achieve zero-transformation optimization by outputting instructions through standardized templates. Finally, a preference dataset needs to be extracted from the Pareto Frontier Inference Corpus. Instruction configuration combinations obtained through dissimilarity sampling are used as "positive samples," while those obtained through random sampling are used as "negative samples." Preference alignment training is then performed on this preference dataset using direct preference optimization. This allows the fine-tuned model to identify better optimization strategies from suboptimal ones, resulting in the final large language model. Figure 1 The expert model HLS-DSE in the text.

[0049] After the above three training steps, the large language model LLM3 is finally obtained. Through this phased and targeted training, the semantics of HLS-optimized instruction configuration, instruction scheduling capabilities, and Pareto frontier exploration preferences are gradually injected into the large language model.

[0050] The three-layer progressive training method employed (hybrid semantic pre-training, instruction-response alignment training, and preference alignment training) significantly enhances the model's generalization ability, result quality, and exploration efficiency. By training on domain-specific corpora, this method enables large language models to gain a deeper understanding of the complex relationship between optimized instruction configuration and result quality information, thereby discovering designs with superior result quality (closer to the true Pareto front) with fewer exploration attempts (comprehensive evaluation attempts). This is due to the model internalizing general hardware optimization principles and ideas, rather than simply memorizing training data, allowing it to discover a more comprehensive and concave set of designs that are closer to the true Pareto front with a smaller exploration budget. Therefore, this method can effectively generalize to complex designs with different structures outside the training distribution and to higher-dimensional optimization target spaces.

[0051] The large speech model trained using a three-layer progressive method exhibits superior performance and generalization ability in multi-objective optimization scenarios. Not only does it ensure high fidelity of the explored Pareto front through a quantitative verification mechanism in a two-dimensional objective space (performance and resource utilization), but to evaluate its generalization ability in higher-dimensional multi-objective optimization, the method successfully extends the objective function, introducing metrics such as power consumption and critical path, while maintaining robust performance. This demonstrates that the method can integrate multi-dimensional quantitative evaluation and visualization analysis of the quality of HLS design results, accurately anchoring the actual performance of the optimized design before actual hardware implementation. This forward-looking verification based on quantitative feedback establishes a strong correlation between the optimization results and the final hardware implementation characteristics, providing robust support for design optimization decisions and further proving that the model infers through learned optimization expertise rather than simple memorization.

[0052] The above method constructs an HLS knowledge corpus, a result quality backward reasoning corpus, an instruction scheduling forward reasoning corpus, and a Pareto front reasoning corpus. Based on the constructed corpus, a large language model is trained in three progressive layers. This transforms the large language model from a simple instruction generator into a complete optimization reasoning capability, encompassing diagnosing HLS design bottlenecks, analyzing the impact of result quality, formulating fine-grained instruction scheduling strategies, and conducting macro-level Pareto front exploration planning and multi-objective trade-offs. This enables the large language model to more deeply understand the complex relationship between optimized instruction configuration and result quality information, and to perform intelligent reasoning based on an understanding of HLS optimization strategies.

[0053] The aforementioned large language model, specifically trained for domain-adaptive training in HLS design space exploration, achieves performance exceeding that of large general-purpose LLMs at a smaller scale through refined domain-adaptive training. This means that in practical deployments, superior HLS optimization results can be obtained without relying on extremely large general-purpose LLMs, thereby reducing computational resource requirements and deployment costs.

[0054] See Figure 3 , Figure 3 This is a block diagram of a large language model training device provided in an embodiment of this application. Specifically, it is a virtual device that can be loaded and executed by a computer device, which may include the aforementioned training device. Figure 3 The apparatus may include a corpus construction module, a primary training module, a secondary training module, and a tertiary training module. When used to execute the aforementioned large language model training method, it can: The corpus construction module, based on the known design space, constructs an HLS knowledge corpus, a result quality backward reasoning corpus, an instruction scheduling forward reasoning corpus, and a Pareto front reasoning corpus; where the design space is a configuration list of optimization instructions.

[0055] The first training module uses corpora from all corpora to train the large language model once, resulting in the large language model LLM1; this first training is used to enable the large language model to master the syntax and logic optimized by HLS design.

[0056] The secondary training module generates input-output pairs based on the Pareto frontier inference corpus, and uses these input-output pairs to perform secondary training on the large language model LLM1 to obtain the large language model LLM2. The secondary training is used to enable the large language model to learn to output optimized instruction configuration tuples based on input instructions.

[0057] The three training modules generate preference pairs based on the Pareto front inference corpus, and use these preference pairs to train the large language model LLM2 three times to obtain the final large language model LLM3. The three training sessions are used to make the large language model tend to generate optimized instruction configuration tuples corresponding to the Pareto front.

[0058] The aforementioned device constructs an HLS knowledge corpus, a result quality backward reasoning corpus, an instruction scheduling forward reasoning corpus, and a Pareto front reasoning corpus. Based on the constructed corpus, it performs three-layer progressive training on a large language model. This transforms the large language model from a simple instruction generator into a complete optimization reasoning capability, encompassing diagnosing HLS design bottlenecks, analyzing the impact of result quality, formulating fine-grained instruction scheduling strategies, and conducting macro-level Pareto front exploration planning and multi-objective trade-offs. This enables the large language model to gain a deeper understanding of the complex relationship between optimized instruction configuration and result quality information, allowing for intelligent reasoning based on an understanding of HLS optimization strategies.

[0059] See Figure 4 , Figure 4 This is a flowchart of an HLS design space exploration method provided in an embodiment of this application. This method is an application of the above-mentioned trained model. This method can be executed by an exploration device, which is similar to the training device and will not be described in detail here. The HLS design space exploration method may include at least the following steps: S1) Extract code structure features from the initial HLS design and generate a design space based on the extracted code structure features; wherein, the design space is a configuration list of optimization instructions.

[0060] It's worth noting that a feature extraction module can parse the initial HLS design code and perform a comprehensive static analysis. This analysis aims to accurately identify potential performance bottlenecks in the design, such as deeply nested loops, large-scale array access patterns, or complex data dependencies. Simultaneously, it extracts and constructs a list containing all valid and configurable optimization instructions, thereby defining the operable design space. This stage can also incorporate intelligent pruning strategies, such as eliminating overly parallelized schemes to ensure synthesizable design, or limiting the expansion of outer loops to meet specific resource constraints. These strategies work together to effectively compress the design space while maximizing the preservation of potential Pareto optimal design points.

[0061] S2) Input the code and design space of the initial HLS design into the above large language model to obtain the optimization instruction configuration tuple. Based on the optimization instruction configuration tuple, generate the optimized HLS design.

[0062] It should be noted that the code of the initial HLS design and the determined effective design space are used as input to activate the hierarchically trained expert model HLS-DSE to perform zero-transformation optimization.

[0063] This expert model first diagnoses the performance bottlenecks of the current design based on the input design content, such as through detailed analysis of circular dependencies, data access patterns, and critical paths. Then, it performs instruction scheduling and predicts the quality of the results these instructions may produce. This prediction of result quality serves as feedback to iteratively optimize the initially generated instruction configuration, ultimately producing diverse and high-quality combinations of optimized instructions.

[0064] This zero-transformation optimization paradigm decouples the optimization inference capabilities of a large language model from the syntactic and placement complexity of HLS instructions. Instead of directly refactoring the source code, the model outputs structured optimization instruction configuration tuples. This mechanism eliminates problems such as syntax errors, instruction misalignment, or instruction conflicts caused by direct code editing by the LLM, significantly reducing the HLS synthesis failure rate. It allows the large language model to focus on high-level optimization strategy decisions rather than low-level code modifications, thus ensuring the stability and reliability of the DSE process.

[0065] It's important to note that the model input can also include user requirements (i.e., performance-first, resource-first, and multi-objective tradeoffs). The expert model can automatically identify and adopt three main optimization strategies to generate instruction configurations based on user needs: If the goal is performance-first, the model maximizes the loop unrolling factor and pipeline depth, and employs a high-parallelism array partitioning strategy to improve memory access bandwidth; if the goal is resource-first, it minimizes the loop unrolling factor and disables non-critical pipelines, while selecting block partitioning or loop partitioning to reduce storage consumption; for multi-objective tradeoffs, the model dynamically balances the unrolling factor and partition type to ensure effective control of hardware resource consumption while optimizing the critical path. Ultimately, the model outputs tuples containing optimization strategy inferences and structured feature vectors. Each tuple fully contains the parameters and combinations of the optimized instruction configuration, specifically recording the pipeline on / off states and unrolling factor values ​​of all loops in the initial HLS design, as well as the partition type, operational dimension, and partition factor values ​​of all arrays.

[0066] It's important to note that the optimized instruction configuration tuples generated by the model undergo an automatic validation and compliance correction process. The system uses regular expression matching to ensure the output tuple format is parsable; if invalid parameters exceeding the preset design space are found in the tuples, these parameter values ​​are automatically reset to their default settings. The corrected instruction configuration is then sent to an automatic optimization instruction application tool. The core responsibility of this tool is to build a TCL script: it precisely maps each configuration tuple to a series of corresponding optimization instructions and embeds them into the original HLS design file, thereby optimizing the HLS design. This specifically covers loop pipeline instructions, loop unrolling factor setting instructions, and array partition declaration instructions. Finally, the generated TCL script is submitted to the Vitis HLS synthesis tool to obtain a detailed quality report of the optimized design, including key information such as performance metrics (e.g., latency, throughput) and resource utilization (e.g., BRAM, DSP, FF, LUT). Using these quantitative metrics, a mapping is performed in a two-dimensional target space composed of performance and resource utilization, effectively constructing the Pareto front.

[0067] The above method utilizes a domain-specific large language model that is specialized in HLS design space exploration tasks to efficiently locate Pareto optimal designs from a vast design space, achieving efficient and intelligent automated high-level integrated design optimization to meet the design needs of different optimization orientations.

[0068] See Figure 5 , Figure 5 This is a block diagram of an HLS-designed space exploration device provided in an embodiment of this application. Specifically, it is a virtual device that can be loaded and executed by a computer device, which may include the aforementioned exploration device. Figure 5The apparatus may include a design space generation module and an HLS design generation module, which, when executing the aforementioned HLS design space exploration method, can: The design space generation module extracts code structure features from the initial HLS design and generates a design space based on the extracted code structure features; the design space is a configuration list of optimization instructions.

[0069] The HLS design generation module inputs the code and design space of the initial HLS design into the large language model mentioned above to obtain the optimization instruction configuration tuple. Based on the optimization instruction configuration tuple, it generates the optimized HLS design.

[0070] The aforementioned device utilizes a domain-specific large language model that is specialized in HLS design space exploration tasks to efficiently locate Pareto optimal designs from a vast design space, achieving efficient and intelligent automated high-level integrated design optimization to meet the design needs of different optimization orientations.

[0071] This application also relates to a computer-readable storage medium that stores one or more programs, the one or more programs including instructions that, when executed by a computing device, cause the computing device to perform a large language model training method or an HLS design space exploration method.

[0072] Based on the same technical solution, this application also relates to a computer device, including one or more processors and one or more memories, wherein one or more programs are stored in one or more memories and configured to be executed by one or more processors, and the one or more programs include instructions for performing a large language model training method or an HLS design space exploration method.

[0073] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0074] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0075] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0076] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0077] The above are merely embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of the claims of the present invention pending approval.

Claims

1. A method for training large language models, characterized in that, include: Based on the known design space, we construct an HLS knowledge corpus, a result quality backward reasoning corpus, an instruction scheduling forward reasoning corpus, and a Pareto front reasoning corpus; where the design space is a list of configurations for optimizing instructions. The large language model is trained once using corpora from all corpora to obtain the large language model LLM1; the training once is used to enable the large language model to master the syntax and logic optimized by HLS design; Based on the Pareto frontier inference corpus, input-output pairs are generated, and the input-output pairs are used to perform secondary training on the large language model LLM1 to obtain the large language model LLM2. The secondary training is used to enable the large language model to master the configuration tuple of output optimization instructions according to the input instructions. The optimization instructions are the adjustable instructions in HLS used to control the hardware microarchitecture of code generation. Based on the Pareto front inference corpus, preference pairs are generated, and the large language model LLM2 is trained three times using these preference pairs to obtain the final large language model LLM3. The three training sessions are used to make the large language model tend to generate optimized instruction configuration tuples corresponding to the Pareto front.

2. The method according to claim 1, characterized in that, The corpus in the HLS knowledge corpus includes the semantic definition of optimization instructions, the parameter description of optimization instructions, the application mode of optimization instructions, and the association instances of optimization instruction configuration and corresponding code. The corpus for reverse reasoning of results quality includes knowledge of the causal relationship between optimized instruction configuration and HLS design quality indicators; The corpus of instruction scheduling forward inference includes the performance bottlenecks of HLS design, as well as the correlation between the desired optimization goal and the configuration of optimization instructions applied to achieve the optimization goal; The Pareto Front Inference Corpus contains Pareto Fronts and inferences generated based on Pareto Fronts using a general large language model.

3. The method according to claim 1 or 2, characterized in that, The Pareto fronts in the Pareto front inference corpus are obtained based on dissimilarity sampling. The dissimilarity sampling process is as follows: A fast non-dominated sorting method is used to obtain the Pareto front from the known design space and construct an initial Pareto front pool. A clustering algorithm is used to cluster the Pareto fronts in the initial Pareto front pool; Select a representative Pareto front from each cluster and use it as the Pareto front in the Pareto front inference corpus; the representative Pareto front is the Pareto front within the cluster that is closest to its centroid.

4. The method according to claim 3, characterized in that, The preference pair includes the corresponding input instructions, the optimization instruction configuration tuple corresponding to the Pareto front obtained by dissimilarity sampling, and the optimization instruction configuration tuple obtained by random sampling; the input instructions include the code and design space corresponding to the HLS design.

5. The method according to claim 1, characterized in that, The input instructions in the input-output pair include the code and design space corresponding to the HLS design, and the output includes a chain of thought text that mimics the analysis of a hardware optimization expert and multiple structured optimization instruction configuration tuples.

6. A large language model training device, characterized in that, include: The corpus construction module, based on the known design space, constructs an HLS knowledge corpus, a result quality backward reasoning corpus, an instruction scheduling forward reasoning corpus, and a Pareto front reasoning corpus; where the design space is a configuration list of optimization instructions; One training module uses corpora from all corpora to train the large language model once, resulting in the large language model LLM1; this training is used to enable the large language model to master the syntax and logic optimized by HLS design. The secondary training module generates input-output pairs based on the Pareto frontier inference corpus, and uses the input-output pairs to perform secondary training on the large language model LLM1 to obtain the large language model LLM2. The secondary training is used to enable the large language model to learn to output optimized instruction configuration tuples based on input instructions. The three training modules generate preference pairs based on the Pareto front inference corpus, and use these preference pairs to train the large language model LLM2 three times to obtain the final large language model LLM3. The three training sessions are used to make the large language model tend to generate optimized instruction configuration tuples corresponding to the Pareto front.

7. The HLS design space exploration method, characterized in that, include: The code structure features of the initial HLS design are extracted, and a design space is generated based on the extracted code structure features; wherein, the design space is a configuration list of optimization instructions; Input the code and design space of the initial HLS design into the large language model to obtain the optimized instruction configuration tuple. Based on the optimized instruction configuration tuple, generate the optimized HLS design. The large language model is a model trained by any of the methods in claims 1 to 5.

8. The HLS space exploration device is characterized by, include: The design space generation module extracts code structure features from the initial HLS design and generates a design space based on the extracted code structure features; the design space is a configuration list of optimization instructions. The HLS design generation module inputs the code and design space of the initial HLS design into the large language model to obtain the optimized instruction configuration tuple, and generates the optimized HLS design based on the optimized instruction configuration tuple; wherein, the large language model is the model trained by any of the methods in claims 1 to 5.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores one or more programs, the one or more programs including instructions that, when executed by a computing device, cause the computing device to perform the method of any one of claims 1 to 5 and 7.

10. A computer device, characterized in that, include: One or more processors and one or more memories, one or more programs stored in one or more memories and configured to be executed by one or more processors, the one or more programs including instructions for performing the method of any one of claims 1 to 5, 7.

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