Photoelectric conversion interface device and control system

Abstract

The invention provides a photoelectric conversion interface device and a control system. The photoelectric conversion interface device comprises a first media independent interface, a PHY chip and a photoelectric conversion unit, the first media independent interface is used for receiving a first MII signal from the outside of the device and sending a second MII signal in the photoelectric conversion interface device, the PHY chip is connected with the first media independent interface and is used for carrying out physical layer coding and parallel-to-serial conversion on the MII signal to generate a first electric signal, and the first electric signal is sent to the first media independent interface. The second MII module is used for performing clock data recovery, serial-to-parallel conversion and decoding on the second electric signal to obtain a corresponding second MII signal; and the photoelectric conversion unit comprises a first optical fiber interface, is directly or indirectly connected with the PHY chip and is used for performing photoelectric conversion. Complex hardware does not need to be designed for a special communication protocol, the communication rate is improved by arranging the PHY chip, and a universal MII / RMII interface is provided on the controller side, so that a high-speed optical communication link based on a standard Ethernet physical layer can be established between the controller and the driver.

Description

Technical Field

[0001] This invention belongs to the field of automation control technology, specifically relating to a photoelectric conversion interface device and control system. Background Technology

[0002] In industrial control systems, photoelectric conversion modules based on dedicated electrical interfaces such as LVDS have solved the anti-interference problem through optical fiber. However, due to the lack of coordinated optimization between the front-end interface and the back-end optical channel at the protocol and physical layer, the communication rate is limited by the original electrical interface standard and cannot break through its upper limit (such as 20Mbps). This results in a waste of high-speed optical communication bandwidth, and therefore the real-time performance cannot achieve a qualitative leap, which restricts the development of motion control systems towards high-performance indicators.

[0003] Therefore, in order to address the aforementioned technical problems, it is necessary to provide a photoelectric conversion interface device and a control system. Summary of the Invention

[0004] The purpose of this invention is to provide a photoelectric conversion interface device and control system, which can improve the communication rate by setting a PHY chip, and does not require the design of complex hardware for a dedicated communication protocol. It only needs to provide a universal MII / RMII interface on the controller side to establish a high-speed optical communication link based on the standard Ethernet physical layer between the controller and the driver.

[0005] To achieve the above objectives, a specific embodiment of the present invention provides the following technical solution:

[0006] A photoelectric conversion interface device, comprising a first media-independent interface, a PHY chip, and a photoelectric conversion unit:

[0007] The first media independent interface is used to receive a first MII signal from outside the optoelectronic conversion interface device and to send a second MII signal from inside the optoelectronic conversion interface device. The PHY chip is connected to the first media independent interface and is used to generate a first electrical signal by performing physical layer encoding and parallel-to-serial conversion on the first MII signal, and to perform clock data recovery, serial-to-parallel conversion and decoding on the second electrical signal to obtain the corresponding second MII signal.

[0008] The photoelectric conversion unit includes a first optical fiber interface, and the photoelectric conversion unit is directly or indirectly connected to the PHY chip for photoelectric conversion.

[0009] In one or more embodiments of the present invention, the first optical fiber interface integrates an optical module, which is used to realize the mutual conversion between optical signals and electrical signals;

[0010] The photoelectric conversion unit further includes an optical module driving circuit, which is connected between the first optical fiber interface and the PHY chip, and is used to generate a first driving signal based on a first electrical signal. The first driving signal is used to drive the optical module.

[0011] In one or more embodiments of the present invention, the first optical fiber interface includes a plastic optical fiber interface, and the first optical fiber interface supports a rate of 100~250Mbps.

[0012] In one or more embodiments of the present invention, the photoelectric conversion interface device further includes a pulse transformer connected between the PHY chip and the photoelectric conversion unit for signal coupling, impedance matching and electrical isolation.

[0013] In one or more embodiments of the present invention, the photoelectric conversion interface device further includes a microprocessor unit, which is connected between the first media independent interface and the PHY chip, and is used to initialize and configure the PHY chip, monitor the operating status, and implement protocol adaptation functions.

[0014] The microprocessor unit runs a protocol adaptation layer, which is used to encapsulate raw data frames in serial bus format into Ethernet data frames in real time, and to reassemble Ethernet data frames into raw data frames in serial bus format in real time.

[0015] In one or more embodiments of the present invention, the photoelectric conversion interface device further includes a power supply circuit for providing isolated power.

[0016] Another aspect of the present invention provides a control system, including a photoelectric conversion interface device, a controller, and a driver, wherein the controller transmits electrical signals to the photoelectric conversion interface device, and the driver transmits optical signals to the photoelectric conversion interface device.

[0017] In one or more embodiments of the present invention, the controller includes a CPU and a second media-independent interface;

[0018] The CPU is used to encapsulate control instructions based on a preset protocol;

[0019] The second media-independent interface is communicatively connected to the first media-independent interface.

[0020] In one or more embodiments of the present invention, the preset protocol includes an Industrial Ethernet protocol or a User Datagram Protocol (UDP), wherein the data frame structure of the UDP includes a short frame header, a command / status field, a current / position data payload, and a CRC checksum.

[0021] In one or more embodiments of the present invention, the driver includes a second optical fiber interface, which is communicatively connected to the first optical fiber interface.

[0022] Compared with existing technologies, the photoelectric conversion interface device and control system of the present invention improves the communication rate by setting a PHY chip, providing a foundation for transmitting more complex control commands and high-precision feedback data. The development of the present invention requires very little effort, and the controller side only needs to provide a general MII / RMII interface, without the need to design complex hardware for dedicated communication protocols, which greatly reduces the cost and difficulty of upgrading existing systems. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a schematic diagram of the control system in one embodiment of the present invention. Detailed Implementation

[0025] To enable those skilled in the art to better understand the technical solutions in this disclosure, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this disclosure.

[0026] As mentioned in the background section, in industrial motion control systems, real-time and reliable communication between the controller and servo drive is crucial for ensuring system performance. The evolution of its technical solutions has mainly gone through the following stages:

[0027] 1. Analog / Parallel PWM Interface: Early systems commonly used analog voltage or parallel PWM signals for control. A typical interface usually includes multiple PWM signals, enable signals, alarm signals, and analog / digital feedback signals. The main drawbacks of analog / parallel PWM interfaces include: susceptibility to interference, especially during long-distance transmission of analog and multiple digital signals, making them highly susceptible to electromagnetic interference, leading to decreased control accuracy or even malfunctions; complex wiring: requiring numerous cables, resulting in bulky interface connectors and inconvenient system integration and maintenance; poor upgradeability: the control algorithm is entirely dependent on the controller, with the driver merely acting as a "power amplifier," failing to realize the performance potential of modern intelligent drivers; and communication speed is limited by the parallel transmission method, creating a bottleneck.

[0028] 2. Serial Communication Interface: Based on a serial communication interface (such as RS485, CANopen, etc.), the controller only needs to send high-level commands (such as target current, position), while coordinate transformation (such as Clarke / Park transformation), current loop PID calculations, etc., are handled by the driver. This brings flexibility to algorithm upgrades, but electrical serial communication itself has the following limitations:

[0029] Speed ​​limit: Serial communication based on electrical standards such as RS485 is usually limited to a reliable communication rate of 10Mbps to 20Mbps in harsh industrial environments, which is difficult to meet higher bandwidth requirements.

[0030] Complex electrical isolation: To achieve electrical isolation between the controller and the driver, complex isolation circuits are required, which increases cost and size.

[0031] Distance versus speed conflict: As communication distance increases, the communication rate needs to be further reduced to ensure signal integrity.

[0032] 3. Initial Optical Communication Applications: To address interference issues, the industry began adopting fiber optic communication. A common approach is to use electrical serial interfaces (such as LVDS) to drive optical modules, achieving "electrical-optical-electrical" conversion. However, this method typically involves only a simple replacement of the physical medium; the communication protocol and underlying encoding remain unchanged. Its core bottlenecks include: low protocol efficiency (the original serial communication protocol is not designed for high-speed optical channels), low data encapsulation efficiency, and high protocol overhead. The front-end still uses traditional electrical interfaces (such as LVDS), whose speed is limited by the design of the original controller and driver, failing to fully utilize the bandwidth potential of optical fibers (especially low-cost plastic POF) reaching hundreds of megabits per second or even higher. This results in limited overall system performance improvement, making it a "pseudo-high-speed" optical communication.

[0033] To address the aforementioned technical issues, this disclosure provides a photoelectric conversion interface device for industrial motion control systems. This device connects an industrial controller with an MII (Media Independent Interface) or RMII (Reduced Media Independent Interface) interface to a driver with an optical communication interface, enabling the communication rate to be increased to 100-250 Mbps using optical fiber transmission media.

[0034] The photoelectric conversion interface device specifically includes: a first media-independent interface, a PHY chip, and a photoelectric conversion unit.

[0035] The first media independent interface is used to receive a first MII signal from outside the optoelectronic conversion interface device and to send a second MII signal from inside the optoelectronic conversion interface device. The PHY chip is connected to the first media independent interface and is used to generate a first electrical signal by physical layer encoding and parallel-to-serial conversion of the first MII signal, and to obtain the corresponding second MII signal by clock data recovery, serial-to-parallel conversion and decoding of the second electrical signal.

[0036] The photoelectric conversion unit includes a first optical fiber interface. The photoelectric conversion unit is directly or indirectly connected to the PHY chip for photoelectric conversion.

[0037] It is understandable that the PHY chip supports 10 / 100Mbps adaptive or fixed 100Mbps rate. Therefore, the communication rate of the photoelectric conversion interface device disclosed herein is increased from the traditional 20Mbps to 100Mbps, and it has the ability to be upgraded to 250Mbps, providing a basis for transmitting more complex control commands and high-precision feedback data.

[0038] The PHY chip incorporates equalization, filtering, and clock recovery technologies, further ensuring signal integrity in harsh industrial environments.

[0039] The controller only needs to provide a general MII / RMII interface, eliminating the need to design complex hardware for dedicated communication protocols. This greatly reduces the cost and difficulty of upgrading existing systems, and the architecture also reserves space for future integration of more advanced network functions.

[0040] In one embodiment, the first optical fiber interface integrates an optical module for converting optical signals to electrical signals. The photoelectric conversion unit further includes an optical module driving circuit connected between the first optical fiber interface and the PHY chip. This circuit generates a first driving signal based on a first electrical signal, which drives the optical module.

[0041] In one embodiment, the first optical fiber interface includes a plastic optical fiber interface, and the first optical fiber interface supports a rate of 100~250Mbps.

[0042] In one embodiment, the photoelectric conversion interface device further includes a pulse transformer connected between the PHY chip and the photoelectric conversion unit to achieve signal coupling, impedance matching and electrical isolation.

[0043] In one embodiment, the photoelectric conversion interface device further includes a microprocessor unit connected between the first media independent interface and the PHY chip, which is used to initialize and configure the PHY chip, monitor its operating status, and implement protocol adaptation functions.

[0044] The microprocessor unit runs a protocol adaptation layer, which is used to encapsulate raw data frames in serial bus format into Ethernet data frames in real time, and to reassemble Ethernet data frames into raw data frames in serial bus format in real time.

[0045] In one embodiment, the photoelectric conversion interface device further includes a power supply circuit for providing isolated power.

[0046] This disclosure also provides a control system, including the aforementioned photoelectric conversion interface device, controller, and driver, wherein the controller transmits electrical signals to the photoelectric conversion interface device, and the driver transmits optical signals to the photoelectric conversion interface device.

[0047] In one embodiment, the controller includes a CPU and a second media-independent interface. The CPU is used to encapsulate control instructions based on a preset protocol, and the second media-independent interface is communicatively connected to the first media-independent interface.

[0048] Specifically, the controller encapsulates motion control commands (such as target torque current Id / Iq, position commands, PID parameters, etc.) according to the Industrial Ethernet protocol or a custom optimized user datagram protocol through its built-in or external Ethernet MAC controller, and sends them out through a second media independent interface.

[0049] In one embodiment, the preset protocol includes the Industrial Ethernet Protocol or the User Datagram Protocol (UDP). The data frame structure of the UDP includes a short frame header, a command / status field, a current / position data payload, and a CRC checksum.

[0050] In one embodiment, the driver includes a second fiber optic interface, which is communicatively connected to the first fiber optic interface. It is understood that the driver transmits feedback information (such as actual position, actual current, alarm status, etc.) to the photoelectric conversion interface device via the second fiber optic interface.

[0051] The present invention will be further described below with reference to specific embodiments.

[0052] Example 1:

[0053] like Figure 1As shown, this embodiment provides a control system, including: a controller 20, a driver 30, and a photoelectric conversion interface device 10 connected between the controller 20 and the driver 30. Specifically, the photoelectric conversion interface device 10 includes a first media-independent interface 12, a microprocessor unit 13, a PHY chip 11, a pulse transformer 14, and a photoelectric conversion unit 15.

[0054] The controller 20 includes a CPU and a second media independent interface 22. The CPU is used to encapsulate control instructions based on a preset protocol. In this embodiment, the CPU contains an Ethernet MAC controller 20. The second media independent interface 22 is communicatively connected to the first media independent interface 12.

[0055] It is understood that the controller 20 in this embodiment only needs to provide a general MII / RMII interface, without the need to design complex hardware for a dedicated communication protocol, which greatly reduces the cost and difficulty of upgrading the existing system, and the architecture reserves space for future integration of more advanced network functions.

[0056] The first media independent interface 12 includes either a Media Independent Interface (MII) or a Reduced Media Independent Interface (RMII). The MII interface supports data transmission modes of 10 Mbit / s and 100 Mbit / s and includes a data interface and a management interface between the MAC and PHY. The MII interface requires 16 data and control signal pins, including clock signals used for sending and receiving data, transmit enable signals, data lines, carrier sense signals, and collision detection signals. The RMII interface is a simplified media independent interface with a significantly reduced number of signal lines compared to the MII interface, saving hardware resources. Similarly, the second media independent interface 22 also includes either an MII or an RMII interface.

[0057] Furthermore, the preset protocol includes the Industrial Ethernet protocol or a custom User Datagram Protocol (UDP). The UDP can be highly customized for optimization; in this embodiment, the UDP frame structure includes a short frame header, a command / status field, a current / position data payload, and a CRC checksum.

[0058] Furthermore, short frame headers are used to achieve fast synchronization;

[0059] By using compact command / status fields, bandwidth consumption is reduced and transmission latency is lowered.

[0060] High-precision current / position data loads can be used, with floating-point numbers to improve dynamic range or calibrated integers to improve calculation speed.

[0061] It employs an efficient CRC checksum to reduce data packet overhead while improving data reliability and error detection capabilities.

[0062] As the above analysis shows, by adopting a highly customizable User Datagram Protocol (UDP), protocol overhead is greatly reduced, ensuring that 100 Mbps bandwidth can be used for effective data transmission.

[0063] It is understood that the first media independent interface 12 is used to receive the first MII signal from the second media independent interface 22, and the microprocessor unit 13 (i.e., MCU) is connected between the first media independent interface 12 and the first side of the PHY chip 11, and is used to initialize and configure the PHY chip 11, monitor the operating status, and implement the protocol adaptation function.

[0064] Specifically, in this embodiment, the microprocessor unit 13 configures the PHY chip 11 through the SMI management interface to monitor the optical link status and bit error rate of the photoelectric conversion interface device 10.

[0065] The second side of the PHY chip 11 is provided with a medium-dependent interface (MDI), which is connected to the pulse transformer 14.

[0066] The PHY chip 11 is used to generate a first electrical signal by physical layer encoding and parallel-to-serial conversion of the first MII signal, and to perform clock data recovery, serial-to-parallel conversion and decoding of the second electrical signal to obtain the corresponding second MII signal.

[0067] The pulse transformer 14 is used to achieve signal coupling, impedance matching, and electrical isolation. It is understood that the pulse transformer 14 is well known in the prior art and therefore will not be described in detail herein; any known or unknown pulse transformer 14 may be used herein without limitation.

[0068] In this embodiment, the photoelectric conversion unit 15 is connected to the pulse transformer 14, and specifically includes a first optical fiber interface 152 and an optical module driving circuit 151. The first optical fiber interface 152 integrates an optical module, which is used to convert optical signals to electrical signals. Furthermore, the first optical fiber interface 152 serves as a physical interface for connecting optical fibers.

[0069] The optical module driving circuit 151 is connected to the first optical fiber interface 152 and is used to generate a first driving signal based on a first electrical signal. The first driving signal is used to drive the optical module.

[0070] It is understood that optical modules and optical module driver circuits 151 are well known in the prior art, and any known or unknown optical modules and optical module driver circuits 151, and circuits that realize photoelectric conversion, can be used here without restriction.

[0071] For example, the optical module driving circuit 151 in this embodiment includes a transmitting driving circuit and a receiving amplification circuit. The transmitting driving circuit is used to accurately and quickly convert the input electrical signal into a current signal to drive a laser (LD) or photodiode (PD), thereby generating a corresponding optical signal. The receiving amplification circuit is used to convert the optical signal from the optical cable into a weak current signal through a photodetector, and amplify and reshape it to restore it to an electrical signal.

[0072] Furthermore, in this embodiment, the optical module driving circuit 151 is externally connected to the first optical fiber interface 152. In other alternative embodiments, the optical module driving circuit 151 can be integrated inside the first optical fiber interface 152.

[0073] The driver 30 includes a second fiber optic interface 31, which is communicatively connected to the first fiber optic interface 152. In this embodiment, both the first fiber optic interface 152 and the second fiber optic interface 31 are plastic optical fiber (POF) interfaces, and the speeds of the first fiber optic interface 152 and the second fiber optic interface 31 support 100~250Mbps.

[0074] This embodiment optimizes the real-time performance of the electrical conversion interface device by running a protocol adaptation layer in the microprocessor unit 13. The protocol adaptation layer can reassemble and encapsulate raw data frames based on the traditional serial bus format sent by the controller 20 into more efficient Ethernet data frames in real time, and conversely, reassemble Ethernet data frames into raw data frames in the serial bus format in real time. This allows the controller 20 to enjoy the benefits of high-speed transmission even without significant changes to its software layer.

[0075] Furthermore, the photoelectric conversion interface device 10 in this embodiment also includes a power supply circuit for providing a stable isolated power supply for the aforementioned devices and circuits.

[0076] The workflow of the control system includes:

[0077] 1. Downlink transmission (from controller 20 to driver 30):

[0078] The controller 20 encapsulates motion control commands (such as target torque current Id / Iq, position commands, PID parameters, etc.) according to the industrial Ethernet protocol or a custom user datagram protocol through its built-in or external Ethernet MAC controller 20, and sends them through the second media independent interface 22.

[0079] It is understandable that the signal sent by the second media independent interface 22 is the first MII signal, which is an electrical signal.

[0080] The photoelectric conversion interface device 10 receives the first MII signal through its configured second media independent interface 22, and processes the first MII signal through the protocol adaptation layer running in the microprocessor unit 13. Specifically, this includes: encapsulating the original data frame in serial bus format into an Ethernet data frame in real time; and reassembling the Ethernet data frame into the original data frame in serial bus format in real time.

[0081] The PHY chip 11 receives the first MII signal processed by the microprocessor unit 13, performs physical layer encoding (e.g., 4B / 5B encoding) and parallel-to-serial conversion, and generates the first electrical signal to be transmitted on the cable (which can be understood as a differential signal).

[0082] After being isolated and coupled by the pulse transformer 14, the first electrical signal is converted into a corresponding optical signal by the photoelectric conversion unit 15 and transmitted to the second optical fiber interface 31 of the driver 30 through the first optical fiber interface 152.

[0083] 2. Uplink transmission (from driver 30 to controller 20):

[0084] The driver 30 sends feedback information (such as actual position, actual current, alarm status, etc.) to the first fiber optic interface 152 of the photoelectric conversion interface device 10 through its configured second fiber optic interface 31. It can be understood that the transmission between the first fiber optic interface 152 and the second fiber optic interface 31 is actually a corresponding optical signal. The optical module of the photoelectric conversion unit 15 converts this signal into a corresponding electrical signal, which is then amplified and shaped by the optical module drive circuit 151 to obtain the corresponding second electrical signal.

[0085] The second electrical signal passes through the pulse transformer 14 and is sent to the PHY chip 11 via the medium-dependent interface of the PHY chip 11. The PHY chip 11 performs clock data recovery, serial-to-parallel conversion and decoding on the second electrical signal to obtain the corresponding second MII signal.

[0086] The second MII signal is processed by the protocol adaptation layer running in the microprocessor unit 13, specifically including: reassembling the Ethernet data frame into a raw data frame in serial bus format in real time. Then, the processed second MII signal is transmitted to the controller 20 through the first media independent interface 12.

[0087] As can be seen from the above technical solutions, the present invention has the following beneficial effects:

[0088] This invention improves communication speed by setting up a PHY chip, providing a foundation for transmitting more complex control commands and high-precision feedback data;

[0089] The development of this invention requires very little effort. The controller side only needs to provide a general MII / RMII interface, without the need to design complex hardware for a dedicated communication protocol, which greatly reduces the cost and difficulty of upgrading existing systems.

[0090] By running a protocol adaptation layer within the microprocessor unit, the real-time performance of the electrical conversion interface device is optimized to the extreme. The protocol adaptation layer can reassemble and encapsulate raw data frames based on the traditional serial bus format sent by the controller into more efficient Ethernet data frames in real time, and conversely, reassemble Ethernet data frames into raw data frames in the serial bus format in real time. Even without significant changes to the controller's software layer, it can still enjoy the benefits of high-speed transmission.

[0091] By employing a highly customizable User Datagram Protocol (UDP), protocol overhead is greatly reduced, ensuring that 100 Mbps bandwidth can be used for effective data transmission.

[0092] It will be apparent to those skilled in the art that this disclosure is not limited to the details of the exemplary embodiments described above, and that this disclosure can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of this disclosure is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within this disclosure. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0093] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A photoelectric conversion interface device, characterized in that, The photoelectric conversion interface device includes a first media-independent interface, a PHY chip, and a photoelectric conversion unit: The first media independent interface is used to receive a first MII signal from outside the optoelectronic conversion interface device and to send a second MII signal from inside the optoelectronic conversion interface device. The PHY chip is connected to the first media independent interface and is used to generate a first electrical signal by performing physical layer encoding and parallel-to-serial conversion on the first MII signal, and to perform clock data recovery, serial-to-parallel conversion and decoding on the second electrical signal to obtain the corresponding second MII signal. The photoelectric conversion unit includes a first optical fiber interface, and the photoelectric conversion unit is directly or indirectly connected to the PHY chip for photoelectric conversion.

2. The photoelectric conversion interface device according to claim 1, characterized in that, The first optical fiber interface integrates an optical module, which is used to convert optical signals to electrical signals. The photoelectric conversion unit further includes an optical module driving circuit, which is connected between the first optical fiber interface and the PHY chip, and is used to generate a first driving signal based on a first electrical signal. The first driving signal is used to drive the optical module.

3. The photoelectric conversion interface device according to claim 1 or 2, characterized in that, The first optical fiber interface includes a plastic optical fiber interface, and the first optical fiber interface supports a speed of 100~250Mbps.

4. The photoelectric conversion interface device according to claim 1, characterized in that, The photoelectric conversion interface device also includes a pulse transformer, which is connected between the PHY chip and the photoelectric conversion unit to achieve signal coupling, impedance matching and electrical isolation.

5. The photoelectric conversion interface device according to claim 1, characterized in that, The photoelectric conversion interface device further includes a microprocessor unit, which is connected between the first media independent interface and the PHY chip, and is used to initialize and configure the PHY chip, monitor the operating status, and implement protocol adaptation functions. The microprocessor unit runs a protocol adaptation layer, which is used to encapsulate raw data frames in serial bus format into Ethernet data frames in real time, and to reassemble Ethernet data frames into raw data frames in serial bus format in real time.

6. The photoelectric conversion interface device according to claim 1, characterized in that, The photoelectric conversion interface device also includes a power supply circuit for providing isolated power.

7. A control system, characterized in that, The device includes a photoelectric conversion interface, a controller, and a driver as described in any one of claims 1 to 6, wherein the controller transmits electrical signals to the photoelectric conversion interface and the driver transmits optical signals to the photoelectric conversion interface.

8. The control system according to claim 7, characterized in that, The controller includes a CPU and a second media-independent interface; The CPU is used to encapsulate control instructions based on a preset protocol; The second media-independent interface is communicatively connected to the first media-independent interface.

9. The control system according to claim 8, characterized in that, The preset protocol includes the Industrial Ethernet Protocol or the User Datagram Protocol (UDP). The data frame structure of the UDP includes a short frame header, a command / status field, a current / position data payload, and a CRC checksum.

10. The control system according to claim 7, characterized in that, The driver includes a second optical fiber interface, which is communicatively connected to the first optical fiber interface.

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