Beam feedback system based on radio frequency direct sampling

The beam feedback system using direct radio frequency sampling detects and processes beam position signals, generates and amplifies feedback signals, solves the problem of beam instability in the storage ring, and improves beam stability and light source operation stability.

CN121604244BActive Publication Date: 2026-04-21SHANGHAI ADVANCED RES INST CHINESE ACADEMY OF SCI
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
SHANGHAI ADVANCED RES INST CHINESE ACADEMY OF SCI
Filing Date
2026-01-27
Publication Date
2026-04-21

AI Technical Summary

Technical Problem

When the electron beam moves in the storage ring, the beam trajectory becomes unstable due to factors such as the higher-order modes of the radio frequency cavity, the resistance wall impedance, the vacuum chamber, ion instability, and multi-beam coupling. This leads to increased emissivity, reduced beam lifetime, and affects the stability of the light source operation and the quality of light supply.

Method used

A beam feedback system based on direct radio frequency sampling is adopted, including a beam position detector, a summer, a front-end processing module, a feedback processor, and an amplification excitation module. By detecting the beam position signal, preprocessing, sampling, and amplifying it, a feedback signal is generated to suppress beam instability.

Benefits of technology

It effectively suppressed beam instability, improved beam stability and lifespan, and enhanced the operational stability and light supply quality of the light source.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to a beam feedback system based on radio frequency direct sampling, which comprises a beam position detector, a difference device, a front-end processing module, a feedback processor and an amplification excitation module connected in sequence, the beam position detector is used for detecting a position signal of each beam group of a beam, the difference device is used for determining a horizontal position signal, a vertical position signal and a longitudinal position signal of the beam group according to the position signal of the beam group, the front-end processing module performs front processing on each position signal of the beam group respectively, the feedback processor samples each position signal of the beam group after the front processing and generates a horizontal feedback signal, a vertical feedback signal and a longitudinal feedback signal of the beam group, and the amplification excitation module is used for amplifying each feedback signal of the beam group and applying the amplified feedback signals of the beam group to the beam group, so as to suppress the instability of the beam.
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Description

Technical Field

[0001] This invention relates to the field of accelerator beam diagnostics technology, and more specifically to a beam feedback system based on direct radio frequency sampling. Background Technology

[0002] When the electron beam moves within the storage ring, it is affected by unstable factors such as higher-order modes of the RF cavity, wall impedance, vacuum chamber, ion instability, and multi-beam coupling. These factors can lead to beam trajectory instability, increased emittance, and reduced beam lifetime, thus affecting the operational stability of the light source and reducing the quality of the supplied light. Therefore, how to suppress beam instability is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0003] The purpose of this invention is to provide a beam feedback system based on direct radio frequency sampling to suppress beam instability.

[0004] To achieve the above objectives, this invention provides a beam feedback system based on direct radio frequency sampling, comprising a beam position detector, a summer, a front-end processing module, a feedback processor, and an amplification and excitation module connected in sequence. The beam position detector is used to detect the position signal of each bundle of the beam. The summer is used to determine the horizontal, vertical, and longitudinal position signals of the bundle based on the position signals of the bundle. The front-end processing module preprocesses the horizontal, vertical, and longitudinal position signals of the bundle, respectively. The feedback processor samples the preprocessed horizontal, vertical, and longitudinal position signals of the bundle and generates horizontal, vertical, and longitudinal feedback signals of the bundle. The amplification and excitation module amplifies the horizontal, vertical, and longitudinal feedback signals of the bundle and applies the amplified horizontal, vertical, and longitudinal feedback signals of the bundle to the bundle.

[0005] Optionally, the beam position detector includes four electrodes, each of which generates an induction signal for each beam cluster when it passes through the beam position detector, and the induction signals of the four electrodes form the position signal of the beam cluster.

[0006] Optionally, the horizontal, vertical, and longitudinal position signals of the bundle satisfy the following relationships:

[0007]

[0008] Where X is the horizontal position signal of the beam bunch, Y is the vertical position signal of the beam bunch, S is the longitudinal position signal of the beam bunch, and A, B, C and D are the sensing signals of the four electrodes of the beam position detector, respectively.

[0009] Optionally, the front-end processing module includes a horizontal processing unit, a vertical processing unit, and a longitudinal processing unit. The horizontal processing unit includes a first filter, a first amplifier, a first attenuator, and a second amplifier connected in sequence. The vertical processing unit includes a power divider, a second filter, a third amplifier, a second attenuator, a fourth amplifier, a third filter, a fifth amplifier, a third attenuator, and a sixth amplifier. The sum-difference converter is connected to the power divider, and the power divider is connected to the second filter and the third filter. The second filter, the third amplifier, the second attenuator, and the fourth amplifier are connected in sequence, as are the third filter, the fifth amplifier, the third attenuator, and the sixth amplifier. The longitudinal processing unit includes a fourth filter and a fourth attenuator connected in sequence. The second amplifier, the fourth amplifier, the sixth amplifier, and the fourth attenuator are all connected to the feedback processor.

[0010] Optionally, the summer has four input terminals and three output terminals. The four input terminals are respectively connected to the four electrodes of the beam position detector, and the three output terminals are a horizontal terminal, a vertical terminal, and a longitudinal terminal. The horizontal terminal outputs a horizontal position signal, the vertical terminal outputs a vertical position signal, and the longitudinal terminal outputs a longitudinal position signal. The input terminal of the power divider is connected to the vertical terminal. The power divider is used to divide the vertical position signal of each beam bunch into a first vertical position signal and a second vertical position signal, and outputs the first vertical position signal from the first output terminal and the second vertical position signal from the second output terminal. The first output terminal of the power divider is connected to the second filter, and the second output terminal of the power divider is connected to the third filter. The horizontal terminal is connected to the first filter, and the longitudinal terminal is connected to the fourth filter.

[0011] Optionally, the feedback processor includes a first RF direct sampling ADC, a second RF direct sampling ADC, a third RF direct sampling ADC, a fourth RF direct sampling ADC, an FPGA, a first DAC, a second DAC, a third DAC, and a fourth DAC connected in sequence. The input terminal of the first RF direct sampling ADC is connected to the second amplifier for sampling the pre-processed horizontal position signal of each bundle. The input terminal of the second RF direct sampling ADC is connected to the fourth amplifier for sampling the pre-processed first vertical position signal of each bundle. The input terminal of the third RF direct sampling ADC is connected to the sixth amplifier for sampling the pre-processed second vertical position signal of each bundle. The input terminal of the fourth RF direct sampling ADC is connected to the fourth attenuator for sampling the pre-processed longitudinal position signal of each bundle. The FPGA is connected to the input terminals of the first DAC, the second DAC, the third DAC, and the fourth DAC. The output terminals of the first DAC, the second DAC, the third DAC, and the fourth DAC are connected to the amplification excitation module.

[0012] Optionally, each RF direct sampling ADC is configured to perform four-point sampling on the pre-processed horizontal position signal, the first vertical position signal, the second vertical position signal, and the longitudinal position signal of each bundle;

[0013] The FPGA is configured as follows:

[0014] The horizontal position sampling data, first vertical position sampling data, second vertical position sampling data, and longitudinal position sampling data of each loop of each bundle are calculated based on the sampling data of four sampling points of the horizontal position signal, first vertical position signal, second vertical position signal, and longitudinal position signal of each bundle.

[0015] The horizontal position sampling data, first vertical position sampling data, second vertical position sampling data and longitudinal position sampling data of each loop of the bundle are phase-shifted by -π / 2 using an FIR filter to obtain the horizontal feedback signal, first vertical feedback signal, second vertical feedback signal and longitudinal feedback signal of the bundle. The first vertical feedback signal and the second vertical feedback signal of the bundle form the vertical feedback signal of the bundle.

[0016] Optionally, the first DAC is used to perform digital-to-analog conversion on the horizontal feedback signal of each bunch and transmit the analog horizontal feedback signal of the bunch to the amplification excitation module; the second DAC is used to perform digital-to-analog conversion on the first vertical feedback signal of each bunch and transmit the analog first vertical feedback signal of the bunch to the amplification excitation module; the third DAC is used to perform digital-to-analog conversion on the second vertical feedback signal of each bunch and transmit the analog second vertical feedback signal of the bunch to the amplification excitation module; and the fourth DAC is used to perform digital-to-analog conversion on the longitudinal feedback signal of each bunch and transmit the analog longitudinal feedback signal of the bunch to the amplification excitation module.

[0017] The amplification and excitation module includes a first amplification and excitation unit, a second amplification and excitation unit, a third amplification and excitation unit, and a fourth amplification and excitation unit. The output terminal of the first DAC is connected to the first amplification and excitation unit, the output terminal of the second DAC is connected to the second amplification and excitation unit, the output terminal of the third DAC is connected to the third amplification and excitation unit, and the output terminal of the fourth DAC is connected to the fourth amplification and excitation unit.

[0018] Optionally, the FPGA is further configured to acquire the actual current intensity of each loop of the bundle, and determine the charge amount of each loop based on the sampling data of different sampling points of the longitudinal position signal of each loop of the bundle and the actual current intensity.

[0019] Optionally, the FPGA is further configured to determine the Toshek lifetime of the bundle based on the charge amount of each loop of the bundle. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of a beam feedback system based on direct radio frequency sampling according to an embodiment of the present invention;

[0021] Figure 2 This is a cross-sectional schematic diagram of a beam position detector according to an embodiment of the present invention;

[0022] Figure 3 This is a schematic diagram of the horizontal and vertical position signals output in the single-bundle mode according to an embodiment of the present invention. Detailed Implementation

[0023] The preferred embodiments of the present invention are given below with reference to the accompanying drawings and described in detail.

[0024] like Figure 1As shown, this embodiment of the invention provides a beam feedback system based on radio frequency direct sampling, which includes a beam position detector 100, a summer 200, a front-end processing module 300, a feedback processor 400, and an amplification and excitation module 500 connected in sequence. The beam position detector 100 is used to detect the position signal of each bundle of the beam. The summer 200 is used to determine the horizontal position signal, vertical position signal, and longitudinal position signal of the bundle based on the position signal of the bundle. The front-end processing module 300 performs preprocessing on the horizontal position signal, vertical position signal, and longitudinal position signal of the bundle, respectively, and then feeds back the feedback signal. The processor 400 samples the preprocessed horizontal position signal, vertical position signal, and longitudinal position signal of the bundle, respectively, and generates a horizontal feedback signal, a vertical feedback signal, and a longitudinal feedback signal of the bundle based on the sampled preprocessed horizontal position signal, vertical position signal, and longitudinal position signal of the bundle. The amplification excitation module 500 amplifies the horizontal feedback signal, vertical feedback signal, and longitudinal feedback signal of the bundle, and applies the amplified horizontal feedback signal, vertical feedback signal, and longitudinal feedback signal of the bundle to the bundle to suppress the instability of the bundle.

[0025] In some embodiments, the beam position detector 100 includes four button electrodes. When each beam bunch passes through the beam position detector 100, the four button electrodes generate sensing signals. These four sensing signals form the position signal of the beam bunch; that is, the position signal of the beam bunch includes the sensing signals from the four button electrodes. These four sensing signals can be denoted as A, B, C, and D, respectively. Figure 2 As shown in the cross-sectional view of the beam position detector, with the center of the beam position detector as the origin, the horizontal direction as the x-direction, and the vertical direction as the y-direction, A represents the induced signal of the electrode in the first quadrant, B represents the induced signal of the electrode in the second quadrant, C represents the induced signal of the electrode in the third quadrant, and D represents the induced signal of the electrode in the fourth quadrant. The summer 200 calculates the horizontal, vertical, and longitudinal position signals of the beam bunch by analyzing these four induced signals. The calculation formulas are as follows:

[0026]

[0027] Where X is the horizontal position signal of the bundle, Y is the vertical position signal of the bundle, and S is the longitudinal position signal of the bundle.

[0028] In some embodiments, the front-end processing module 300 includes a horizontal processing unit, a vertical processing unit, and a longitudinal processing unit. The horizontal processing unit includes a first filter 311, a first amplifier 312, a first attenuator 313, and a second amplifier 314 connected in sequence. The vertical processing unit includes a power divider 321, a second filter 322, a third amplifier 323, a second attenuator 324, a fourth amplifier 325, a third filter 326, a fifth amplifier 327, a third attenuator 328, and a sixth amplifier 329. The sum and difference unit 200 is connected to the power divider 321. The power divider 321 is connected to the second filter 322 and the third filter 326. The second filter 322, the third amplifier 323, the second attenuator 324 and the fourth amplifier 325 are connected in sequence. The third filter 326, the fifth amplifier 327, the third attenuator 328 and the sixth amplifier 329 are connected in sequence. The longitudinal processing unit includes the fourth filter 331 and the fourth attenuator 332 connected in sequence. The second amplifier 314, the fourth amplifier 325, the sixth amplifier 329 and the fourth attenuator 332 are all connected to the feedback processor 400.

[0029] The sum and difference unit 300 has four input terminals and three output terminals. The four input terminals are connected to the four electrodes of the beam position detector 100 to receive four induced signals respectively. The three output terminals are a horizontal terminal, a vertical terminal, and a longitudinal terminal, respectively. The horizontal terminal outputs a horizontal position signal, the vertical terminal outputs a vertical position signal, and the longitudinal terminal outputs a longitudinal position signal. The power divider 321 has one input terminal and two output terminals. The input terminal of the power divider 321 is connected to the vertical terminal. The power divider 321 is used to split the vertical position signal into two signals and output them from the two output terminals respectively. That is, the first vertical position signal is output from the first output terminal, and the second vertical position signal is output from the second output terminal. The first output terminal of the power divider 321 is connected to the second filter 322, and the second output terminal of the power divider 321 is connected to the third filter 326. The processing gain of the first and second vertical position signals is different. One is used to process the small charge clusters in the normal filling mode, and the other is used to process the large clusters in the mixed filling mode. The horizontal terminal is connected to the first filter 311, and the longitudinal terminal is connected to the fourth filter 331.

[0030] The feedback processor 400 includes an analog-to-digital converter (ADC) module, an FPGA (Field-Programmable Gate Array) 420, and a digital-to-analog converter (DAC) module. The ADC module includes a first RF direct-sampling ADC 411, a second RF direct-sampling ADC 412, a third RF direct-sampling ADC 413, and a fourth RF direct-sampling ADC 414. The DAC module includes a first DAC 431, a second DAC 432, a third DAC 433, and a fourth DAC 434. The input of the first RF direct-sampling ADC 411 is connected to a second amplifier 314; the input of the second RF direct-sampling ADC 412 is connected to a fourth amplifier 325; the input of the third RF direct-sampling ADC 433 is connected to a sixth amplifier 329; and the input of the fourth RF direct-sampling ADC 434 is connected to a fourth attenuator 332. The outputs of the first RF direct-sampling ADC 411, the second RF direct-sampling ADC 412, the third RF direct-sampling ADC 413, and the fourth RF direct-sampling ADC 414 are all connected to the FPGA. Connected to 420, the first RF direct sampling ADC (analog-to-digital converter) 411, the second RF direct sampling ADC 412, the third RF direct sampling ADC 413, and the fourth RF direct sampling ADC 414 are used to sample the pre-processed horizontal position signal, the first vertical position signal, the second vertical position signal, and the longitudinal position signal, respectively. The RF direct sampling ADCs can directly sample the RF signals without down-conversion, resulting in a simpler structure. FPGA 420 is connected to the input terminals of the first DAC 431, the second DAC 432, the third DAC 433, and the fourth DAC 434, while the output terminals of these DACs are connected to the amplification and excitation module 500.

[0031] According to the relevant theories of beam signal spectrum, the entire bundle oscillation mode is contained within a bandwidth of ±1 / 2 of the storage ring RF frequency. Therefore, the frequency bands of the first to fourth filters must cover this band. For example, with a storage ring RF frequency of 500MHz and a bundle time interval of 2ns, the first to fourth filters can be low-pass filters with a passband range of 0~780MHz. In the single bundle mode of the storage ring, the horizontal position signal X and the vertical position signal Y output by the summator 200 are as follows: Figure 3 As shown, the signal broadening is within 2ns, which can avoid crosstalk between adjacent bundles.

[0032] Before sampling, signals X and Y need to be amplified in two stages and attenuated in one stage, while signal S needs to be attenuated in one stage, so that the signal to be sampled matches the range of the multi-channel RF direct-sampling ADC 410. The first amplifier 312 is used to amplify the filtered horizontal position signal, the first attenuator 313 is used to attenuate the horizontal position signal amplified by the first amplifier 312, and the second amplifier 314 is used to amplify the horizontal position signal attenuated by the first attenuator 313. The horizontal position signal amplified by the second amplifier 314 has the same range as the first RF direct-sampling ADC 411, so it can be sampled by it. Similarly, the third amplifier 323 amplifies the filtered first vertical position signal, the second attenuator 324 attenuates the amplified first vertical position signal, and the fourth amplifier 325 amplifies the attenuated first vertical position signal. The amplified first vertical position signal has the same range as the second RF direct-sampling ADC 412, and therefore can be sampled by it. The filtered second vertical position signal is amplified by the fifth amplifier 327, attenuated by the third attenuator 328, and amplified by the sixth amplifier 329 in sequence, and has the same range as the third RF direct-sampling ADC 413, and can be sampled by it. The filtered longitudinal position signal is attenuated by the fourth attenuator 332, and has the same range as the fourth RF direct-sampling ADC 414, and can be sampled by it. Each attenuator is an adjustable attenuator, with an adjustment range of 0~30dB in 0.25dB steps.

[0033] Each RF direct-sampling ADC has a high sampling rate, allowing for multi-point sampling of signals at various locations within each cyclotron. For example, the sampling rate of each RF direct-sampling ADC can be set to 2GHz, with a bandwidth greater than 1GHz, enabling 4-point sampling for each cyclotron. The sampling clock signal Clk for each RF direct-sampling ADC is obtained by multiplying the accelerator's machine clock.

[0034] The FPGA 420 is used to calculate the corresponding feedback signal based on the different position signals sampled by each RF direct sampling ADC. When each RF direct sampling ADC samples each position signal of each bundle at 4 points, the FPGA 420 first calculates the sampling data for that position of each bundle in each loop based on the sampling data of different sampling points of each position signal in each loop of the bundle. The calculation method is as follows:

[0035]

[0036]

[0037] Where X1 represents the horizontal position sampling data of a certain loop of the bunch, and Y1 represents the first or second vertical position sampling data of a certain loop of the bunch. This is sampling data for the longitudinal position of a certain loop of the bundle. , , These represent the sampling data of the i-th sampling point of the X, Y, and S signals, respectively, where i = 1, 2, 3, and 4. Each time the beam bunch passes through the beam position detector 100, it will generate an induced signal. Therefore, the FPGA 420 can obtain the loop-by-loop horizontal position sampling data, loop-by-loop vertical position sampling data, and loop-by-loop longitudinal position sampling data of each beam bunch. The FPGA 420 uses an FIR (Finite Length Unit Impulse Response) filter to phase-shift the sampled data at different loop-by-loop vertical positions, thereby obtaining feedback signals at different positions. Specifically, the FPGA 420 obtains a horizontal feedback signal by phase-shifting the sampled data at the loop-by-loop horizontal position of each bundle by -π / 2, obtains a first vertical feedback signal by phase-shifting the sampled data at the first loop-by-loop vertical position of each bundle by -π / 2, and obtains a second vertical feedback signal by phase-shifting the sampled data at the second loop-by-loop vertical position of each bundle by -π / 2. The first and second vertical feedback signals together form the vertical feedback signal. The longitudinal feedback signal is obtained by phase-shifting the sampled data at the loop-by-loop longitudinal position of each bundle by -π / 2.

[0038] The first DAC 431 performs digital-to-analog conversion on the horizontal feedback signal of the bundle and transmits the analog horizontal feedback signal of the bundle to the amplification and excitation module 500; the second DAC 432 performs digital-to-analog conversion on the first vertical feedback signal of the bundle and transmits the analog first vertical feedback signal of the bundle to the amplification and excitation module 500; the third DAC 433 performs digital-to-analog conversion on the second vertical feedback signal of the bundle and transmits the analog second vertical feedback signal of the bundle to the amplification and excitation module 500; the fourth DAC 434 performs digital-to-analog conversion on the longitudinal feedback signal of the bundle and transmits the analog longitudinal feedback signal of the bundle to the amplification and excitation module 500. The operating frequency of each DAC can be 500MHz.

[0039] The amplification excitation module 500 includes a first amplification excitation unit 510, a second amplification excitation unit 520, a third amplification excitation unit 530, and a fourth amplification excitation unit 540. The output terminal of the first DAC 431 is connected to the first amplification excitation unit 510, the output terminal of the second DAC 432 is connected to the second amplification excitation unit 520, the third DAC 433 is connected to the third amplification excitation unit 530, and the fourth DAC 434 is connected to the fourth amplification excitation unit 540. The first amplification excitation unit 510 amplifies the horizontal feedback signal of the bundle and applies it to the bundle. The second amplification excitation unit 520 amplifies the first vertical feedback signal of the bundle and applies it to the bundle. The third amplification excitation unit 530 amplifies the second vertical feedback signal of the bundle and applies it to the bundle. The fourth amplification excitation unit 540 amplifies the longitudinal feedback signal of the bundle and applies it to the bundle.

[0040] Each amplification and excitation unit includes a seventh amplifier and an exciter connected in sequence. The output of each DAC is connected to the seventh amplifier of each amplification and excitation unit. Each seventh amplifier is used to amplify the analog horizontal feedback signal, analog first vertical feedback signal, analog second vertical feedback signal and analog longitudinal feedback signal of the bundle, respectively. The exciter of each amplification and excitation unit is used to apply the amplified analog horizontal feedback signal, the amplified analog first vertical feedback signal or the analog second vertical feedback signal and the amplified analog longitudinal feedback signal to the corresponding bundle to suppress the instability of its horizontal position, vertical position and longitudinal position.

[0041] The FPGA 420 can also be configured to acquire the actual current intensity I of each loop of the beam (which can be read by a DC current transformer), and determine the calibration coefficient k of each loop based on the sampling data of different sampling points of the longitudinal position signal of each loop and the actual current intensity I. Then, the charge of each loop of the beam is determined based on the calibration coefficient. Specifically, firstly, the amplitude of the longitudinal position signal of each loop is determined based on the sampling data of different sampling points of the longitudinal position signal. Since the amplitude of the longitudinal position signal is proportional to the charge of the beam, the ratio is the calibration coefficient k. The calibration coefficient k can be obtained from the beam cyclotron period, the actual current intensity, and the amplitude of the longitudinal position signal, thereby realizing the measurement of the charge of the beam. The specific calculation formula is as follows:

[0042]

[0043]

[0044]

[0045] in, The amplitude of the longitudinal position signal for a single bundle. For the beam cyclotron period, The charge of the bundle. It is the sum of the longitudinal position signal amplitudes of all bundles within the beam cyclotron cycle.

[0046] The FPGA 420 is also configured to determine the Toscher lifetime of each bundle based on the charge amount of each loop, and the specific calculation method is as follows:

[0047] Total lifespan of clusters Touschek lifespan Vacuum life and quantum lifetime Three-part decision:

[0048]

[0049] Among them, the Tosek lifetime is related to the charge of the bundle, while the other two terms are independent of the charge. Therefore, the latter two terms can be treated as constants, resulting in the following equation:

[0050]

[0051] in, The Tosher coefficient, It is a constant related to vacuum lifetime and quantum lifetime.

[0052] Because the charge Q of the bundle decays exponentially: Therefore, the total lifetime of the bundle can be fitted by periodically measuring the charge Q. :

[0053]

[0054] By measuring multiple sets of Q and The Toscher coefficient can be fitted. and constant After obtaining the Toshke coefficient, the Toshke lifetime can be calculated using the following formula:

[0055]

[0056] The beam feedback system based on direct radio frequency sampling in this embodiment of the invention samples the signals at each position using a direct radio frequency sampling ADC 410. It does not require complex analog down-conversion, has a simple structure, and is easy to debug. The sampling rate of the ADC 410 can be several times the beam frequency, enabling multi-point sampling of the signals at each position of each beam cluster, thereby accurately acquiring the peak values ​​of the signals at each position of the beam cluster.

[0057] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of the invention. Various variations can be made to the above embodiments of the present invention. That is, all simple and equivalent changes and modifications made based on the claims and description of this invention fall within the protection scope of the claims of this patent. All aspects not described in detail in this invention are conventional technical content.

Claims

1. A beam feedback system based on radio frequency direct sampling, characterized in that, The device includes a beam position detector, a summer, a front-end processing module, a feedback processor, and an amplification and excitation module connected in sequence. The beam position detector is used to detect the position signal of each bundle of the beam. The summer is used to determine the horizontal, vertical, and longitudinal position signals of the bundle based on the position signals of the bundle. The front-end processing module performs preprocessing on the horizontal, vertical, and longitudinal position signals of the bundle, respectively. The feedback processor samples the preprocessed horizontal, vertical, and longitudinal position signals of the bundle and generates horizontal, vertical, and longitudinal feedback signals of the bundle. The amplification and excitation module amplifies the horizontal, vertical, and longitudinal feedback signals of the bundle and applies the amplified horizontal, vertical, and longitudinal feedback signals of the bundle to the bundle. The front-end processing module includes a horizontal processing unit, a vertical processing unit, and a longitudinal processing unit. The horizontal processing unit includes a first filter, a first amplifier, a first attenuator, and a second amplifier connected in sequence. The vertical processing unit includes a power divider, a second filter, a third amplifier, a second attenuator, a fourth amplifier, a third filter, a fifth amplifier, a third attenuator, and a sixth amplifier. The sum-difference converter is connected to the power divider, and the power divider is connected to the second filter and the third filter. The second filter, the third amplifier, the second attenuator, and the fourth amplifier are connected in sequence, as are the third filter, the fifth amplifier, the third attenuator, and the sixth amplifier. The longitudinal processing unit includes a fourth filter and a fourth attenuator connected in sequence. The second amplifier, the fourth amplifier, the sixth amplifier, and the fourth attenuator are all connected to the feedback processor. The sum and difference device has four input terminals and three output terminals. The four input terminals are respectively connected to the four electrodes of the beam position detector, and the three output terminals are a horizontal terminal, a vertical terminal, and a longitudinal terminal. The horizontal terminal outputs a horizontal position signal, the vertical terminal outputs a vertical position signal, and the longitudinal terminal outputs a longitudinal position signal. The input terminal of the power divider is connected to the vertical terminal. The power divider is used to divide the vertical position signal of each beam bunch into a first vertical position signal and a second vertical position signal, and outputs the first vertical position signal from the first output terminal and the second vertical position signal from the second output terminal. The first output terminal of the power divider is connected to the second filter, and the second output terminal of the power divider is connected to the third filter. The horizontal terminal is connected to the first filter, and the longitudinal terminal is connected to the fourth filter. The feedback processor includes a first RF direct sampling ADC, a second RF direct sampling ADC, a third RF direct sampling ADC, a fourth RF direct sampling ADC, an FPGA, a first DAC, a second DAC, a third DAC, and a fourth DAC connected in sequence. The input terminal of the first RF direct sampling ADC is connected to the second amplifier and is used to sample the pre-processed horizontal position signal of each bundle. The input terminal of the second RF direct sampling ADC is connected to the fourth amplifier and is used to sample the pre-processed first vertical position signal of each bundle. The input terminal of the third RF direct sampling ADC is connected to the sixth amplifier and is used to sample the pre-processed second vertical position signal of each bundle. The input terminal of the fourth RF direct sampling ADC is connected to the fourth attenuator and is used to sample the pre-processed longitudinal position signal of each bundle. The FPGA is connected to the input terminals of the first DAC, the second DAC, the third DAC, and the fourth DAC, and the output terminals of the first DAC, the second DAC, the third DAC, and the fourth DAC are connected to the amplification excitation module. Each RF direct sampling ADC is configured to perform four-point sampling of the pre-processed horizontal position signal, first vertical position signal, second vertical position signal, and longitudinal position signal for each beam bunch; the FPGA is configured as follows: The horizontal position sampling data, first vertical position sampling data, second vertical position sampling data, and longitudinal position sampling data of each loop of each bundle are calculated based on the sampling data of four sampling points of the horizontal position signal, first vertical position signal, second vertical position signal, and longitudinal position signal of each bundle. The calculation method for longitudinal position sampling data is as follows: , wherein, s1, s2, s3, and s4 are the sampling data of the four sampling points of the longitudinal position signal of the one turn of the bunch, respectively.

2. The RF direct based beam current feedback system of claim 1, wherein, The beam position detector includes four electrodes, each of which generates a sensing signal for each beam cluster as it passes through the beam position detector. The sensing signals from the four electrodes form the position signal of the beam cluster.

3. The RF direct probe based beam current feedback system of claim 2, wherein, The horizontal, vertical, and longitudinal position signals of the bundle satisfy the following relationships: , Where X is the horizontal position signal of the beam bunch, Y is the vertical position signal of the beam bunch, S is the longitudinal position signal of the beam bunch, and A, B, C and D are the sensing signals of the four electrodes of the beam position detector, respectively.

4. The beam feedback system based on direct radio frequency sampling according to claim 1, characterized in that, The FPGA is also configured to: The horizontal position sampling data, first vertical position sampling data, second vertical position sampling data and longitudinal position sampling data of each loop of the bundle are phase-shifted by -π / 2 using an FIR filter to obtain the horizontal feedback signal, first vertical feedback signal, second vertical feedback signal and longitudinal feedback signal of the bundle. The first vertical feedback signal and the second vertical feedback signal of the bundle form the vertical feedback signal of the bundle.

5. The radio frequency direct sampling based beam current feedback system of claim 4, wherein, The first DAC is configured to convert the horizontal feedback signal of each bunch into an analog signal and transmit the analog horizontal feedback signal of the bunch to the amplification and excitation module, the second DAC is configured to convert the first vertical feedback signal of each bunch into an analog signal and transmit the analog first vertical feedback signal of the bunch to the amplification and excitation module, the third DAC is configured to convert the second vertical feedback signal of each bunch into an analog signal and transmit the analog second vertical feedback signal of the bunch to the amplification and excitation module, and the fourth DAC is configured to convert the longitudinal feedback signal of each bunch into an analog signal and transmit the analog longitudinal feedback signal of the bunch to the amplification and excitation module. The amplification and excitation module comprises a first amplification and excitation unit, a second amplification and excitation unit, a third amplification and excitation unit and a fourth amplification and excitation unit, the output end of the first DAC is connected to the first amplification and excitation unit, the output end of the second DAC is connected to the second amplification and excitation unit, the output end of the third DAC is connected to the third amplification and excitation unit, and the output end of the fourth DAC is connected to the fourth amplification and excitation unit.

6. The RF direct sampling based beam current feedback system of claim 4, wherein, The FPGA is further configured to obtain the real beam current of each turn of the bunch, and determine the charge of each turn according to the sampling data of different sampling points of the longitudinal position signal of each turn of the bunch and the real beam current.

7. The radio frequency direct sampling based beam current feedback system of claim 6, wherein, The FPGA is further configured to determine the Touschek lifetime of the bunch according to the charges of each turn of the bunch.