MIP chip structure, preparation method thereof and display panel

Abstract

The invention provides an MIP chip structure and a preparation method thereof, and a display panel, and the MIP chip structure comprises a substrate which comprises a first surface and a second surface which are oppositely disposed, the substrate is provided with a plurality of through holes, and the through holes are filled with conductive columns; the first black film layer is located on the first surface, and a plurality of openings are formed in the first black film layer; the plurality of light-emitting chips are positioned in the opening; and the plurality of electrode bonding pads are located on the second surface, and the electrode bonding pads are electrically connected with the light-emitting chip through the conductive columns. According to the technical scheme, the display effect can be improved.

Description

Technical Field

[0001] This application relates to the field of display technology, specifically to a MIP chip structure and its fabrication method, and a display panel. Background Technology

[0002] Currently, semiconductor display technology is developing rapidly, and traditional light-emitting diode (LED) chips can no longer meet the increasingly demanding market requirements. Micro LED (Micro Light Emitting Diode) technology is gradually becoming a research hotspot. Micro LED in Package (MIP) technology is a chip-level packaging technology that encapsulates one or more Micro LED chips into a small, discrete chip, i.e., a MIP chip. MIP technology can solve the problem of existing LED chips being limited by their structure, requiring numerous transfer steps during manufacturing, leading to complex manufacturing processes.

[0003] However, existing MIP chips still have some problems. Summary of the Invention

[0004] To address the aforementioned issues, this application provides a MIP chip structure, its fabrication method, and a display panel.

[0005] In a first aspect, embodiments of this application provide a MIP chip structure, comprising: a substrate, including a first surface and a second surface disposed opposite to each other, the substrate having a plurality of through holes filled with conductive pillars; a first black film layer located on the first surface, the first black film layer having a plurality of openings; a plurality of light-emitting chips, the light-emitting chips being located within the openings; and a plurality of electrode pads located on the second surface, the electrode pads being electrically connected to the light-emitting chips via conductive pillars.

[0006] In conjunction with the first aspect, the MIP chip structure also includes an insulating adhesive layer located between the substrate and the light-emitting chips, wherein the orthographic projections of the multiple light-emitting chips on the substrate lie within the orthographic projections of the insulating adhesive layer on the substrate; preferably, the orthographic projection area of ​​the insulating adhesive layer on the substrate is smaller than the area of ​​the substrate; preferably, the material of the insulating adhesive layer includes acrylic or polyimide; preferably, the insulating adhesive layer includes a side surface, the orthographic projection of the side surface on the substrate surrounding the orthographic projections of the multiple light-emitting chips on the substrate, and the side surface is inclined; preferably, the insulating adhesive layer also includes a surface near the substrate, and the angle between the side surface and the surface near the substrate is greater than 0 and less than or equal to 45°; preferably, the side surface is in contact with the first black film layer.

[0007] In conjunction with the first aspect, the thickness of the first black film layer is greater than the thickness of the light-emitting chip; preferably, the thickness of the first black film layer is greater than 20 μm; preferably, the surface of the light-emitting chip away from the substrate is not obscured by the first black film layer; preferably, the light-emitting chip includes a first light-emitting chip, a second light-emitting chip, and a third light-emitting chip, wherein the thickness of the first light-emitting chip is greater than or equal to 4.5 μm and less than or equal to 5.5 μm; the thickness of the second light-emitting chip is greater than or equal to 5.5 μm and less than or equal to 6 μm; and the thickness of the third light-emitting chip is greater than or equal to 7 μm and less than or equal to 10 μm; preferably, the first light-emitting chip is a blue light-emitting chip, the second light-emitting chip is a green light-emitting chip, and the third light-emitting chip is a red light-emitting chip; preferably, the material of the first black film layer includes an organic photosensitive material and a black material; preferably, the organic photosensitive material includes polyimide or acrylic; and / or, the black material includes graphite or carbon black.

[0008] In conjunction with the first aspect, the MIP chip structure further includes a second black film layer located on the surface of the first black film layer facing away from the substrate; the orthographic projection of the second black film layer on the substrate does not overlap with the orthographic projection of the light-emitting chip on the substrate; preferably, the orthographic projection of the second black film layer on the substrate is annular, surrounding the orthographic projection of the light-emitting chip on the substrate, wherein there is a gap between adjacent second black film layers; or, the orthographic projection of the second black film layer on the substrate includes a grid structure, the grid structure including grid openings, and the orthographic projection of the light-emitting chip on the substrate is located within the orthographic projection of the grid openings on the substrate; preferably, the distance between the orthographic projection of the edge of the second black film layer near the light-emitting chip on the substrate and the orthographic projection of the edge of the first black film layer near the light-emitting chip on the substrate is greater than or equal to 0 and less than or equal to 0.3 μm; preferably, the material of the second black film layer includes organic photosensitive material and black material; preferably, the second black film layer and the first black film layer are made of the same material.

[0009] In conjunction with the second aspect, the MIP chip structure also includes a packaging layer located on the side of the first black film layer away from the substrate. The orthographic projection of the packaging layer on the substrate covers the orthographic projection of the first black film layer on the substrate and the orthographic projection of the light-emitting chip on the substrate. Preferably, the material of the packaging layer includes at least one of silicon nitride, silicon oxide, silicon oxynitride, and aluminum oxide.

[0010] In conjunction with the second aspect, the substrate further includes a first redistribution layer located on the first surface, the first redistribution layer including a first transmission line and a second transmission line; the light-emitting chip is provided with a first electrode and a second electrode, the first electrode being electrically connected to a conductive pillar via the first transmission line, and the second electrode being electrically connected to a conductive pillar via the second transmission line; the substrate further includes a second redistribution layer located on the second surface, the second redistribution layer including a third transmission line, and electrode pads being electrically connected to conductive pillars via the third transmission line; preferably, the first electrode and the second electrode are electrically connected to different conductive pillars respectively; preferably, multiple light-emitting chips, including a first light-emitting chip, a second light-emitting chip, and a third light-emitting chip, are provided, and the electrode pads include a first pad, a second pad, a third pad, and a fourth pad, and the first electrode of the first light-emitting chip... The first electrode of the second light-emitting chip is electrically connected to the first pad, the first electrode of the third light-emitting chip is electrically connected to the third pad, and the second electrodes of the first, second, and third light-emitting chips are electrically connected to the fourth pad; preferably, the material of the electrode pad includes at least one of chromium, aluminum, gold, indium, copper, and titanium; and / or, the material of the first, second, and third transmission lines includes at least one of copper, aluminum, gold, and titanium; and / or, the material of the first and second electrodes includes at least one of copper, aluminum, gold, and titanium; preferably, the material of the conductive pillar includes at least one of copper, aluminum, gold, and titanium; preferably, the substrate includes at least one of a glass substrate, a silicon substrate, a ceramic substrate, and a polymer substrate.

[0011] Secondly, embodiments of this application also provide a method for fabricating a MIP chip structure, comprising: fabricating a substrate, the substrate including a first surface and a second surface disposed opposite to each other, the substrate having a plurality of through holes filled with conductive pillars; connecting a plurality of electrode pads on the second surface, the electrode pads being electrically connected to the conductive pillars; fabricating a plurality of light-emitting chips on the first surface, the light-emitting chips being electrically connected to the conductive pillars; and fabricating a first black film layer on the side of the light-emitting chips facing away from the substrate, the first black film layer having a plurality of openings exposing the light-emitting chips.

[0012] In conjunction with the second aspect, before the step of preparing the first black film layer on the side of the light-emitting chip facing away from the substrate, the preparation method further includes: filling an insulating adhesive material between the light-emitting chip and the substrate, and curing it to obtain an insulating adhesive layer, wherein the orthographic projection of the multiple light-emitting chips on the substrate is located within the orthographic projection of the insulating adhesive layer on the substrate; preferably, preparing the first black film layer on the side of the light-emitting chip facing away from the substrate includes: preparing a first black organic material on the side of the light-emitting chip facing away from the substrate; exposing and developing the first black organic material to obtain the first black film layer; preferably, after the step of preparing the first black film layer on the side of the light-emitting chip facing away from the substrate, the preparation method further includes: preparing a second black organic material on the side of the first black film layer facing away from the substrate, exposing and developing the second black organic material to obtain a second black film layer, wherein the orthographic projection of the second black film layer on the substrate surrounds the orthographic projection of the light-emitting chip on the substrate; preferably, after preparing the first black film layer or the second black film layer, the preparation method further includes: preparing an encapsulation layer on the side of the first black film layer or the second black film layer facing away from the substrate.

[0013] In conjunction with the second aspect, the substrate fabrication includes: fabricating through-holes on the substrate; forming conductive pillars within the through-holes; preferably, the substrate fabrication further includes: forming a first redistribution layer on a first surface and forming a second redistribution layer on a second surface, the first redistribution layer including a first transmission line and a second transmission line, the light-emitting chip being provided with a first electrode and a second electrode, the first electrode being electrically connected to the conductive pillars via the first transmission line, and the second electrode being electrically connected to the conductive pillars via the second transmission line; the second redistribution layer including a third transmission line, and electrode pads being electrically connected to the conductive pillars via the third transmission line.

[0014] Thirdly, embodiments of this application also provide a display panel, including: a driving backplane, the driving backplane including a plurality of driving circuits and a driving chip, the plurality of driving circuits being electrically connected to the driving chip; a plurality of MIP chip structures, the MIP chip structures including the above-mentioned MIP chip structures, the MIP chip structures being disposed on one side of the driving backplane, and the light-emitting chips of the MIP chip structures being electrically connected to the driving circuits through the electrode pads of the MIP chip structures.

[0015] Through the above technical solution, conductive pillars are set on the substrate, and electrode pads are placed on the side of the substrate away from the light-emitting chip. The light-emitting chip and the electrode pads are electrically connected through the conductive pillars. In this way, the light-emitting chip can emit light from the side away from the substrate. A first black film layer is set around the periphery of the light-emitting chip. This first black film layer can block light, thus avoiding light crosstalk between adjacent light-emitting chips, preventing color mixing, improving light purity, and enhancing display effects. Furthermore, by setting the light-emitting chip on one side of the substrate and the electrode pads on the other side, the number and arrangement of the light-emitting chips can be designed according to requirements without considering the influence of the electrode pads, which is beneficial for increasing pixel density. Moreover, there is no substrate obstruction in the light-emitting direction of the chip, which can improve light extraction efficiency. The substrate has no hollow areas, providing good support and protection for the light-emitting chip. Attached Figure Description

[0016] Figure 1 This is a cross-sectional schematic diagram of a MIP chip structure provided in an embodiment of this application.

[0017] Figure 2 This is a cross-sectional schematic diagram of a MIP chip structure provided in another embodiment of this application.

[0018] Figure 3 This is a cross-sectional schematic diagram of a MIP chip structure provided in another embodiment of this application.

[0019] Figure 4 This is a top view of a MIP chip structure provided in another embodiment of this application.

[0020] Figure 5 This is a schematic diagram of the electrical connection between the light-emitting chip and the electrode pads in a MIP chip structure provided in another embodiment of this application.

[0021] Figure 6a and Figure 6b These are cross-sectional structural diagrams of a MIP chip structure provided in another embodiment of this application.

[0022] Figure 7 This is a cross-sectional schematic diagram of a MIP chip structure provided in another embodiment of this application.

[0023] Figure 8 This is a cross-sectional schematic diagram of a MIP chip structure provided in another embodiment of this application.

[0024] Figure 9 This is a schematic flowchart of a method for fabricating a MIP chip structure according to another embodiment of this application.

[0025] Figure 10 This is a top view of the display panel provided in one embodiment of this application.

[0026] Figure 11 This is a schematic diagram of the structure of a display device provided in an embodiment of this application. Detailed Implementation

[0027] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0028] In existing solutions, when fabricating MIP chips, light-emitting chips are usually fabricated on a substrate, and pads and other structures are fabricated on the light-emitting chips. The light-emitting surface of the MIP chip is on one side of the substrate. However, since the substrate is usually made of a transparent material, color mixing occurs when adjacent light-emitting chips emit light, which reduces the purity of the light emitted from the light-emitting surface and affects the display effect.

[0029] To address the aforementioned technical problems, this application provides a display panel including a substrate, a first black film layer, multiple light-emitting chips, and multiple electrode pads. The substrate includes a first surface and a second surface disposed opposite to each other, and multiple through-holes filled with conductive pillars. The first black film layer is located on the first surface and has multiple openings. The light-emitting chips are located within the openings. The electrode pads are located on the second surface and are electrically connected to the light-emitting chips via the conductive pillars. In this application embodiment, by setting conductive pillars on the substrate and placing the electrode pads on the side of the substrate away from the light-emitting chips, the light-emitting chips and electrode pads are electrically connected via the conductive pillars. This allows the light-emitting chips to emit light from the side away from the substrate. Furthermore, the first black film layer is disposed around the periphery of the light-emitting chips, which can block light, thus preventing crosstalk between adjacent light-emitting chips, avoiding color mixing, improving light purity, and enhancing the display effect. In addition, the light-emitting chip is set on one side of the substrate and the electrode pad is set on the other side. The number and arrangement of the light-emitting chip can be designed according to the requirements without considering the influence of the electrode pad, which is conducive to improving the pixel density. Moreover, there is no substrate obstruction in the light emission direction of the light-emitting chip, which can improve the light emission efficiency. There are no hollow areas on the substrate, which provides good support and protection for the light-emitting chip.

[0030] The present application is described below through several specific embodiments. It should be understood that the following embodiments are merely exemplary and are not intended to limit the scope of protection of the present application.

[0031] Figure 1 This is a cross-sectional schematic diagram of a MIP chip structure provided in an embodiment of this application. For example... Figure 1As shown, the MIP chip structure 100 includes a substrate 110, a first black film layer 151, multiple light-emitting chips 130, and multiple electrode pads 120.

[0032] In this embodiment, the substrate 110 includes a first surface and a second surface disposed opposite to each other. A plurality of through holes are provided on the substrate 110, and the through holes are filled with conductive pillars 111. Optionally, the substrate 110 includes at least one of a glass substrate, a silicon substrate, a ceramic substrate, and a polymer substrate. Preferably, the substrate 110 includes a glass substrate. Exemplarily, the substrate 110 is at least one of borosilicate glass, aluminoborosilicate glass, quartz glass, alkali-free glass, and alkaline glass. Optionally, the conductive pillars 111 are made of at least one of copper, aluminum, gold, and titanium, preferably copper.

[0033] A first black film layer 151 is located on the first substrate 110, and the first black film layer 151 has multiple openings. Optionally, the material of the first black film layer 151 includes an organic photosensitive material and a black material. The organic photosensitive material includes polyimide or acrylic. The black material includes graphite or carbon black. In this embodiment, the orthographic projection of the first black film layer 151 onto the substrate 110 is a grid pattern.

[0034] In this embodiment, the light-emitting chip 130 is located within the opening. The light-emitting chip 130 includes an LED chip. Figure 1 The diagram shows three light-emitting chips 130. It can be understood that the MIP chip structure 100 may also include other numbers of light-emitting chips, such as 4, 5, 6, etc.

[0035] Optionally, the thickness of the first black film layer 151 is greater than the thickness of the light-emitting chip 130. In this way, the first black film layer 151 can block the light emitted by adjacent light-emitting chips 130, reduce light crosstalk, and at the same time correct the optical path, improving the light emission efficiency at the forward viewing angle. Optionally, the surface of the light-emitting chip 130 away from the substrate 110 is not blocked by the first black film layer 151, so as not to affect the normal light emission of the light-emitting chip 130.

[0036] Electrode pads 120 are located on the second surface and are electrically connected to the light-emitting chip 130 via conductive posts 111. Optionally, the electrode pads 120 may be made of at least one of chromium, aluminum, gold, indium, copper, and titanium.

[0037] In this embodiment, by providing conductive pillars 111 on the substrate 110 and placing electrode pads 120 on the side of the substrate 110 away from the light-emitting chip 130, the light-emitting chip 130 and the electrode pads 120 are electrically connected through the conductive pillars 111. Thus, the light-emitting chip 130 can emit light from the side away from the substrate 110. Furthermore, a first black film layer 151 is provided around the periphery of the light-emitting chip 130, which can block light, thus avoiding crosstalk between adjacent light-emitting chips 130, preventing color mixing, improving light purity, and enhancing display performance. Additionally, by providing the light-emitting chip 130 on one side of the substrate 110 and the electrode pads 120 on the other side, the number and arrangement of the light-emitting chips 130 can be designed according to requirements without considering the influence of the electrode pads 120, which is beneficial for increasing pixel density. Moreover, the light-emitting direction of the light-emitting chip 130 is not blocked by the substrate 110, which can improve light extraction efficiency. The substrate has no hollow areas, providing good support and protection for the light-emitting chip.

[0038] In some embodiments, the light-emitting chip 130 and / or electrode pads 120 need to be electrically connected to the conductive pillars 111 via a redistribution layer. Specifically, as shown below... Figure 2 As shown.

[0039] Figure 2 This is a cross-sectional schematic diagram of a MIP chip structure provided in another embodiment of this application. Figure 2 The MIP chip shown is Figure 1 The difference in the MIP chip shown is that the substrate 110 also includes a first redistribution layer 112 located on the first surface and a second redistribution layer 113 located on the second surface.

[0040] Optionally, the first redistribution layer 112 includes a first transmission line 1121 and a second transmission line 1122, and the second redistribution layer 113 includes a third transmission line 1131. Optionally, the first transmission line 1121, the second transmission line 1122, and the third transmission line 1131 are made of at least one of copper, aluminum, gold, and titanium. The electrode pad 120 is electrically connected to the conductive post 111 via the third transmission line 1131.

[0041] The light-emitting chip 130 is provided with a first electrode 141 and a second electrode 142. The first electrode 141 and the second electrode 142 are made of at least one of copper, aluminum, gold, and titanium. The first electrode 141 is electrically connected to a conductive post 111 via a first transmission line 1121, and the second electrode 142 is electrically connected to the conductive post 111 via a second transmission line 1122. Optionally, the first electrode 141 and the second electrode 142 are electrically connected to different conductive posts 111. Optionally, if the first electrode 141 is the positive electrode and the second electrode 142 is the negative electrode, then the first transmission line 1121 is the positive transmission line and the second transmission line 1122 is the negative transmission line. Similarly, the conductive post 111 electrically connected to the first electrode 141 can be called the positive conductive post, and the conductive post 111 electrically connected to the second electrode 142 can be called the negative conductive post. In this embodiment, each light-emitting chip 130 corresponds to one first transmission line 1121, and multiple light-emitting chips 130 correspond to one second transmission line 1122. That is, each light-emitting chip 130 is electrically connected to its corresponding electrode pad 120 through its respective first transmission line 1121, and multiple light-emitting chips 130 are electrically connected to the same electrode pad 120 through a second transmission line 1122. Optionally, the electrode pad 120 connecting multiple light-emitting chips 130 is also called a zero-potential pad, which is used to provide the zero potential required for the operation of multiple light-emitting chips 130, so that the zero potential of multiple light-emitting chips 130 is in an equipotential state.

[0042] It should be noted that when the MIP chip includes a large number of light-emitting chips 130, the first wiring layer 112 and the second wiring layer 113 can be configured as multiple metal layers for ease of wiring. For example, the first wiring layer 112 includes multiple metal layers and insulating layers between the metal layers, wherein the first transmission layer and the second transmission layer can be disposed on different metal layers; or, some of the first transmission layers can be disposed on different metal layers. The second wiring layer 113 may include multiple metal layers and insulating layers between the metal layers, and multiple third transmission layers can be disposed on different metal layers.

[0043] Continue to refer to Figure 2 The MIP chip structure 100 also includes an insulating adhesive layer 160, which is located between the substrate 110 and the light-emitting chip 130. The orthographic projection of the multiple light-emitting chips 130 on the substrate 110 lies within the orthographic projection of the insulating adhesive layer 160 on the substrate 110. By filling the space between the substrate 110 and the light-emitting chip 130 with the insulating adhesive layer 160, the light-emitting chip 130 can be fixed, thereby improving the reliability of the light-emitting chip 130.

[0044] Optionally, the area of ​​the insulating adhesive layer 160 projected onto the substrate 110 is smaller than the area of ​​the substrate 110. That is, the insulating adhesive layer 160 only needs to fill the gap between the light-emitting chip 130 and the substrate 110, and does not need to cover the entire substrate 110.

[0045] The insulating adhesive layer 160 is made of acrylic or polyimide. Thus, the insulating adhesive layer 160 can be prepared by a coating method. Due to the leveling effect of the liquid, the edge area is thinner than the middle area, thus forming a slope at the edge. Specifically, the insulating adhesive layer 160 includes a side surface 161. The orthographic projection of the side surface 161 onto the substrate 110 surrounds the orthographic projection of the plurality of light-emitting chips 130 onto the substrate 110, and the side surface 161 is sloped. That is, the side surface 161 is located outside the light-emitting chips 130, thus not affecting the adhesion between the light-emitting chips 130 and the substrate 110.

[0046] The insulating adhesive layer 160 also includes a surface 162 near the substrate 110, and the included angle α between the side surface 161 and the surface 162 near the substrate 110 is greater than 0 and less than or equal to 45°. The side surface 161 is in contact with the first black film layer 151. Within this angle range, it is beneficial for the first black adhesive layer to adhere to the side surface 161, reducing the possibility of gaps or separation between them, and improving the stability of the MIP chip structure 100.

[0047] In this embodiment of the application, by providing a first redistribution layer 112 and a second redistribution layer 113 on the substrate 110, the pad positions can be flexibly arranged, and high-density electrical interconnection can be achieved, which is beneficial to reducing the size of the MIP chip structure 100.

[0048] Figure 3 This is a cross-sectional schematic diagram of a MIP chip structure provided in another embodiment of this application. Figure 4 This is a top view of a MIP chip structure provided in another embodiment of this application. Figure 5 This is a schematic diagram illustrating the electrical connection between the light-emitting chip and the electrode pads in a MIP chip structure provided in another embodiment of this application. Specifically, Figure 4 yes Figure 3 The top view of the MIP chip structure 100 shown. Figure 5 yes Figure 3 A schematic diagram showing the electrical connection between the light-emitting chip 130 and the electrode pad 120 in the MIP chip structure 100 shown.

[0049] It should be noted that the MIP chip structure 100 may include light-emitting chips 130 of different colors, for example, including blue light-emitting chip 130, green light-emitting chip 130 and red light-emitting chip 130, thus forming a three-primary-color light-emitting chip 130. Optionally, the number, color, size and arrangement of the light-emitting chips 130 can be set based on the specific application scenario of the MIP chip structure 100, and this application embodiment does not impose any limitations. Figure 3 and Figure 4 The chip arrangement shown is merely an example and does not limit the scope of protection of this application.

[0050] like Figure 3 and Figure 4 As shown, the plurality of light-emitting chips 130 include a first light-emitting chip 131, a second light-emitting chip 132, and a third light-emitting chip 133. The first light-emitting chip 131, the second light-emitting chip 132, and the third light-emitting chip 133 are arranged sequentially in the same direction. Optionally, the first light-emitting chip 131 is a blue light-emitting chip, the second light-emitting chip 132 is a green light-emitting chip, and the third light-emitting chip 133 is a red light-emitting chip.

[0051] In this embodiment, to ensure optimal light emission, the thicknesses of the different light-emitting chips are different. The thickness of the first light-emitting chip 131 is greater than or equal to 4.5 μm and less than or equal to 5.5 μm, for example, 4.5 μm, 4.7 μm, 5 μm, 5.2 μm, and 5.5 μm. The thickness of the second light-emitting chip 132 is greater than or equal to 5.5 μm and less than or equal to 6 μm, for example, 5.5 μm, 5.7 μm, and 6 μm. The thickness of the third light-emitting chip 133 is greater than or equal to 7 μm and less than or equal to 10 μm, for example, 7 μm, 7.5 μm, 8 μm, 8.5 μm, 9 μm, 9.5 μm, and 10 μm. To ensure that the first black film layer 151 can effectively block the large-angle light from adjacent light-emitting chips 130, the thickness of the first black film layer 151 may optionally be greater than 20 μm, for example, 20 μm, 22 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm, 50 μm, etc. This effectively blocks the large-angle light from adjacent light-emitting chips 130, preventing pixel color mixing and improving the display effect.

[0052] like Figure 3 and Figure 5 As shown, the electrode pad 120 includes a first pad 121, a second pad 122, a third pad 123, and a fourth pad 124. The first electrode 141 of the first light-emitting chip 131 is electrically connected to the first pad 121. Specifically, the first electrode 141 of the first light-emitting chip 131 ( Figure 5 (Not shown in the image) is electrically connected to the first pad 121 via the first transmission line 1121; the first electrode 141 of the second light-emitting chip 132 is electrically connected to the second pad 122. Specifically, the first electrode 141 of the second light-emitting chip 132 ( Figure 5 (Not shown in the image) is electrically connected to the second pad 122 via the first transmission line 1121; the first electrode 141 of the third light-emitting chip 133 is electrically connected to the third pad 123. Specifically, the first electrode 141 of the third light-emitting chip 133 ( Figure 5(Not shown) is electrically connected to the third pad 123 via the first transmission line 1121; the second electrodes 142 of the first light-emitting chip 131, the second light-emitting chip 132, and the third light-emitting chip 133 are electrically connected to the fourth pad 124. Specifically, the second electrodes 142 of the first light-emitting chip 131, the second light-emitting chip 132, and the third light-emitting chip 133 ( Figure 5 (Not shown) is electrically connected to the fourth pad 124 via the second transmission line 1122. That is, the fourth pad is the zero-position pad.

[0053] In this embodiment, the driving circuit connected to the fourth pad 124 provides zero potential for the three light-emitting chips 130 (i.e., the first light-emitting chip 131, the second light-emitting chip 132, and the third light-emitting chip 133). The three driving circuits connected to the first pad 121, the second pad 122, and the third pad 123 respectively provide the driving voltage required for the first light-emitting chip 131, the second light-emitting chip 132, and the third light-emitting chip 133 to emit light, thereby controlling the display brightness of each light-emitting chip 130 respectively.

[0054] In some embodiments, the first black film layer 151 mainly serves a planarization function. However, if the height of the first black film layer 151 is insufficient to effectively block large-angle light, a second black film layer 152 can be disposed on the first black film layer 151 to better prevent pixel color mixing. For example... Figure 6a and Figure 6b As shown, the MIP chip structure 100 also includes a second black film layer 152, which is located on the surface of the first black film layer 151 facing away from the substrate 110. The orthographic projection of the second black film layer 152 on the substrate 110 does not overlap with the orthographic projection of the light-emitting chip 130 on the substrate 110.

[0055] Optionally, such as Figure 6a As shown, the orthographic projection of the second black film layer 152 onto the substrate 110 is annular. The orthographic projection of the second black film layer 152 onto the substrate 110 surrounds the orthographic projection of the light-emitting chip 130 onto the substrate 110. A spacing 1521 exists between adjacent second black film layers 152.

[0056] Optionally, such as Figure 6b As shown, the orthographic projection of the second black film layer 152 on the substrate 110 includes a grid structure, the grid structure including grid openings 1523, and the orthographic projection of the light-emitting chip 130 on the substrate 110 is located within the orthographic projection of the grid openings 1523 on the substrate 110.

[0057] Optionally, the distance between the orthographic projection of the edge of the second black film layer 152 near the light-emitting chip 130 onto the substrate 110 and the orthographic projection of the edge of the first black film layer 151 near the light-emitting chip 130 onto the substrate 110 is greater than or equal to 0 and less than or equal to 0.3 μm, for example, 0, 0.1 μm, 0.2 μm, 0.3 μm, etc. When the first black film layer 151 and the second black film layer 152 are fabricated simultaneously, they can be patterned simultaneously. In this case, the distance between the orthographic projection of the edge of the second black film layer 152 near the light-emitting chip 130 onto the substrate 110 and the orthographic projection of the edge of the first black film layer 151 near the light-emitting chip 130 onto the substrate 110 can be 0. When the second black film layer 152 is prepared separately, due to process errors, the distance between the orthographic projection of the edge of the second black film layer 152 near the light-emitting chip 130 on the substrate 110 and the orthographic projection of the edge of the first black film layer 151 near the light-emitting chip 130 on the substrate 110 is greater than 0, but less than 0.3 μm, so as to ensure a good light-blocking effect.

[0058] In this embodiment, by setting a second black film layer 152, the light emission angle of the light emitted by the light-emitting chip 130 can be adjusted, thereby improving the light emission efficiency at a positive viewing angle; and the light emitted by adjacent light-emitting chips 130 can be prevented from mixing colors, thereby improving the purity of light emission and thus improving the display effect.

[0059] Optionally, the second black film layer 152 is made of an organic photosensitive material and a black material, wherein the organic photosensitive material includes acrylic or polyimide; and the black material includes graphite or carbon black. In some embodiments, the second black film layer 152 and the first black film layer 151 are made of the same material, so they can be prepared simultaneously. In some embodiments, the second black film layer 152 and the first black film layer 151 may be made of different materials. Optionally, the first black film layer 151 is referred to as a planarization layer, and the second black film layer 152 is referred to as a pixel definition layer.

[0060] Figure 7 This is a cross-sectional schematic diagram of a MIP chip structure provided in another embodiment of this application. Figure 8 This is a cross-sectional schematic diagram of a MIP chip structure provided in another embodiment of this application. Figure 7 The MIP chip structure 100 shown is... Figure 3 The differences between the MIP chip structure 100 shown and Figure 8The difference between the MIP chip structure 100 shown in Figure 6 and the MIP chip structure 100 shown in Figure 6 is that the MIP chip structure 100 further includes an encapsulation layer 170. The encapsulation layer 170 is located on the side of the first black film layer 151 away from the substrate 110. The orthographic projection of the encapsulation layer 170 on the substrate 110 covers the orthographic projection of the first black film layer 151 on the substrate 110 and the orthographic projection of the light-emitting chip 130 on the substrate 110. Optionally, the material of the encapsulation layer 170 includes inorganic materials, such as at least one of silicon nitride, silicon oxide, silicon oxynitride, and aluminum oxide. By providing the encapsulation layer 170, water and oxygen can be blocked, further improving the reliability of the MIP chip structure 100.

[0061] This application also provides a method for fabricating a MIP chip structure, used to fabricate the aforementioned MIP chip structure.

[0062] Figure 9 This is a schematic flowchart of a method for fabricating a MIP chip structure according to an embodiment of this application. Figure 9 As shown, the preparation method includes the following steps.

[0063] Step S901: Prepare the substrate.

[0064] In this embodiment, the substrate includes a first surface and a second surface disposed opposite to each other. A through-hole is formed on the substrate, and the through-hole is filled with a conductive pillar. The fabrication method includes: fabricating the through-hole on the substrate; and forming a conductive pillar within the through-hole.

[0065] Optionally, the cross-sectional shape of the via in the direction perpendicular to the thickness of the substrate includes rectangular, trapezoidal, V-shaped, X-shaped, etc., and this application does not limit the shape. Methods for forming vias include at least one of laser-induced wet etching, laser ablation, focused discharge machining, plasma etching, electrochemical discharge machining, and sandblasting. In the embodiments of this application, laser-induced wet etching is preferably used to form vias on the substrate. Optionally, conductive pillars are prepared within the vias using an electroplating process.

[0066] Optionally, the step of fabricating the substrate further includes: forming a first redistribution layer on a first surface of the substrate, and forming a second redistribution layer on a second surface of the substrate. The first redistribution layer includes a first transmission line and a second transmission line, and the second redistribution layer includes a third transmission line. The first redistribution layer and the second redistribution layer can be fabricated by an electroplating process.

[0067] In some embodiments, the material of the conductive pillar is the same as that of the first and second multiple wiring layers, so that the conductive pillar can be fabricated simultaneously with the first or second multiple wiring layer. Taking the simultaneous fabrication of the conductive pillar and the first multiple wiring layer as an example, the fabrication method includes: fabricating a seed layer in the via and on a first surface; coating the side of the seed layer away from the substrate with photoresist, and exposing and developing the photoresist to generate patterned photoresist; forming a metal layer on the seed layer not covered with photoresist by electroplating; removing the photoresist and etching the remaining seed layer to obtain the first multiple wiring layer and the conductive pillar.

[0068] Step S902: Connect multiple electrode pads on the second surface.

[0069] In this embodiment, the electrode pads are electrically connected to the conductive pillars. Optionally, the electrode pads are electrically connected to the conductive pillars via a third transmission line. Optionally, multiple electrode pads are electrically connected to the third transmission line via a soldering process.

[0070] Step S903: Prepare multiple light-emitting chips on the first surface.

[0071] In this embodiment, the light-emitting chip is electrically connected to the conductive pillar.

[0072] Multiple light-emitting chips are placed at predetermined positions on the first surface. Optionally, before placing the light-emitting chips, the fabrication method further includes: preparing an electrode material layer on the side of the first redistribution layer facing away from the substrate, and patterning the electrode material layer to obtain a first electrode and a second electrode, wherein the first electrode is electrically connected to a first transmission line, and the second electrode is electrically connected to a second transmission line. Therefore, the first electrode is electrically connected to a conductive pillar through the first transmission line, and the second electrode is electrically connected to a conductive pillar through the second transmission line. The light-emitting chip is electrically connected to its corresponding first and second electrodes, thereby achieving electrical connection between the light-emitting chip and the conductive pillar, and further achieving electrical connection between the light-emitting chip and the electrode pads.

[0073] Optionally, after the light-emitting chips are disposed on the first surface, the fabrication method further includes: filling an insulating adhesive material between the light-emitting chips and the substrate, and curing it to obtain an insulating adhesive layer, wherein the orthographic projections of the multiple light-emitting chips on the substrate are located within the orthographic projections of the insulating adhesive layer on the substrate. This allows the light-emitting chips to be fixed to the substrate, improving the reliability of the light-emitting chips.

[0074] Step S904: Prepare a first black film layer on the side of the light-emitting chip that is away from the substrate.

[0075] Optionally, the first black film layer has multiple openings that expose the light-emitting chip. By creating openings in the first black film layer to expose the light-emitting chip, the light emitted by the chip at a forward viewing angle is not blocked by the first black film layer, thereby improving the light emission efficiency and display effect at a forward viewing angle.

[0076] The preparation method includes: preparing a first black organic material on the side of the light-emitting chip away from the substrate; and exposing and developing the first black organic material to obtain a first black film layer. The first black organic material is formed by doping an organic photosensitive material with a black material. The doping rate of the black material in the first black organic material can be designed according to actual conditions, and this application does not impose any limitations on this.

[0077] Optionally, after preparing the first black film layer, the preparation method further includes: preparing a second black organic material on the side of the first black film layer facing away from the substrate, and exposing and developing the second black organic material to obtain the second black film layer, wherein the orthographic projection of the second black film layer on the substrate surrounds the orthographic projection of the light-emitting chip on the substrate. The second black organic material is formed by doping an organic photosensitive material with a black material. The doping rate of the black material in the second black organic material can be designed according to actual conditions, and this application does not impose any limitations on this.

[0078] In some embodiments, the first black film layer and the second black film layer are made of the same material, and the first black film layer and the second black film layer can be prepared simultaneously. Exemplarily, the preparation method includes: preparing a black organic material on the side of the light-emitting chip facing away from the substrate; exposing and developing the black organic material using a halftone mask to form a region where the black organic material is completely removed, a region where the black organic material is partially removed, and a region where the black organic material is completely retained. The region where the black organic material is completely removed forms an opening; the portion of the region where the black organic material is completely retained that is higher than the region where the black organic material is partially removed is the second black film layer, and the remainder is the first black film layer. This simplifies the preparation process and improves production efficiency.

[0079] Optionally, after preparing the first black film layer or the second black film layer, the preparation method further includes: preparing an encapsulation layer on the side of the first black film layer or the second black film layer facing away from the substrate. Optionally, the encapsulation layer can be prepared by chemical vapor deposition.

[0080] This application embodiment also provides a display panel, which includes the above-described MIP chip structure.

[0081] Figure 10 This is a top view of the display panel provided in one embodiment of this application.

[0082] like Figure 10As shown, the display panel includes a driving backplane 200 and multiple MIP chip structures 100. The MIP chip structures 100 include the aforementioned MIP chip structures and are disposed on one side of the driving backplane 200. Optionally, the multiple MIP chip structures 100 are arranged in an array on the driving backplane 200. In some embodiments, the multiple MIP chip structures 100 can also be arranged in other ways, which are not limited in this application embodiment. Furthermore, the shape and area of ​​the driving backplane 100 can be adjusted according to the actual scenario. Simultaneously, the shape, area, and spacing of each MIP chip structure 100 can also be adjusted accordingly. In actual display panels, the area of ​​each MIP chip structure 100 is typically small, and the arrangement density is typically large to improve pixel density.

[0083] The driver backplane 200 also includes multiple driver circuits and driver chips. Figure 10 (Not shown in the image) Multiple drive circuits are electrically connected to the drive chip.

[0084] The MIP chip structure 100 includes a light-emitting chip 130 and electrode pads 120, wherein the light-emitting chip 130 is electrically connected to the driving circuit through the electrode pads 120. That is, the driving chip is connected to each light-emitting chip 130 through each driving circuit, and the driving chip provides driving signals to each light-emitting chip through the driving circuit, so that the light-emitting chip 130 emits light in its corresponding area.

[0085] This application also provides a display device, which includes the display panel described in the above embodiments.

[0086] Figure 11 This is a schematic diagram of the structure of a display device provided in an embodiment of this application. Figure 11 As shown, display device 1100 is a product with image display function. For example, display device 1100 can be used to display static images, such as pictures or photographs. Display device 1100 can also be used to display moving images, such as videos.

[0087] Display device 1100 may be a laptop, mobile phone, handheld or portable computer, camera, camcorder, in-vehicle smart central control screen, calculator, smartwatch, GPS navigator, electronic photo, electronic billboard or sign, projector, etc.

[0088] The display device 1100 includes the display panel provided in any of the above embodiments.

[0089] In addition, the display device 1100 can also perform functions such as taking photos, recording videos, fingerprint recognition, and facial recognition. Accordingly, the display device 1100 also includes at least one functional module for implementing the above functions, such as an under-display camera or an under-display fingerprint recognition sensor.

[0090] The basic principles of this application have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this application are merely examples and not limitations, and should not be considered as essential features of each embodiment of this application. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the application to the necessity of employing the aforementioned specific details for implementation.

[0091] The block diagrams of devices, apparatuses, devices, and systems involved in this application are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, devices, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.

[0092] It should also be noted that in the apparatus, equipment, and methods of this application, the components or steps can be disassembled and / or recombined. These disassemblies and / or recombinations should be considered as equivalent solutions of this application.

[0093] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use this application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other aspects without departing from the scope of this application. Therefore, this application is not intended to be limited to the aspects shown herein, but rather to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0094] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this application to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations thereof.

[0095] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A MIP chip structure, characterized in that, include: A substrate includes a first surface and a second surface disposed opposite to each other, and a plurality of through holes are provided on the substrate, wherein the through holes are filled with conductive pillars; A first black film layer is located on the first surface, and the first black film layer has multiple openings; Multiple light-emitting chips are located within the opening; Multiple electrode pads are located on the second surface, and the electrode pads are electrically connected to the light-emitting chip through the conductive pillars.

2. The MIP chip structure according to claim 1, characterized in that, It also includes an insulating adhesive layer, which is located between the substrate and the light-emitting chip, and the orthographic projection of the plurality of light-emitting chips on the substrate is located within the orthographic projection of the insulating adhesive layer on the substrate; Preferably, the projected area of ​​the insulating adhesive layer on the substrate is smaller than the area of ​​the substrate; Preferably, the insulating adhesive layer is made of acrylic or polyimide; Preferably, the insulating adhesive layer includes a side surface, the orthographic projection of the side surface on the substrate surrounds the orthographic projection of the plurality of light-emitting chips on the substrate, and the side surface is a bevel. Preferably, the insulating adhesive layer further includes a surface adjacent to the substrate, wherein the angle between the side surface and the surface adjacent to the substrate is greater than 0 and less than or equal to 45°; Preferably, the side surface is in contact with the first black film layer.

3. The MIP chip structure according to claim 1, characterized in that, The thickness of the first black film layer is greater than the thickness of the light-emitting chip; Preferably, the thickness of the first black film layer is greater than 20 μm; Preferably, the surface of the light-emitting chip away from the substrate is not blocked by the first black film layer; Preferably, the light-emitting chip includes a first light-emitting chip, a second light-emitting chip, and a third light-emitting chip, wherein the thickness of the first light-emitting chip is greater than or equal to 4.5 μm and less than or equal to 5.5 μm; the thickness of the second light-emitting chip is greater than or equal to 5.5 μm and less than or equal to 6 μm; and the thickness of the third light-emitting chip is greater than or equal to 7 μm and less than or equal to 10 μm. Preferably, the first light-emitting chip is a blue light-emitting chip, the second light-emitting chip is a green light-emitting chip, and the third light-emitting chip is a red light-emitting chip; Preferably, the material of the first black film layer includes organic photosensitive material and black material; Preferably, the organic photosensitive material comprises polyimide or acrylic; and / or, the black material comprises graphite or carbon black.

4. The MIP chip structure according to claim 1, characterized in that, It also includes a second black film layer, which is located on the surface of the first black film layer that is opposite to the substrate. The orthographic projection of the second black film layer on the substrate does not overlap with the orthographic projection of the light-emitting chip on the substrate; Preferably, the orthographic projection of the second black film layer on the substrate is annular, and the orthographic projection of the second black film layer on the substrate surrounds the orthographic projection of the light-emitting chip on the substrate, wherein there is a gap between adjacent second black film layers; or, the orthographic projection of the second black film layer on the substrate includes a grid structure, the grid structure includes grid openings, and the orthographic projection of the light-emitting chip on the substrate is located within the orthographic projection of the grid openings on the substrate. Preferably, the distance between the orthographic projection of the edge of the second black film layer near the light-emitting chip on the substrate and the orthographic projection of the edge of the first black film layer near the light-emitting chip on the substrate is greater than or equal to 0 and less than or equal to 0.3 μm; Preferably, the material of the second black film layer includes organic photosensitive material and black material; Preferably, the second black film layer and the first black film layer are made of the same material.

5. The MIP chip structure according to claim 1, characterized in that, It also includes an encapsulation layer, which is located on the side of the first black film layer away from the substrate. The orthogonal projection of the encapsulation layer on the substrate covers the orthogonal projection of the first black film layer on the substrate and the orthogonal projection of the light-emitting chip on the substrate. Preferably, the material of the encapsulation layer includes at least one of silicon nitride, silicon oxide, silicon oxynitride, and aluminum oxide.

6. The MIP chip structure according to claim 1, characterized in that, The substrate further includes a first redistribution layer located on the first surface, the first redistribution layer including a first transmission line and a second transmission line; the light-emitting chip is provided with a first electrode and a second electrode, the first electrode being electrically connected to the conductive pillar through the first transmission line, and the second electrode being electrically connected to the conductive pillar through the second transmission line. The substrate further includes a second redistribution layer located on the second surface, the second redistribution layer including a third transmission line, and the electrode pads are electrically connected to the conductive pillars through the third transmission line; Preferably, the first electrode and the second electrode are electrically connected to different conductive pillars; Preferably, the plurality of light-emitting chips, namely the first light-emitting chip, the second light-emitting chip, and the third light-emitting chip, include electrode pads comprising a first pad, a second pad, a third pad, and a fourth pad. The first electrode of the first light-emitting chip is electrically connected to the first pad, the first electrode of the second light-emitting chip is electrically connected to the second pad, the first electrode of the third light-emitting chip is electrically connected to the third pad, and the second electrodes of the first, second, and third light-emitting chips are electrically connected to the fourth pad. Preferably, the electrode pads are made of at least one of chromium, aluminum, gold, indium, copper, and titanium; and / or, the first transmission line, the second transmission line, and the third transmission line are made of at least one of copper, aluminum, gold, and titanium; and / or, the first electrode and the second electrode are made of at least one of copper, aluminum, gold, and titanium. Preferably, the conductive post is made of at least one of copper, aluminum, gold, and titanium; Preferably, the substrate includes at least one of a glass substrate, a silicon substrate, a ceramic substrate, and a polymer substrate.

7. A method for fabricating a MIP chip structure, characterized in that, include: A substrate is prepared, the substrate including a first surface and a second surface disposed opposite to each other, and a plurality of through holes are provided on the substrate, the through holes being filled with conductive pillars; Multiple electrode pads are connected to the second surface, and the electrode pads are electrically connected to the conductive pillars. Multiple light-emitting chips are fabricated on the first surface, and the light-emitting chips are electrically connected to the conductive pillars. A first black film layer is prepared on the side of the light-emitting chip facing away from the substrate. The first black film layer has a plurality of openings that expose the light-emitting chip.

8. The method for fabricating a MIP chip structure according to claim 7, characterized in that, Before the step of preparing the first black film layer on the side of the light-emitting chip away from the substrate, the preparation method further includes: filling the space between the light-emitting chip and the substrate with insulating adhesive material, curing it to obtain an insulating adhesive layer, wherein the orthographic projection of the plurality of light-emitting chips on the substrate is located within the orthographic projection of the insulating adhesive layer on the substrate; Preferably, the step of preparing the first black film layer on the side of the light-emitting chip away from the substrate includes: preparing a first black organic material on the side of the light-emitting chip away from the substrate; and exposing and developing the first black organic material to obtain the first black film layer. Preferably, after the step of preparing the first black film layer on the side of the light-emitting chip away from the substrate, the preparation method further includes: preparing a second black organic material on the side of the first black film layer away from the substrate, and exposing and developing the second black organic material to obtain a second black film layer, wherein the orthographic projection of the second black film layer on the substrate surrounds the orthographic projection of the light-emitting chip on the substrate. Preferably, after preparing the first black film layer or the second black film layer, the preparation method further includes: preparing an encapsulation layer on the side of the first black film layer or the second black film layer opposite to the substrate.

9. The method for fabricating a MIP chip structure according to claim 7, characterized in that, The preparation of the substrate includes: The through-hole is formed on the substrate; The conductive post is formed within the through hole; Preferably, the substrate fabrication further includes: forming a first redistribution layer on the first surface and forming a second redistribution layer on the second surface; the first redistribution layer includes a first transmission line and a second transmission line; the light-emitting chip is provided with a first electrode and a second electrode; the first electrode is electrically connected to the conductive pillar through the first transmission line; the second electrode is electrically connected to the conductive pillar through the second transmission line; the second redistribution layer includes a third transmission line; and the electrode pads are electrically connected to the conductive pillar through the third transmission line.

10. A display panel, characterized in that, include: A driving backplane, the driving backplane including a plurality of driving circuits and a driving chip, the plurality of driving circuits being electrically connected to the driving chip; Multiple MIP chip structures, including the MIP chip structure according to any one of claims 1 to 6, wherein the MIP chip structure is disposed on one side of a driving backplane, and the light-emitting chip of the MIP chip structure is electrically connected to the driving circuit through the electrode pads of the MIP chip structure.

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