A non-polar wireless communication IO module, a communication method, a master control unit and a storage medium

Abstract

The application discloses a non-polarity wireless communication IO module, a communication method, a master control unit and a storage medium. The non-polarity wireless communication IO module is composed of a master control unit, a collection circuit, an output driving circuit and a wireless communication unit to form a peer-to-peer wireless communication system, and realizes synchronous collection and bidirectional real-time transmission of multiple IO input signals. The collection circuit uses a parallel loading end to lock multiple input signals at one time, and sends the signals to the master control unit through a serial data output end. The wireless communication unit realizes instant sending and receiving of combined state data through an interrupt triggering mechanism. The master control unit controls the output driving circuit to execute corresponding IO output according to the received data. The design makes any module can be used as a sending end or a receiving end, realizes low-delay, real-time and peer-to-peer bidirectional digital signal synchronization, and is suitable for industrial automation and remote control scenes.

Description

Technical Field

[0001] This application relates to the field of wireless communication technology, and in particular to a non-polar wireless communication I / O module, communication method, main control unit and storage medium. Background Technology

[0002] In applications such as industrial automation, smart homes, and remote device control, it is often necessary to transmit multiple digital signals between separate nodes to achieve remote acquisition and control of switch status. Traditional methods typically rely on wired connections for signal transmission. However, in situations with long wiring distances, complex environments, or dispersed nodes, problems arise such as high wiring costs, complex construction, difficult maintenance, and insufficient system flexibility. Therefore, using wireless methods to replace wired connections for digital signal transmission is gradually becoming a development trend.

[0003] In existing wireless digital signal transmission schemes, some technologies can wirelessly transmit input signals to remote output signals, but these are mostly focused on one-way control or simple response interactions, making it difficult to establish a stable, symmetrical, bidirectional state association between two nodes. In some applications, it is desirable for any input state change of any node to be instantly perceived and mapped to the corresponding output state by the other node, without pre-fixing a master-slave relationship or complex communication configurations, so that the two nodes logically exhibit a peer-to-peer, transparent connection structure. However, existing technologies generally suffer from insufficient synchronization, large state update delays, or complex structures when implementing wireless transmission of multiple digital signals, making it difficult to meet the aforementioned application requirements.

[0004] Therefore, how to achieve low-latency, bidirectional, and peer-to-peer synchronous transmission of multiple digital I / O signals between two wireless nodes under the premise of relatively simple structure has become a technical problem that urgently needs to be solved in this field. Summary of the Invention

[0005] To address the aforementioned technical problems, this application provides a nonpolar wireless communication I / O module, a communication method, a main control unit, and a storage medium.

[0006] The technical solution provided in this application is described below:

[0007] The first aspect of this application provides a non-polar wireless communication I / O module, which is a circuit device that can form a peer-to-peer wireless communication system with at least one non-polar wireless communication I / O module with the same structure. The non-polar wireless communication I / O module includes at least: a main control unit, a data acquisition circuit, an output driving circuit, and a wireless communication unit.

[0008] The main control unit has at least: a parallel acquisition control pin, a serial clock output pin, a serial data input pin, and a wireless communication interrupt response pin;

[0009] The acquisition circuit is electrically connected to the main control unit and is used to synchronously acquire multiple I / O input signals. The acquisition circuit includes at least:

[0010] Multiple parallel input terminals, a parallel loading terminal PL, a clock input terminal CP, and a serial data output terminal Q.

[0011] The parallel loading terminal PL is electrically connected to the parallel acquisition control pin to latch the multiple IO input signals, the clock input terminal CP is electrically connected to the serial clock output pin to output the multiple IO input signals, the serial data output terminal Q is electrically connected to the serial data input pin to output the multiple IO input signals to the main control unit, and the acquisition circuit is configured to synchronously acquire multiple IO input signals in one parallel loading operation;

[0012] The wireless communication unit is communicatively connected to the main control unit and includes at least a wireless transceiver chip and an interrupt output pin IRQ. The IRQ is electrically connected to the wireless communication interrupt response pin and is used to trigger the main control unit to execute the corresponding IO input signal synchronization when receiving wireless data.

[0013] The output driving circuit is communicatively connected to the main control unit. The main control unit takes the multiple IO input signals obtained through the serial data output terminal Q as combined state data and sends it to another non-polar wireless communication IO module through the wireless communication unit. When it receives wireless data from the other non-polar wireless communication IO module, it executes the corresponding IO signal output through the output driving circuit. The non-polar wireless communication IO module and the other non-polar wireless communication IO module are each other's transmitter and receiver.

[0014] Optionally, the main control unit is communicatively connected to the wireless communication unit and the output drive circuit through the same serial peripheral SPI interface.

[0015] Optionally, the acquisition circuit includes a multi-input isolation circuit and a parallel input serial output data acquisition circuit. The multi-input isolation circuit includes multiple opto-isolators. The input side of each opto-isolator is connected to the corresponding external digital input signal through a current-limiting resistor. The output side is used to convert the external digital input signal into an internal logic level signal that matches the operating voltage of the main control unit.

[0016] The data acquisition circuit includes at least one parallel input serial output shifter. The parallel input terminals of the shifter are respectively connected to the output side of the multi-input isolation circuit to receive multiple isolated external digital input signals in parallel. Under the control of the parallel loading terminal PL, the multiple I / O input signals are synchronously latched. Under the drive of the clock input terminal CP, the multiple I / O input signals are serially output to the main control unit via the serial data output terminal Q.

[0017] Optionally, the output drive circuit includes at least one set of multi-channel power drive devices, which are communicatively connected to the main control unit and are used to drive multiple external digital outputs according to the control data output by the main control unit.

[0018] The multi-channel power drive device receives output status data from the main control unit via a serial communication bus, and each of the multi-channel power drive devices is used to drive multiple external loads.

[0019] The output drive circuit also includes an enable control pin, which is electrically connected to the main control unit and is used to enable the output channels of the multi-channel power drive device.

[0020] Optionally, the multi-channel power driving device includes at least: multiple power output pins, at least one power supply pin, at least one power ground pin, and a communication control interface, wherein each of the power output pins is connected to a corresponding external IO output terminal, and the communication control interface is communicatively connected to the main control unit for controlling each power output channel.

[0021] Optionally, the output drive circuit further includes a fault indication pin, the enable control pin is connected to the main control unit through an external resistor network, and the fault indication pin is simultaneously connected to the parallel acquisition control pin of the indication unit and the main control unit.

[0022] Optionally, it also includes a power conversion unit, which includes an isolated DC-DC converter and a low-dropout linear regulator; the input terminal of the isolated DC-DC converter is used to receive an external DC power input, and the output terminal provides an isolated first operating voltage; the input terminal of the low-dropout linear regulator is electrically connected to the output terminal of the isolated DC-DC converter, and the output terminal of the low-dropout linear regulator is used to output a second operating voltage; the second operating voltage supplies power to the main control unit and the wireless communication unit respectively.

[0023] Optionally, the non-polar wireless communication I / O module further includes a hardware configuration unit. The main control unit is also provided with a configuration detection pin. The hardware configuration unit includes at least multiple DIP switches. The DIP switches are electrically connected to the configuration detection pin through pull-up resistors or pull-down resistors, and at least one DIP switch is defined as a pairing control bit. The main control unit is configured to read the level state of the pairing control bit during the power-on reset phase, and when the pairing control bit is in a predetermined valid level state, control the wireless communication unit to enter the pairing working state to perform a communication role binding operation with another non-polar wireless communication I / O module.

[0024] Optionally, the indicator unit is electrically connected to the main control unit. When the wireless communication unit is in a paired working state, the indicator unit is controlled to output a paired status indication in a first indication mode. When entering a normal working state, the indicator unit is controlled to output a working status indication in a second indication mode different from the first indication mode.

[0025] A second aspect of this application provides a communication method applied to a nonpolar wireless communication I / O module as described in the first aspect and any one of the first aspects, the method comprising:

[0026] The main control unit triggers the parallel loading terminal PL of the acquisition circuit through the parallel acquisition control pin, so that the acquisition circuit synchronously latches the IO input signals corresponding to multiple parallel input terminals at the same time point.

[0027] The main control unit outputs a clock signal to the clock input terminal CP of the acquisition circuit through the serial clock output pin, so as to drive the acquisition circuit to output the latched multiple IO input signals sequentially to the serial data input pin through the serial data output terminal Q;

[0028] The main control unit uses the multiple IO input signals as combined state data and sends them to another non-polar wireless communication IO module through the wireless transceiver chip of the wireless communication unit.

[0029] When a wireless communication unit receives the combined status data from another non-polar wireless communication IO module, or completes the wireless transmission of the combined status data, the main control unit receives the interrupt signal output by the wireless communication unit through the interrupt output pin IRQ.

[0030] The main control unit interrupts the current service process according to the interrupt signal, and executes the corresponding IO output control through the output drive circuit according to the combined state data, so as to synchronize the multi-channel IO input signals between at least two non-polar wireless communication IO modules.

[0031] Optionally, the main control unit triggers the parallel loading terminal PL of the acquisition circuit through the parallel acquisition control pin, causing the acquisition circuit to synchronously latch the IO input signals corresponding to multiple parallel input terminals at the same time point, including:

[0032] When the main control unit triggers the parallel loading terminal PL of the acquisition circuit, it acquires the external digital input signal through the multi-input isolation circuit and converts the external digital input signal into an internal logic level signal through an optocoupler.

[0033] The internal logic level signal is output to the serial data input pin through the serial data output terminal.

[0034] A third aspect of this application provides a master control unit, applied in the communication method as described in the first aspect and any one of the first aspects, the master control unit comprising:

[0035] The parallel acquisition control module is used to trigger the parallel loading terminal PL of the acquisition circuit through the parallel acquisition control pin, so that the acquisition circuit synchronously latches the IO input signals corresponding to multiple parallel input terminals at the same time point.

[0036] The serial acquisition control module is used to output a clock signal to the clock input terminal CP of the acquisition circuit through the serial clock output pin, so as to drive the acquisition circuit to output the latched multiple IO input signals sequentially to the serial data input pin through the serial data output terminal Q.

[0037] A combined state data generation module is used to take the multi-channel IO input signals as combined state data and send them to another non-polar wireless communication IO module through the wireless transceiver chip of the wireless communication unit.

[0038] The wireless communication control module is used to receive the interrupt signal output by the wireless communication unit through the interrupt output pin IRQ when a wireless communication unit receives the combined status data from another non-polar wireless communication IO module, or completes the wireless transmission of the combined status data.

[0039] An interrupt response module is used to interrupt the current service process by the interrupt signal, and to execute the corresponding IO output control through the output drive circuit according to the combined state data, so as to synchronize the multiple IO input signals between at least two non-polar wireless communication IO modules, wherein the non-polar wireless communication IO module and the other non-polar wireless communication IO module are each other's transmitter and receiver.

[0040] A third aspect of this application provides a master control unit, including:

[0041] Processor, memory, input / output units, and bus;

[0042] The processor is connected to the memory, the input / output unit, and the bus;

[0043] The memory stores a program, which the processor invokes to execute the second aspect and any optional method of the second aspect.

[0044] The fourth aspect of this application provides a computer-readable storage medium on which a program is stored, which, when executed on a computer, performs the methods of the second aspect and any optional method of the second aspect.

[0045] As can be seen from the above technical solutions, this application has the following beneficial effects:

[0046] 1. In this application, by setting parallel input terminals and parallel loading terminals in the acquisition circuit, multiple I / O input signals can be latched and read at the same time, thereby ensuring the consistency of the input states before wireless transmission. This structure avoids the state deviations introduced by different sampling timings in the channel-by-channel acquisition method, which is beneficial to improving the accuracy of multi-channel I / O synchronous transmission.

[0047] 2. By combining parallel loading with serial output acquisition, the main control unit only needs to use a small number of control pins to acquire multiple IO input signals, which effectively reduces the main control unit's IO resource usage and facilitates the miniaturization design and multi-channel expansion of the module.

[0048] 3. The non-polarized wireless communication I / O modules of this application are used in pairs with identical structures and functions, without pre-defined master-slave roles between the modules. During operation, when either module detects a change in its local I / O input state, it can act as the current service trigger to collect the corresponding I / O input state and transmit it wirelessly; the other module, upon receiving the wireless data, executes the corresponding I / O output control through an interrupt response method. In this way, the two modules can dynamically switch between service initiation and response roles at different service trigger times, forming an event-triggered, symmetrical, bidirectional I / O state synchronization mechanism between the modules, thereby avoiding pre-definition of communication direction or module roles and improving flexibility.

[0049] 4. By using the interrupt-triggered connection between the wireless communication unit and the main control unit, the main control unit can be triggered to execute the corresponding processing flow in a timely manner when wireless data reception or transmission is completed. This reduces the waiting time caused by polling detection, helps to improve the response speed of IO state changes, and meets the application scenarios with high real-time requirements.

[0050] 5. This application reduces the number of communications and protocol processing overhead by transmitting multiple IO input signals as combined state data wirelessly, thereby reducing the probability of errors in wireless communication. At the same time, the unified output control of the received state data through the output drive circuit helps to ensure the consistency between the input state and the output state and improves the stability of operation. Attached Figure Description

[0051] To more clearly illustrate the technical solutions in this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0052] Figure 1 This is a schematic diagram of the overall structure of a non-polar wireless communication I / O module according to this application;

[0053] Figure 2 This is a schematic diagram of the circuit structure of the main control unit in this application;

[0054] Figure 3 This is a schematic diagram of the output drive circuit in this application;

[0055] Figure 4 This is a schematic diagram of the circuit structure of the data acquisition circuit in this application;

[0056] Figure 5 This is a schematic diagram of the circuit structure of the input isolation circuit in this application;

[0057] Figure 6 This is a schematic diagram of the circuit structure of the external I / O interface in this application;

[0058] Figure 7 This is a schematic diagram of the circuit structure of the power conversion unit in this application;

[0059] Figure 8 This is a schematic diagram of the physical product structure of the non-polar wireless communication I / O module in this application;

[0060] Figure 9 This is a schematic flowchart of an embodiment of the communication method in this application;

[0061] Figure 10 This is a schematic diagram of the structure of one embodiment of the main control unit in this application;

[0062] Figure 11 This is a schematic diagram of another embodiment of the main control unit in this application.

[0063] It should be further noted that some of the text labels shown in the accompanying drawings of this application (such as signal names, network identifiers, pin names, or engineering codes) are only used to illustrate the connection relationships and signal functions between electrical nodes. They are functional or explanatory labels commonly used in the implementation of circuit engineering, rather than "attachment labels" in the legal sense.

[0064] The textual annotations are not intended to refer to specific technical features, nor do they constitute a limitation on the technical features in the claims. For those skilled in the art, without affecting the implementation of the technical solution of this invention, the aforementioned electrical connection markings and pin names can be replaced, adjusted, or omitted according to specific device selection, design habits, or engineering needs. Such changes do not affect the substantive content of this invention and should all be considered to fall within the protection scope of this application. Detailed Implementation

[0065] It should be noted that the communication method described in this invention is not limited to a specific executing entity. In specific implementation, each step of the method can be executed independently by the main control unit in any nonpolar wireless communication I / O module, or it can be executed collaboratively by the main control units in multiple nonpolar wireless communication I / O modules during wireless communication interaction.

[0066] In a peer-to-peer wireless communication system employing multiple non-polarized wireless communication I / O modules, any non-polarized wireless communication I / O module can act as the current service trigger, executing the corresponding I / O input acquisition and wireless transmission steps, when its local I / O input state changes. Meanwhile, another non-polarized wireless communication I / O module, upon receiving the wireless data, executes the corresponding I / O output control steps. As the service trigger source changes, each non-polarized wireless communication I / O module can undertake different steps in the method at different times, thereby achieving dynamic allocation of method steps across the executing entities.

[0067] Therefore, the execution subject of each step in the method of the present invention does not constitute a limitation on the scope of protection of the method, nor does it affect the method's ability to achieve symmetrical, non-fixed master-slave bidirectional IO state synchronization between non-polar wireless communication IO modules with the same structure.

[0068] The nonpolar wireless communication I / O module and communication method described in this application are suitable for application scenarios that require bidirectional, real-time synchronization of digital signals between two or more spatially separated nodes, and are especially suitable for system environments where wiring is inconvenient or where wiring costs, flexibility and reliability are high.

[0069] In a typical application scenario, the non-polarized wireless communication I / O module can be used for equipment linkage control in industrial settings. For example, between two independently arranged industrial devices or control cabinets, by configuring a non-polarized wireless communication I / O module with the same structure on each side, changes in the digital input signal on one side can be synchronously mapped to the corresponding output port of the other side, while input changes on the other side can also be synchronously transmitted back to the first side. This creates a "virtual electrical connection" equivalent to multiple bidirectional control lines without laying physical wires. This method can effectively reduce on-site wiring workload and lower construction and maintenance costs.

[0070] In another application scenario, the non-polarized wireless communication I / O module can be used in smart building or smart home systems to achieve wireless linkage between distributed switches, sensors, and actuators. For example, control nodes located in different rooms or on different floors can be paired through the non-polarized wireless communication I / O module, so that changes in the input state of buttons, switches, or sensors on any node can trigger the action of relays, indicator lights, or actuators on another node in real time, without the need to pre-determine master and slave roles, thus improving the flexibility of system configuration and expansion.

[0071] Furthermore, the non-polarized wireless communication I / O module of this application is also highly applicable in mobile devices, temporary devices, or modular systems. For example, in applications that require frequent disassembly, layout adjustments, or temporary setups, replacing traditional wired I / O connections with a non-polarized wireless communication I / O module can avoid the time consumption and interface wear caused by repeated wiring, while ensuring the real-time performance and consistency of I / O status synchronization.

[0072] It should be noted that the above application scenarios are only used to illustrate the applicable environment of the technical solution of this application and do not constitute a limitation on the scope of protection of this application. The non-polarized wireless communication I / O module and its communication method described in this application can also be applied to other scenarios that require wireless bidirectional synchronization of digital signals, depending on actual needs.

[0073] To facilitate understanding of the correspondence between functional pins, signal lines, and specific circuit devices in the embodiments of this application, and to illustrate the implementation of the method steps in a specific hardware structure, the main pin and signal connection relationships between the main control unit, acquisition circuit, wireless communication unit, and output drive circuit are listed and described in the table below, in conjunction with an optional embodiment.

[0074] It should be noted that the information provided in this application... Figures 2 to 7 This is an example of a circuit structure in actual PCB fabrication. The circuit structure, component selection, pin connection relationship and layout shown are all derived from engineering implementation examples. It is used to illustrate the working principle and implementation idea of ​​the present invention, and not to limit the scope of protection of the present invention. Figure 8 This is a schematic diagram of a physical product of a non-polar wireless communication I / O module provided in this application. Figure 8 In this method, the product is fixed on a fixed structure that can slide up, down, left, and right. In practice, multiple products can be placed at different points to achieve non-polarity data synchronization.

[0075] For those skilled in the art, without departing from the technical concept of this invention, equivalent substitutions, deletions, or adjustments can be made to the specific device models, pin assignments, circuit connection forms, and module divisions in the accompanying drawings, all of which should fall within the protection scope of this application.

[0076] Meanwhile, to facilitate understanding of the correspondence between the functional pins, signal lines and specific circuit devices in the embodiments of this application, and to illustrate the implementation of the method steps in a specific hardware structure, the main pin and signal connection relationships between the main control unit, the acquisition circuit, the wireless communication unit and the output drive circuit are listed and described in the table below, in conjunction with an optional embodiment.

[0077]

[0078] It should be noted that the pin and signal correspondences listed in the table above are only used to assist in explaining the functional correspondences between the functional pins, signal lines and specific circuit devices in the embodiments of this application, so as to facilitate understanding of the connection relationships between the hardware units in the technical solution of this application and their roles in the method execution process.

[0079] The specific device models, network labels, and pin numbers of the main control unit (e.g., PC3, PB5, PB10, etc.) mentioned in the table are all exemplary descriptions used to illustrate a feasible implementation in one optional embodiment and do not constitute a limitation on the technical solution of this application. Without departing from the inventive concept of this application, those skilled in the art can choose other equivalent device models, signal naming methods, or main control unit pin assignment methods to achieve the same function according to actual application needs.

[0080] Furthermore, the descriptions of each pin, signal line, and interface in the claims of this application are based on their implemented functions and connection relationships, and are not limited to the specific hardware labeling forms shown in the table above; the connection relationships shown in the drawings are also functional illustrations and are not necessarily characterized by specific pin numbers.

[0081] Please see Figures 1 to 8This application first provides an embodiment of a nonpolar wireless communication I / O module. In this embodiment, the nonpolar wireless communication I / O module is a circuit device that can form a peer-to-peer wireless communication system with at least one nonpolar wireless communication I / O module with the same structure. The nonpolar wireless communication I / O module includes at least: a main control unit, a data acquisition circuit, an output driving circuit, and a wireless communication unit.

[0082] The main control unit has at least: a parallel acquisition control pin, a serial clock output pin, a serial data input pin, and a wireless communication interrupt response pin;

[0083] The acquisition circuit is electrically connected to the main control unit and is used to synchronously acquire multiple I / O input signals. The acquisition circuit includes at least:

[0084] Multiple parallel input terminals, a parallel loading terminal PL, a clock input terminal CP, and a serial data output terminal Q.

[0085] The parallel loading terminal PL is electrically connected to the parallel acquisition control pin to latch the multiple IO input signals, the clock input terminal CP is electrically connected to the serial clock output pin to output the multiple IO input signals, the serial data output terminal Q is electrically connected to the serial data input pin to output the multiple IO input signals to the main control unit, and the acquisition circuit is configured to synchronously acquire multiple IO input signals in one parallel loading operation;

[0086] The wireless communication unit is communicatively connected to the main control unit and includes at least a wireless transceiver chip and an interrupt output pin IRQ. The IRQ is electrically connected to the wireless communication interrupt response pin and is used to trigger the main control unit to execute the corresponding IO input signal synchronization when receiving wireless data.

[0087] The output driving circuit is communicatively connected to the main control unit. The main control unit takes the multiple IO input signals obtained through the serial data output terminal Q as combined state data and sends it to another non-polar wireless communication IO module through the wireless communication unit. When it receives wireless data from the other non-polar wireless communication IO module, it executes the corresponding IO signal output through the output driving circuit. The non-polar wireless communication IO module and the other non-polar wireless communication IO module are each other's transmitter and receiver.

[0088] Specifically, this embodiment provides a non-polarized wireless communication I / O module. As mentioned earlier, this non-polarized wireless communication I / O module is a circuit device that can form a peer-to-peer wireless communication system with at least one non-polarized wireless communication I / O module of the same structure. Two or more of the non-polarized wireless communication I / O modules maintain consistency in hardware structure and can all perform I / O input acquisition, wireless data transmission, and I / O output control after wireless data reception during system operation, thereby forming a symmetrical wireless I / O synchronization relationship between the modules.

[0089] I. Main Control Unit 001

[0090] In this embodiment, the main control unit 001 serves as the core control component of the non-polar wireless communication I / O module, coordinating data interaction and timing control between the acquisition circuit 002, the wireless communication unit 003, and the output drive circuit 004. The main control unit 001 can be implemented using a microcontroller (MCU), such as an ARM-based microcontroller, but is not limited to this.

[0091] The main control unit 001 includes at least the following pin resources:

[0092] The parallel acquisition control pin is used to output acquisition control signals to control the acquisition circuit 002 to perform parallel loading operations;

[0093] The serial clock output pin is used to provide the clock signal required for serial shifting to the acquisition circuit 002;

[0094] The serial data input pin is used to receive multiple IO input signals serially output by the acquisition circuit 002;

[0095] The wireless communication interrupt response pin is used to receive the interrupt signal output by the wireless communication unit 003 and respond to the wireless event in a timely manner when the interrupt is triggered.

[0096] With the above pin configuration, the main control unit 001 can centrally collect the status of multiple inputs without polling external IO inputs one by one, and quickly enter the corresponding processing flow when a wireless communication event occurs.

[0097] II. Acquisition Circuit 002

[0098] The acquisition circuit 002 is electrically connected to the main control unit 001 and is used to synchronously acquire multiple I / O input signals. The acquisition circuit 002 includes at least multiple parallel input terminals, a parallel loading terminal PL, a clock input terminal CP, and a serial data output terminal Q.

[0099] In the specific implementation, multiple parallel input terminals are used to receive multiple external digital I / O input signals, such as high and low level signals from buttons, switches, sensor contacts, or other digital output devices. The parallel loading terminal PL is electrically connected to the parallel acquisition control pin of the main control unit 001. Under the trigger of this control signal, the acquisition circuit 002 latches the level state of each parallel input terminal at the same point in time, thereby avoiding time deviation caused by sampling one channel at a time.

[0100] The clock input terminal CP is electrically connected to the serial clock output pin of the main control unit 001, and is used to shift out the latched multiple I / O input signals bit by bit under the drive of the clock signal output by the main control unit 001 after latching is completed. The serial data output terminal Q is used to output the multiple I / O input signals to the serial data input pin of the main control unit 001 in the form of a serial data stream.

[0101] With the above structure, the acquisition circuit 002 can complete the synchronous acquisition of multiple IO input signals in a single parallel loading operation and transmit them to the main control unit 001 in a serial manner, thereby reducing the IO resource occupation of the main control unit 001 while ensuring the consistency of acquisition.

[0102] In one embodiment, the multi-channel input signal sampling unit is implemented using a parallel input, serial output structure, preferably using a 74HC165 or a functionally equivalent parallel input, serial output shift register chip.

[0103] Each of the aforementioned parallel input serial output chips has multiple parallel input terminals, which are respectively connected to the opto-isolated digital input signals; when its parallel load control terminal PL is at an active level, it can simultaneously latch the current state of all input channels without the need for a clock signal.

[0104] Specifically, in one input acquisition cycle:

[0105] The main control unit 001 first controls the parallel loading terminal to enter the active state, so that the level state of all input channels is synchronously latched;

[0106] Subsequently, the main control unit 001 drives the chip through a clock signal to serially shift out the latched multi-channel input states;

[0107] Multiple parallel input serial output chips can be cascaded to allow 16 or more input signals to be read in a continuous clock sequence.

[0108] In this way, the 16 input states are logically collected and processed as a whole state event, rather than being read by polling each GPIO.

[0109] III. Wireless Communication Unit 003

[0110] The wireless communication unit 003 is communicatively connected to the main control unit 001 and is used to transmit combined state data corresponding to multiple IO input signals between different non-polarized wireless communication IO modules. In this embodiment, the wireless communication unit 003 includes at least a wireless transceiver chip and an interrupt output pin IRQ.

[0111] The wireless transceiver chip is used to transmit and receive wireless data. Its operating frequency band, communication rate, and modulation method can be selected according to actual application requirements. For example, a short-range wireless communication scheme in the 2.4GHz band can be used, but it is not limited to this. The main control unit 001 writes the combined state data to be transmitted to the wireless transceiver chip through the communication interface and controls it to complete the wireless transmission.

[0112] The interrupt output pin IRQ is electrically connected to the wireless communication interrupt response pin of the main control unit 001. When the wireless communication unit 003 completes wireless data transmission or receives wireless data from another non-polar wireless communication IO module, it outputs an interrupt signal to the main control unit 001 through the interrupt output pin IRQ, thereby triggering the main control unit 001 to promptly enter the corresponding wireless event processing flow, avoiding continuous polling of the wireless communication status by the main control unit 001.

[0113] In this embodiment, the wireless communication unit 003 preferably uses a 2.4GHz band RF transceiver chip nRF24L01+, which is connected to the main control unit 001 via an SPI interface. The specific pin connection relationship is as follows:

[0114] SCK, MOSI, and MISO are respectively connected to the SPI clock pin, master output / slave input pin, and master input / slave output pin of the master control unit 001;

[0115] The CSN pin is connected to the chip select control pin of the main control unit 001;

[0116] The CE pin is connected to a general GPIO pin of the main control unit 001 to control the switching of wireless transmit and receive states;

[0117] The IRQ pin is connected to the external interrupt pin of the main control unit 001 and is used to generate an interrupt signal when wireless data reception or transmission is complete. In this embodiment, the IRQ of the wireless communication unit 003 is used to indicate one or a combination of the following events:

[0118] Successfully received combined status data from the paired module;

[0119] Wireless transmission completed and confirmation received;

[0120] Wireless communication is in an abnormal state.

[0121] When the interrupt signal is generated, the main control unit 001 immediately responds to the external interrupt, interrupts the current non-critical task process, and prioritizes the execution of processing steps related to state synchronization, including data parsing and output state update.

[0122] By adopting an interrupt-driven approach instead of periodically polling the wireless communication status, the problem of accumulated response delay caused by asynchronous polling cycles in peer-to-peer communication systems can be avoided. This ensures that in a masterless architecture, any change in the state of any module can be responded to quickly and definitively in another module.

[0123] In this embodiment, the input acquisition action serves as a prerequisite for wireless state synchronization.

[0124] When the state of any input channel changes, the main control unit 001, after completing a multi-channel input overall acquisition, combines the acquired channel states into a set of combined state data and immediately sends it to the paired module through the wireless communication unit 003.

[0125] The wireless communication process is a continuous, real-time process that does not require waiting for a fixed polling cycle; as soon as a change in the input state is detected, the corresponding wireless communication and state synchronization process is triggered.

[0126] The traditional method of polling input status using GPIO channels one by one not only significantly increases the processing load and response time of the main control unit 001, but also easily leads to problems such as inconsistent channel status capture, accumulated synchronization delay, and even event omission when multiple channels change simultaneously, making it difficult to meet the requirements of low latency and strong synchronization.

[0127] IV. Output Drive Circuit 004

[0128] The output drive circuit 004 is communicatively connected to the main control unit 001 and is used to execute corresponding IO signal outputs according to the control instructions of the main control unit 001. The output drive circuit 004 can be used to drive external actuators, such as relays, solenoid valves, indicator lights, or other digital loads.

[0129] In this embodiment, when the main control unit 001 receives wireless data from the wireless communication unit 003 and parses it to obtain the corresponding combined state data, it generates a corresponding output control signal based on the combined state data, and drives the external IO output port through the output driving circuit 004 to make the external output state consistent with the input state of another non-polar wireless communication IO module.

[0130] In this embodiment, the non-polarized wireless communication I / O module and the other non-polarized wireless communication I / O module serve as each other's transmitter and receiver. When either non-polarized wireless communication I / O module detects a change in its local I / O input state, it can act as a transmitter to send out the corresponding combined state data; simultaneously, when either non-polarized wireless communication I / O module receives wireless data, it can also act as a receiver to perform the corresponding I / O output control.

[0131] Through the above structural configuration and collaborative working method, this embodiment does not require pre-fixing the master and slave roles of the modules, and can realize bidirectional synchronization of multiple IO input signals between two non-polar wireless communication IO modules with the same structure, providing a hardware foundation for the subsequent implementation of non-polar wireless IO mapping.

[0132] In this embodiment, the output driving unit preferably uses a multi-channel intelligent power driving chip, such as MAX22200 or a device with equivalent function, and each output channel can independently drive a relay, solenoid valve or other load.

[0133] In a typical embodiment: the operating voltage of each output channel can support up to DC36V; the maximum output current of a single channel can reach 1A; the chip integrates overcurrent, overtemperature, and fault diagnosis functions, and feeds back to the main control unit 001 through a fault indication pin. With the above structure, this application is not only suitable for wireless transmission of low-voltage digital signals, but can also be directly applied to relay control, actuator drive, and status feedback loops of high-voltage systems in industrial sites.

[0134] In an optional embodiment, the main control unit 001 is communicatively connected to the wireless communication unit 003 and the output drive circuit 004 through the same serial peripheral SPI interface.

[0135] Specifically, the SPI clock signal line (SCK), master output slave input signal line (MOSI), and master input slave output signal line (MISO) of the master control unit 001 are connected in parallel to the corresponding data interfaces of the wireless communication unit 003 and the output driver unit; at the same time, independent chip select control signals are set for the wireless communication unit 003 and the output driver unit respectively to achieve selective access to different slave devices.

[0136] In one specific embodiment, the wireless communication unit 003 is a 2.4GHz RF transceiver module based on the nRF24L01+, and its chip select (CSN) is controlled by the first GPIO pin of the main control unit 001; the output driver unit is a multi-channel power driver chip (such as MAX22200), and its chip select is controlled by the second GPIO pin of the main control unit 001. The main control unit 001 controls different chip select signals to ensure that the wireless communication unit 003 and the output driver unit operate in a time-division multiplexing manner on the same SPI bus without interfering with each other.

[0137] In an optional embodiment, the acquisition circuit 002 includes a multi-input isolation circuit and a parallel input serial output data acquisition circuit 002. The multi-input isolation circuit includes multiple opto-isolators. The input side of each opto-isolator is connected to the corresponding external digital input signal through a current-limiting resistor. The output side is used to convert the external digital input signal into an internal logic level signal that matches the operating voltage of the main control unit 001.

[0138] The data acquisition circuit 002 includes at least one parallel input serial output shifter. The parallel input terminals of the shifter are respectively connected to the output side of the multi-input isolation circuit to receive multiple isolated external digital input signals in parallel. Under the control of the parallel loading terminal PL, the multiple I / O input signals are synchronously latched. Under the drive of the clock input terminal CP, the multiple I / O input signals are serially output to the main control unit 001 via the serial data output terminal Q.

[0139] Specifically, in this embodiment, the multi-input isolation circuit includes multiple opto-isolators. The input side of each opto-isolator is connected to the corresponding external digital input signal through a current-limiting resistor to provide current-limiting protection for the external input signal. The output side of the opto-isolator is used to convert the external digital input signal into an internal logic level signal that matches the operating voltage of the main control unit 001, and to achieve electrical isolation between the external signal and the internal control circuit.

[0140] The data acquisition circuit 002 includes at least one parallel input serial output shifter. The parallel input terminals of the shifter are respectively connected to the output side of the multiple input isolation circuit to receive multiple isolated external digital input signals in parallel.

[0141] The shifting device has a parallel loading terminal PL, a clock input terminal CP, and a serial data output terminal Q, wherein:

[0142] The parallel loading terminal PL, under the control of the main control unit 001, is used to synchronously latch the multiple IO input signals at the same time point;

[0143] The clock input terminal CP, driven by the clock signal output by the main control unit 001, is used to sequentially shift out the latched multiple IO input signals.

[0144] The serial data output terminal Q is electrically connected to the serial data input pin of the main control unit 001, and is used to output the multiple IO input signals to the main control unit 001 in serial form.

[0145] With the above structure, the acquisition circuit 002 can complete the synchronous acquisition of multiple external digital input signals in a single parallel loading operation, and transmit them serially to the main control unit 001 for subsequent processing.

[0146] In an optional embodiment, the multi-channel power drive device receives output status data from the main control unit 001 via a serial communication bus, and each of the multi-channel power drive devices is used to drive multiple external loads.

[0147] The output drive circuit 004 also includes an enable control pin, which is electrically connected to the main control unit 001 and is used to enable the output channels of the multi-channel power drive device.

[0148] Specifically, after receiving combined status data from another non-polar wireless communication I / O module, the main control unit 001 writes the corresponding output status data into the multi-channel power driver device via the serial communication bus to control the on or off state of each of its output channels. Each of the multi-channel power driver devices is used to drive at least multiple external loads, including but not limited to relays, solenoid valves, indicator lights, or other digital actuators.

[0149] The output drive circuit 004 further includes an enable control pin, which is electrically connected to the main control unit 001 and is used to uniformly enable or disable the output channels of the multi-channel power drive device. When the enable control pin is active, the multi-channel power drive device drives the corresponding external load according to the output status data; when the enable control pin is inactive, the output channels of the multi-channel power drive device are turned off, so that the external load is in a non-driven state.

[0150] In an optional embodiment, the multi-channel power driving device includes at least: multiple power output pins, at least one power supply pin, at least one power ground pin, and a communication control interface, wherein each of the power output pins is connected to a corresponding external IO output terminal, and the communication control interface is communicatively connected to the main control unit 001 for controlling each power output channel.

[0151] Specifically, the multi-channel power drive device provided in this embodiment includes:

[0152] Power output pins (e.g., OUT1~OUT8):

[0153] Each power output pin corresponds to driving an external load, such as a relay, indicator light, solenoid valve, or low-power DC load. The output voltage can be the module power supply voltage (e.g., DC 24V), and the maximum output current is limited by the driver specifications (e.g., 1A per channel). Each output pin has independent driving capability and internal overcurrent protection circuitry or short-circuit protection mechanism.

[0154] Power supply pins (VCC / VDD):

[0155] Used to provide operating power for power output. It can provide isolated +5V or +12V power to the module. Output stability and anti-interference capability can be ensured through voltage regulation circuits or filter capacitors.

[0156] Power ground pin (GND):

[0157] Used to provide a power return path. Its separate design from the overall power ground enables partial isolation and enhances noise immunity.

[0158] Communication control interface (e.g., SPI / I²C / serial interface):

[0159] It communicates with the main control unit 001 to receive control data or output status feedback. The data format can be one bit corresponding to the on / off state of an output channel (such as a 16-bit control word), or it can include status feedback bits. When the main control unit 001 sends data to the driver via the SPI bus, it can update the status of multiple outputs at once, achieving parallel control.

[0160] In an optional embodiment, the output drive circuit 004 further includes a fault indication pin, the enable control pin is connected to the main control unit 001 through an external resistor network, and the fault indication pin is simultaneously connected to the parallel acquisition control pin of the indication unit and the main control unit 001.

[0161] In this embodiment, the output drive circuit 004 also includes a fault indication pin and an enable control pin, which can be connected to the main control unit 001 via an external resistor network. The enable control pin is used to uniformly manage all output channels of the driver. When the main control unit 001 outputs a valid signal, the driver allows each channel to operate according to the control command. In case of emergency shutdown or system initialization, the main control unit 001 can quickly shut down all outputs through the enable control pin to ensure system safety. The external resistor network is not only used for current limiting protection of the I / O ports of the main control unit 001, but can also set the default logic level to ensure that the module is in a safe state during the power-on reset phase.

[0162] The fault indication pin is connected to two hardware points. On one hand, it is connected to an indicator unit, such as an LED or a buzzer. When the driver detects an abnormal condition, such as overcurrent, short circuit, or overtemperature, this pin outputs a valid signal, immediately illuminating the indicator light or triggering an alarm, providing a rapid visual or audible and visual prompt. On the other hand, this pin is also connected to the parallel acquisition control pin (PL) of the main control unit 001. In this way, the abnormal state of the driver can be read by the main control unit 001 in the next acquisition cycle.

[0163] Under normal operating conditions, when the enable signal is valid, the driver outputs the corresponding state according to the control logic of the main control unit 001, while the fault indicator pin remains in its default state and does not trigger an alarm. Once a load abnormality occurs, such as a short circuit or overcurrent, the fault pin immediately outputs a signal to notify the indicator unit. Simultaneously, the main control unit 001 reads this signal through the PL port, encapsulates the fault status into combined state data, and sends it to the peer module, achieving remote synchronization and overall system safety management. The main control unit 001 can also, based on the read fault status, issue control commands via the SPI interface to shut down relevant output channels, thereby performing an emergency safety shutdown to prevent further damage or danger.

[0164] In an optional embodiment, a power conversion unit 006 is further included, which includes an isolated DC-DC converter and a low-dropout linear regulator. The input terminal of the isolated DC-DC converter is used to receive an external DC power input, and the output terminal provides an isolated first operating voltage. The input terminal of the low-dropout linear regulator is electrically connected to the output terminal of the isolated DC-DC converter, and the output terminal of the low-dropout linear regulator is used to output a second operating voltage. The second operating voltage supplies power to the main control unit 001 and the wireless communication unit 003, respectively.

[0165] In this optional embodiment, the module further includes a power conversion unit 006 for providing a stable and reliable operating voltage. The power conversion unit 006 consists of an isolated DC-DC converter and a low-dropout linear regulator. The external DC power supply is first connected to the isolated DC-DC converter, which converts the input voltage into an isolated first operating voltage, providing voltage matching and electrical isolation between the input and internal circuitry, thereby enhancing anti-interference capability and safety. The first operating voltage is then input to the low-dropout linear regulator, which further steps it down to a second operating voltage, used to power the main control unit 001 and the wireless communication unit 003, ensuring a stable voltage for the core logic circuitry and wireless module, enabling reliable data acquisition, communication, and output control. Through this two-stage power supply design, the module can maintain stable operation in complex industrial power environments while ensuring electrical isolation and safety.

[0166] In an optional embodiment, the non-polar wireless communication I / O module further includes a hardware configuration unit 005, and the main control unit 001 is further provided with a configuration detection pin. The hardware configuration unit 005 includes at least a plurality of DIP switches, which are electrically connected to the configuration detection pin through pull-up resistors or pull-down resistors, and at least one DIP switch is defined as a pairing control bit. The main control unit 001 is configured to read the level state of the pairing control bit during the power-on reset phase, and when the pairing control bit is in a predetermined valid level state, control the wireless communication unit 003 to enter the pairing working state to perform a communication role binding operation with another non-polar wireless communication I / O module.

[0167] In this optional embodiment, the non-polarized wireless communication I / O module further includes a hardware configuration unit 005 for initial configuration and pairing control of the module. The main control unit 001 is provided with a configuration detection pin for reading the state of the hardware configuration unit 005. The hardware configuration unit 005 includes at least multiple DIP switches, each DIP switch being electrically connected to the configuration detection pin of the main control unit 001 via a pull-up resistor or a pull-down resistor, thereby converting the physical switch state into a logic level signal recognizable by the main control unit 001. At least one DIP switch is defined as a pairing control bit, used to trigger pairing operations between the module and another non-polarized wireless communication I / O module. During the module power-on reset phase, the main control unit 001 reads the level state of the pairing control bit. If the bit is detected to be at a predetermined valid level, the main control unit 001 controls the wireless communication unit 003 to enter the pairing working state, executing communication role binding with the other module. This design allows modules to complete initial pairing between peer modules via a simple hardware switch during installation or deployment, without the need for complex software settings, enabling plug-and-play wireless peering connections while ensuring flexibility and ease of configuration.

[0168] In an optional embodiment, the indicator unit is electrically connected to the main control unit 001. When the wireless communication unit 003 is in a paired working state, the indicator unit is controlled to output a paired status indication in a first indication mode. When entering a normal working state, the indicator unit is controlled to output a working status indication in a second indication mode different from the first indication mode.

[0169] Please see Figure 9 This application also provides an embodiment of a communication method, the execution of which depends on the hardware structure of the module in the foregoing embodiment, and the real-time synchronization of multiple I / O signals is achieved through the cooperation of hardware units.

[0170] This embodiment includes:

[0171] S901, The main control unit triggers the parallel loading terminal PL of the acquisition circuit through the parallel acquisition control pin, so that the acquisition circuit synchronously latches the IO input signals corresponding to multiple parallel input terminals at the same time point.

[0172] The main control unit 001 triggers the parallel loading terminal PL of the acquisition circuit 002 via the parallel acquisition control pin, causing the acquisition circuit 002 to synchronously latch all the IO input signals corresponding to the parallel input terminals at the same time. Through this operation, the states of multiple input channels are captured at once without polling each channel individually. Utilizing the asynchronous parallel loading function of a parallel input-serial output chip (such as the 74HC165), all input signals are latched instantaneously without a clock, occupying only a small number of MCU pins.

[0173] Specifically, in step S901, the main control unit 001 triggers the parallel loading terminal PL of the acquisition circuit 002 through the parallel acquisition control pin. This operation simultaneously latches the IO signals of all parallel input terminals, achieving synchronous acquisition of multiple inputs in a single operation. During this process, each external digital input signal first passes through a multi-input isolation circuit. This isolation circuit is typically composed of optocouplers. Each input signal enters the input terminal of the optocoupler through a current-limiting resistor, achieving electrical isolation and protecting the main control unit 001 from high voltage or interference. The output terminal of the optocoupler converts the isolated signal into an internal logic level signal that matches the operating voltage of the main control unit 001.

[0174] These converted internal logic level signals are sequentially output to the serial data input pin of the main control unit 001 via the serial data output terminal Q of the acquisition circuit 002. Utilizing the characteristics of a parallel input-serial output shifter (such as the 74HC165), the main control unit 001 can complete the reading of all channel states in just a few clock cycles, without polling each GPIO port individually. This significantly improves the acquisition speed and ensures the instantaneousness of the input states and data consistency. This combination of parallel latching and serial output allows multiple IO input signals to be fully acquired in a single operation, providing a reliable hardware foundation for subsequent wireless transmission and output driving.

[0175] S902, the main control unit outputs a clock signal to the clock input terminal CP of the acquisition circuit through the serial clock output pin, so as to drive the acquisition circuit to output the latched multiple IO input signals sequentially to the serial data input pin through the serial data output terminal Q;

[0176] The main control unit 001 outputs a clock signal to the clock input terminal CP of the acquisition circuit 002 via its serial clock output pin. This causes the latched multiple I / O input signals to be sequentially output to the serial data input pin of the main control unit 001 via the serial data output terminal Q. This method fully utilizes the high-speed characteristics of serial shift-out, requiring only a few clock cycles to complete the reading of all channels, significantly reducing acquisition latency and ensuring that the input data can be transmitted to the main control unit 001 quickly and completely for subsequent processing.

[0177] S903, The main control unit uses the multi-channel IO input signals as combined state data and sends them to another non-polar wireless communication IO module through the wireless transceiver chip of the wireless communication unit.

[0178] In step S903, the main control unit 001 combines the read multiple input signals into unified combined state data and sends it to another non-polar wireless communication I / O module via the transceiver chip of the wireless communication unit 003. The wireless communication unit 003 can run a dedicated, simplified protocol, encapsulating the combined state data in short data packets and interacting with the main control unit 001 at high speed via the SPI interface, achieving end-to-end low-latency transmission. This step ensures that any input change can be transmitted to the peer module within milliseconds, laying the foundation for bidirectional real-time synchronization.

[0179] S904. When a wireless communication unit receives the combined status data from another non-polar wireless communication IO module, or completes the wireless transmission of the combined status data, the main control unit receives the interrupt signal output by the wireless communication unit through the interrupt output pin IRQ.

[0180] In step S904, when the wireless communication unit 003 receives combined status data from another module or completes data transmission, it sends an interrupt signal to the master control unit 001 via the interrupt output pin IRQ. Upon detecting the interrupt, the master control unit 001 immediately suspends the current service process and enters a high-priority synchronization processing state. This interrupt triggering mechanism avoids the latency accumulation that may be caused by traditional polling, ensuring that in peer-to-peer communication mode, any input change of any module can be responded to quickly, achieving low-latency, master-slave-free bidirectional synchronization.

[0181] S905, the main control unit 001 interrupts the current service process according to the interrupt signal, and executes the corresponding IO output control through the output drive circuit 004 according to the combined state data, so as to synchronize the multi-channel IO input signals between at least two non-polar wireless communication IO modules.

[0182] Based on the received interrupt signal and combined status data, the main control unit 001 controls the local IO output terminal through the output drive circuit 004, mirroring the input status of the peer module at the local output terminal. In this way, the multiple IO input signals between at least two non-polarized wireless communication IO modules achieve real-time synchronization, forming a closed-loop feedback mechanism: any input change in any module is immediately reflected in the peer's output, and simultaneously, changes in the peer's input are captured by this module and drive its output, achieving true bidirectional, low-latency, and peer-to-peer digital synchronous transmission.

[0183] See Figure 10 This application also provides an embodiment of a main control unit 001, which includes:

[0184] The parallel acquisition control module 1001 is used to trigger the parallel loading terminal PL of the acquisition circuit 002 through the parallel acquisition control pin, so that the acquisition circuit 002 synchronously latches the IO input signals corresponding to multiple parallel input terminals at the same time point.

[0185] The serial acquisition control module 1002 is used to output a clock signal to the clock input terminal CP of the acquisition circuit 002 through the serial clock output pin, so as to drive the acquisition circuit 002 to output the latched multiple IO input signals sequentially to the serial data input pin through the serial data output terminal Q.

[0186] The combined state data generation module 1003 is used to take the multi-channel IO input signals as combined state data and send them to another non-polar wireless communication IO module through the wireless transceiver chip of the wireless communication unit 003.

[0187] The wireless communication control module 1004 is used to receive the interrupt signal output by the wireless communication unit 003 through the interrupt output pin IRQ when a wireless communication unit 003 receives the combined status data from another non-polar wireless communication IO module, or completes the wireless transmission of the combined status data.

[0188] Interrupt response module 1005 is used to interrupt the current service process by the interrupt signal, and to execute the corresponding IO output control through the output drive circuit 004 according to the combined state data, so as to synchronize the multiple IO input signals between at least two non-polar wireless communication IO modules, wherein the non-polar wireless communication IO module and the other non-polar wireless communication IO module are each other's transmitter and receiver.

[0189] Optionally, the parallel acquisition control module 1001 is specifically used for:

[0190] When the parallel loading terminal PL of the acquisition circuit is triggered, the external digital input signal is acquired through the multi-input isolation circuit, and the external digital input signal is converted into an internal logic level signal through an optocoupler.

[0191] The internal logic level signal is output to the serial data input pin through the serial data output terminal.

[0192] Please see Figure 11 This application also provides another type of main control unit, including:

[0193] Processor 1101, memory 1102, input / output unit 1103, bus 1104;

[0194] The processor 1101 is connected to the memory 1102, the input / output unit 1103, and the bus 1104;

[0195] The memory 1102 stores a program, and the processor 1101 calls the program to execute any of the methods described above.

[0196] This application also relates to a computer-readable storage medium on which a program is stored, which, when run on a computer, causes the computer to perform any of the methods described above.

[0197] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0198] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection between apparatuses or units through some interfaces, and may be electrical, mechanical, or other forms.

[0199] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0200] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0201] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

Claims

1. A non-polar wireless communication I / O module, characterized in that, The nonpolar wireless communication I / O module is a circuit device that can form a peer-to-peer wireless communication system with at least one nonpolar wireless communication I / O module with the same structure. The nonpolar wireless communication I / O module includes at least: a main control unit, a data acquisition circuit, an output driving circuit, and a wireless communication unit. The main control unit has at least: a parallel acquisition control pin, a serial clock output pin, a serial data input pin, and a wireless communication interrupt response pin; The acquisition circuit is electrically connected to the main control unit and is used to synchronously acquire multiple I / O input signals. The acquisition circuit includes at least: Multiple parallel input terminals, a parallel loading terminal PL, a clock input terminal CP, and a serial data output terminal Q. The parallel loading terminal PL is electrically connected to the parallel acquisition control pin to latch the multiple IO input signals, the clock input terminal CP is electrically connected to the serial clock output pin to output the multiple IO input signals, the serial data output terminal Q is electrically connected to the serial data input pin to output the multiple IO input signals to the main control unit, and the acquisition circuit is configured to synchronously acquire multiple IO input signals in one parallel loading operation; The wireless communication unit is communicatively connected to the main control unit and includes at least a wireless transceiver chip and an interrupt output pin IRQ. The IRQ is electrically connected to the wireless communication interrupt response pin and is used to trigger the main control unit to execute the corresponding IO input signal synchronization when receiving wireless data. The output driving circuit is communicatively connected to the main control unit. The main control unit takes the multiple IO input signals obtained through the serial data output terminal Q as combined state data and sends it to another non-polar wireless communication IO module through the wireless communication unit. When it receives wireless data from the other non-polar wireless communication IO module, it executes the corresponding IO signal output through the output driving circuit. The non-polar wireless communication IO module and the other non-polar wireless communication IO module are each other's transmitter and receiver. The acquisition circuit includes a multi-channel input isolation circuit and a data acquisition circuit for parallel input and serial output. The multi-channel input isolation circuit includes multiple opto-isolators. The input side of each opto-isolator is connected to the corresponding external digital input signal through a current-limiting resistor. The output side is used to convert the external digital input signal into an internal logic level signal that matches the operating voltage of the main control unit. The data acquisition circuit includes at least one parallel input serial output shifter. The parallel input terminals of the shifter are respectively connected to the output side of the multi-input isolation circuit to receive multiple isolated external digital input signals in parallel. Under the control of the parallel loading terminal PL, the multiple I / O input signals are synchronously latched. Under the drive of the clock input terminal CP, the multiple I / O input signals are serially output to the main control unit via the serial data output terminal Q.

2. The non-polar wireless communication I / O module according to claim 1, characterized in that, The main control unit is connected to the wireless communication unit and the output drive circuit through the same serial peripheral SPI interface.

3. The non-polar wireless communication I / O module according to claim 1, characterized in that, The output drive circuit includes at least one set of multi-channel power drive devices, which are communicatively connected to the main control unit and are used to drive multiple external digital outputs according to the control data output by the main control unit. The multi-channel power drive device receives output status data from the main control unit via a serial communication bus, and each of the multi-channel power drive devices is used to drive multiple external loads. The output drive circuit also includes an enable control pin, which is electrically connected to the main control unit and is used to enable the output channels of the multi-channel power drive device.

4. The non-polar wireless communication I / O module according to claim 3, characterized in that, The multi-channel power driving device includes at least: multiple power output pins, at least one power supply pin, at least one power ground pin, and a communication control interface. Each of the power output pins is connected to a corresponding external IO output terminal, and the communication control interface is communicatively connected to the main control unit for controlling each power output channel.

5. The non-polar wireless communication I / O module according to claim 3, characterized in that, It also includes an indicator unit, and the output drive circuit further includes a fault indicator pin. The enable control pin is connected to the main control unit through an external resistor network, and the fault indicator pin is simultaneously connected to the parallel acquisition control pin of the indicator unit and the main control unit.

6. The non-polar wireless communication I / O module according to claim 1, characterized in that, It also includes a power conversion unit, which comprises an isolated DC-DC converter and a low-dropout linear regulator; the input terminal of the isolated DC-DC converter is used to receive an external DC power input, and the output terminal provides an isolated first operating voltage; the input terminal of the low-dropout linear regulator is electrically connected to the output terminal of the isolated DC-DC converter, and the output terminal of the low-dropout linear regulator is used to output a second operating voltage; the second operating voltage supplies power to the main control unit and the wireless communication unit respectively.

7. The non-polar wireless communication I / O module according to any one of claims 1-6, characterized in that, The non-polar wireless communication I / O module further includes a hardware configuration unit. The main control unit is also provided with a configuration detection pin. The hardware configuration unit includes at least multiple DIP switches. The DIP switches are electrically connected to the configuration detection pin through pull-up resistors or pull-down resistors, and at least one DIP switch is defined as a pairing control bit. The main control unit is configured to read the level state of the pairing control bit during the power-on reset phase, and when the pairing control bit is in a predetermined valid level state, control the wireless communication unit to enter the pairing working state to perform a communication role binding operation with another non-polar wireless communication I / O module.

8. The non-polar wireless communication I / O module according to claim 7, characterized in that, It also includes an indicator unit, which is electrically connected to the main control unit. When the wireless communication unit is in a paired working state, the indicator unit is controlled to output a paired status indication in a first indication mode, and when entering a normal working state, the indicator unit is controlled to output a working status indication in a second indication mode different from the first indication mode.

9. A communication method, characterized in that, Applied to the nonpolar wireless communication I / O module as described in any one of claims 1 to 8, the method includes: The main control unit triggers the parallel loading terminal PL of the acquisition circuit through the parallel acquisition control pin, so that the acquisition circuit synchronously latches the IO input signals corresponding to multiple parallel input terminals at the same time point. The main control unit outputs a clock signal to the clock input terminal CP of the acquisition circuit through the serial clock output pin, so as to drive the acquisition circuit to output the latched multiple IO input signals sequentially to the serial data input pin through the serial data output terminal Q; The main control unit uses the multiple IO input signals as combined state data and sends them to another non-polar wireless communication IO module through the wireless transceiver chip of the wireless communication unit. When a wireless communication unit receives the combined status data from another non-polar wireless communication IO module, or completes the wireless transmission of the combined status data, the main control unit receives the interrupt signal output by the wireless communication unit through the interrupt output pin IRQ. The main control unit interrupts the current service process according to the interrupt signal, and executes the corresponding IO output control through the output drive circuit according to the combined state data, so as to synchronize the multi-channel IO input signals between at least two non-polar wireless communication IO modules.

10. The communication method according to claim 9, characterized in that, The main control unit triggers the parallel loading terminal PL of the acquisition circuit through the parallel acquisition control pin, causing the acquisition circuit to synchronously latch the IO input signals corresponding to multiple parallel input terminals at the same time, including: When the main control unit triggers the parallel loading terminal PL of the acquisition circuit, it acquires the external digital input signal through the multi-input isolation circuit and converts the external digital input signal into an internal logic level signal through an optocoupler. The internal logic level signal is output to the serial data input pin through the serial data output terminal.

11. A main control unit, characterized in that, The main control unit, applied in any one of claims 1 to 8, comprises: The parallel acquisition control module is used to trigger the parallel loading terminal PL of the acquisition circuit through the parallel acquisition control pin, so that the acquisition circuit synchronously latches the IO input signals corresponding to multiple parallel input terminals at the same time point. The serial acquisition control module is used to output a clock signal to the clock input terminal CP of the acquisition circuit through the serial clock output pin, so as to drive the acquisition circuit to output the latched multiple IO input signals sequentially to the serial data input pin through the serial data output terminal Q. A combined state data generation module is used to take the multi-channel IO input signals as combined state data and send them to another non-polar wireless communication IO module through the wireless transceiver chip of the wireless communication unit. The wireless communication control module is used to receive the interrupt signal output by the wireless communication unit through the interrupt output pin IRQ when a wireless communication unit receives the combined status data from another non-polar wireless communication IO module, or completes the wireless transmission of the combined status data. An interrupt response module is used to interrupt the current service process by the interrupt signal, and to execute the corresponding IO output control through the output drive circuit according to the combined state data, so as to synchronize the multiple IO input signals between at least two non-polar wireless communication IO modules, wherein the non-polar wireless communication IO module and the other non-polar wireless communication IO module are each other's transmitter and receiver.

12. A main control unit, characterized in that, include: Processor, memory, input / output units, and bus; The processor is connected to the memory, the input / output unit, and the bus; The memory stores a program, which the processor invokes to perform the method as described in any one of claims 9 to 10.

13. A computer-readable storage medium, characterized in that, The computer-readable storage medium contains a program that, when executed on a computer, performs the method as described in any one of claims 9 to 10.

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