Data processing method and electronic equipment

Abstract

The invention discloses a data processing method and electronic equipment, which are used for providing a new bad block marking processing mode and can improve the reliability of bad block marking. In the method, when a processor of the electronic equipment issues a bad block marking instruction to a memory, page identifiers of a plurality of target pages can be indicated in the bad block marking instruction, so that the memory can carry out bad block marking on the plurality of target pages. In this way, the success rate of bad block marking can be improved through the implementation mode that bad block marking is carried out on the multiple target pages.

Description

Technical Field

[0001] This application relates to the field of computer storage technology, and in particular to a data processing method and an electronic device. Background Technology

[0002] NAND flash memory is a type of non-volatile flash memory with advantages such as large capacity and fast write speed, making it suitable for storing large amounts of data and thus increasingly widely used in the industry. NAND flash memory consists of multiple blocks, such as 1024 blocks or 8192 blocks; a block consists of multiple pages, such as 64 pages or 128 pages. Typically, NAND flash memory reads and writes data in units of pages, while erasing data in units of blocks.

[0003] However, NAND flash memory has a "lossy" characteristic, meaning it may contain bad blocks, thus requiring bad block management. Bad block marking can be used to distinguish between good and bad blocks, allowing for the skipping of bad blocks and the use of good blocks in subsequent use. Currently, the common method for marking bad blocks is to write all zeros to the last page containing the bad block. However, this marking method suffers from unreliability.

[0004] Therefore, improving the reliability of bad block labeling is of great research significance. Summary of the Invention

[0005] This application provides a data processing method and an electronic device for providing a new method for processing bad block marking, which can improve the reliability of bad block marking.

[0006] In a first aspect, this application provides a first data processing method, which can be executed by an electronic device including a processor and a memory. The method includes the processor sending a bad block marking instruction to the memory, the bad block marking instruction including page identifiers of a plurality of target pages; when the memory detects a bad block, performing bad block marking in the plurality of target pages including the bad block according to the page identifiers.

[0007] In this method, bad block marking is performed on multiple target pages. As long as bad block marking is successful on at least one target page, the problematic block can be marked as a bad block, thereby increasing the success rate of bad block marking and improving the reliability of bad block marking.

[0008] In one possible scenario, before performing bad block marking in the plurality of target pages included in the bad block, the method further includes: the processor selecting the target page according to preset conditions; wherein the preset conditions include at least one of the following: reliability requirements, processing power, and current load.

[0009] It should be understood that by selecting target pages through preset conditions, flexible configuration of target pages can be achieved, thereby adapting to different application scenarios and improving the flexibility of bad block marking.

[0010] In one possible scenario, the processor selects the target page according to preset conditions, including: selecting a target page greater than a first preset number when the reliability requirement is higher than a first preset condition; or selecting a target page less than or equal to the first preset number when the reliability requirement is lower than the first preset condition; or selecting a target page greater than a second preset number when the processing power is higher than a second preset condition; or selecting a target page less than or equal to the second preset number when the processing power is lower than the second preset condition; or selecting a target page less than or equal to a third preset number when the current load is higher than a third preset condition; or selecting a target page greater than the third preset number when the current load is lower than the third preset condition.

[0011] It should be understood that by selecting different numbers of target pages under different preset conditions, a balance can be achieved between processing efficiency and reliability. Optionally, when high reliability is required, more target pages can be selected, sacrificing processing efficiency for the reliability of bad block marking. Alternatively, when low reliability is required, fewer target pages can be selected, sacrificing the reliability of bad block marking for processing efficiency.

[0012] In one possible scenario, the method further includes: when the memory detects that all first target pages have been successfully written to a preset value, generating first indication information to indicate that the bad block marking instruction has been executed successfully, wherein the first target page is any one of the N target pages; or, when the memory detects that not all first target pages have been successfully written to the preset value, generating second indication information to indicate that the bad block marking instruction has failed to execute. For example, the preset value can be 0.

[0013] It should be understood that memory can indicate the execution result through different indication information, thereby facilitating the controller to more accurately manage the blocks included in the memory.

[0014] In one possible scenario, the method further includes: the processor reading the first indication information or reading the second indication information from the memory; when the processor reads the second indication information, sending a readback instruction to the memory; the memory responding to the readback instruction sending the written content of the first target page to the processor; the processor analyzing the written content of the first target page to determine that at least one target position has been successfully written with a preset value, and determining that the bad block marking is successful.

[0015] It should be understood that, given the low precision of memory in judging execution results, when the processor detects that the execution result output by the memory is an execution failure, the processor can achieve a more granular and precise judgment of the execution result by reading back the bad block markers. This can ignore the errors caused by bad block marking in other locations in the target page besides the target location, thereby improving the success rate and reliability of bad block marking and reducing the probability of bad block marking errors.

[0016] In one possible scenario, the method further includes: the processor analyzing the written content of the first target page to obtain a preset value of unsuccessful writes at all target locations, and determining that the bad block marking has failed.

[0017] It should be understood that when the processor detects a failure in bad block marking through a more granular judgment method, it means that the probability of bad block marking failure is relatively high. At this time, triggering the operating system's protection mechanism can improve the accuracy of bad block marking.

[0018] In one possible scenario, the memory is NAND flash.

[0019] Secondly, this application provides a second data processing method, which can be executed by an electronic device, the electronic device including a processor and a memory. The method includes: when the processor reads first indication information from the memory, sending a readback instruction to the memory; wherein the first indication information is used to indicate that the bad block marking instruction failed; the memory, in response to the readback instruction, sending the write content of the target page to the processor; the processor analyzes the write content of the target page to determine that at least one target location has been successfully written with a preset value, thus determining that the bad block marking was successful.

[0020] This method, by adding a back-reading method for bad block marking, can more accurately analyze whether bad block marking at the target location is successful. This allows us to ignore errors caused by bad block marking at other locations on the target page besides the target location, thereby improving the success rate and reliability of bad block marking and reducing the probability of bad block marking errors.

[0021] In one possible scenario, the method further includes: the processor analyzing the written content of the target page to obtain a preset value of unsuccessful writes at all target locations, and determining that the bad block marking has failed.

[0022] In one possible scenario, the memory is NAND flash.

[0023] Thirdly, this application provides an electronic device comprising a plurality of functional modules; the plurality of functional modules interact to implement the methods performed by the electronic device in the first aspect and its embodiments, or to implement the methods performed by the electronic device in the second aspect and its embodiments.

[0024] The multiple functional modules can be implemented based on software, hardware, or a combination of software and hardware, and the multiple functional modules can be arbitrarily combined or divided based on specific implementations.

[0025] Fourthly, this application provides an electronic device including at least one processor and at least one memory, wherein the at least one memory stores computer program instructions. When the electronic device is running, the at least one processor executes the method executed by the electronic device in the first aspect and its embodiments described above, or executes the method executed by the electronic device in the second aspect and its embodiments described above.

[0026] Fifthly, this application also provides a computer program product containing instructions that, when the computer program product is run on a computer, cause the computer to perform the method executed by the electronic device in the first aspect and its embodiments, or to perform the method executed by the electronic device in the second aspect and its embodiments.

[0027] Sixthly, this application also provides a computer-readable storage medium storing a computer program that, when executed by a computer, causes the computer to perform the method executed by the electronic device in the first aspect and its embodiments, or to perform the method executed by the electronic device in the second aspect and its embodiments.

[0028] In a seventh aspect, this application also provides a chip for reading a computer program stored in a memory and executing the method executed by the electronic device in the first aspect and its embodiments, or executing the method executed by the electronic device in the second aspect and its embodiments.

[0029] Eighthly, this application also provides a chip system including a processor for supporting a computer device in implementing the methods executed by electronic devices in the first aspect and its embodiments, or in implementing the methods executed by electronic devices in the second aspect and its embodiments.

[0030] In one possible design, the chip system also includes a memory for storing programs and data necessary for the computer device. The chip system can be composed of chips or may include chips and other discrete components.

[0031] For details on the beneficial effects of any of the second to eighth aspects and their possible designs, please refer to the beneficial effects of the various possible designs in the first aspect above; they will not be repeated here. Attached Figure Description

[0032] Figure 1 A schematic diagram for marking bad blocks;

[0033] Figure 2 A schematic diagram of the hardware structure of a possible electronic device is shown;

[0034] Figure 3 A software architecture block diagram of an electronic device provided in an embodiment of this application;

[0035] Figure 4 A schematic diagram illustrating a scenario to which a data processing method provided in this application is applicable;

[0036] Figure 5 A flowchart illustrating the data processing procedure for controller 401;

[0037] Figure 6 A schematic diagram of bad block marking for a data processing method provided in an embodiment of this application;

[0038] Figure 7 A schematic diagram of bad block marking for a data processing method provided in an embodiment of this application;

[0039] Figure 8 This is a schematic diagram of a data structure for a target location provided in an embodiment of this application;

[0040] Figure 9 A flowchart illustrating a data processing method provided in an embodiment of this application;

[0041] Figure 10 This is another schematic diagram of a data processing method provided in an embodiment of this application. Detailed Implementation

[0042] The embodiments of this application will now be described in detail with reference to the accompanying drawings and examples.

[0043] The method provided in this application can be applied to the field of computer storage technology in electronic devices, specifically to scenarios where electronic devices use NAND flash. During the use of NAND flash, bad blocks can be marked, allowing for skipping bad blocks and using good blocks in subsequent use. Bad block marking effectively isolates problematic blocks, ensuring stable use of good blocks and extending the lifespan of the NAND flash.

[0044] In some possible implementations, bad block marking can be achieved by writing all 0s on the last page of the problematic block (also known as a "problem block" or "bad block").

[0045] For example, Figure 1 This is a diagram illustrating the marking of bad blocks. Using a NAND flash memory comprising X blocks, each containing 64 pages as an example, when a problem is detected in block 0, it is marked on the last page of block 0 (e.g., ...). Figure 1 Bad block marking is performed on page 63 shown in the diagram. For example, the data structure of page 63 may include a 2048-byte data area and a 128-byte backup area. Bad block marking can be achieved by writing "00" to the first two bytes of the backup area to indicate that the block is bad. Since NAND flash reads and writes data in page units, bad block marking is typically implemented by writing all 2176 bytes of page 63 to 0.

[0046] However, when Figure 1 If the problematic location of block 0 happens to be page 63, the bad block marking may fail because the 0 cannot be successfully written. Furthermore, the bad block marker in page 63 only requires the first two bytes of the backup area to be successfully written as 0. However, since NAND flash writes data in pages, write errors at other byte positions may cause bad block marking errors.

[0047] In view of this, embodiments of this application provide a data processing method. In this method, bad block marking is performed on multiple target pages including the problematic block. Thus, even if the problematic location within the problematic block is one of the multiple target pages, by marking bad blocks on multiple target pages, the markings indicating bad blocks can be detected by other target pages, thereby improving the reliability of bad block marking.

[0048] Alternatively, in this method, the controller of the electronic device, based on the indication information from the memory, if it determines that the indication information indicates a failure in bad block marking, issues a readback instruction to the memory for bad block marking. Then, when the controller determines, based on the execution result of the bad block marking readback, that the target location included in the target page contains a bad block mark, it determines that the bad block marking was successful. Here, the target page can be understood as the page where bad block marking was performed, for example... Figure 1 Page 63 in the target page; the target location can be understood as the marker location in the target page used to indicate bad blocks, for example... Figure 1 The first two bytes of the backup area are used. This allows for a more precise assessment of whether bad block marking was successful through a readback operation, improving the success rate and reliability of bad block marking and reducing the probability of bad block marking errors.

[0049] The technical solutions in this application can be applied to electronic devices, which can be any device using flash memory. For example, electronic devices can be mobile phones, tablets, wearable devices (e.g., watches, bracelets, etc.), in-vehicle devices, augmented reality (AR) / virtual reality (VR) devices, smart home devices (e.g., smart TVs, etc.), and other electronic devices. It is understood that this application does not limit the specific type of electronic device.

[0050] The electronic devices to which this application's embodiments can be applied include, but are not limited to, those equipped with... Alternatively, it can be an electronic device running another operating system. For example, the electronic device described in the foregoing embodiments can be used.

[0051] Figure 2 A schematic diagram of a possible hardware structure of an electronic device is shown. The electronic device 200 includes components such as: a radio frequency (RF) circuit 210, a power supply 220, a processor 230, a memory 240, an input unit 250, a display unit 260, an audio circuit 270, a communication interface 280, and a Wi-Fi module 290. Those skilled in the art will understand that... Figure 2 The hardware structure of the electronic device 200 shown in the figure does not constitute a limitation on the electronic device 200. The electronic device 200 provided in the embodiments of this application may include more or fewer components than shown, may combine two or more components, or may have different component configurations. Figure 2 The various components shown can be implemented in hardware, software, or a combination of hardware and software, including one or more signal processing and / or application-specific integrated circuits.

[0052] The following is combined with Figure 2 A detailed description of each component of the electronic device 200 is provided below:

[0053] RF circuit 210 can be used for receiving and sending data during communication or calls. Specifically, after receiving downlink data from the base station, RF circuit 210 sends it to processor 230 for processing; additionally, it sends uplink data to be transmitted to the base station. Typically, RF circuit 210 includes, but is not limited to, an antenna, at least one amplifier, a transceiver, a coupler, a low-noise amplifier (LNA), a duplexer, etc. Furthermore, RF circuit 210 can also communicate with other devices via wireless communication networks. Wireless communication can use any communication standard or protocol, including but not limited to Global System for Mobile Communication (GSM), General Packet Radio Service (GPRS), Code Division Multiple Access (CDMA), Wideband Code Division Multiple Access (WCDMA), Long Term Evolution (LTE), email, Short Message Service (SMS), etc.

[0054] The electronic device 200 also includes a power supply 220 (such as a battery) for supplying power to various components. Optionally, the power supply 220 can be logically connected to the processor 230 through a power management system, thereby enabling the power management system to manage functions such as charging, discharging, and power consumption.

[0055] The processor 230 is the control center of the electronic device 200. It connects various components via interfaces and lines, and executes software programs and / or modules stored in the memory 240, as well as calling data stored in the memory 240, to perform various functions and process data, thereby enabling various services based on the electronic device 200. For example, the processor 230 may include one or more processing units, such as an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural network processing unit (NPU). Different processing units can be independent devices or integrated into one or more processors. The controller can be the nerve center and command center of the electronic device 200. The controller can generate operation control signals based on instruction opcodes and timing signals to control instruction fetching and execution.

[0056] In this embodiment of the application, the processor 230 can be used to implement a data processing method provided in this embodiment. For example, the processor 230 issues various instructions to the memory 240, such as instructions for bad block marking and bad block mark readback instructions. In another example, the processor 230 can also receive feedback data from the memory 240, such as data indicating whether bad block marking was successful, and read data of the target page provided during bad block mark readback.

[0057] The memory 240 can be used to store software programs and modules. The processor 230 executes various functional applications and data processing of the electronic device 200 by running the software programs and modules stored in the memory 240. Optionally, the memory 240 may mainly include a program storage area and a data storage area. The program storage area may store the operating system (mainly including the software programs or modules corresponding to the kernel layer, system layer, application framework layer, and application layer).

[0058] In this embodiment, the memory 240 may include a NAND flash 241. During the use of the NAND flash 241, if bad blocks are detected, bad block marking needs to be performed.

[0059] The input unit 250 can be used to receive editing operations on various types of data objects, such as numbers or characters, input by the user, and to generate key signal inputs related to user settings and function control of the electronic device 200. Optionally, the input unit 250 may include a touch panel 251 and other input devices 252. The touch panel 251, also known as a touchscreen, can collect touch operations performed by the user on or near it (e.g., operations performed by the user using a finger, stylus, or any suitable object or accessory on or near the touch panel 251), and drive corresponding connection devices according to a pre-set program. In this embodiment, the touch panel 251 can collect user operations performed on or near it. Optionally, other input devices 252 may include, but are not limited to, one or more of a physical keyboard, function keys (e.g., volume control buttons, power buttons, etc.), a trackball, a mouse, a joystick, etc.

[0060] Display unit 260 can be used to display information input by the user or information provided to the user, as well as various menus of electronic device 200. Display unit 260 is the display system of electronic device 200, used to present the interface and realize human-computer interaction. Display unit 260 may include display panel 261. Optionally, display panel 261 may be configured in the form of liquid crystal display (LCD), organic light-emitting diode (OLED), etc.

[0061] like Figure 2 As shown, the electronic device 200 also includes an audio circuit 270, a microphone 271, and a speaker 272, providing an audio interface between the user and the electronic device 200. The audio circuit 270 converts audio data into signals recognizable by the speaker 272 and transmits the signals to the speaker 272, where the speaker 272 converts them into sound signals for output. The microphone 271 collects external sound signals (such as human speech or other sounds) and converts the collected external sound signals into signals recognizable by the audio circuit 270, sending them to the audio circuit 270. The audio circuit 270 can also convert the signals transmitted by the microphone 271 into audio data, and then output the audio data to the RF circuit 210 for transmission to, for example, another electronic device, or output the audio data to the memory 240 for further processing.

[0062] Electronic device 200 can be physically connected to other devices via communication interface 280. Optionally, communication interface 280 can be connected to the communication interfaces of other devices via cables to enable data transmission between electronic device 200 and other devices.

[0063] Wi-Fi technology is a short-range wireless transmission technology. Electronic device 200 can connect to an access point (AP) via Wi-Fi module 290, thereby enabling access to the data network. Wi-Fi module 290 can be used for data reception and transmission during communication.

[0064] Electronic device 200 can also perform communication services and interact with other electronic devices; therefore, electronic device 200 needs to have data transmission capabilities, meaning it needs to include a communication module. Although Figure 2 The diagram shows communication modules such as RF circuit 210, Wi-Fi module 290, and communication interface 280. However, it is understood that the electronic device 200 contains at least one of the above-mentioned components or other communication modules (such as Bluetooth modules) for implementing communication and data transmission.

[0065] Although not shown, electronic device 200 may also include a camera, at least one sensor, etc., which will not be described in detail here. At least one sensor may include, but is not limited to, a pressure sensor, a barometric pressure sensor, an accelerometer, a distance sensor, a fingerprint sensor, a touch sensor, a temperature sensor, etc.

[0066] The operating system (OS) involved in this application embodiment is the most basic system software running on the electronic device 200. The software system of the electronic device 200 can adopt a layered architecture, event-driven architecture, microkernel architecture, microservice architecture, or cloud architecture. This application embodiment takes an operating system adopting a layered architecture as an example to illustrate the software architecture of the electronic device 200.

[0067] Figure 3 This is a software architecture block diagram of an electronic device provided as an embodiment of this application. For example... Figure 3 As shown, the software architecture of an electronic device can be a layered architecture. For example, the software can be divided into several layers, each with a clear role and division of labor. Layers communicate with each other through software interfaces. In some embodiments, the operating system is divided into five layers, from top to bottom: the application layer, the application framework layer (framework, FWK), the runtime and system libraries, the kernel layer, and the hardware layer.

[0068] The application layer can include a series of application packages. For example... Figure 3 As shown, the application layer can include the user interface (UI), camera, settings, skin modules, third-party applications, etc. Third-party applications can include, for example, wireless local area network (WLAN) applications, music, call functions, Bluetooth, and video.

[0069] In one possible implementation, the application can be developed using Java, by calling the application programming interface (API) provided by the application framework layer. Developers can then interact with the underlying operating system layers (such as the hardware layer and kernel layer) to develop their own applications. This application framework layer primarily consists of a series of services and management systems within the operating system.

[0070] The application framework layer provides application programming interfaces and a programming framework for applications within the application layer. The application framework layer includes some predefined functions. For example... Figure 3 As shown, the application framework layer may include a view system, activity manager, window manager, content provider, phone manager, resource manager, notification manager, etc.

[0071] The Activity Manager manages the lifecycle of each application and provides commonly used navigation and back functions, offering an interactive interface for all program windows.

[0072] The window manager is used to manage windowed applications. It can obtain the screen size, determine if a status bar is present, lock the screen, and capture screenshots. The content provider stores and retrieves data, making that data accessible to applications. This data can include video, images, audio, made and received phone calls, browsing history and bookmarks, phone books, etc.

[0073] A view system includes both visual and non-visual controls, such as controls that display text and controls that display images. View systems can be used to build applications. A display interface can consist of one or more views. For example, a display interface including a text message notification icon could include views that display text and views that display images.

[0074] A phone manager is used to provide communication functions for electronic devices. For example, it manages call status (including connection and disconnection).

[0075] The file explorer provides applications with various resources, such as localized strings, icons, images, layout files, video files, and more.

[0076] The notification manager allows applications to display notifications in the status bar. These notifications can be used to deliver informational messages and can disappear automatically after a short pause, requiring no user interaction. For example, the notification manager can be used to notify users of completed downloads or message alerts. The notification manager can also display notifications as icons or scrolling text in the top status bar, such as notifications from background applications, or as dialog boxes on the screen. Examples include displaying text messages in the status bar, emitting sounds, vibrating electronic devices, and flashing indicator lights.

[0077] The runtime includes the core libraries and the virtual machine. The runtime is responsible for the scheduling and management of the operating system.

[0078] The core library consists of two parts: one part contains the functionalities that the Java language needs to call, and the other part contains the core libraries of the operating system. The application layer and application framework layer run in the virtual machine. The virtual machine executes the Java files of the application layer and application framework layer as binary files. The virtual machine is used to perform functions such as object lifecycle management, stack management, thread management, security and exception management, and garbage collection.

[0079] A system library can include multiple functional modules. For example: a surface manager, a media framework, a 3D graphics processing library (e.g., OpenGL ES), a 2D graphics engine (e.g., SGL), etc.

[0080] The Surface Manager is used to manage the display subsystem and provides the blending of 2D and 3D layers for multiple applications.

[0081] The media framework supports playback and recording of various commonly used audio and video formats, as well as still image files. It supports multiple audio and video encoding formats, such as MPEG4, H.264, MP3, AAC, AMR, JPG, and PNG.

[0082] The 3D graphics processing library is used to implement 3D graphics drawing, image rendering, compositing, and layer processing.

[0083] A 2D graphics engine is a drawing engine for 2D drawing.

[0084] In some embodiments, a 3D graphics processing library can be used to draw 3D motion trajectory images, and a 2D graphics engine can be used to draw 2D motion trajectory images.

[0085] The kernel layer is the layer between hardware and software. The kernel layer contains at least the display driver, camera driver, audio driver, and sensor driver.

[0086] The hardware layer can include various types of sensors, such as accelerometers, gravity sensors, and touch sensors.

[0087] Typically, an electronic device 200 can run multiple applications simultaneously. In a simpler scenario, one application corresponds to one process; in a more complex scenario, one application can correspond to multiple processes. Each process has a unique process ID.

[0088] It should be understood that in the embodiments of this application, "at least one of the following" or similar expressions refer to any combination of these items, including any combination of a single item or a plurality of items. For example, at least one of a, b, or c can represent: a, b, c, a and b, a and c, b and c, or a, b, and c, where a, b, and c can be single or multiple. "Multiple" refers to two or more. "And / or" is used to describe the association relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship.

[0089] In addition, it should be understood that in the description of this application, the words "first" and "second" are used only for the purpose of distinguishing descriptions and should not be construed as indicating or implying relative importance or order.

[0090] It should be understood that the hardware structure of electronic devices can be as follows: Figure 2 As shown, the software system architecture can be as follows: Figure 3 As shown, the software programs and / or modules corresponding to the software system architecture in the electronic device can be stored in the memory 240, and the processor 230 can run the software programs and applications stored in the memory 240 to execute the flow of a data processing method provided in the embodiments of this application.

[0091] To facilitate understanding of the data processing method provided in this application, the following is combined with... Figures 4 to 7 The content shown describes the implementation process of the method provided in this application.

[0092] This application's embodiments are applicable to scenarios where bad block marking is performed on flash devices included in electronic devices; wherein, flash memory includes, but is not limited to: NAND flash, multi-chip package (MCP), embedded multi-media card (eMMC), etc. For example, Figure 4 This is a schematic diagram illustrating a scenario to which a data processing method provided in this application is applicable. Figure 4 It may include a controller 401 and a flash memory 402.

[0093] (1) The controller 401 can be used to issue instructions to the flash memory 402. The instructions may include, but are not limited to, read instructions, write instructions, erase instructions, etc., or the instructions may also include bad block marking instructions, readback instructions, etc.

[0094] For example, controller 401 can be integrated into, for instance, a device such as... Figure 2 The illustrated electronic device 200 includes a processor 230; the flash memory 402 can be integrated, for example, in a... Figure 2 The electronic device 200 shown includes a memory 230.

[0095] (2) The flash memory 402 can be used to receive and execute instructions issued by the controller 401; and can also be used to generate feedback data based on the execution result to feed back to the controller 401. Accordingly, the controller 401 can read the feedback data from the flash memory 402, thereby obtaining the execution result of the instructions from the flash memory 402.

[0096] In some possible embodiments, after the flash memory 402 executes an instruction, it can write indication information to a preset location based on the execution result. This indication information can be used to indicate whether the instruction execution was successful. For example, after the flash memory 402 executes an erase instruction, it can write indication information 1 to a preset location 1 based on the execution result. This indication information 1 can be used to indicate whether the erase instruction execution was successful. As another example, after the flash memory 402 executes a write instruction, it can write indication information 2 to a preset location 2 based on the execution result. This indication information 2 can be used to indicate whether the write instruction execution was successful. It can be understood that when an erase instruction or a write instruction fails, the flash memory 402 can execute a bad block marking instruction; then, it can write indication information 3 to a preset location 3 based on the execution result. This indication information 3 can be used to indicate whether the bad block marking instruction execution was successful.

[0097] Optionally, the flash memory 402 may integrate a status register to determine the execution result and record indication information. For example, when the status register detects that all bytes included in page 63 have been successfully written to 0, that is, the execution result is detected as successful, the status register can record the indication information as 1; otherwise, the status register records the indication information as 0.

[0098] Corresponding to the flash memory 402, the controller can be controlled via, for example... Figure 5 The process shown is used for data processing. Figure 5The process shown may include the following steps:

[0099] Step 501: Controller 401 reads the indication information from flash memory 402. For example, controller 401 reads the indication information from a preset location in flash memory 402, which can also be understood as controller 401 receiving feedback data from flash memory 402.

[0100] Step 502: Controller 401 determines whether the indication information indicates successful execution. If the indication is successful, proceed to step 503A; if the indication fails, proceed to step 503B. Optionally, if controller 401 reads an indication information value of 1, it can determine that the indication information indicates successful execution. Alternatively, if controller 401 reads an indication information value of 0, it can determine that the indication information indicates failed execution.

[0101] Step 503A: Controller 401 determines that the bad block has been successfully marked. For example, at this point, controller 401 can skip using that block and continue using other good blocks.

[0102] Step 503B: Controller 401 determines that the bad block marking has failed, i.e., an error is reported. For example, at this time, controller 401 can set the contents of the partition containing the bad block to read-only mode, thereby protecting data security. By creating partitions in flash memory 402, better management of flash memory 402 can be achieved. Furthermore, partitions in flash memory 402 can be understood as virtual spaces that can be mapped to one or more blocks in physical space; conversely, blocks correspond to partitions.

[0103] Based on the above Figure 5 According to the description, the controller 401 can read indication information from a preset location as feedback data, thereby facilitating the controller 401 to obtain the execution result of the flash memory 402. The preset location can be a preset common location configured to store the indication information.

[0104] based on Figure 4 As illustrated in the scenario, this application provides a data processing method. In this method, bad block marking is performed on multiple target pages, thereby improving the reliability of bad block marking.

[0105] For example, Figure 6 This is a schematic diagram of bad block marking for a data processing method provided in an embodiment of this application. For example, the flash memory 402 can be NAND flash, MCP, eMMC, etc. Figure 6As shown, taking block 0 as the problematic block as an example, the target pages for marking bad blocks can be page 0, page 2, page 5, and page 63.

[0106] Optionally, the flash memory 402 can sequentially mark bad blocks on pages 0, 2, 5, and 63. This, compared to... Figure 1 The method of marking bad blocks only on page 63, by marking bad blocks on multiple target pages, ensures that bad block marking of block 0 can be achieved as long as marking is successful on at least one target page. This increases the success rate of bad block marking and improves its reliability. It can be understood that even if the problematic location of block 0 happens to be page 63, the bad block mark can still be read from page 0, page 2, or page 5.

[0107] Alternatively, the flash memory 402 can sequentially mark bad blocks on pages 0, 2, 5, and 63. If a bad block marking is successfully detected, further bad block marking can be discontinued. For example, if the flash memory 402 successfully marks a bad block on page 0, it will not mark bad blocks on pages 2, 5, and 63. Or, if the flash memory 402 fails to mark a bad block on page 0, it will continue marking bad blocks on page 2. If bad block marking is successful on page 2, it will not mark bad blocks on pages 5 and 63. By marking bad blocks sequentially on multiple candidate target pages until a bad block is successfully written, the reliability of bad block marking can be improved compared to marking bad blocks only on page 63. It should be noted that the multiple candidate target pages are not limited in this embodiment. For example, all target pages can be candidate target pages, in which case the flash memory 402 can sequentially mark bad blocks on pages 0, 1, 2, ...

[0108] It should be noted that, Figure 6 Taking the marking of bad blocks on four target pages as an example, the number and selection method of target pages are not limited in this embodiment. For example, the number of target pages can be 64 pages, that is, all target pages, or it can be two pages, such as page 0 and page 63.

[0109] In some possible implementations, the electronic device may select a target page based on preset conditions; wherein the preset conditions may include, but are not limited to, reliability requirements, processing power, current load, etc.

[0110] For example, when the electronic device is a router that requires zero interruption and has high reliability requirements, all target pages can be selected, which can greatly reduce the probability of bad block marking failure.

[0111] Another example is when the electronic device is a mobile phone, which has lower reliability requirements. In this case, multiple pages can be randomly selected as target pages, which can achieve a balance between the reliability of bad block marking and processing efficiency.

[0112] Another example is that when the electronic device has limited processing power (such as a wearable device), multiple pages can be randomly selected as the target page, while when the electronic device has strong processing power, all pages can be selected as the target page.

[0113] Furthermore, this embodiment does not limit the number of pages in the blocks included in the flash memory 402; for example, it can be [number of pages]. Figure 6 The 64 pages shown could also be a larger number of pages, such as 128 pages, or a smaller number of pages, such as 32 pages.

[0114] based on Figure 4 In the scenario shown, this application embodiment also provides a data processing method. In this method, during bad block marking, when the controller 401 reads indication information indicating execution failure, it can trigger a bad block marking readback operation, thereby increasing the probability of successful bad block marking. For example, Figure 7 This is a schematic diagram of bad block marking for a data processing method provided in an embodiment of this application.

[0115] Corresponding to the flash memory 402, the controller 401 can be controlled via, for example... Figure 7 The process shown is used for data processing. Figure 7 The process shown may include the following steps:

[0116] Step 701: Controller 401 reads the indication information from flash memory 402. For example, controller 401 reads the indication information from a preset location in flash memory 402, which can also be understood as controller 401 receiving feedback data from flash memory 402.

[0117] Optionally, a preset location can be used to store indication information about the execution result of bad block marking on page 63. Another option is based on... Figure 6 In the scenario described, the preset location can also be used to store indication information of the execution result of bad block marking on page 0, page 2, page 5, or page 63.

[0118] Step 702: Controller 401 determines whether the indication information indicates successful execution. If the indication fails, proceed to step 703. If the indication succeeds, proceed to step 706.

[0119] Optionally, if the controller 401 reads an indication message of 0, it can determine that the indication message indicates execution failure.

[0120] Alternatively, if the controller 401 reads the indication information as 1, it can determine that the indication information indicates successful execution.

[0121] Step 703: The controller 401 sends a readback instruction for bad block marking to the flash memory 402.

[0122] For example, controller 401 can read back the contents of page 63 from flash memory 402. Another example, based on... Figure 6 In the scenario described, the controller 401 can also read back the contents of page 0, page 2, page 5, or page 63 from the flash memory 402.

[0123] Step 704: Controller 401 determines whether the bad block mark readback was successful.

[0124] For example, controller 401 analyzes the written content of page 63 from the readback; when it determines that the analysis reveals at least one bit position included in the target position, a 0 is successfully written. For example, the target position can be... Figure 1 The first two bytes of the backup area are shown in the image. For example, Figure 8 This is a schematic diagram of a data structure for a target location provided in an embodiment of this application. The target location may include 2 bytes, or 16 bits. When the controller 401 determines that at least one bit position among the 16 bits has been successfully written with a 0, for example... Figure 8 If the first bit position shown in the diagram indicates that the bad block was successfully marked, then the bad block can be determined.

[0125] This is understandable, because the target location is configured to indicate bad block marking. When at least one bit position is successfully written with 0, it means that the flash memory 402 has executed a write instruction to write 0 to the target location. Even if not all 0s are successfully written, it can be determined that bad block marking has been successfully performed.

[0126] Step 705: Controller 401 determines that the bad block marking has failed, i.e., an error is reported. For example, at this time, controller 401 can set the content of the block to read-only mode, thereby protecting data security.

[0127] For example, controller 401 from such Figure 8 Analysis of the 16 bit positions shown indicates that none of them successfully wrote 0, thus confirming that the bad block marking failed.

[0128] In some possible embodiments, while the flash memory 402 is marking bad blocks on multiple target pages, the controller 401 can also continue reading back the written content on other target pages. Thus, when a 0 is successfully written to at least one bit position at a target location on at least one target page, it can be determined that the bad block marking was successful, thereby improving the reliability of bad block marking.

[0129] Step 706: Controller 401 determines that the bad block has been successfully marked. For example, at this point, controller 401 can skip using that block and continue using other good blocks.

[0130] Based on the above Figure 7 According to the introduction, the controller 401 can more accurately analyze whether the bad block marking at the target position is successful by adding a bad block marking back reading method. This can ignore the error caused by bad block marking at other positions in the target page other than the target position, thereby improving the success rate and reliability of bad block marking and reducing the probability of bad block marking errors.

[0131] Based on the same concept, embodiments of this application also provide a data processing method, which can be executed by an electronic device, the electronic device including a processor and a memory, for example... Figure 2 The processor 230 and memory 240, for example Figure 4 The controller 401 and flash memory 402 are shown. Figure 9 A flowchart illustrating a data processing method provided in an embodiment of this application. (Reference) Figure 9 The method includes the following steps:

[0132] S901: The processor sends a bad block marking instruction to the memory. The bad block marking instruction includes page identifiers of multiple target pages. For example, the page identifiers of the multiple target pages could be... Figure 6 Pages 0, 2, 5, and 63 are shown.

[0133] S902: When the memory detects a bad block, bad block marking is performed in multiple target pages included in the bad block according to the page identifier.

[0134] The specific implementation process of S901 to S902 can be found in the previous introduction, and will not be repeated here.

[0135] Based on the same concept, embodiments of this application also provide another data processing method, which can be executed by an electronic device, the electronic device including a processor and a memory, for example... Figure 2 The processor 230 and memory 240, for example Figure 4 The controller 401 and flash memory 402 are shown. Figure 10A flowchart illustrating a data processing method provided in an embodiment of this application. (Reference) Figure 10 The method includes the following steps:

[0136] S1000: The processor reads the first indication information from memory. This first indication information indicates that the bad block marking instruction failed to execute.

[0137] S1001: When the processor reads the first instruction information from the memory, it sends a readback instruction to the memory.

[0138] S1002: In response to the readback instruction, the memory sends the write content of the target page to the processor.

[0139] S1003A: The processor analyzes the written content of the target page and finds that at least one target location has been successfully written with a preset value, thus confirming that the bad block marking is successful.

[0140] S1003B: The processor analyzes the written content of the target page and finds that the preset value was not successfully written to all target locations, and determines that the bad block marking has failed.

[0141] The specific implementation process of S1000 to S1003B can be found in the previous introduction, and will not be repeated here.

[0142] Based on the above embodiments, this application also provides an electronic device, which includes multiple functional modules. These multiple functional modules interact to achieve the functions performed by the electronic device in the methods described in the embodiments of this application. The multiple functional modules can be implemented based on software, hardware, or a combination of software and hardware, and can be arbitrarily combined or divided based on specific implementations. For example, [the following is an example of implementation details]. Figure 7 Steps 701 and 706 are performed by the electronic device in the illustrated embodiment. Alternatively, steps 701 and 706 may be performed. Figure 9 The illustrated embodiment executes steps S901 and S902. Alternatively, it executes... Figure 10 The electronic device in the illustrated embodiment executes S1000 to S1003B.

[0143] Based on the above embodiments, this application also provides an electronic device, which includes at least one processor and at least one memory. The at least one memory stores computer program instructions. When the electronic device is running, the at least one processor executes the functions performed by the electronic device in the methods described in the embodiments of this application. For example, when executing... Figure 7 Steps 701 and 706 are performed by the electronic device in the illustrated embodiment. Alternatively, steps 701 and 706 may be performed. Figure 9 The illustrated embodiment executes steps S901 and S902. Alternatively, it executes... Figure 10 The electronic device in the illustrated embodiment executes S1000 to S1003B.

[0144] Based on the above embodiments, this application also provides a computer program product, which includes a computer program (also referred to as code or instructions) that, when run, causes a computer to perform the methods described in the embodiments of this application.

[0145] Based on the above embodiments, this application also provides a computer-readable storage medium storing a computer program, which, when executed by a computer, causes the computer to perform the methods described in the embodiments of this application.

[0146] Based on the above embodiments, this application also provides a chip for reading computer programs stored in a memory and implementing the methods described in the embodiments of this application.

[0147] Based on the above embodiments, this application provides a chip system including a processor for supporting a computer device in implementing the methods described in the embodiments of this application. In one possible design, the chip system further includes a memory for storing necessary programs and data of the computer device. This chip system may be composed of chips or may include chips and other discrete devices. Those skilled in the art will understand that the embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0148] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0149] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0150] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0151] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the scope of protection of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A data processing method applied to an electronic device, the electronic device comprising a processor and a memory, the method comprising: The method comprises: ​ The processor sends a bad block marking instruction to the memory, the bad block marking instruction comprising page identifiers of a plurality of target pages; When the memory detects a bad block, according to the page identifiers, performing bad block marking in the plurality of target pages included in the bad block.

2. The method of claim 1, wherein, Before performing the bad block marking in the plurality of target pages included in the bad block, the method further comprises: The processor selects the target pages according to preset conditions, wherein the preset conditions comprise at least one of the following: reliability requirement, processing capacity, current load.

3. The method of claim 2, wherein, The processor selects the target pages according to preset conditions, comprising: When the reliability requirement is higher than a first preset condition, selecting more than a first preset number of target pages; or, when the reliability requirement is lower than the first preset condition, selecting less than or equal to the first preset number of target pages; or, When the processing capacity is higher than a second preset condition, selecting more than a second preset number of target pages; or, when the processing capacity is lower than the second preset condition, selecting less than or equal to the second preset number of target pages; or, When the current load is higher than a third preset condition, selecting less than or equal to a third preset number of target pages; or, when the current load is lower than the third preset condition, selecting more than the third preset number of target pages.

4. The method according to any one of claims 1 to 3, characterized in that, The method further comprises: When the memory detects that a first target page is successfully written with a preset value, generating first indication information indicating that the bad block marking instruction is successfully executed, the first target page being any target page of the N target pages; or, When the memory detects that a first target page is not successfully written with a preset value, generating second indication information indicating that the bad block marking instruction fails to execute.

5. The method of claim 4, wherein, The method further comprises: The processor reads the first indication information or reads the second indication information from the memory; When the processor reads the second indication information, sending a read-back instruction to the memory; The memory sends the write content of the first target page to the processor in response to the read-back instruction; The processor analyzes at least one target position successfully written with a preset value from the write content of the first target page, and determines that the bad block marking is successful.

6. The method of claim 5, wherein, The method further comprises: The processor analyzes all target positions unsuccessfully written with a preset value from the write content of the first target page, and determines that the bad block marking fails.

7. The method according to any one of claims 1 to 6, characterized in that, The memory is a NAND flash.

8. A data processing method applied to an electronic device, the electronic device comprising a processor and a memory, the method comprising: The method comprises: When the processor reads the first indication information from the memory, sending a read-back instruction to the memory; wherein the first indication information is used to indicate that the bad block marking instruction fails to execute; The memory sends the write content of the target page to the processor in response to the read-back instruction; The processor analyzes at least one target position successfully written with a preset value from the write content of the target page, and determines that the bad block marking is successful.

9. The method of claim 8, wherein, The method further comprises: The processor analyzes all target positions unsuccessfully written with a preset value from the write content of the target page, and determines that the bad block marking fails.

10. The method according to claim 8 or 9, characterized in that, The memory is a NAND flash.

11. An electronic device, comprising: comprise a processor and a memory; The processor is configured to execute instructions stored in the memory to cause the electronic device to perform the method of any one of claims 1-7, or perform the method of any one of claims 8-10.

12. A computer storage medium, characterized in that The computer readable storage medium stores computer executable instructions for causing a computer to perform the method of any one of claims 1-7, or perform the method of any one of claims 8-10.

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