Data processing method and system based on double-MCU sampling calculation structure

By using a dual-MCU sampling and calculation structure, the sampling and calculation of power data are shared, which solves the problem of excessive load on a single MCU, improves the real-time responsiveness and software complexity of the protection and control device, and simplifies the maintenance difficulty.

CN121636378APending Publication Date: 2026-03-10HENAN PINGGAO ELECTRIC
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-11-11
Publication Date
2026-03-10

AI Technical Summary

Technical Problem

In existing protection and control devices, a single MCU undertakes protection, measurement, and control functions, resulting in excessive load, high software complexity, and reduced real-time responsiveness and protection control sensitivity.

Method used

The dual-MCU sampling and calculation structure is adopted. Through sampling circuit, three-phase metering chip, shared FRAM and mutual exclusion circuit, the power data sampling and calculation functions are shared. The main MCU only periodically reads the data from the shared FRAM for subsequent processing.

Benefits of technology

It reduces the load on the main MCU, minimizes latency, improves the real-time responsiveness and software complexity of the protection and control device, and simplifies maintenance.

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Abstract

The invention discloses a data processing method and system based on a double-MCU sampling calculation structure, and relates to the technical field of distribution network comprehensive protection, and the method comprises the steps: constructing a calculation structure comprising a sampling circuit, a three-phase metering chip, a slave MCU, a shared FRAM, a main MCU and a mutual exclusion circuit; sampling electric quantity data of the target power system based on a sampling circuit; sampling and storing electric quantity data after initialization and standardization based on a three-phase metering chip; the method comprises the following steps of: periodically reading electric quantity data stored in a three-phase metering chip from an MCU (Microprogrammed Control Unit), carrying out calculation processing, judging through a mutual exclusion circuit, and transmitting a calculation result to a shared FRAM (Frequency Random Access Memory) for storage; and after the main MCU judges through the mutual exclusion circuit, the calculation result stored by the shared FRAM is read for subsequent processing. The load of the main MCU is reduced, the delay influence is reduced, and the real-time responsiveness of the protection measurement and control device is further improved.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of distribution network integrated protection, and more particularly to a data processing method and system based on a double MCU sampling calculation structure. BACKGROUND

[0002] The protection and measurement control device is an intelligent device of the substation integrated automation system, which integrates protection, measurement, control, monitoring, communication and other functions, and can effectively ensure the safety of the power system. The protection and measurement control device has power data acquisition and calculation functions, and can calculate voltage, current, power, harmonic, forward and reverse active power, forward and reverse reactive power, four-quadrant reactive power and other parameters in the power system, provide power consumption state and power flow change state of the power system, and provide data support for reactive power compensation, fault diagnosis and protection, and is used for economic operation of the power grid, equipment state diagnosis and fine management.

[0003] However, the protection and measurement control device currently mainly uses a high-performance MCU to complete all functions such as protection, measurement calculation, control and communication, which makes the MCU load too heavy, and the software complexity and reliability risk are increased. A large amount of data acquisition and calculation may cause program blockage, delay, and affect the real-time responsiveness and protection control sensitivity of the device.

[0004] Therefore, how to reduce the load of the main MCU, reduce the delay effect, and further improve the real-time responsiveness of the protection and measurement control device is a problem that needs to be solved by those skilled in the art. SUMMARY

[0005] Therefore, the present application provides a data processing method and system based on a double MCU sampling calculation structure, which reduces the load of the main MCU, reduces the delay effect, and further improves the real-time responsiveness of the protection and measurement control device.

[0006] In order to achieve the above purpose, the present application adopts the following technical scheme: A data processing method based on a double MCU sampling calculation structure, comprising: constructing a calculation structure comprising a sampling circuit, a three-phase metering chip, a slave MCU, a shared FRAM, a main MCU and a mutual exclusion circuit; sampling power data of a target power system based on the sampling circuit; sampling and storing the power data after initialization and standardization based on the three-phase metering chip; periodically reading the power data stored in the three-phase metering chip based on the slave MCU and performing calculation processing, and after judgment through the mutual exclusion circuit, transmitting the calculation result to the shared FRAM for storage; The main MCU reads the calculation result stored in the shared FRAM for subsequent processing after judging through the mutual exclusion circuit.

[0007] In one embodiment, the sampling circuit samples the electric quantity data of the target power system, specifically including: Based on the sampling circuit sampling the three-phase voltage and three-phase current of the target power system, and converting into corresponding voltage and current values through sampling resistance and transformers; Based on the voltage and current values, amplifying through an operational amplifier, and then converting into voltage and current through resistance and capacitance as the electric quantity data.

[0008] In one embodiment, the initialization of the three-phase metering chip specifically includes: Based on the three-phase metering chip, performing reset operation, clearing and setting table operation, and enabling table writing operation; After completing the above operations, mode configuration parameters, EMU unit configuration parameters, ADC channel gain configuration parameters, and high-frequency pulse parameters are written into the software program of the three-phase metering chip, and the table calibration parameters register of the three-phase metering chip is written at the same time, completing the initialization operation.

[0009] In one embodiment, the standardization of the three-phase metering chip specifically includes: After completing the initialization operation, the following parameters are set in sequence: Setting three-phase voltage and current offset calibration parameters; Setting three-phase voltage and current gain calibration parameters; Setting three-phase power gain calibration parameters; Setting three-phase phase calibration parameters.

[0010] In one embodiment, setting three-phase voltage and current offset calibration parameters specifically includes: under the premise of not applying voltage and current to the device, calibrating the value to zero according to zero drift; Setting three-phase voltage and current gain calibration parameters specifically includes: applying a specific voltage and current to the device, and calibrating the data to the applied value according to the relevant formula; Setting three-phase power gain calibration parameters specifically includes: when the power factor cos(φ)=1, performing power gain correction, applying a specific voltage and current, and calculating and calibrating through the error value read on the standard table; Setting three-phase phase calibration parameters specifically includes: after power gain correction, when the power factor cos(φ)=0.5L, performing phase correction, applying a specific voltage and current, and calculating and calibrating through the error value read on the standard table.

[0011] In one embodiment, the computational processing specifically includes: Based on the read power data, the following calculations are performed: The root mean square algorithm is used to obtain the effective values; Power is obtained using a two-watt power metering algorithm; Obtain active power in both directions, reactive power in both directions, and reactive power in the four quadrants; The fundamental and harmonic data are obtained by using Fourier functions.

[0012] In one embodiment, the mutual exclusion circuit includes: a multiplexer and a multi-function logic gate; The shared FRAM is connected to the relevant pins of the multiplexer; Both the master MCU and the slave MCU are connected to the relevant pins of the multiplexer and the multi-function logic gate; Pin A in the multi-function logic gate is the input pin of the slave MCU and the output pin of the master MCU; The A pin of the multi-function logic gate is connected to the S pin of the multiplexer; The B pin in the multi-function logic gate is the output pin of the slave MCU and the input pin of the master MCU.

[0013] In one embodiment, the determination principle of the mutual exclusion circuit is as follows: Determine whether the voltage levels of pin A and pin B are the same; If so, the output pin of the multifunction logic gate is high, the OE# pin of the multiplexer connected to it is invalid, and neither the master MCU nor the slave MCU can access the shared FRAM; If not, the output pin of the multifunction logic gate is low, and the OE# pin of the multiplexer connected to it is active. Determine whether the conditions are met: pin B is at a high level and the input level to pin S is at a low level. If so, then the shared FRAM is accessed from the MCU through the multiplexer; Otherwise, the main MCU accesses the shared FRAM through the multiplexer.

[0014] In one embodiment, the three-phase metering chip is also used to calculate voltage, current, power and energy data based on the sampled electrical data, obtain relevant calculation results and store them; The relevant calculation results are read from the MCU and, after being determined by the mutual exclusion circuit, are transmitted to the shared FRAM storage.

[0015] A data processing system based on a dual-MCU sampling computing structure includes: a computing structure construction module, a data sampling module, a data computing module, and a data reading and processing module; The computing structure construction module is used to construct a computing structure including a sampling circuit, a three-phase metering chip, a slave MCU, a shared FRAM, a master MCU, and a mutual exclusion circuit. The data sampling module is used to sample the power data of the target power system based on the sampling circuit; and to sample and store the power data after initialization and standardization based on the three-phase metering chip. The data calculation module is used to perform calculations based on the power data periodically read from the MCU and stored in the three-phase metering chip, and after judgment by the mutual exclusion circuit, transmit the calculation results to the shared FRAM storage. The data reading and processing module is used by the main MCU to read the calculation results stored in the shared FRAM for subsequent processing after the main MCU determines the result through the mutual exclusion circuit.

[0016] As can be seen from the above technical solutions, compared with the prior art, the present invention discloses a data processing method and system based on a dual MCU sampling and calculation structure. The present invention adopts a "dual MCU + three-phase metering chip + shared FRAM" scheme to realize the function of sampling and calculating power data. A single slave MCU or three-phase metering chip is used to perform all data calculations. The main MCU only needs to periodically read the data in the shared FRAM, thereby reducing the computational workload and load of the main MCU, simplifying the software complexity and maintenance difficulty of the main MCU, enabling it to respond to fault diagnosis and protection more quickly, improving real-time responsiveness, and reducing the difficulty of task scheduling. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0018] Figure 1 The present invention provides a flowchart of a data processing method based on a dual-MCU sampling calculation structure.

[0019] Figure 2 This is a schematic diagram of the sampling circuit structure provided by the present invention.

[0020] Figure 3 The diagram shows the pinout of the mutual exclusion circuit, shared FRAM, master MCU, and slave MCU provided for this invention. Detailed Implementation

[0021] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0022] Example 1 To address the problem that existing single-MCU systems handle all functions such as protection, measurement, monitoring, and communication, resulting in excessive MCU load, increased software complexity, and reduced real-time response that may affect protection sensitivity, this invention employs a dual-MCU solution to handle power data sampling and calculation. This reduces the load on the main MCU, prevents resource contention from causing metering sampling delays and protection delays, enables the main MCU to perform protection and communication functions more quickly and accurately, improves the system's real-time responsiveness, and simplifies the main MCU's software complexity and maintenance difficulty.

[0023] Based on this, such as Figure 1 As shown, this embodiment of the invention discloses a data processing method based on a dual-MCU sampling calculation structure, including the following steps. For ease of description, S1 to S5 are assigned; these numbers are not used to limit the sequential relationship between the various steps of this invention: The S1 construct includes a computing structure comprising a sampling circuit, a three-phase metering chip, a slave MCU, a shared FRAM, a master MCU, and a mutual exclusion circuit.

[0024] S2 samples the power data of the target power system based on the sampling circuit.

[0025] Furthermore, such as Figure 2 As shown, the sampling circuit samples the electrical data of the target power system, specifically including: The sampling circuit samples the three-phase voltage and three-phase current of the target power system and converts them into corresponding voltage and current values ​​through sampling resistors and transformers. The voltage and current values ​​are amplified by an operational amplifier and then converted into voltages Ua, Ub, Uc and currents Ia, Ib, Ic as electrical quantity data through resistors and capacitors.

[0026] S3 initializes and standardizes the sampled power data based on the three-phase metering chip and stores it.

[0027] Furthermore, the initialization of the three-phase metering chip specifically includes: Reset operation, clear calibration operation and enable calibration write operation are performed based on the three-phase metering chip; After completing the above operations, the mode configuration parameters, EMU unit configuration parameters, ADC channel gain configuration parameters, and high-frequency pulse parameters are written into the software program of the three-phase metering chip, and simultaneously written into the calibration parameter register of the three-phase metering chip to complete the initialization operation.

[0028] Furthermore, the standardization of three-phase metering chips specifically includes: After completing the initialization, set the following parameters in sequence: Set the three-phase voltage and current offset calibration parameters; Set the three-phase voltage and current gain calibration parameters; Set the three-phase power gain calibration parameters; Set the three-phase phase calibration parameters.

[0029] Furthermore, the three-phase voltage and current offset calibration parameters are set as follows: without applying voltage or current to the equipment, calibration is performed based on zero drift, and the values ​​are calibrated to zero. Setting three-phase voltage and current gain calibration parameters involves applying specific voltage and current values ​​to the equipment and calibrating the data to the applied values ​​according to relevant formulas. The three-phase power gain calibration parameters are set as follows: power gain correction is performed when the power factor cos(φ)=1 by applying specific voltage and current, and calibration is performed by calculating the error value read from the standard meter. The three-phase phase calibration parameters are set as follows: after the power gain is calibrated, phase calibration is performed when the power factor cos(φ) = 0.5L. Specific voltage and current are applied, and calibration is performed by calculating the error value read from the standard meter.

[0030] The calibrated three-phase metering chip collects power data with voltage and current accuracy of ≤±0.5%, power accuracy of ≤±1%, power factor of ≤±0.5%, and energy efficiency of 0.5S level, which meets the accuracy requirements.

[0031] Furthermore, relying on the characteristics of the three-phase metering chip and based on the user's own needs for electricity data, data is acquired through two methods: 1) The three-phase metering chip contains a 1024*16bit buffer storage area, which is used to save the original sampling data of the ADC, i.e. the power data, in real time. The MCU reads the original power data in the buffer memory through the specified read buffer start address, and then performs further processing on the power data in the MCU. 2) The three-phase metering chip is also used to calculate voltage, current, power and energy data based on the sampled power data, obtain the relevant calculation results and store them; read the relevant calculation results from the MCU, and after judgment by the mutual exclusion circuit, transfer the relevant calculation results to the shared FRAM for storage.

[0032] S4 periodically reads the power data stored in the three-phase metering chip from the MCU and performs calculations. After determining the result through a mutual exclusion circuit, it transmits the calculation result to the shared FRAM for storage.

[0033] Furthermore, the MCU initializes and accesses the registers of the three-phase metering chip via SPI read / write registers.

[0034] Furthermore, the MCU reads the three-phase metering chip register data every 1 second via a timer count. The power data read every 1 second is used to calculate power, energy, harmonics, etc. as required. After the mutual exclusion circuit determines the result, the calculation is stored in the shared FRAM by writing to the register using SPI when the shared FRAM is idle.

[0035] Furthermore, the computational processing specifically includes: Based on the read power data, the following calculations are performed: The root mean square algorithm is used to obtain the effective values; Power is obtained using a two-watt power metering algorithm; Obtain active power in both directions, reactive power in both directions, and reactive power in the four quadrants; The fundamental and harmonic data are obtained by using Fourier functions.

[0036] Furthermore, based on the read power data, the root mean square algorithm is used to obtain the effective value, specifically including: For AC circuits, voltage and current are sinusoidal functions that change with time. The effective values ​​are obtained using the root mean square (RMS) algorithm. N points are collected within one cycle, which are... x 1. x 2、......、 x n The effective value is obtained using the following root mean square formula. x rms : ; in, x i Indicates the first i One voltage and current data point.

[0037] Furthermore, based on the read power data, a two-watt power metering algorithm is used to obtain the power, specifically including: Measure the line voltage and current signals of AB and CB respectively. The total apparent power of the three-phase circuit is equal to the sum of the apparent power of each phase, as shown in the following formula: S = Ua*Ia + Ub*Ib + Uc*Ic =Ua*Ia+Ub*(-Ia-Ic)+Uc*Ic =(Ua-Ub)*Ia+(Uc-Ub)*Ic =Uab*Ia+Ucb*Ic; Where Ua, Ub, and Uc represent the voltages of phases a, b, and c, respectively; Ia, Ib, and Ic represent the currents of phases a, b, and c, respectively; Uab represents the line voltage between phases a and b; and Ucb represents the line voltage between phases c and b.

[0038] Furthermore, based on the read power data, the active power in both directions, the reactive power in both directions, and the reactive power in the four quadrants are calculated: The direction of electrical energy and its quadrant can be determined based on the phase angle or the sign of active and reactive power. The electrical energy data collected every 1 second is added together according to the different power sign characteristics.

[0039] Furthermore, based on the read power data, Fourier function calculations are used to obtain fundamental and harmonic data, specifically including: For a continuous signal sampled within one period, with a sample length N, the DFT of a finite-length discrete signal X(n), n=0,1,...,N-1, is defined as follows: ; Where X( k ) represents the first in the frequency domain k One frequency point, k =0, 1, ..., N -1, Indicates the rotation factor. .

[0040] Furthermore, processing commonly used power data using the above calculation method requires processing a large amount of data, and the calculation process is also quite complicated. Therefore, this invention places the calculation part independently in the slave MCU, reducing the load on the master MCU, thereby improving program running efficiency and response time.

[0041] After the S5 main MCU determines the result through the mutual exclusion circuit, it reads the calculation result stored in the shared FRAM for further processing.

[0042] Furthermore, after the main MCU determines the data through the mutual exclusion circuit, it reads the pre-calculated data stored in the corresponding location when the shared FRAM is idle, for subsequent analysis.

[0043] Furthermore, considering the large amount of sampled power data and the need for power-down data retention and data communication between the two MCUs, a shared FRAM memory is set up. The two MCUs can access it through SPI read / write register communication. The MCU puts the processed data into the shared FRAM for storage every 1 second, and the master MCU reads the data from the shared FRAM every 1 second.

[0044] Since the master MCU and slave MCU need to access a shared FRAM, a situation of shared resource access can occur, leading to bus conflicts and affecting SPI read / write register communication. This invention addresses this by designing... Figure 3 The mutual exclusion circuit diagram shown uses multiplexer U1 and multifunction logic gate U2 to determine the host device accessing the shared FRAM, enabling the two MCUs to alternately access the FRAM without communication conflicts.

[0045] Furthermore, the mutual exclusion circuit includes: a multiplexer U1 and a multi-function logic gate U2; The / S pin, C pin, D pin, and Q pin of the shared FRAM are connected to the 1A pin, 2A pin, 3A pin, and 4A pin of the multiplexer U1, respectively. Both the master MCU and the slave MCU are connected to the relevant pins of the multiplexer U1 and the multifunction logic gate U2; In the multi-function logic gate U2, pin A is the input pin of the slave MCU and the output pin of the master MCU. The A pin of the multi-function logic gate U2 is connected to the S pin of the multiplexer U1; In the multi-function logic gate U2, pin B is the output pin of the slave MCU and the input pin of the master MCU.

[0046] Furthermore, the principle for determining mutual exclusion circuits is as follows: Determine whether the voltage levels of pin A and pin B are the same; If so, the output pin of the multifunction logic gate will be high, the OE# pin of the multiplexer connected to it will be invalid, and neither the master MCU nor the slave MCU will be able to access the shared FRAM; If not, the output pin of the multifunction logic gate is low, and the OE# pin of the multiplexer connected to it is active. Determine whether the conditions are met: pin B is high and the input to pin S is low. If so, the shared FRAM is accessed from the MCU via a multiplexer; Otherwise, the main MCU accesses the shared FRAM via a multiplexer.

[0047] Furthermore, the working principle of the mutual exclusion circuit involves pins and corresponding voltage levels, as shown in Table 1 below:

[0048] Example 2 Based on the same inventive concept, the present invention also provides a data processing system based on a dual MCU sampling computing structure, comprising: a computing structure construction module, a data sampling module, a data computing module, and a data reading and processing module; The computing architecture building module is used to build a computing architecture that includes a sampling circuit, a three-phase metering chip, a slave MCU, a shared FRAM, a master MCU, and a mutual exclusion circuit. The data sampling module is used to sample the power data of the target power system based on the sampling circuit; and to sample and store the power data after initialization and standardization based on the three-phase metering chip. The data calculation module is used to periodically read the power data stored in the three-phase metering chip from the MCU and perform calculations. After the mutual exclusion circuit determines the result, the calculation result is transmitted to the shared FRAM storage. The data reading and processing module is used by the main MCU to read the calculation results stored in the shared FRAM for subsequent processing after the main MCU determines the result through a mutual exclusion circuit.

[0049] Furthermore, in this embodiment, the implementation methods of each step correspond one-to-one with the above-mentioned system module function implementation process, and will not be described in detail here.

[0050] Example 3 Based on the same inventive concept, the present invention also provides an electronic device, which includes a processor and a memory, wherein the memory stores instructions, characterized in that the instructions are loaded and executed by the processor to implement a data processing method based on a dual MCU sampling calculation structure as in Embodiment 1.

[0051] Based on the same inventive concept, the present invention also provides a computer device, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus; Memory, used to store computer programs; When the processor executes the program stored in the memory, it can implement a data processing method based on a dual-MCU sampling calculation structure as shown in Example 1.

[0052] The electronic device may include a processor, a communications interface, a memory, and a communication bus, wherein the processor, communications interface, and memory communicate with each other via the communication bus. The processor can call logical instructions in the memory to execute a data processing method based on a dual-MCU sampling computing structure as described in Embodiment 1.

[0053] Furthermore, the logical instructions in the aforementioned memory can be implemented as software functional units and sold or used as independent products, and can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0054] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to the method section.

[0055] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A data processing method based on a dual MCU sampling calculation structure, characterized in that, The application relates to a power system metering method and device. The application comprises the following steps: constructing a computing structure comprising a sampling circuit, a three-phase metering chip, a slave MCU, a shared FRAM, a master MCU and a mutual exclusion circuit; sampling power data of a target power system based on the sampling circuit; initializing and standardizing the power data based on the three-phase metering chip and storing the power data; periodically reading the power data stored in the three-phase metering chip based on the slave MCU, performing calculation processing, judging based on the mutual exclusion circuit and transmitting the calculation result to the shared FRAM for storage; 2. The data processing method based on the dual-MCU sampling calculation structure according to claim 1, characterized in that, reading the calculation result stored in the shared FRAM for subsequent processing based on the master MCU after judging based on the mutual exclusion circuit. The sampling circuit samples power data of a target power system, specifically comprising the following steps: sampling three-phase voltage and three-phase current of the target power system based on the sampling circuit, and converting the three-phase voltage and three-phase current into corresponding voltage values and current values through a sampling resistor and a mutual inductor; 3. The data processing method based on the dual MCU sampling calculation structure according to claim 1, characterized in that, amplifying the voltage values and the current values through an operational amplifier, and converting the voltage values and the current values into voltage and current as the power data through a resistor and a capacitor. The initialization of the three-phase metering chip specifically comprises the following steps: performing a reset operation, a table clearing operation and an enable table writing operation based on the three-phase metering chip; 4. The data processing method based on the dual-MCU sampling calculation structure according to claim 3, characterized in that, after the above operations, writing mode configuration parameters, EMU unit configuration parameters, ADC channel gain configuration parameters and high-frequency pulse parameters into a software program of the three-phase metering chip, simultaneously writing the table parameters into a table parameter register of the three-phase metering chip and completing the initialization operation. The standardization of the three-phase metering chip specifically comprises the following steps: after the initialization operation, sequentially setting the following parameters: setting three-phase voltage and current offset calibration parameters; setting three-phase voltage and current gain calibration parameters; setting three-phase power gain calibration parameters; 5. The data processing method based on the dual-MCU sampling calculation structure according to claim 4, characterized in that, setting three-phase phase calibration parameters. Setting three-phase voltage and current offset calibration parameters specifically refers to calibrating the values to zero according to zero drift without applying voltage and current to the equipment; setting three-phase voltage and current gain calibration parameters specifically refers to calibrating the data to the applied values according to relevant formulas by applying specific voltage and current to the equipment; setting three-phase power gain calibration parameters specifically refers to correcting power gain when the power factor cos (phi) = 1, applying specific voltage and current, calculating the error value read on a standard table and calibrating; 6. The data processing method based on the dual MCU sampling calculation structure according to claim 1, characterized in that, setting three-phase phase calibration parameters specifically refers to correcting the phase when the power factor cos (phi) = 0.5L, applying specific voltage and current, calculating the error value read on a standard table and calibrating. The calculation processing specifically comprises the following steps: based on the read power data, performing the following calculations respectively: obtaining effective values by using a root mean square algorithm; obtaining power by using a two-wattmeter power algorithm; obtaining positive and negative active power, positive and negative reactive power and four-quadrant reactive power; 7. The data processing method based on the dual MCU sampling calculation structure according to claim 1, characterized in that, obtaining fundamental wave and harmonic wave data by using a Fourier function. The mutual exclusion circuit comprises a multiplexer and a multifunctional logic gate; the shared FRAM is connected with related pins of the multiplexer. The main MCU and the slave MCU are connected with the related pins of the multiplexer and the multifunctional logic gate; The A pin in the multifunctional logic gate is an input pin of the slave MCU and an output pin of the main MCU; The A pin in the multifunctional logic gate is connected with the S pin of the multiplexer; The B pin in the multifunctional logic gate is an output pin of the slave MCU and an input pin of the main MCU.

8. The data processing method based on the dual-MCU sampling calculation structure according to claim 7, characterized in that, The judgment principle of the mutual exclusion circuit is: Judge whether the levels of the A pin and the B pin are the same; If yes, the output pin of the multifunctional logic gate is high level, the OE# pin of the multiplexer connected with the multifunctional logic gate is invalid level, and the main MCU and the slave MCU cannot access the shared FRAM; If no, the output pin of the multifunctional logic gate is low level, and the OE# pin of the multiplexer connected with the multifunctional logic gate is valid level; Judge whether the B pin is high level and the input level of the S pin is low level; If yes, the slave MCU accesses the shared FRAM through the multiplexer; Otherwise, the main MCU accesses the shared FRAM through the multiplexer.

9. The data processing method based on the dual-MCU sampling calculation structure according to claim 7, characterized in that, The three-phase metering chip is also used for calculating voltage, current, power and energy data based on the sampled power data, obtaining relevant calculation results and storing; The slave MCU reads the relevant calculation results, and after judging through the mutual exclusion circuit, transmits the relevant calculation results to the shared FRAM for storage.

10. A data processing system based on a dual MCU sampling computing structure, for performing a data processing method based on a dual MCU sampling computing structure according to any one of claims 1-9, characterized in that, It comprises: a calculation structure construction module, a data sampling module, a data calculation module and a data reading and processing module; The calculation structure construction module is used for constructing a calculation structure comprising a sampling circuit, a three-phase metering chip, a slave MCU, a shared FRAM, a main MCU and a mutual exclusion circuit; The data sampling module is used for sampling power data of a target power system based on the sampling circuit, and sampling and storing the power data based on the three-phase metering chip after initialization and standardization; The data calculation module is used for periodically reading the power data stored in the three-phase metering chip based on the slave MCU and performing calculation processing, and after judging through the mutual exclusion circuit, transmitting the calculation results to the shared FRAM for storage; The data reading and processing module is used for reading the calculation results stored in the shared FRAM for subsequent processing after the main MCU judges through the mutual exclusion circuit.