Frequency converter system, working method of frequency converter system and computer readable storage medium

Abstract

The invention provides a frequency converter system, a working method thereof and a computer readable storage medium. The frequency converter system comprises a first frequency converter which comprises a first three-phase output end and outputs first three-phase alternating current; the second frequency converter comprises a second three-phase output end for outputting a second three-phase alternating current; the balance reactor comprises a first three-phase input end and a second three-phase input end which are respectively connected with the first three-phase output end of the first frequency converter and the second three-phase output end of the second frequency converter, and after the first three-phase alternating current and the second three-phase alternating current are converged, third three-phase current is output to drive the motor to rotate; and the main control module is connected with the first frequency converter and the second frequency converter, provides a first control signal for the first frequency converter and provides a second control signal for the second frequency converter, so that three-phase alternating current output by the first frequency converter and the second frequency converter is balanced. The frequency converter system can reduce circulation caused by factors such as communication delay, improve stability and reliability, reduce the inductance value of the balance reactor, and save volume and cost.

Description

TECHNICAL FIELD

[0001] The present application generally relates to the technical field of frequency converter, and particularly relates to a frequency converter system, a working method of the frequency converter system and a computer readable storage medium. BACKGROUND

[0002] Some conventional frequency converter systems include two frequency converters, the two frequency converters are respectively controlled by two independent main controls, and the frequency converters are controlled through communication, but this way has communication delay, which causes the output voltages to be different and has the problem of large circulating current, which is not conducive to the reliable and stable operation of the frequency converter system.

[0003] Some existing methods use large inductors to suppress circulating current, but this way increases the volume and cost of the frequency converter system. Therefore, a new technical solution is needed to suppress circulating current, improve the reliability of the frequency converter system, and reduce the volume and cost of the system.

[0004] The contents of the background section merely represent the technical knowledge of the inventor, and do not necessarily represent the prior art in the field. SUMMARY

[0005] To solve one or more of the problems in the prior art, the present application provides a frequency converter system, comprising: a first frequency converter comprising a first three-phase output end and capable of outputting a first three-phase alternating current; a second frequency converter comprising a second three-phase output end and capable of outputting a second three-phase alternating current; a balancing reactor comprising a first three-phase input end and a second three-phase input end, connected to the first three-phase output end of the first frequency converter and the second three-phase output end of the second frequency converter respectively, and outputting a third three-phase current by combining the first three-phase alternating current and the second three-phase alternating current to drive the motor to rotate; and a main control module connected to the first frequency converter and the second frequency converter, and providing a first control signal to the first frequency converter and a second control signal to the second frequency converter, so that the first three-phase alternating current output by the first frequency converter and the second three-phase alternating current output by the second frequency converter are balanced.

[0006] Optionally, the main control module comprises a first controller and a second controller, the first controller is connected to the second controller and generates a first modulation wave and a second modulation wave; the second controller generates a first carrier wave and a second carrier wave, and generates the first control signal based on the first modulation wave and the first carrier wave, and generates the second control signal based on the second modulation wave and the second carrier wave.

[0007] Optionally, the first modulation wave and the second modulation wave are the same, and the first carrier wave and the second carrier wave are the same; the first controller can adjust the amplitude of the first modulation wave and / or the second modulation wave based on the output current of the first frequency converter and the second frequency converter, so that the first three-phase alternating current output by the first frequency converter and the second three-phase alternating current output by the second frequency converter are balanced.

[0008] Optionally, the main controller comprises a first controller and a second controller, the first controller is connected to the second controller, and the first controller generates a third modulation wave; the second controller generates a third carrier wave, and generates a third control wave based on the third modulation wave and the third carrier wave.

[0009] Optionally, the second controller divides the third control wave into the first control signal and the second control signal respectively.

[0010] Optionally, the frequency converter system further comprises a splitter connected to the output end of the second controller and dividing the third control wave into the first control signal and the second control signal.

[0011] Optionally, the first control signal and the second control signal comprise PWM control signals, and the parameters of the first control signal and the second control signal are the same, the parameters comprising phase and duty cycle.

[0012] Optionally, the second controller can adjust the duty cycle of the first control signal and / or the second control signal based on the output current of the first frequency converter and the second frequency converter, so that the first three-phase alternating current output by the first frequency converter and the second three-phase alternating current output by the second frequency converter are balanced.

[0013] Optionally, each frequency converter comprises three groups of power units, each group of power units comprising a plurality of power units connected in cascade, each power unit comprising a third controller and a plurality of switching tubes, the third controller being connected to the plurality of switching tubes and being capable of adjusting the dead time of at least one of the switching tubes, so that the first three-phase alternating current output by the first frequency converter and the second three-phase alternating current output by the second frequency converter are balanced; the switching tube comprises one or more of an insulated gate bipolar transistor, an integrated gate-commutated thyristor or a silicon-controlled rectifier.

[0014] Optionally, the third controller is connected to the second controller, and the first control signal and / or the second control signal comprises a dead time control signal of the switching tube, and the third controller adjusts the dead time of the switching tube based on the dead time control signal of the switching tube.

[0015] Optionally, the balance reactor satisfies: L*di / dt≥Vbus, wherein L is the differential mode inductance of the balance reactor, di is the pulse current amplitude that the power unit can withstand, dt is the time of the output waveform of the first frequency converter and the second frequency converter being inconsistent, and Vbus is the bus voltage of the power unit.

[0016] Optionally, the first controller comprises a digital signal processor, and the second controller comprises a field programmable logic gate array.

[0017] Optionally, the frequency converter system further comprises a first phase-shifting transformer connected to the input end of the first frequency converter and a second phase-shifting transformer connected to the input end of the second frequency converter, parameters of the first phase-shifting transformer and the second phase-shifting transformer are the same, and the parameters of the first phase-shifting transformer and the second phase-shifting transformer comprise short-circuit impedance, phase-shifting angle, voltage deviation and transformer capacity.

[0018] Optionally, parameters of the power units of the first frequency converter and the second frequency converter are the same, and the parameters of the power units comprise the specifications, number, voltage, current and capacitance of the switching tubes.

[0019] The application further provides a working method of a frequency converter system, which is executed by the frequency converter system as described above.

[0020] The application further provides a computer readable storage medium comprising computer executable instructions stored thereon, which, when executed by a processor, implement the working method as described above.

[0021] The frequency converter system of the application can realize synchronous control of two frequency converters connected by the same main control module, so that the three-phase alternating currents output by the two frequency converters are balanced, the circulating current caused by communication delay and other factors can be effectively reduced, the stability and reliability of the frequency converter system can be improved, the inductance of the balance reactor at the output end of the frequency converter can be effectively reduced, and the volume and cost of the frequency converter system can be saved. Details are described below. BRIEF DESCRIPTION OF DRAWINGS

[0022] The accompanying drawings are included to provide a further understanding of the application, and constitute a part of the specification, illustrate the application, and are used to explain the application together with the embodiments of the application, and do not constitute a limitation on the application. In the drawings:

[0023] Figure 1 A schematic diagram of a frequency converter system according to some embodiments of the application is shown.

[0024] Figure 2 A schematic diagram of a main control module according to some embodiments of the application is shown.

[0025] Figure 3 A schematic diagram of a process of generating the first control signal and the second control signal according to some embodiments of the present application is shown.

[0026] Figure 4 A schematic diagram of a process of generating the first control signal and the second control signal according to some other embodiments of the present application is shown.

[0027] Figure 5 A schematic diagram of a process of generating the first control signal and the second control signal according to yet some other embodiments of the present application is shown.

[0028] Figure 6 A schematic diagram of a frequency converter system according to some other embodiments of the present application is shown.

[0029] Figure 7 A partial schematic diagram of a first frequency converter according to some embodiments of the present application is shown.

[0030] Figure 8 A partial schematic diagram of a second frequency converter according to some embodiments of the present application is shown.

[0031] Figure 9 A schematic diagram of a third controller regulating dead time of a switching tube according to some embodiments of the present application is shown. DETAILED DESCRIPTION

[0032] In the following, only some exemplary embodiments are described in brief. As will be appreciated by those skilled in the art, the described embodiments can be modified in various different ways without departing from the spirit or scope of the present application. Therefore, the drawings and description are to be regarded as illustrative in nature and not restrictive.

[0033] In the description of the present application, it is to be understood that the orientations or positional relationships indicated by the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like are based on the orientations or positional relationships shown in the drawings, and are merely for the purpose of facilitating the description of the present application and simplifying the description, and are not intended to indicate or imply that the devices or elements indicated thereby must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated thereby. Thus, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise explicitly specifically limited.

[0034] In the description of the present application, it is necessary to point out that, unless otherwise explicitly specified and limited, the terms "mount", "connect", "connection", "couple" should be understood in a broad sense, for example, can be fixed connection, can also be detachable connection, or integrally connected; can be mechanical connection, can also be electrical connection or can communicate with each other; can be directly connected, can also be indirectly connected through an intermediate medium, can be the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0035] In the present application, unless otherwise explicitly specified and limited, the first feature "on" or "under" the second feature can include that the first and second features are in direct contact, or the first and second features are not in direct contact but are in contact through another feature between them. Moreover, the first feature "on", "above" and "over" the second feature includes that the first feature is directly above and obliquely above the second feature, or only indicates that the horizontal height of the first feature is higher than that of the second feature. The first feature "under", "below" and "under" the second feature includes that the first feature is directly below and obliquely below the second feature, or only indicates that the horizontal height of the first feature is less than that of the second feature.

[0036] Many different embodiments or examples of different structures for implementing the present application are provided below. In order to simplify the present application, the components and arrangements of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeatedly refer to numbers and / or letters in different examples, and such repetition is for the purpose of simplification and clarity, which itself does not indicate the relationship between the various embodiments and / or arrangements discussed. In addition, the present application provides examples of various specific processes and materials, but those skilled in the art can realize the application of other processes and / or the use of other materials.

[0037] The preferred embodiments of the present application are described below in conjunction with the accompanying drawings, it should be understood that the preferred embodiments described herein are only used to illustrate and explain the present application, and are not used to limit the present application.

[0038] This invention provides a frequency converter system. The frequency converter system includes a first frequency converter, a second frequency converter, a balancing reactor, and a main control module. The first frequency converter includes a first three-phase output terminal, capable of outputting first three-phase AC power. The second frequency converter includes a second three-phase output terminal, capable of outputting second three-phase AC power. The balancing reactor includes a first three-phase input terminal and a second three-phase input terminal, respectively connected to the first three-phase output terminal of the first frequency converter and the second three-phase output terminal of the second frequency converter, and combines the first three-phase AC power and the second three-phase AC power to output third three-phase power to drive a motor. The main control module is connected to the first frequency converter and the second frequency converter, and provides a first control signal and a second control signal to the first frequency converter to balance the first three-phase AC power output by the first frequency converter and the second three-phase AC power output by the second frequency converter. The inverter system of this invention connects two inverters to the same main control module, enabling synchronous control of the two inverters. This balances the three-phase AC outputs of the two inverters, effectively reducing circulating current caused by communication delays and other factors. It also improves the stability and reliability of the inverter system and effectively reduces the inductance of the balancing reactor at the inverter output, thus saving on system size and cost. Details are described below.

[0039] Figure 1 A schematic diagram of a frequency converter system 1 according to some embodiments of the present invention is shown. For example... Figure 1 As shown, the frequency converter system 1 includes a first frequency converter 10, a second frequency converter 20, a balancing reactor 30, and a main control module 40. The first frequency converter 10 includes first three-phase output terminals U1, V1, and W1, capable of outputting first three-phase AC power. The second frequency converter 20 includes second three-phase output terminals U2, V2, and W2, capable of outputting second three-phase AC power. The parameters of the first frequency converter 10 and the second frequency converter 20 are identical. The identical parameters of the first frequency converter 10 and the second frequency converter 20 include, but are not limited to, their power units (e.g., ...). Figure 6 The illustrated power unit 101 and power unit 201 have the same parameters, and both are connected to a phase-shifting transformer (e.g., Figure 6 The parameters of the illustrated first phase-shifting transformer 51 and second phase-shifting transformer 52 are the same. The parameters of the power unit include, but are not limited to, the switching transistors (e.g., Figure 7 The schematic switch K1 and Figure 8The specifications, number, voltage, current and capacitance of the switch tube K2) are shown in the table. The switch tube can be the inverter switch tube in the power unit, but the present application is not limited thereto, and the switch tube can be any switch tube in the power unit, which is within the protection scope of the present application. The parameters of the phase-shifting transformer include, but are not limited to, short-circuit impedance, phase-shifting angle, voltage deviation and transformer capacity. The balanced reactor 30 includes a first three-phase input U3, V3, W3 and a second three-phase input U3', V3', W3', the first three-phase input U3, V3, W3 of the balanced reactor 30 is connected to the first three-phase output U1, V1, W1 of the first frequency converter 10, the second three-phase input U3', V3', W3' of the balanced reactor 30 is connected to the second three-phase output U2, V2, W2 of the second frequency converter 20, and the first three-phase alternating current and the second three-phase alternating current are merged and output as a third three-phase current to drive the motor M to rotate. The main control module 40 is connected (for example, through optical fiber) to the first frequency converter 10 and the second frequency converter 20, and provides a first control signal PWM1 to the first frequency converter 10 and a second control signal PWM2 to the second frequency converter 20, the first control signal PWM1 and the second control signal PWM2 include PWM control signals, the first control signal PWM1 can include the switch tube of one or more power units of the first frequency converter 10 (for example, Figure 7 The control signal of the switch tube K1) of the power unit 101 is shown in the table. The second control signal PWM2 can include the switch tube of one or more power units of the second frequency converter 20 (for example, Figure 8 The control signal of the switch tube K2) of the power unit 202 is shown in the table. The parameters of the first control signal PWM1 and the second control signal PWM2 are the same, including phase and duty cycle, etc., so that the first three-phase alternating current output by the first frequency converter 10 and the second three-phase alternating current output by the second frequency converter 20 are balanced.

[0040] Figure 2 The schematic diagram of the main control module 40 according to some embodiments of the present application is shown. As Figure 2As shown, the main control module 40 comprises a first controller 401 and a second controller 402, and the first controller 401 is connected to the second controller 402. The first controller 401 can be a digital signal processor (DSP). The second controller 402 can be a field-programmable gate array (FPGA). It can be understood that the main control module 40 can also comprise a central processing unit (CPU), a micro control unit (MCU), an application specific integrated circuit (ASIC), a complex programmable logic device (CPLD) or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, and the like, and a control circuit or processing circuit.

[0041] Figure 3 A schematic diagram of a generation process of the first control signal PWM1 and the second control signal PWM2 according to some embodiments of the present application is shown. As shown, the first control signal PWM1 and the second control signal PWM2 are generated by the main control module 40. Figure 3As shown, the first controller 401 (DSP) generates the first modulation wave m1 and the second modulation wave m2. The second controller 402 (FPGA) generates the first carrier wave c1 and the second carrier wave c2, and generates the first control signal PWM1 based on the first modulation wave m1 and the first carrier wave c1, and generates the second control signal PWM2 based on the second modulation wave m2 and the second carrier wave c2. Specifically, for example, the DSP generates the first modulation wave m1 and the second modulation wave m2, which are both, for example, three-phase sinusoidal modulation waves with a phase difference of 120°, and the first modulation wave m1 and the second modulation wave m2 are the same, and are sent to the FPGA by the DSP. The FPGA generates the first carrier wave c1 and the second carrier wave c2. The first carrier wave c1 and the second carrier wave c2 are the same. The first carrier wave c1 is, for example, a triangular carrier wave sequence including c11, c12, c13, c14, c15, c16, c17, and c18, with an initial angle difference of 60 / 8 = 7.5°. The second carrier wave c2 is, for example, a triangular carrier wave sequence including c21, c22, c23, c24, c25, c26, c27, and c28, with an initial angle difference of 60 / 8 = 7.5°. It should be noted that the above is an example of an 8-level frequency converter, but the present application is not limited thereto. The FPGA compares the first modulation wave m1 and the first carrier wave c1 to generate the first control signal PWM1, and compares the second modulation wave m2 and the second carrier wave c2 to generate the second control signal PWM2. Since the first control signal PWM1 and the second control signal PWM2 are generated from the same modulation wave and carrier wave, the first control signal PWM1 and the second control signal PWM2 are also the same, and when they are respectively sent to the first frequency converter 10 and the second frequency converter 20 via optical fibers, the control signals of the two frequency converters are the same, the outputs of the two frequency converters are the same, and the three-phase alternating currents output by the two frequency converters are balanced.

[0042] In Figure 3In the embodiment of FIG. 1, the first control signal PWM1 and the second control signal PWM2 are generated by two identical carriers and two identical modulation waves, respectively. However, due to device interference or signal transmission attenuation, the three-phase AC outputted by the first frequency converter 10 and the second frequency converter 20 can not be balanced. In order to achieve a better balance, the first controller 401 (DSP) can adjust the amplitude of the first modulation wave m1 and / or the second modulation wave m2 based on the output currents of the first frequency converter 10 and the second frequency converter 20, so that the first three-phase AC outputted by the first frequency converter 10 and the second three-phase AC outputted by the second frequency converter 20 are balanced, and the dynamic range of the frequency converter system can be improved. In other words, the first controller 401 can adjust only the amplitude of the first modulation wave m1, only the amplitude of the second modulation wave m2, or both the amplitude of the first modulation wave m1 and the amplitude of the second modulation wave m2. Specifically, for example, the first controller 401 can compare the output currents I of the corresponding output terminals (i.e., at least one of U1U2, V1V2, and W1W2) of the first frequency converter 10 and the second frequency converter 20, and adjust the amplitude of the first modulation wave m1 and / or the second modulation wave m2 based on the output currents I of the corresponding output terminals. For example, the first controller 401 can compare the output current I of the output terminal U1 of the first frequency converter 10 and the output current I of the output terminal U2 of the second frequency converter 20. When the output current I of the output terminal U1 of the first frequency converter 10 is greater than the output current I of the output terminal U2 of the second frequency converter 20, the first controller 401 can adjust only the amplitude of the first modulation wave m1, only the amplitude of the second modulation wave m2, or both the amplitude of the first modulation wave m1 and the amplitude of the second modulation wave m2, so that the output current I of the output terminal U1 of the first frequency converter 10 and the output current I of the output terminal U2 of the second frequency converter 20 are balanced. U1 and the output current I of the output terminal U2 of the second frequency converter 20, the first controller 401 can adjust only the amplitude of the first modulation wave m1, only the amplitude of the second modulation wave m2, or both the amplitude of the first modulation wave m1 and the amplitude of the second modulation wave m2, so that the output current I of the output terminal U1 of the first frequency converter 10 and the output current I of the output terminal U2 of the second frequency converter 20 are balanced. U2 When the output current I of the output terminal U1 of the first frequency converter 10 is greater than the output current I of the output terminal U2 of the second frequency converter 20, the first controller 401 can adjust only the amplitude of the first modulation wave m1, only the amplitude of the second modulation wave m2, or both the amplitude of the first modulation wave m1 and the amplitude of the second modulation wave m2, so that the output current I of the output terminal U1 of the first frequency converter 10 and the output current I of the output terminal U2 of the second frequency converter 20 are balanced. U1 and the output current I of the output terminal U2 of the second frequency converter 20, the first controller 401 can adjust only the amplitude of the first modulation wave m1, only the amplitude of the second modulation wave m2, or both the amplitude of the first modulation wave m1 and the amplitude of the second modulation wave m2, so that the output current I of the output terminal U1 of the first frequency converter 10 and the output current I of the output terminal U2 of the second frequency converter 20 are balanced. U2 When the output current I of the output terminal U1 of the first frequency converter 10 is greater than the output current I of the output terminal U2 of the second frequency converter 20, the first controller 401 can adjust only the amplitude of the first modulation wave m1, only the amplitude of the second modulation wave m2, or both the amplitude of the first modulation wave m1 and the amplitude of the second modulation wave m2, so that the output current I of the output terminal U1 of the first frequency converter 10 and the output current I of the output terminal U2 of the second frequency converter 20 are balanced. U1 When the output current I of the output terminal U1 of the first frequency converter 10 is greater than the output current I of the output terminal U2 of the second frequency converter 20, the first controller 401 can adjust only the amplitude of the first modulation wave m1, only the amplitude of the second modulation wave m2, or both the amplitude of the first modulation wave m1 and the amplitude of the second modulation wave m2, so that the output current I of the output terminal U1 of the first frequency converter 10 and the output current I of the output terminal U2 of the second frequency converter 20 are balanced. U2When the difference ΔI between the output currents I of the corresponding output terminals of the first frequency converter 10 and the second frequency converter 20 is less than the threshold value I TH , it can be considered that the first three-phase alternating current output by the first frequency converter 10 and the second three-phase alternating current output by the second frequency converter 20 are balanced, that is, the three-phase alternating current outputs of the two are balanced, which can have a certain margin. The present application does not limit the specific size of the threshold value I TH , which can be set according to the needs in actual application. In addition, Figure 3 , the first carrier wave c1 and the second carrier wave c2 are the same, but those skilled in the art should understand that the first carrier wave c1 and the second carrier wave c2 can be different, and the three-phase alternating current outputs of the two frequency converters can also be balanced by adjusting the first modulation wave m1 and / or the second modulation wave m2, which are within the protection scope of the present application.

[0043] Figure 4 The generation process of the first control signal PWM1 and the second control signal PWM2 according to some other embodiments of the present application is shown in the schematic diagram. As shown in the figure, Figure 4 , the first controller 401 generates the third modulation wave m3. The second controller 402 generates the third carrier wave c3, and generates the third control wave PWM3 based on the third modulation wave m3 and the third carrier wave c3. The second controller 402 takes the third control wave PWM3 as the first control signal PWM1 and the second control signal PWM2 respectively. Specifically, the DSP generates the third modulation wave m3, for example, a sine modulation wave, and sends it to the FPGA. The FPGA generates the third carrier wave c3, for example, a triangular wave carrier. The FPGA compares the third modulation wave m3 and the third carrier wave c3 to generate the third control wave PWM3, which is taken as the control signal of the first frequency converter 10 and the second frequency converter 20 respectively, to control the two frequency converters. In the ideal state, the control signals of the two frequency converters are the same, and the output voltages and even the output currents of the two frequency converters are also the same.

[0044] Figure 5A schematic diagram illustrating the generation process of the first control signal PWM1 and the second control signal PWM2 according to some embodiments of the present invention is shown. Figure 5 As shown, the inverter system may also include a splitter DE. The splitter DE is connected to the output of the second controller 402 and splits the third control wave PWM3 into two, generating a first control signal PWM1 and a second control signal PWM2.

[0045] exist Figure 4 In this embodiment, the first control signal PWM1 and the second control signal PWM2 are generated by the same carrier wave and the same modulation wave. However, due to factors such as device interference or signal transmission attenuation, the three-phase AC power output by the two frequency converters may not be balanced. To achieve better balancing, the second controller 402 (FPGA) can adjust (e.g., fine-tune) the duty cycle of the first control signal PWM1 and / or the second control signal PWM2 based on the output current of the first frequency converter 10 and the second frequency converter 20, so that the first three-phase AC power output by the first frequency converter 10 and the second three-phase AC power output by the second frequency converter 20 are balanced, and the dynamic range of the frequency converter system can be improved. In other words, the second controller 402 can adjust only the duty cycle of the first control signal PWM1, or only the duty cycle of the second control signal PWM2, or simultaneously adjust the duty cycles of the first control signal PWM1 and the second control signal PWM2. Specifically, for example, the second controller 402 can compare the output current I of corresponding output terminals of the first inverter 10 and the second inverter 20, and adjust the duty cycle of the first control signal PWM1 and / or the second control signal PWM2 based on the output current I of the corresponding output terminals. For example, the first controller 401 can compare the output current I of the output terminal U1 of the first inverter 10. U1 The output current I at the output terminal U2 of the second frequency converter 20 U2 When the output current I at the output terminal U1 of the first frequency converter 10 U1 The output current I at the output terminal U2 of the second frequency converter 20 is greater than that of the second frequency converter 20. U2 At this time, the FPGA can either reduce the duty cycle of the first control signal PWM1, increase the duty cycle of the second control signal PWM2, or simultaneously reduce the duty cycle of the first control signal PWM1 and increase the duty cycle of the second control signal PWM2, so that the output current I at the output terminal U1 of the first frequency converter 10 is increased. U1 The output current I at the output terminal U2 of the second frequency converter 20 U2 Balanced. Conversely, when the output current I at the output terminal U1 of the first frequency converter 10 is... U1 The output current I at the output terminal U2 of the second frequency converter 20 is less than that of the second frequency converter 20. U2At this time, the FPGA can either increase the duty cycle of the first control signal PWM1, decrease the duty cycle of the second control signal PWM2, or increase the duty cycle of the first control signal PWM1 while decreasing the duty cycle of the second control signal PWM2, so that the output current I at the output terminal U1 of the first frequency converter 10 is increased. U1 The output current I at the output terminal U2 of the second frequency converter 20 U2 Balance. It should be noted that this explanation uses the output terminal U1 of the first inverter 10 and the output terminal U2 of the second inverter 20 as examples. It should be understood that the examples for the output terminals V1 of the first inverter 10 and V2 of the second inverter 20, as well as the output terminals W1 of the first inverter 10 and W2 of the second inverter 20, are similar and will not be repeated here. Furthermore, when the difference ΔI between the output currents I at the corresponding output terminals of the first inverter 10 and the second inverter 20 is less than the threshold I... TH When this is the case, it can be considered that the first three-phase AC power output by the first frequency converter 10 and the second three-phase AC power output by the second frequency converter 20 are balanced.

[0046] Figure 6 A schematic diagram of a frequency converter system 2 according to other embodiments of the present invention is shown. For example... Figure 6 As shown, the inverter system 2 also includes a first phase-shifting transformer 51 connected to the input terminal of the first inverter 10 and a second phase-shifting transformer 52 connected to the input terminal of the second inverter 20. The power unit group of the first inverter 10 ( Figure 6 The combination of power units 101 (shown by the purple rectangles in the diagram) is connected one-to-one with the secondary side of the first phase-shifting transformer 51. The power unit group of the second frequency converter 20 (… Figure 6The power unit 201 (shown by the purple rectangle in the diagram) and the secondary side of the second phase-shifting transformer 52 are connected one-to-one. The parameters of the first phase-shifting transformer 51 and the second phase-shifting transformer 52 are identical, including short-circuit impedance, phase shift angle, voltage deviation, and transformer capacity. For example, the secondary sides of the first phase-shifting transformer 51 and the second phase-shifting transformer 52 can both use the same extended delta connection with the same angle and the same impedance, which can improve the harmonic current on the grid side and facilitate the balance of the three-phase AC output of the first frequency converter 10 and the second frequency converter 20. The main control module 40 connects the power unit group of the first frequency converter 10 and the power unit group of the second frequency converter 20. Preferably, the frequency converter system 2 also includes a Human Machine Interface (HMI) H, through which the user can interact with the frequency converter system. Preferably, the inverter system 2 also includes DriveAdvisor (DA), a digital service platform that can interact with a cloud platform (not shown) to perform real-time data monitoring, equipment file management, alarm and push notification management, work order dispatching, maintenance planning, and predictive maintenance of the inverter system. This helps users understand the operating status of the inverter system in a timely manner, prevent potential risks, and promote the stable and reliable operation of the inverter system. Preferably, the inverter system 2 also includes a remote controller C, which may include, for example, a programmable logic controller (PLC) or similar device, facilitating remote control of various components in the inverter system. It should be understood that, although not shown in the figure, the inverter system may also include components such as a housing and temperature and humidity sensors.

[0047] In some embodiments, each inverter includes three power units, each power unit includes multiple cascaded power units, and each power unit includes a third controller and multiple switching transistors. Each power unit includes at least four switching transistors, which form an H-bridge inverter circuit. The switching transistors can be, for example, one or more of Insulated-Gate Bipolar Transistors (IGBTs), Integrated Gate-Commutated Thyristors (IGCTs), or Silicon Controlled Rectifiers (SCRs), or other similar devices. The specifications and quantities of the power units, third controllers, and switching transistors are identical for each inverter. The third controller connects to multiple switching transistors and can adjust the dead time of at least one switching transistor to balance the first three-phase AC output from the first inverter and the second three-phase AC output from the second inverter. The third controller can include DSPs, FPGAs, CPUs, MCUs, ASICs, CPLDs, or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, and similar devices and control or processing circuits.

[0048] Figure 7 and Figure 8 Partial schematic diagrams of a first frequency converter 10 and a second frequency converter 20 according to some embodiments of the present invention are shown. Figure 6 and Figure 7 As shown, in the inverter system 2, the first inverter 10 includes three sets of power units (power units such as...). Figure 6 As shown by the purple rectangles in the diagram, each row of power units forms a group. Each group of power units includes multiple cascaded power units 101. Each power unit 101 includes a third controller 103 and multiple switching transistors K1K1. Figure 7 A switching transistor K1 is illustrated. The third controller 103 is connected to the control electrode of the switching transistor K1 and can adjust the dead time of at least one K1 to balance the first three-phase AC power output from the first inverter 10 and the second three-phase AC power output from the second inverter 20. Similarly, as... Figure 6 and Figure 8 As shown, the second frequency converter 20 includes three groups of power units, each group of power units including multiple cascaded power units 201. Each power unit 201 includes a third controller 203 and multiple switching transistors K2 ( Figure 8A switching transistor K2 is illustrated. The third controller 203 is connected to the control electrode of the switching transistor K2 and can adjust the dead time of at least one switching transistor K2 to balance the first three-phase AC power output from the first inverter 10 and the second three-phase AC power output from the second inverter 20, thereby improving the dynamic range of the inverter system. Specifically, for example, the third controllers 103 / 203 can compare the output current I at the corresponding output terminals of the first inverter 10 and the second inverter 20, and adjust the dead time of one or more, or even all, of the switching transistors in the power units of their respective inverters based on the output current I at the corresponding output terminals. For example, the third controllers 103 / 203 can compare the output current I at the output terminal U1 of the first inverter 10. U1 The output current I at the output terminal U2 of the second frequency converter 20 U2 When the output current I at the output terminal U1 of the first frequency converter 10 U1 The output current I at the output terminal U2 of the second frequency converter 20 is greater than that of the second frequency converter 20. U2 At the same time, the third controller 103 can increase the dead time of one or more switching transistors K1 in the power unit 101; or the third controller 203 can decrease the dead time of one or more switching transistors K2 in the power unit 202; or while the third controller 103 increases the dead time of one or more switching transistors K1 in the power unit 101, the third controller 203 can decrease the dead time of one or more switching transistors K2 in the power unit 202, so that the output current I at the output terminal U1 of the first frequency converter 10 is increased. U1 The output current I at the output terminal U2 of the second frequency converter 20 U2 Balanced. Conversely, when the output current I at the output terminal U1 of the first frequency converter 10 is... U1 The output current I at the output terminal U2 of the second frequency converter 20 is less than that of the second frequency converter 20. U2 At the same time, the third controller 103 can decrease the dead time of one or more switching transistors K1 in the power unit 101; or the third controller 203 can increase the dead time of one or more switching transistors K2 in the power unit 202; or the third controller 103 can decrease the dead time of one or more switching transistors K1 in the power unit 101 while simultaneously increasing the dead time of one or more switching transistors K2 in the power unit 202, so that the output current I at the output terminal U1 of the first frequency converter 10 is increased. U1 The output current I at the output terminal U2 of the second frequency converter 20 U2Balance. It should be noted that this explanation uses the output terminal U1 of the first inverter 10 and the output terminal U2 of the second inverter 20 as examples. It should be understood that the examples for the output terminals V1 of the first inverter 10 and V2 of the second inverter 20, as well as the output terminals W1 of the first inverter 10 and W2 of the second inverter 20, are similar and will not be repeated here. Furthermore, when the difference ΔI between the output currents of the corresponding output terminals of the first inverter 10 and the second inverter 20 is less than the threshold I... TH When this is the case, it can be considered that the first three-phase AC power output by the first frequency converter 10 and the second three-phase AC power output by the second frequency converter 20 are balanced.

[0049] In some preferred embodiments, when the difference ΔI between the output currents I at the corresponding output terminals of the first inverter 10 and the second inverter 20 is greater than a threshold I... TH At the same time, the third controller 103 / 203 can prioritize increasing the dead time of the switching transistor of the inverter corresponding to the output terminal with a larger output current, so as to balance the first three-phase AC power output by the first inverter 10 and the second three-phase AC power output by the second inverter 20, while avoiding the overcurrent burnout of the switching transistor.

[0050] In some embodiments, the third controller 103 / 203 can adjust the dead time of the switching transistor through local adjustment. For example, the third controller 103 / 203 can have a preset value for the dead time of the switching transistor built in, and the third controller 103 / 203 can adjust the dead time of the switching transistor to the preset value to achieve output balance between the first inverter 10 and the second inverter 20. Alternatively, the first inverter 10 and the second inverter 20 can also include a storage module (not shown in the figure), and the preset value for the dead time of the switching transistor can also be stored in the storage module. The third controller 103 / 203 can adjust the dead time of the switching transistor to the preset value by calling the stored data in the storage module.

[0051] In some embodiments, the storage module may include memory. The memory may include random access memory (RAM) or non-volatile memory. Further, the memory may include at least one of phase-change random access memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), read-only memory (ROM), and electrically erasable programmable read-only memory (EEPROM).

[0052] In some embodiments, the third controller 103 / 203 may use a remote adjustment method to adjust the dead time of the switching transistor. Figure 9 A schematic diagram illustrating the adjustment of the dead time of switching transistors K1 / K2 by a third controller 103 / 203 according to some embodiments of the present invention is shown. Figure 9 As shown, the third controller 103 / 203 is connected to the second controller 402 (FPGA) of the main control module 40. The first control signal PWM1 provided by the second controller 402 to the first frequency converter 10 includes the control signal PWM of the switching transistor K1. K1 The third controller 103 can be based on the control signal PWM. K1 Adjust the dead time of switching transistor K1. Similarly, the second control signal PWM2 provided by the second controller 402 to the second frequency converter 20 includes the control signal PWM of switching transistor K2. K2 The third controller 203 can be based on the control signal PWM. K2 Adjust the dead time of switching transistor K2. Figure 9 In this embodiment, the third controller 103 / 203 adjusts the dead time of the switching transistor under the control of the second controller 402 of the main control module 40. It is understood that... Figures 3 to 5 The embodiment can also adjust the dead time of the switching transistor in such a way that the first control signal PWM1 and the second control signal PWM2 are the same, so that the first three-phase AC power output by the first inverter 10 and the second three-phase AC power output by the second inverter 20 are balanced.

[0053] To achieve better power balancing, the control signals of the switching transistors of the two frequency converters should be as identical as possible (simultaneous, in phase, and with the same drive capability). In practice, the second controller 402 (FPGA) can package the PWM information containing the switching states of the transistors into data packets according to the command frame format agreed upon with the power units, and send them to the corresponding power units via optical fiber. The command data packets for the corresponding power units of the two frequency converters are identical (e.g., ...). Figure 6 (The control command data packets for the switching transistors of power units 101 at positions A1, B1, and C1 are the same as those for the switching transistors of power units 201 at positions A1', B1', and C1'.) After receiving the command data packet, the power unit decodes the corresponding data packet and extracts the corresponding switching transistor information to control the switching transistor. It should be understood that because the command frame format, transmission time, and reception time of the command data packets for the switching transistors of the power units at corresponding positions are the same, the waveforms output by the two power units at corresponding positions are almost identical. Therefore, the output voltages of the two frequency converters are also the same, the balancing reactor 30 has almost no circulating current, and the current flows entirely to the motor M, driving the motor M to rotate stably.

[0054] In this invention, the output voltage phase and amplitude of the two frequency converters are almost identical, and the two frequency converters are capacitive loads of each other. Due to the consistency differences of various components in the circuit, there are short-circuit currents caused by differences of several hundred ns or several microseconds before and after the output voltage pulse of the switching transistor. The short-circuit current will generate high current spikes, resulting in increased current loss and increased interference. The magnetic fields generated by the two input terminals (U3U3', V3V3', W3W3') of the balancing reactor 30 cancel each other out, making the common-mode inductance of the two input terminals of the balancing reactor 30 to the output terminal almost zero, and the voltage drop almost zero. The function of the balancing reactor 30 is not limited to suppressing circulating current, but also to limiting short-circuit current, thereby reducing current loss, suppressing interference, and making the frequency converter system operate stably and reliably.

[0055] In some embodiments, the balancing reactor 30 satisfies:

[0056] L*di / dt≥Vbus,

[0057] Where L is the differential mode inductance of the balancing reactor 30 (inductance between the two input terminals), di is the pulse current amplitude that the power unit can withstand, dt is the time when the output waveforms of the first and second frequency converters are inconsistent, and Vbus is the bus voltage of the power unit.

[0058] It should be noted that the pulse current amplitude di that the power unit can withstand is not less than the reverse recovery current of the freewheeling diode (not shown in the figure, which can be connected in parallel with the switching transistor). The value of the pulse current amplitude di that the power unit can withstand can also take into account factors such as device heating, device safety, and EMI. It should be understood that the time dt during which the output waveforms of the first and second frequency converters are inconsistent is related to the communication protocol, communication rate, dead time of the switching transistor, and software logic between the second controller 402 of the main control module 40 and the power units 101 / 201.

[0059] In the inverter system of the present invention, when the difference ΔI between the output current I at the corresponding output terminals of the first inverter 10 and the second inverter 20 is less than a threshold I... TH When the output current I at the corresponding output terminals of the first inverter 10 and the second inverter 20 is equal, the amplitude of the first modulation wave and / or the second modulation wave, the duty cycle of the first control signal and / or the second control signal, and the dead time of at least one switching transistor do not need to be adjusted, so as to avoid frequent adjustments that may cause system disorder and improve the robustness and stability of the inverter system.

[0060] This invention also provides a method for operating a frequency converter system, which is executed by the aforementioned frequency converter system. By employing the aforementioned frequency converter system, the method of this invention enables synchronous control of two frequency converters by the same main control module, resulting in balanced three-phase AC outputs from the two frequency converters. This effectively reduces circulating currents caused by factors such as communication delays, improving the stability and reliability of the frequency converter system. Furthermore, based on the output currents of the first and second frequency converters, the amplitudes of the first and / or second modulation waves, the duty cycles of the first and / or second control signals, and the dead time of at least one switching transistor in one or more power units can be dynamically adjusted to balance the first three-phase AC output from the first frequency converter and the second three-phase AC output from the second frequency converter, thereby improving the dynamic range and regulation performance of the frequency converter system.

[0061] The present invention also provides a computer-readable storage medium including computer-executable instructions stored thereon, the executable instructions performing the working method as described above when executed by a processor.

[0062] This invention can take the form of a computer program product implemented on one or more storage media containing program code. Computer-usable storage media include permanent and non-permanent, removable and non-removable media, and information storage can be implemented by any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to: PRAM, SRAM, DRAM, other types of RAM, ROM, EEPROM, flash memory or other memory technologies, compact disc read-only memory (CD-ROM), digital video disc (DVD) or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transfer medium that can be used to store information accessible by a computing device.

[0063] Finally, it should be noted that the above descriptions are merely preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A frequency converter system, characterized by The application relates to a three-phase motor drive system, comprising: a first frequency converter, comprising a first three-phase output end, capable of outputting a first three-phase alternating current; a second frequency converter, comprising a second three-phase output end, capable of outputting a second three-phase alternating current; a balanced reactor, comprising a first three-phase input end and a second three-phase input end, connected to the first three-phase output end of the first frequency converter and the second three-phase output end of the second frequency converter respectively, and capable of outputting a third three-phase current by merging the first three-phase alternating current and the second three-phase alternating current, to drive a motor to rotate; and a main control module, connected to the first frequency converter and the second frequency converter, and capable of providing a first control signal to the first frequency converter and a second control signal to the second frequency converter, so that the first three-phase alternating current output by the first frequency converter and the second three-phase alternating current output by the second frequency converter are balanced.

2. The frequency converter system of claim 1, wherein, The main control module comprises a first controller and a second controller, the first controller is connected to the second controller and generates a first modulation wave and a second modulation wave; the second controller generates a first carrier wave and a second carrier wave, and generates the first control signal based on the first modulation wave and the first carrier wave, and generates the second control signal based on the second modulation wave and the second carrier wave.

3. The frequency inverter system of claim 2, wherein, The first modulation wave and the second modulation wave are the same, and the first carrier wave and the second carrier wave are the same; the first controller can adjust the amplitude of the first modulation wave and / or the second modulation wave based on the output currents of the first frequency converter and the second frequency converter, so that the first three-phase alternating current output by the first frequency converter and the second three-phase alternating current output by the second frequency converter are balanced.

4. The frequency converter system of claim 1, wherein, The main control module comprises a first controller and a second controller, the first controller is connected to the second controller and generates a third modulation wave; the second controller generates a third carrier wave, and generates a third control wave based on the third modulation wave and the third carrier wave.

5. The frequency inverter system of claim 4, wherein, The second controller takes the third control wave as the first control signal and the second control signal respectively.

6. The frequency inverter system of claim 4, wherein, The application further comprises: a shunt connected to the output end of the second controller and capable of dividing the third control wave into the first control signal and the second control signal.

7. The frequency inverter system of claim 5 or 6, characterized in that The first control signal and the second control signal comprise PWM control signals, the parameters of the first control signal and the second control signal are the same, and the parameters include phase and duty cycle.

8. The frequency inverter system of claim 4 or 5, wherein, The second controller can adjust the duty cycle of the first control signal and / or the second control signal based on the output currents of the first frequency converter and the second frequency converter, so that the first three-phase alternating current output by the first frequency converter and the second three-phase alternating current output by the second frequency converter are balanced.

9. The frequency converter system of any of claims 4-6, wherein, Each frequency converter comprises three groups of power units, each group of power units comprising a plurality of power units connected in cascade, each power unit comprising a third controller and a plurality of switching tubes, the third controller connecting the plurality of switching tubes and being capable of adjusting dead time of at least one of the switching tubes so as to balance first three-phase alternating current output by the first frequency converter and second three-phase alternating current output by the second frequency converter; the switching tube comprising one or more of an insulated gate bipolar transistor, an integrated gate-commutated thyristor or a thyristor.

10. The frequency converter system of claim 9, wherein, The third controller connects the second controller, the first control signal and / or the second control signal comprising a dead time control signal of the switching tube, the third controller adjusting the dead time of the switching tube based on the dead time control signal of the switching tube.

11. The frequency converter system of claim 9, wherein, The balancing reactor satisfies: L*di / dt≥Vbus, wherein L is differential mode inductance of the balancing reactor, di is pulse current amplitude that the power unit can withstand, dt is time of inconsistency of output waveforms of the first frequency converter and the second frequency converter, and Vbus is bus voltage of the power unit.

12. The frequency converter system of any of claims 2-6, wherein, The first controller comprises a digital signal processor, and the second controller comprises a field programmable gate array.

13. The frequency converter system of any one of claims 1-6, wherein, Further comprising: a first phase-shifting transformer connected to an input end of the first frequency converter and a second phase-shifting transformer connected to an input end of the second frequency converter, parameters of the first phase-shifting transformer and the second phase-shifting transformer being identical, the parameters of the first phase-shifting transformer and the second phase-shifting transformer comprising short-circuit impedance, phase-shifting angle, voltage deviation and transformer capacity.

14. The frequency converter system of claim 9, wherein, Parameters of the power units of the first frequency converter and the second frequency converter are identical, the parameters of the power units comprising specifications, number, voltage, current and capacitance of the switching tube.

15. A method of operating a frequency converter system, characterized by The working method is performed by the frequency converter system according to any one of claims 1-14. 16.A computer readable storage medium comprising computer executable instructions stored thereon, the executable instructions, when executed by a processor, implementing the working method according to claim 15.

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