Manufacturing method of through hole interconnection outer layer partition

Abstract

The invention discloses a manufacturing method of a through hole interconnection outer layer partition, which comprises the following steps of: providing a production plate, arranging drilling positions on the production plate, and arranging at least two isolation discs on an inner layer hole ring corresponding to the drilling positions; through holes are drilled in the positions, corresponding to the drilling positions, of the production board, and then the isolation discs in the holes are removed through concave etching; metallizing the through hole through copper deposition and pulse electroplating to form a conducting hole with an internal partition, and at least one end of the conducting hole being a disconnected end; the via holes are plugged with resin and cured, and the resin protruding out of the plate surface is ground to be flat through a grinding plate; and manufacturing an outer layer circuit on the production board, and etching the hole wall copper layer at the break end of the via hole during etching so as to break the connection between the copper in the hole and the outer layer. According to the method, the purpose of isolating the inner layer and the outer layer of the through hole is achieved by etching a part of the hole wall copper layer at the broken end and filling the solder resist ink or the resin ink, and the space occupation of the outer layer through hole is effectively reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of printed circuit board manufacturing, and particularly relates to a manufacturing method for through-hole interconnection outer layer isolation. BACKGROUND

[0002] In the through-hole interconnection process, the through-hole not only penetrates the inner layer, but also penetrates the two surfaces of the outer layer. The through-hole on one surface of the outer layer is required, which is used as a connecting end, that is, the hole wall copper layer at the connecting end is connected with the outer layer circuit. However, the through-hole on the other surface is not required, which is a disconnected end, that is, the hole wall copper layer at the disconnected end is not connected with the outer layer circuit. However, a hole ring is generally designed on the surface of the outer layer at the disconnected end to protect the hole wall copper layer. The hole ring and the hole wall copper layer occupy the mounting position of the component or the wiring position of the outer layer circuit.

[0003] In the traditional circuit board manufacturing process, this through-hole interconnection mode causes unnecessary through-holes on the outer layer, which further occupies the mounting position of the component or the wiring space, thereby seriously limiting the flexibility of the circuit board design and the compactness of the layout. Especially in the trend of miniaturization and high integration of electronic devices, the space waste problem caused by the traditional process is increasingly prominent. Not only does it increase the size of the circuit board, but it also may affect the performance and stability of the circuit due to unreasonable layout. Meanwhile, in the subsequent component mounting and welding process, these redundant through-holes may also cause short circuit and other quality problems, thereby reducing the yield of the product and increasing the production cost. SUMMARY

[0004] The present application provides a manufacturing method for through-hole interconnection outer layer isolation, which can effectively reduce the space occupation of the outer layer through-hole by recessing a part of the hole wall copper layer at the disconnected end and filling the solder resist ink or resin ink to achieve the purpose of isolating the inner and outer layers of the through-hole.

[0005] In the first aspect, in order to solve the above technical problems, the present application provides a manufacturing method for through-hole interconnection outer layer isolation, which comprises the following steps: S1, providing a production board, the production board is provided with a drilling position, the inner layer circuit of the production board is provided with a hole ring at the corresponding drilling position, and the hole ring on the inner layer is provided with an isolation disc with an outer diameter larger than the drilling hole diameter, and at least two isolation discs are arranged in the inner layer of each drilling position; S2, drilling a through-hole at the corresponding drilling position on the production board, and then removing the isolation disc on the hole wall by chemical method to form a recessed position; S3, metalizing the through-hole by copper deposition and electroplating, and the recessed position and the isolation belt are not plated with a copper layer, an isolation belt is formed between every two recessed positions to form an internally isolated through-hole, and at least one end of the through-hole is a disconnected end; S4, resin is filled into the through hole and solidified, and then the protruding plate surface resin is ground flat by a grinding plate; S5, outer layer circuit is made on the production plate, and the copper layer on the hole wall at the disconnected end of the through hole is etched to disconnect the copper in the hole from the outer layer; S6, a solder resist layer is made on the production plate, the part of the hole wall copper layer etched is filled with solder resist ink and solidified to form a structure in which the hole wall copper layer is disconnected from the outer layer.

[0006] Further, in step S5, a film is first attached to the production plate, and then outer layer circuit patterns are formed by exposure and development, and the top surface of the hole wall copper layer at the disconnected end of the through hole is exposed, and then the outer layer circuit is obtained by etching, and the hole wall copper layer exposed at the disconnected end of the through hole is etched at the same time to form a recessed position lower than the plate surface dielectric layer.

[0007] Further, in step S2, after drilling, the two isolation rings on the hole wall are dissolved and removed by an alkaline solution to form a pair of recessed positions in the hole.

[0008] Further, the electroplating in step S3 specifically includes the following steps: S31, direct current flash plating is performed on the production plate, and no copper layer is plated at the recessed position; S32, then pulse electroplating is performed on the production plate to remove the hole wall copper layer on the isolation belt; S33, finally, direct current electroplating is performed on the production plate to disconnect the through hole into a through hole with multiple through sections.

[0009] Further, the current density during direct current flash plating is 0.8-1.5 ASD, and the time is 3-6 min; the hole wall copper layer is thickened by 1-5 microns during direct current flash plating; the total time of pulse electroplating is 6 min, and the current density of the forward pulse electroplating of each cycle is 3 ASD, and the time is 10 mS, and the current density of the reverse pulse electroplating is 9 ASD, and the time is 10 mS; the hole copper is thickened by 30 microns during direct current electroplating.

[0010] In a second aspect, the application further provides another manufacturing method of through hole interconnection outer layer disconnection, comprising the following steps: S10, a production plate is provided, the production plate is provided with a drilling position, the inner layer circuit of the production plate is provided with a hole ring arranged around the drilling position at the corresponding drilling position, and the hole ring of the inner layer is provided with an isolation disc with an outer diameter larger than the drilling hole diameter, and at least two isolation discs are arranged in the inner layer of each drilling position; S11, a through hole is drilled on the production plate at the corresponding drilling position, and then the isolation disc on the hole wall is removed by a chemical method to form a recessed position, and an isolation belt is formed between every two recessed positions; S12, the through hole is metalized by copper deposition and electroplating, and no copper layer is plated at the recessed position and the isolation belt, so as to form an internal isolated through hole, and at least one end of the through hole is a broken end; S13, resin is plugged into the through hole and solidified, and then the resin on the protruding plate surface is ground flat by a grinding plate; S14, a film is attached to the production plate, and exposure and development are performed to open a window at the broken end corresponding to the through hole, so as to expose the top surface of the hole wall copper layer at the broken end of the through hole; S15, the exposed hole wall copper layer is etched to isolate the copper in the hole from the outer layer; S16, after the film is removed, resin ink is used to fill the part of the hole wall copper layer that is etched and solidified, so as to form a structure in which the hole wall copper layer is isolated from the outer layer, and then the resin on the protruding plate surface is ground flat by a grinding plate; S17, a copper plating layer is formed on the surface of the filled resin by copper deposition and electroplating; S18, the outer layer circuit and the solder resist layer are sequentially formed on the production plate.

[0011] Further, the production plate is a multilayer plate formed by pressing a plurality of core plates into one body by a prepreg, and the core plates have been formed with inner layer circuits before being pressed, and each core plate is provided with a hole ring arranged around the drilled hole at the drilled hole position, and after the inner layer circuit is formed on the core plate, a layer of alkali-soluble photocurable ink with an outer diameter larger than that of the drilled hole is coated on at least one surface of the core plate at the drilled hole position, and the alkali-soluble photocurable ink is exposed and solidified by UV light to form an isolation disc.

[0012] Further, in step S11, the two isolation rings on the hole wall are dissolved and removed by an alkaline solution after drilling to form the recessed positions appearing in pairs in the hole.

[0013] Further, the electroplating in step S12 specifically includes the following steps: S121, direct current flash plating is performed on the production plate, and no copper layer is plated at the recessed position; S122, then pulse electroplating is performed on the production plate to remove the hole wall copper layer on the isolation belt; S123, finally, direct current electroplating is performed on the production plate to isolate the inside of the through hole into a through hole with multiple through segments.

[0014] Further, the current density during direct current flash plating is 0.8-1.5 ASD, and the time is 3-6 min; the hole wall copper layer is thickened by 1-5 microns during direct current flash plating; the total time of pulse electroplating is 6 min, and the current density of the forward pulse electroplating of each cycle is 3 ASD, and the time is 10 mS, the current density of the reverse pulse electroplating is 9 ASD, and the time is 10 mS; the hole copper is thickened by 30 microns during direct current electroplating.

[0015] Compared with the prior art, the present invention has the following beneficial effects: In the first method of the present invention, a portion of the copper layer on the hole wall at the disconnected end is etched away, and solder resist ink is used to fill it when the solder resist layer is made, so as to achieve the purpose of isolating the copper layer on the hole wall at the disconnected end from the outer layer, effectively reducing the space occupied by the outer layer through hole, allowing normal routing near the disconnected end of the through hole (not at the top) and allowing components to be installed at the top of the through hole.

[0016] In the second method of the present invention, a portion of the copper layer on the hole wall at the disconnected end is etched away and filled with resin ink to achieve the purpose of isolating the copper layer on the hole wall at the disconnected end from the outer layer, effectively reducing the space occupied by the outer layer via. Then, copper is plated on the filled resin surface by copper plating and electroplating. In this way, while achieving electrical isolation between the inner and outer layers at the disconnected end, the top of these via locations can be used for routing.

[0017] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and will become apparent from the description or may be learned by practice of the invention. Attached Figure Description

[0018] Figure 1 These are schematic diagrams showing the process of etching recesses onto the production board in Examples 1 and 2. Figure 2 These are schematic diagrams showing the filling of recessed areas with solder resist ink in Examples 1 and 2; Figure 3 These are schematic diagrams showing the process of etching recesses onto the production board in Examples 3 and 4. Figure 4 These are schematic diagrams showing the filling of recessed areas with resin ink in Examples 3 and 4; Figure 5 These are schematic diagrams of the outer layer circuitry fabricated on the production board in Examples 3 and 4. Detailed Implementation

[0019] The technical solutions of the present invention will be clearly and completely described below with reference to the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0021] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0022] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0023] Among them, the existing technical solutions for arbitrary layer interconnection vias are shown in the prior publication number "CN120264633A" and application number "2025115404468".

[0024] Example 1 This embodiment illustrates a method for manufacturing a circuit board, which includes a structure with through-hole interconnects and outer layer isolation, and sequentially includes the following processing steps: (1) Cutting: Cut multiple FR4 core boards according to the actual production panel size. The copper layer thickness on both surfaces of each core board is 0.5oz. The core board has drilling positions, which are the positions where drilling is required in subsequent processing.

[0025] (2) Inner layer circuit fabrication (negative film process): A wet film (i.e., photosensitive alkali-soluble film) is coated on both surfaces of all core boards using a vertical coating machine. The thickness of the wet film is controlled at 10 micrometers. A fully automatic exposure machine is used to complete the exposure of the inner layer circuit with 5-6 exposure rulers (21 exposure rulers). After development, the inner layer circuit pattern is formed. Inner layer etching: The inner layer circuit is etched on all core boards after exposure and development. Inner layer AOI: After the film is removed, the inner layer circuit is inspected for defects such as open circuits, short circuits, circuit gaps, and circuit pinholes. Products with defects are scrapped, and products without defects are sent to the next process.

[0026] Lamination: The browning speed is based on the copper thickness of the base copper. Multiple core boards are stacked together in a preset order using a prepreg. Then, appropriate lamination conditions are selected according to the board material Tg to laminate the stacked boards to form the production board.

[0027] (4) Drilling: According to the existing drilling technology, drill through holes at the corresponding drilling positions on the production board according to the design requirements.

[0028] (5) Copper plating: A thin layer of copper is deposited on the board surface and hole walls using chemical copper plating to metallize the through holes and form conductive holes; the backlight test is level 10, and the copper plating thickness in the hole is 0.5 micrometers.

[0029] In the above, one end of the via is the connection end that needs to be connected to the outer layer circuit, and the other end is the disconnect end that is not connected to the outer layer circuit.

[0030] Of course, in another different implementation, both ends of the via can also be disconnected ends that are not connected to the outer layer circuitry.

[0031] (6) Electroplating: The copper layer on the hole wall and the copper layer on the board surface are thickened by electroplating.

[0032] (7) Resin plugging: The through holes are plugged with resin and cured, and then the resin protruding from the plate surface is ground flat by grinding plate.

[0033] (8) Fabrication of outer layer circuitry: A wet film (i.e., a photosensitive alkali-soluble film) is coated on both surfaces of the production board using a vertical coating machine. The thickness of the wet film is controlled at 10 micrometers. A fully automatic exposure machine is used, with 5-6 exposure rulers (21 exposure rulers) to complete the exposure of the outer layer circuitry. After development, the outer layer circuitry pattern is formed on both surfaces of the production board. At the same time, windows are opened at the disconnected ends of the vias to expose the top surface of the copper layer on the hole wall at the disconnected end of the via, while the copper layer on the hole wall at the connected end is covered and protected by the film. Then, the copper layer other than the outer layer circuitry pattern is removed by etching to obtain the outer layer circuitry. During etching, the copper layer on the hole wall at the disconnected end of the via is also etched to form a recessed position 1 (e.g., below the substrate surface) that is lower than the dielectric layer 10 on the board surface. Figure 1 As shown), the copper layer on the hole wall at the disconnected end is disconnected from the outer layer; after removing the film, inspect the outer layer circuit for defects such as open and short circuits, circuit gaps, and circuit pinholes. Products with defects are scrapped, while products without defects are sent to the next process.

[0034] Specifically, during the fabrication of the outer layer circuitry, a ring of holes is created around and connected to the connecting end of the via.

[0035] (9) Fabrication of the solder resist layer: After screen printing the solder resist ink on the surface of the production board, it undergoes pre-curing, exposure, development, and heat curing processes in sequence to cure the solder resist ink into a solder resist layer. Solder resist ink 2 is then used to fill the recessed areas and cure (e.g., ...). Figure 2 As shown in the diagram, a structure is formed that separates the copper layer on the hole wall from the outer layer. Specifically, solder resist ink is applied to the top surface, and the "UL mark" is added to the characters on the top surface. This coats a protective layer on the lines and substrate that do not require soldering, preventing bridging between lines during soldering, providing a permanent electrical environment and resistance to chemical corrosion, while also enhancing the appearance. In one specific embodiment, after completing the above step (9), other post-processing steps are carried out sequentially on the production board according to the prior art, such as surface treatment, molding, electrical testing, FQC, FQA and packaging, etc., and finally the required circuit board is obtained.

[0036] Example 2 The circuit board manufacturing method shown in this embodiment is basically the same as the method described in Embodiment 1, except that: a through-hole arbitrary layer interconnection process is used to form multiple discontinuous copper layers in the through-hole walls. The through-hole arbitrary layer interconnection process adopts the technical solution shown in the prior publication number "CN120264633A" or application number "2025115404468", as detailed below: At the through-hole of the production board, a recessed etched position is provided at both ends of the insulating strip that requires interlayer insulation. The etched position is formed by the etching of the insulating disk on the core board.

[0037] In step (2), after the inner layer circuit is fabricated on the core board, an alkali-soluble photocurable ink with an outer diameter larger than the outer diameter of the drill hole is coated at the drill hole position on at least one surface of the core board, and the alkali-soluble photocurable ink is exposed and cured by UV light to form an isolation disk.

[0038] Specifically, the outer diameter of the isolation plate is 0.2-0.5 mm larger than the outer diameter of the drill hole, and the thickness of the isolation plate is 5-50 micrometers.

[0039] In step (3), at least two isolation discs are provided on each drilled hole position on the pressed production board, and the position of each isolation disc is located at the etched position in the production board; multiple isolation discs in each through hole are set in pairs and used in conjunction, and each two adjacent isolation discs form an isolation group. The copper layer on the hole wall between the two isolation discs in the same isolation group needs to be removed as an isolation strip, while the copper layer on the hole wall between two adjacent isolation groups needs to be retained.

[0040] In another embodiment, multiple isolation pads (such as three) in each via are used in conjunction, and the copper layer on the via wall between the multiple isolation pads needs to be removed as an isolation strip.

[0041] In step (4), after drilling, the isolation disk inside the hole is removed by etch to form an etched site.

[0042] Specifically, during the etching process, the production board is immersed in a sodium hydroxide solution at 60 degrees Celsius for 30-120 minutes; and the mass percentage of the solute in the sodium hydroxide solution is 10%. Specifically, the depth of the etched areas is 0.1-0.25 mm, and the height is 5-50 micrometers. In step (6), the production board is first subjected to DC flash plating, and no copper layer is plated at the etched positions; then the production board is subjected to the first pulse electroplating or micro-etching treatment to remove the copper layer on the hole wall of the isolation strip; finally, the production board is subjected to DC electroplating or the second pulse electroplating to form a structure of arbitrary layer interconnection of through holes.

[0043] Specifically, the current density during DC flash plating is 0.8-1.5 ASD, and the time is 3-6 minutes; DC flash plating thickens the copper layer on the hole wall by 1-5 micrometers.

[0044] In one embodiment, when the first pulse electroplating is performed after DC flash plating, the total time of the first pulse electroplating is 6 minutes, and the current density of the forward pulse electroplating in each cycle is 3 ASD and the time is 10 ms, and the current density of the reverse pulse electroplating is 9 ASD and the time is 10 ms; after the first pulse electroplating, the production board is subjected to a second pulse electroplating, and the second pulse electroplating is applied to the thickness required by the design.

[0045] In another embodiment, when micro-etching is performed after DC flash plating, the production board is directly immersed in the micro-etching solution for micro-etching, and the micro-etching amount is controlled to be 0.8-1.6 micrometers; after micro-etching, the circuit board is subjected to DC electroplating, and the copper thickness of the holes is increased by 30 micrometers during DC electroplating.

[0046] In step (7), the resin plugging process also fills the etched areas within the holes (e.g., ...). Figure 1 (As shown).

[0047] Example 3 This embodiment illustrates a method for manufacturing a circuit board, which includes a structure with through-hole interconnects and outer layer isolation, and sequentially includes the following processing steps: (1) Cutting: Cut multiple FR4 core boards according to the actual production panel size. The copper layer thickness on both surfaces of each core board is 0.5oz. The core board has drilling positions, which are the positions where drilling is required in subsequent processing.

[0048] (2) Inner layer circuit fabrication (negative film process): A wet film (i.e., photosensitive alkali-soluble film) is coated on both surfaces of all core boards using a vertical coating machine. The thickness of the wet film is controlled at 10 micrometers. A fully automatic exposure machine is used to complete the exposure of the inner layer circuit with 5-6 exposure rulers (21 exposure rulers). After development, the inner layer circuit pattern is formed. Inner layer etching: The inner layer circuit is etched on all core boards after exposure and development. Inner layer AOI: After the film is removed, the inner layer circuit is inspected for defects such as open circuits, short circuits, circuit gaps, and circuit pinholes. Products with defects are scrapped, and products without defects are sent to the next process.

[0049] (3) Pressing: The browning speed is based on the thickness of the bottom copper. Multiple core boards are stacked together in a preset order using a prepreg. Then, appropriate lamination conditions are selected according to the board material Tg to press the stacked boards together to form the production board.

[0050] (4) Drilling: According to the existing drilling technology, drill through holes at the corresponding drilling positions on the production board according to the design requirements.

[0051] (5) Plating copper: A thin layer of copper is deposited on the board surface and hole wall using the chemical copper method to metallize the through hole and form a through hole. One end of the through hole is the connection end that needs to be connected to the outer layer circuit, and the other end is the disconnection end that is not connected to the outer layer circuit. The backlight test is level 10, and the thickness of the plating copper in the hole is 0.5 micrometers.

[0052] (6) Electroplating: The copper layer on the hole wall and the copper layer on the board surface are thickened by electroplating.

[0053] (7) First resin plugging: The through holes are plugged with resin and cured, and then the resin protruding from the plate surface is ground flat by grinding plate.

[0054] (8) Etching: A dry film is applied to the production board, and then exposed and developed to create a window at the break point of the corresponding via, exposing the top surface of the copper layer on the hole wall at the break point of the via. Then, the exposed copper layer on the hole wall is etched to form a recessed position 1 (e.g., below the substrate surface) that is lower than the dielectric layer on the board surface (i.e., the substrate surface). Figure 3 As shown in the figure, the copper layer on the hole wall at the disconnected end is disconnected from the outer copper layer.

[0055] (9) Second resin plugging: After film removal, resin ink 3 is used to fill and cure the recessed area 1 (e.g. Figure 4 As shown in the figure, a structure is formed that separates the copper layer on the hole wall from the outer layer, and then the resin protruding from the plate surface is ground flat by a grinding plate.

[0056] (10) Forming a copper plating layer: A copper plating layer 4 is formed on the filled resin surface by copper immersion and electroplating (electroplating using POFV process). Figure 5 (As shown).

[0057] (11) Fabrication of outer layer circuits: A wet film (i.e., photosensitive alkali-soluble film) is coated on both surfaces of the production board using a vertical coating machine. The thickness of the wet film is controlled at 10 micrometers. A fully automatic exposure machine is used to complete the exposure of the outer layer circuits with 5-6 exposure rulers (21 exposure rulers). After development, the outer layer circuit pattern is formed on both surfaces of the production board. The outer layer circuits are etched out on the exposed and developed production board. After the film is removed, the outer layer circuits are inspected for defects such as open circuits, short circuits, circuit gaps, and circuit pinholes. Products with defects are scrapped, and products without defects are sent to the next process.

[0058] Specifically, during the fabrication of the outer layer circuitry, a ring of holes is created around and connected to the connecting end of the via.

[0059] (12) Making the solder resist layer: After screen printing the solder resist ink on the surface of the production board, it is then subjected to pre-curing, exposure, development and heat curing treatment in sequence to cure the solder resist ink into a solder resist layer; specifically, the solder resist ink on the TOP side and the "UL mark" is added to the TOP side characters, so as to coat the lines and substrates that do not need to be soldered with a protective layer that prevents bridging between lines during soldering, provides a permanent electrical environment and resists chemical corrosion, and at the same time plays a role in beautifying the appearance.

[0060] In one specific embodiment, after completing the above step (12), other post-processing is carried out sequentially on the production board according to the prior art, such as surface treatment, molding, electrical testing, FQC, FQA and packaging, etc., and finally the required circuit board is obtained.

[0061] Example 4 The circuit board manufacturing method shown in this embodiment is basically the same as the method described in Embodiment 3, except that: a through-hole arbitrary layer interconnection process is used to form multiple discontinuous copper layers in the through-hole walls. The through-hole arbitrary layer interconnection process adopts the technical solution shown in the prior publication number "CN120264633A" or application number "2025115404468", as detailed below: At the through-hole of the production board, a recessed etched position is provided at both ends of the insulating strip that requires interlayer insulation. The etched position is formed by the etching of the insulating disk on the core board.

[0062] In step (2), after the inner layer circuit is fabricated on the core board, an alkali-soluble photocurable ink with an outer diameter larger than the outer diameter of the drill hole is coated at the drill hole position on at least one surface of the core board, and the alkali-soluble photocurable ink is exposed and cured by UV light to form an isolation disk.

[0063] Specifically, the outer diameter of the isolation disk is 0.2-0.5 mm larger than the outer diameter of the drill hole, and the thickness of the isolation disk is 5-50 micrometers.

[0064] In step (3), at least two isolation discs are provided on each drilled hole position on the pressed production board, and the position of each isolation disc is located at the etched position in the production board; multiple isolation discs in each through hole are set in pairs and used in conjunction, and each two adjacent isolation discs form an isolation group. The copper layer on the hole wall between the two isolation discs in the same isolation group needs to be removed as an isolation strip, while the copper layer on the hole wall between two adjacent isolation groups needs to be retained.

[0065] In another embodiment, multiple isolation pads (such as three) in each via are used in conjunction, and the copper layer on the via wall between the multiple isolation pads needs to be removed as an isolation strip.

[0066] In step (4), after drilling, the isolation disk inside the hole is removed by etch to form an etched site.

[0067] Specifically, during the etching process, the production board is immersed in a sodium hydroxide solution at 60 degrees Celsius for 30-120 minutes; and the mass percentage of the solute in the sodium hydroxide solution is 10%. Specifically, the depth of the etched areas is 0.1-0.25 mm, and the height is 5-50 micrometers. In step (6), the production board is first subjected to DC flash plating, and no copper layer is plated at the etched positions; then the production board is subjected to the first pulse electroplating or micro-etching treatment to remove the copper layer on the hole wall of the isolation strip; finally, the production board is subjected to DC electroplating or the second pulse electroplating to form a structure of arbitrary layer interconnection of through holes.

[0068] Specifically, the current density during DC flash plating is 0.8-1.5 ASD, and the time is 3-6 minutes; DC flash plating thickens the copper layer on the hole wall by 1-5 micrometers.

[0069] In one embodiment, when the first pulse electroplating is performed after DC flash plating, the total time of the first pulse electroplating is 6 minutes, and the current density of the forward pulse electroplating in each cycle is 3 ASD and the time is 10 ms, and the current density of the reverse pulse electroplating is 9 ASD and the time is 10 ms; after the first pulse electroplating, the production board is subjected to a second pulse electroplating, and the second pulse electroplating is applied to the thickness required by the design.

[0070] In another embodiment, when micro-etching is performed after DC flash plating, the production board is directly immersed in the micro-etching solution for micro-etching, and the micro-etching amount is controlled to be 0.8-1.6 micrometers; after micro-etching, the circuit board is subjected to DC electroplating, and the copper thickness of the holes is increased by 30 micrometers during DC electroplating.

[0071] In step (7), the resin plugging process also fills the etched areas within the holes (e.g., ...). Figure 3 (As shown).

[0072] The technical solutions provided by the embodiments of the present invention have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of the embodiments of the present invention. The descriptions of the embodiments above are only for helping to understand the principles of the embodiments of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the embodiments of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A method of manufacturing a via interconnect outer layer barrier, comprising: The method comprises the following steps: S1, providing a production board, wherein the production board is provided with a drilling position, and the inner layer circuit of the production board is provided with a hole ring at the drilling position, and the hole ring is provided with an isolation disc with an outer diameter larger than the hole diameter of the drilling hole, and at least two isolation discs are arranged in the inner layer of each drilling position; S2, drilling a through hole at the drilling position of the production board, and then removing the isolation disc on the hole wall by a chemical method to form a recessed position; S3, metalizing the through hole by copper plating and electroplating, and the recessed position and the isolation belt are not plated with a copper layer, and an isolation belt is formed between every two recessed positions to form an internally isolated via hole, and at least one end of the via hole is a disconnected end; S4, resin plug hole is performed on the via hole and is solidified, and then the resin protruding from the board surface is ground flat by grinding the board; S5, outer layer circuit is made on the production board, and the copper layer on the hole wall at the disconnected end of the via hole is etched to isolate the copper in the hole from the outer layer; S6, a solder resist layer is made on the production board, the part of the hole wall copper layer etched is filled with solder resist ink and is solidified to form a structure isolating the hole wall copper layer from the outer layer.

2. The method of manufacturing a via interconnect outer barrier according to claim 1, wherein, In step S5, a film is first attached to the production board, and then outer layer circuit patterns are formed by exposure and development, and the top surface of the hole wall copper layer at the disconnected end of the via hole is exposed, and then the outer layer circuit is obtained by etching, and the hole wall copper layer exposed at the disconnected end of the via hole is etched to form a recessed position lower than the board surface medium layer.

3. The method of manufacturing a via interconnect outer barrier according to claim 1, wherein, In step S2, after drilling, the two isolation rings on the hole wall are dissolved and removed by an alkaline solution to form a pair of recessed positions in the hole.

4. The method of manufacturing a via interconnect outer barrier of claim 1, wherein, The electroplating in step S3 comprises the following steps: S31, direct current flash plating is performed on the production board, and the recessed position is not plated with a copper layer; S32, then pulse electroplating is performed on the production board to remove the hole wall copper layer on the isolation belt; S33, finally, direct current electroplating is performed on the production board to isolate the through hole into a via hole with multiple via segments.

5. The method of manufacturing a via interconnect outer barrier of claim 4, wherein, The current density during direct current flash plating is 0.8-1.5 ASD, and the time is 3-6 min; the hole wall copper layer is thickened by 1-5 microns during direct current flash plating; the total time of pulse electroplating is 6 min, and the current density of forward pulse electroplating in each cycle is 3 ASD, and the time is 10 mS, and the current density of reverse pulse electroplating is 9 ASD, and the time is 10 mS; the hole copper is thickened by 30 microns during direct current electroplating.

6. A method of manufacturing a via interconnect outer layer barrier, comprising: The method comprises the following steps: S10, providing a production board, wherein the production board is provided with a drilling position, and the inner layer circuit of the production board is provided with a hole ring arranged around the drilling position at the drilling position, and the hole ring of the inner layer is provided with an isolation disc with an outer diameter larger than the hole diameter of the drilling hole, and at least two isolation discs are arranged in the inner layer of each drilling position; S11, drilling a through hole at the drilling position of the production board, and then removing the isolation disc on the hole wall by a chemical method to form a recessed position, and an isolation belt is formed between every two recessed positions; S12, metalizing the through hole by copper plating and electroplating, and the recessed position and the isolation belt are not plated with a copper layer to form an internally isolated via hole, and at least one end of the via hole is a disconnected end; S13, resin plug hole is performed on the via hole and is solidified, and then the resin protruding from the board surface is ground flat by grinding the board; S14, sticking film on the production plate, and performing windowing at the disconnected end of the via hole by exposure and development to expose the top surface of the hole wall copper layer at the disconnected end of the via hole; S15, etching the exposed hole wall copper layer to isolate the copper in the hole from the outer layer; S16, after removing the film, filling the part of the hole wall copper layer that has been etched with resin ink and solidifying to form a structure in which the hole wall copper layer is isolated from the outer layer, and then grinding the plate to flatten the resin protruding from the plate surface; S17, forming a copper plating layer on the surface of the filled resin by copper deposition and electroplating; S18, sequentially manufacturing the outer layer circuit and solder mask on the production plate.

7. The method of manufacturing a via interconnect outer barrier of claim 6, wherein, The production plate is a multilayer plate formed by pressing a plurality of core plates into one body by prepreg, and the core plates have been manufactured with inner layer circuits before being pressed, and each core plate is provided with a hole ring around the drilled hole at the corresponding drilled hole position. After manufacturing the inner layer circuit on the core plate, a layer of alkali-soluble photocurable ink with an outer diameter larger than that of the drilled hole is coated on at least one surface of the core plate at the drilled hole position, and the alkali-soluble photocurable ink is exposed and cured by UV light to form an isolation disc.

8. The method of manufacturing a via interconnect outer barrier according to claim 6 or 7, wherein In step S11, the two isolation rings on the hole wall are dissolved and removed by an alkaline solution after drilling, forming a pair of recessed etching positions in the hole.

9. The method of manufacturing a via interconnect outer barrier of claim 6 or 7, wherein, The electroplating in step S12 specifically includes the following steps: S121, direct current flash plating of the production plate, the recessed etching position is not plated with a copper layer; S122, then pulse plating the production plate to remove the hole wall copper layer on the isolation belt; S123, finally direct current plating the production plate to isolate the via hole into a via hole with multiple conductive segments.

10. The method of manufacturing a via interconnect outer barrier of claim 9, wherein, The current density during direct current flash plating is 0.8-1.5 ASD, and the time is 3-6 min; the hole wall copper layer is thickened by 1-5 microns during direct current flash plating; the total time of pulse plating is 6 min, and the current density of forward pulse plating in each cycle is 3 ASD, and the time is 10 mS, and the current density of reverse pulse plating is 9 ASD, and the time is 10 mS; the hole copper is thickened by 30 microns during direct current plating.

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