Display device

Abstract

The embodiment of the invention relates to a display device. More specifically, embodiments of the present disclosure may reduce a bezel area of a display device by including a plurality of light emitting elements disposed on a substrate, an encapsulation layer disposed on the plurality of light emitting elements, and a plurality of touch wirings disposed in an inclined area of the encapsulation layer.

Description

Technical Field

[0001] Embodiments of this disclosure relate to display devices. Background Technology

[0002] With the development of the information society, the demand for display devices for displaying images is increasing in various forms. In recent years, various display devices such as liquid crystal displays and organic light-emitting diode displays have been applied.

[0003] The display device may include a display panel and a driving circuit for driving the display panel.

[0004] The display panel may include a display area for displaying images, and a non-display area provided with components such as lines for driving the display area.

[0005] Non-display areas can be set outside the display area. Non-display areas can be defined as border areas.

[0006] The descriptions provided in the Background section should not be considered prior art simply because they are mentioned or associated with in the Background section. The Background section may include information describing one or more aspects of the subject matter art. Summary of the Invention

[0007] As display devices have evolved, their bezel areas have continued to shrink. However, there is still a need to further reduce the bezel area.

[0008] One aspect of the embodiments of this disclosure is to reduce the bezel area of ​​the display device by providing a novel display device structure.

[0009] Another aspect of the embodiments of this disclosure is to reduce the bezel area of ​​the display device by redesigning the space in which touch wiring can be provided.

[0010] Another aspect of the embodiments disclosed herein is to reduce the bezel area of ​​the display device by redesigning the space in which a grounding metal can be disposed.

[0011] Another aspect of the embodiments of this disclosure is to provide a lightweight display device by reducing the bezel area.

[0012] The embodiments of this disclosure are not limited to those set forth herein, and other aspects not mentioned herein will be apparent to those skilled in the art from the following description.

[0013] To achieve these and other aspects of the inventive concept, as implemented and broadly described herein, embodiments of this disclosure may provide a display device comprising: a substrate including a display area and a non-display area outside the display area; a plurality of light-emitting elements disposed on the substrate; an encapsulation layer disposed on the plurality of light-emitting elements; and a plurality of touch wirings disposed on an inclined region of the encapsulation layer.

[0014] In another aspect, embodiments of the present disclosure may provide a display device comprising: a substrate; a plurality of light-emitting elements disposed on the substrate; an encapsulation layer disposed on the plurality of light-emitting elements and including a planar region and an inclined region outside the planar region; an inner touch wiring disposed in the planar region; and an outer touch wiring disposed in the inclined region.

[0015] In another aspect, embodiments of the present disclosure may provide a display device comprising: a substrate; a plurality of light-emitting elements disposed on the substrate; an encapsulation layer disposed on the plurality of light-emitting elements and including a planar region and an inclined region outside the planar region; a plurality of touch wirings disposed on the encapsulation layer; and a grounding metal disposed in the inclined region of the encapsulation layer.

[0016] According to embodiments of this disclosure, by providing a novel display device structure, the bezel area of ​​the display device can be reduced.

[0017] According to embodiments of this disclosure, by redesigning the space in which touch wiring can be installed, the bezel area of ​​the display device can be reduced.

[0018] According to embodiments of this disclosure, by redesigning the space in which a grounding metal can be disposed, the bezel area of ​​the display device can be reduced.

[0019] According to embodiments of this disclosure, a lightweight display device can be provided by reducing the bezel area.

[0020] The effects of this disclosure are not limited to those described above, and other effects will become apparent to those skilled in the art from the following detailed description.

[0021] It should be understood that both the above general description and the following detailed description are illustrative and explanatory, and are intended to provide further explanation of the claimed inventive concept. Attached Figure Description

[0022] The accompanying drawings may be included to provide a further understanding of the present disclosure and may be incorporated into and constitute a part of the present disclosure. The drawings illustrate embodiments of the present disclosure and, together with the description, serve to explain the various principles of the present disclosure.

[0023] Figure 1This is a diagram illustrating the configuration of a display device according to an exemplary embodiment of the present disclosure;

[0024] Figure 2 This is a diagram illustrating a display panel according to an exemplary embodiment of the present disclosure;

[0025] Figure 3 This is a diagram illustrating a substrate of a display panel according to an exemplary embodiment of the present disclosure;

[0026] Figure 4 This is a cross-sectional view illustrating the display area of ​​a display panel according to an exemplary embodiment of the present disclosure;

[0027] Figure 5 This is a diagram illustrating a component for touch sensing according to an exemplary embodiment of the present disclosure;

[0028] Figure 6 This is a diagram illustrating the touch wiring in a non-display area according to an exemplary embodiment of the present disclosure;

[0029] Figure 7 , Figure 8 , Figure 9 and Figure 10 It is along Figure 6 Example of a cross-sectional view taken from line AB;

[0030] Figure 11 It is along Figure 6 An example of a cross-sectional view taken from line CD; and

[0031] Figure 12 , Figure 13 and Figure 14 It is along Figure 6 Example of a cross-sectional view taken from line EF.

[0032] Throughout the accompanying drawings and detailed description, unless otherwise stated, the same reference numerals should be understood to refer to the same elements, features, and structures. For clarity, illustrative purposes, and convenience, the relative dimensions and depictions of these elements may be exaggerated. Detailed Implementation

[0033] In the following description of examples or embodiments of this disclosure, reference will be made to the accompanying drawings, in which specific examples or embodiments that can be implemented are illustrated, and in the drawings, the same reference numerals and symbols may be used to designate the same or similar components, even if they are shown in different drawings. Furthermore, in the following description of examples or embodiments of this disclosure, descriptions will be omitted where detailed descriptions of well-known functions and components incorporated herein may obscure the subject matter of some embodiments of this disclosure. Unless more restrictive terms such as “only” are used, terms such as “comprising,” “having,” “including,” “constituting,” “made of,” and “formed by” as used herein are generally intended to allow for the addition of other components. As used herein, singular forms are intended to include plural forms unless the context clearly indicates otherwise. The described progression of processing steps and / or operations is exemplary; however, the order of steps and / or operations is not limited to the order set forth herein and may be varied as is known in the art, except for steps and / or operations that necessarily occur in a particular order. Similar reference numerals designate similar elements throughout. The names of corresponding elements used in the following description may have been chosen solely for ease of specification and may therefore differ from the names used in actual products.

[0034] The advantages and features of this disclosure, and its implementation methods, will become clear from the following exemplary embodiments described in conjunction with the accompanying drawings. However, this disclosure may be implemented in various forms and should not be construed as limited to the exemplary embodiments set forth herein. Rather, these exemplary embodiments are provided to make this disclosure sufficiently thorough and complete to assist those skilled in the art in fully understanding its scope. Furthermore, this disclosure is defined only by the scope of the claims. Any implementation described herein as an "example" is not necessarily to be construed as preferred or advantageous over other implementations.

[0035] The shapes, dimensions, scales, angles, quantities, etc., illustrated in the accompanying drawings to describe various exemplary embodiments of this disclosure are given by way of example only. Therefore, this disclosure is not limited to the illustrations in the drawings. Unless otherwise stated, the same or similar elements are indicated by the same reference numerals throughout the specification. In the following description, detailed descriptions of relevant well-known functions or configurations may be omitted where such detailed descriptions may unnecessarily obscure the essential points of this disclosure.

[0036] Terms such as “first,” “second,” “A,” “B,” “(A),” or “(B)” may be used herein to describe elements of this disclosure. Each of these terms is not used to define the nature, order, sequence, or number of elements, but only to distinguish the corresponding element from other elements.

[0037] When referring to the first element as "connected to or linked to," "in contact with," or "overlapping" with the second element, it should be understood that not only can the first element be "directly connected to or linked to" or "directly in contact with or overlapping" the second element, but a third element is also "inserted" between the first and second elements, or the first and second elements can be "connected to or linked to," "in contact with," or "overlapping" with each other via a fourth element. Here, the second element can be included in at least one of two or more elements that are "connected to or linked to," "in contact with," or "overlapping" with each other.

[0038] When time-related terms such as “after,” “follow,” “next,” “before,” etc., are used to describe a process or operation of an element or structure, or a flow or step in an operation, process, or manufacturing method, these terms may be used to describe a discontinuous or non-sequential process or operation unless used with more restrictive terms such as “direct” or “immediate.”

[0039] When describing positional relationships, such as using terms like "on," "above," "below," "above," "under," "below," "near," "close to," "adjacent to," "beside," or "next to" to describe the positional relationship between two components, one or more other components may be placed between the two components unless more restrictive terms such as "immediately," "directly," or "closely" are used. For example, when a structure is described as being "above," "below," "on top," "below," "below," "near," "close to," "adjacent to," "beside," or "next to" another structure, this description should be interpreted to include situations where these structures are in contact with each other and situations where a third structure is placed or inserted between them. Furthermore, the terms "left," "right," "top," "bottom," "down," "up," "upper," "lower," etc., refer to any frame of reference.

[0040] The term “at least one” should be understood to include any and all combinations of one or more of the related listed items. For example, “at least one of the first element, the second element and the third element” means all combinations of the three listed elements, any combination of any two of the three elements, and each individual element, the first element, the second element or the third element.

[0041] Furthermore, when referring to any size, relative dimensions, etc., it should be considered that, even without a specific description, the numerical values ​​of components or features, or corresponding information (e.g., levels, ranges, etc.), include tolerances or error ranges that may be caused by various factors (e.g., process factors, internal or external shocks, noise, etc.). Additionally, the term "can" fully encompasses all the meanings of the term "able to".

[0042] Features of the various embodiments of this disclosure may be linked or combined with each other in part or in whole, and may be technically driven and interoperable with each other in various ways, as will be fully understood by those skilled in the art. Embodiments of this disclosure may be implemented independently of each other, or may be implemented together in an interdependent relationship.

[0043] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which the exemplary embodiments pertain. It will also be understood that terms such as those defined in common dictionaries shall be interpreted as having a meaning consistent, for example, with their meaning in the context of the relevant field, and shall not be interpreted as having an idealized or overly formal meaning unless expressly defined herein. For example, the terms “component” or “unit” may be applied, for example, to a single circuit or structure, an integrated circuit, a computational block of a circuit arrangement, or any structure configured to perform the described functions as would be understood by one of ordinary skill in the art.

[0044] In the following, various exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. All components of each display panel and each display device including it, according to all embodiments of the present disclosure, are operatively connected and configured.

[0045] Figure 1 This is a diagram illustrating the system configuration of a display device 100 according to an embodiment of the present disclosure.

[0046] Reference Figure 1 The display device 100 according to embodiments of the present disclosure may include a display panel 110 and a display driving circuit as components for displaying images. The display driving circuit is a circuit for driving the display panel 110 and may include a data driving circuit 120, a gating driving circuit 130, and a display controller 140.

[0047] The display panel 110 may include a substrate 111 and a plurality of sub-pixels SP disposed on the substrate 111.

[0048] The substrate 111 of the display panel 110 may include a display area DA capable of displaying images and a non-display area NDA located outside the display area DA.

[0049] Multiple sub-pixels SP for image display may be disposed in display area DA, and non-display area NDA may include pad area PA located in a first direction from display area DA.

[0050] In the display panel 110 according to an embodiment of the present disclosure, the non-display area NDA can be very small. In this disclosure, the non-display area NDA is also referred to as the "bezel".

[0051] For example, the non-display area NDA may include a first non-display area located outside the display area DA in a first direction, a second non-display area located outside the display area DA in a second direction intersecting the first direction, a third non-display area located outside the display area DA in a direction opposite to the first direction, and a fourth non-display area located outside the display area DA in a direction opposite to the second direction. One or two of the first to fourth non-display areas may include pad areas to which the data driving circuitry 120 is connected or bonded. Two or three of the first to fourth non-display areas that do not include pad areas may be very small.

[0052] As another example, the boundary region between the display area DA and the non-display area NDA can be curved, so that the non-display area NDA can be located below the display area. In this case, when a user views the display device 100 from the front, the non-display area NDA shown to the user may remain unchanged or hardly change.

[0053] Various types of signal lines for driving multiple sub-pixels SP can be provided on the substrate 111 of the display panel 110.

[0054] The display device 100 according to embodiments of the present disclosure may be a liquid crystal display device or a self-emissive display device in which the display panel 110 emits its own light. When the display device 100 according to embodiments of the present disclosure is a self-emissive display device, each of the plurality of sub-pixels SP may include a light-emitting element.

[0055] For example, the display device 100 according to an embodiment of the present disclosure may be an organic light-emitting diode (OLED) display in which the light-emitting element is implemented as an organic light-emitting diode (OLED). As another example, the display device 100 according to an embodiment of the present disclosure may be an inorganic light-emitting display device in which the light-emitting element is implemented as a light-emitting diode based on an inorganic material. As yet another example, the display device 100 according to an embodiment of the present disclosure may be a quantum dot display device in which the light-emitting element is implemented as a quantum dot, a self-emissive semiconductor crystal.

[0056] The structure of each of the plurality of sub-pixels SP can vary depending on the type of display device 100. For example, when the display device 100 is a self-emissive display device in which the sub-pixels SP emit their own light, each sub-pixel SP may include a self-emissive light-emitting element, one or more transistors, and one or more capacitors.

[0057] For example, various types of signal lines may include multiple data lines DL that transmit data signals (also known as data voltages or image signals) and multiple gating lines GL that transmit gating signals (also known as scan signals).

[0058] Multiple data lines DL and multiple gating lines GL can intersect each other. Each of the multiple data lines DL can be configured to extend in a first direction. Each of the multiple gating lines GL can be configured to extend in a second direction. Here, the first direction can be a column direction, and the second direction can be a row direction. Alternatively, the first direction can be a row direction, and the second direction can be a column direction. For ease of description, an example is described below in which each of the multiple data lines DL is configured in a column direction and each of the multiple gating lines GL is configured in a row direction.

[0059] The data driver circuit 120 is used to drive multiple data lines DL and can output data signals to multiple data lines DL.

[0060] The data drive circuit 120 can receive digital image data DATA from the display controller 140, and can convert the received image data DATA into analog data signals and output them to multiple data lines DL.

[0061] For example, the data drive circuit 120 can be connected to the display panel 110 via a tape-on-brush (TAB) method, or to the bonding pads of the display panel 110 via a chip-on-glass (COG) or chip-on-panel (COP) method, or it can be implemented and connected to the display panel 110 via a chip-on-film (COF) method.

[0062] The data driving circuit 120 may be connected to one side of the display panel 110 (e.g., the top or bottom side). Conversely, depending on the driving scheme or panel design, the data driving circuit 120 may be connected to both sides (e.g., the top and bottom sides) of the display panel 110 or two or more of the four sides of the display panel 110.

[0063] The data driving circuit 120 may be connected outside the display area DA of the display panel 110, but alternatively, the data driving circuit 120 may be disposed in the display area DA of the display panel 110.

[0064] The gating drive circuit 130 is used to drive multiple gating lines GL and can output gating signals to multiple gating lines GL.

[0065] The gating drive circuit 130 can receive a first gating voltage corresponding to the on-level voltage and a second gating voltage corresponding to the off-level voltage, as well as various gating drive control signals GCS, generate gating signals, and provide the generated gating signals to multiple gating lines GL.

[0066] In the display device 100 according to an embodiment of the present disclosure, the gating drive circuit 130 may be embedded in the display panel 110 in an in-panel gating (GIP) type. When the gating drive circuit 130 is of the in-panel gating type, the gating drive circuit 130 may be formed on the substrate 111 of the display panel 110 during the manufacturing process of the display panel 110.

[0067] In the display device 100 according to an embodiment of the present disclosure, the gating drive circuit 130 may be disposed in the display area DA of the display panel 110. For example, the gating drive circuit 130 may be disposed in a first portion of the display area DA (e.g., the left or right portion of the display area DA). As another example, the gating drive circuit 130 may be disposed in a first portion of the display area DA (e.g., the left or right portion of the display area DA) and a second portion of the display area DA (e.g., the right or left portion of the display area DA).

[0068] In this disclosure, the gating drive circuit 130 embedded in the display panel 110 in an in-panel gating type may also be referred to as an "in-panel gating circuit".

[0069] The display controller 140 is a device used to control the data drive circuit 120 and the gating drive circuit 130, and can control the driving timing of multiple data lines DL and multiple gating lines GL.

[0070] The display controller 140 can provide a data drive control signal DCS to the data drive circuit 120 to control the data drive circuit 120, and can provide a gating drive control signal GCS to the gating drive circuit 130 to control the gating drive circuit 130.

[0071] The display controller 140 can receive input image data from the host system 150 and provide image data DATA to the data drive circuit 120 based on the input image data.

[0072] The display controller 140 may be implemented as a component separate from the data drive circuit 120, or the display controller 140 and the data drive circuit 120 may be integrated into an integrated circuit (IC).

[0073] The display controller 140 may be a timing controller used in typical display technologies, a control device that performs the functions of a timing controller and other control functions, or a control device other than a timing controller, or it may be a circuit in a control device. The display controller 140 may be implemented as various circuits or electronic components such as integrated circuits (ICs), field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), or processors.

[0074] The display controller 140 can be mounted on a printed circuit board or flexible printed circuit and can be electrically connected to the data drive circuit 120 and the gating drive circuit 130 via the printed circuit board or flexible printed circuit.

[0075] The display controller 140 can send / receive signals to / from the data drive circuit 120 via one or more predetermined interfaces. Interfaces may include, for example, a Low Voltage Differential Signaling (LVDS) interface, an Embedded Point-to-Point Clock Interface (EPI) interface, and a Serial Peripheral Interface (SPI).

[0076] To provide touch sensing and image display functions, the display device 100 according to embodiments of the present disclosure may include a touch sensor and a touch sensing circuit, wherein the touch sensing circuit senses the touch sensor to detect whether a touch object (such as a finger or pen) is being touched and / or the location of the touch.

[0077] Touch sensing circuitry may include touch driver circuitry that drives and senses touch sensors and generates and outputs touch sensing data, and touch controllers that can use the touch sensing data to detect the occurrence of a touch or the location of a touch.

[0078] A touch sensor may include multiple touch electrodes. The touch sensor may also include multiple touch lines for electrically connecting the multiple touch electrodes to touch driving circuitry.

[0079] The touch sensor can exist outside the display panel 110 in the form of a touch panel, or it can exist inside the display panel 110. When it exists outside the display panel 110 in the form of a touch panel, the touch panel is referred to as an external type. When the touch sensor is external, the touch panel and the display panel 110 can be manufactured separately or can be combined during the assembly process. An external type touch panel may include a touch panel substrate and a plurality of touch electrodes on the touch panel substrate.

[0080] When a touch sensor is present inside the display panel 110, the touch sensor can be formed on the substrate together with signal lines and electrodes related to display driving during the manufacturing process of the display panel 110.

[0081] The touch driving circuit can provide a touch driving signal to at least one of a plurality of touch electrodes, and can sense at least one of the plurality of touch electrodes to generate touch sensing data.

[0082] Touch sensing circuits can perform touch sensing using either self-capacitance sensing or mutual capacitance sensing.

[0083] When a touch sensing circuit performs touch sensing using a self-capacitance sensing scheme, it can perform touch sensing based on the capacitance between each touch electrode and the touched object (e.g., a finger or pen). According to the self-capacitance sensing scheme, each of the multiple touch electrodes can be used as both a driving touch electrode and a sensing touch electrode. The touch driving circuit can drive all or some of the multiple touch electrodes and sense all or some of the multiple touch electrodes.

[0084] When a touch sensing circuit performs touch sensing using a mutual capacitance sensing scheme, it can perform touch sensing based on the capacitance between the touch electrodes. According to the mutual capacitance sensing scheme, multiple touch electrodes are divided into driving touch electrodes and sensing touch electrodes. The touch driving circuit can drive the driving touch electrodes and sense the sensing touch electrodes.

[0085] The touch driving circuit and touch controller included in the touch sensing circuit can be implemented as separate devices or as a single device. The touch driving circuit and data driving circuit can be implemented as separate devices or as a single device.

[0086] The display device 100 may also include a power supply circuit for providing various types of power to the display driver integrated circuit and / or touch sensing circuit.

[0087] The display device 100 according to the embodiments of this disclosure may be a mobile terminal such as a smartphone or tablet, or a monitor or television (TV) of various sizes, but is not limited thereto, and may be a display of various types and sizes capable of displaying information or images.

[0088] The display device 100 according to embodiments of this disclosure may further include electronic devices such as cameras (image sensors), detection sensors, etc. For example, the detection sensor may be a sensor that detects objects or human bodies by receiving light such as infrared, ultrasonic, or ultraviolet light.

[0089] Figure 2 This is a diagram illustrating a display panel 110 according to an embodiment of the present disclosure.

[0090] Reference Figure 2 The display panel 110 may include a substrate 111 in which a plurality of sub-pixels SP are disposed, and an encapsulation layer 200 on the substrate 111. Here, the encapsulation layer 200 may also be referred to as an encapsulation substrate or an encapsulation part.

[0091] Reference Figure 2 When the display device 100 according to the embodiments of the present disclosure is a self-emissive display device, each of the plurality of sub-pixels SP disposed on the substrate 111 may include a light-emitting element ED and a sub-pixel circuit SPC for driving the light-emitting element ED.

[0092] Reference Figure 2 The subpixel circuit SPC may include a plurality of pixel driving transistors for driving the light-emitting element ED and at least one capacitor. In this disclosure, the subpixel circuit SPC drives the light-emitting element ED by providing a driving current to the light-emitting element ED at a predetermined timing. The light-emitting element ED can be driven by the driving current to emit light.

[0093] Multiple pixel driving transistors may include a driving transistor DT for driving the light-emitting element ED and a scanning transistor ST that is turned on or off according to the scanning signal SC.

[0094] The driving transistor DT can provide driving current to the light-emitting element ED.

[0095] The scanning transistor ST can be configured to control the electrical state of the corresponding node in the sub-pixel circuit SPC, or to control the state or operation of the driving transistor DT.

[0096] At least one capacitor may include a storage capacitor Cst for maintaining a constant voltage during a frame.

[0097] To drive sub-pixel SP, a data signal VDATA as an image signal and a scan signal SC as a gating signal can be applied to sub-pixel SP. Furthermore, to drive sub-pixel SP, a common pixel driving voltage, including driving voltage VDD and base voltage VSS, can be applied to sub-pixel SP.

[0098] The light-emitting element ED may include an anode AND, a light-emitting element intermediate layer EL, and a cathode CAT. The light-emitting element intermediate layer EL may be disposed between the anode AND and the cathode CAT.

[0099] When the light-emitting element (ED) is an organic light-emitting element, the intermediate layer EL may include a light-emitting layer EML, a first common intermediate layer COM1 between the anode AND and the light-emitting layer EML, and a second common intermediate layer COM2 between the light-emitting layer EML and the cathode. The light-emitting layer EML can be set for each sub-pixel SP. Conversely, the first common intermediate layer COM1 and the second common intermediate layer COM2 can be jointly set on multiple sub-pixels SP. The light-emitting layer EML can be set for each light-emitting area, and the first common intermediate layer COM1 and the second common intermediate layer COM2 can be jointly set on multiple light-emitting and non-light-emitting areas. The first common intermediate layer COM1 and the second common intermediate layer COM2 can be collectively referred to as the common intermediate layer EL_COM.

[0100] For example, the first common intermediate layer COM1 may include a hole injection layer HIL and a hole transport layer HTL. The second common intermediate layer COM2 may include an electron transport layer ETL and an electron injection layer EIL. The hole injection layer can inject holes from the anode AND to the hole transport layer, the hole transport layer can transport holes to the light-emitting layer EML, the electron injection layer can inject electrons from the cathode CAT to the electron transport layer, and the electron transport layer can transport electrons to the light-emitting layer EML.

[0101] For example, the cathode CAT can be electrically connected to the base voltage line VSSL. A base voltage VSS, as a type of common pixel driving voltage, can be applied to the cathode CAT via the base voltage line VSSL. The anode AND can be electrically connected to the first node N1 of the driving transistor DT of each sub-pixel SP. In this disclosure, "base voltage VSS" may also be referred to as "base voltage VSS", and "base voltage line VSSL" may also be referred to as "base voltage line VSSL".

[0102] For example, the anode AND can be a pixel electrode disposed in each sub-pixel SP, and the cathode CAT can be a common electrode commonly disposed in multiple sub-pixels SP. As another example, the cathode CAT can be a pixel electrode disposed in each sub-pixel SP, and the anode AND can be a common electrode commonly disposed in multiple sub-pixels SP. In the following description, for ease of description, it is assumed that the anode AND is a pixel electrode and the cathode CAT is a common electrode, but this disclosure is not limited thereto.

[0103] Each light-emitting element (ED) may include portions where the anode AND, the intermediate light-emitting layer EL, and the cathode CAT overlap each other. A predetermined light-emitting area may be formed by each light-emitting element (ED). For example, the light-emitting area of ​​each light-emitting element (ED) may include areas where the anode AND, the intermediate light-emitting layer EL, and the cathode CAT overlap or are stacked with each other.

[0104] For example, the light-emitting element ED can be an organic light-emitting diode (OLED), an inorganic light-emitting diode (LED), or a quantum dot light-emitting element. For example, when the light-emitting element ED is an organic light-emitting diode (OLED), the light-emitting element intermediate layer EL of the light-emitting element ED may include a light-emitting element intermediate layer EL containing organic materials.

[0105] The driving transistor DT can be used to provide driving current to the light-emitting element ED. The driving transistor DT can be connected between the driving voltage line VDDL and the light-emitting element ED.

[0106] The driving transistor DT may include a first node N1 electrically connected to the light-emitting element ED, a second node N2 to which a data signal VDATA may be applied, and a third node N3 to which a driving voltage VDD is applied from the driving voltage line VDDL.

[0107] In the driving transistor DT, the second node N2 can be the gate node, the first node N1 can be the source node or the drain node, and the third node N3 can be the drain node or the source node. In the following description, for ease of description, in the driving transistor DT, the second node N2 can be the gate node, the first node N1 can be the source node, and the third node N3 can be the drain node.

[0108] Figure 2 The scanning transistor ST included in the sub-pixel circuit SPC shown can be a switching transistor used to transmit the data signal VDATA, which is an image signal, to the second node N2, which is the gate node of the driving transistor DT.

[0109] The scan transistor ST can be controlled to be turned on and off by a gating signal, namely the scan signal SC, applied via a scan line SCL, which is a type of gating line GL, to control the electrical connection between the second node N2 of the drive transistor DT and the data line DL. The drain or source electrode of the scan transistor ST can be electrically connected to the data line DL, the source or drain electrode of the scan transistor ST can be electrically connected to the second node N2 of the drive transistor DT, and the gate electrode of the scan transistor ST can be electrically connected to the scan line SCL.

[0110] The storage capacitor Cst may be electrically connected between the first node N1 and the second node N2 of the driving transistor DT. The storage capacitor Cst may include a first capacitor electrode electrically connected to the first node N1 of the driving transistor DT or corresponding to the first node N1 of the driving transistor DT, and a second capacitor electrode electrically connected to the second node N2 of the driving transistor DT or corresponding to the second node N2 of the driving transistor DT.

[0111] The capacitor Cst can be an external capacitor intentionally designed outside the driving transistor DT, rather than a parasitic capacitor (e.g., Cgs or Cgd) that may exist as an internal capacitor between the first node N1 and the second node N2 of the driving transistor DT.

[0112] Each of the driving transistor DT and the scanning transistor ST can be an n-type transistor or a p-type transistor.

[0113] The display panel 110 may have a top-emitting structure or a bottom-emitting structure.

[0114] When the display panel 110 has a top-emitting structure, at least a portion of the sub-pixel circuit SPC may overlap with at least a portion of the light-emitting element ED in the vertical direction. Conversely, when the display panel 110 has a bottom-emitting structure, the sub-pixel circuit SPC may not overlap with the light-emitting element ED in the vertical direction.

[0115] like Figure 2 As shown, the sub-pixel circuit SPC can have a 2T (transistor) 1C (capacitor) structure, including two transistors DT and ST and a capacitor Cst. In some cases, the sub-pixel circuit SPC may also include one or more transistors, or one or more capacitors.

[0116] For example, a subpixel circuit SPC can have an 8T1C structure comprising 8 transistors and 1 capacitor. As another example, a subpixel circuit SPC can have a 6T2C structure comprising 6 transistors and 2 capacitors. As yet another example, a subpixel circuit SPC can have a 7T1C structure comprising 7 transistors and 1 capacitor.

[0117] Depending on the structure of the sub-pixel circuit SPC, the type and number of gating lines or the gating signals provided to the sub-pixel SP can vary.

[0118] Furthermore, depending on the structure of the sub-pixel circuit SPC, the type and number of common pixel driving voltages provided to the sub-pixel SP can vary.

[0119] Since the circuit elements in each sub-pixel SP (especially the light-emitting elements ED implemented as organic light-emitting diodes (OLEDs) including organic materials) are susceptible to external moisture or oxygen, an encapsulation layer 200 can be provided on the display panel 110 to prevent or reduce the penetration of external moisture or oxygen into the circuit elements (especially the light-emitting elements ED). The encapsulation layer 200 can be configured in various ways to prevent the light-emitting elements ED from contacting moisture or oxygen.

[0120] Reference Figure 2 The display device 100 according to the embodiments of the present disclosure may further include a touch sensor layer TSL and a touch sensing circuit 210. The touch sensor layer TSL includes a plurality of touch electrodes TE, and the touch sensing circuit 210 is configured to sense the plurality of touch electrodes via touch wiring TL and touch pad TP to determine the presence or absence of a touch or the coordinates of a touch.

[0121] The touch sensor layer (TSL) can be embedded in the display panel 110. For example, the touch sensor layer (TSL) can be disposed on the encapsulation layer 200 in the display panel 110.

[0122] The display panel 110 may include not only a touch sensor layer TSL, but also a plurality of touch pads electrically connected to the touch sensing circuit 210, and a plurality of touch wiring TL for electrically connecting the plurality of sensor electrodes included in the touch sensor layer TSL to the plurality of touch pads connected to the touch sensing circuit 210.

[0123] Figure 3A substrate 111 of a display panel 110 according to an embodiment of the present disclosure is illustrated.

[0124] Reference Figure 3 According to embodiments of the present disclosure, the substrate 111 of the display panel 110 may include a display area DA for displaying images and a non-display area NDA for not displaying images.

[0125] Reference Figure 3 The non-display area NDA may include a first non-display area NDA1 located on a first direction DR1 of the display area DA, a second non-display area NDA2 located on a second direction DR2 of the display area DA, a third non-display area NDA3 located in a direction opposite to the first direction of the display area DA, and a fourth non-display area NDA4 located in a direction opposite to the second direction of the display area DA. For example, the first direction may be a column direction (Y-axis direction), and the second direction intersecting the first direction may be a row direction (X-axis direction).

[0126] Reference Figure 3 The first non-display area NDA1 may include a pad area PA in which multiple pads are provided.

[0127] In the pad area PA, multiple pads electrically connected to the drive circuit can be set. Multiple drive circuits or printed circuit boards can be electrically connected to multiple pads. For example, multiple pads may include multiple display pads and multiple touch pads. Multiple data lines DL, drive voltage lines VDDL, and base voltage lines VSSL can be electrically connected to... Figure 3 The multiple pads are shown. Multiple touch traces (TL) can be electrically connected to multiple touch pads.

[0128] Reference Figure 3 The first non-display area NDA1 may also include a curved area BA. In this case, the substrate 111 may be a flexible substrate. In some cases, the first non-display area NDA1 may not include the curved area BA.

[0129] Reference Figure 3 The display panel 110 may also include a grounding wire disposed in a non-display area NDA of the substrate 111. The grounding wire may be configured to run from one point in the pad area PA through a second non-display area NDA2, a third non-display area NDA3, and a fourth non-display area NDA4 to another point in the pad area PA.

[0130] Reference Figure 3 The display panel 110 may include an encapsulation layer region A_ENCAP and a dam region A_DAM.

[0131] Reference Figure 3The encapsulation layer region A_ENCAP can be the region in which the encapsulation layer 200 is disposed. In the display panel 110 according to an embodiment of the present disclosure, the encapsulation layer 200 may have a structure of inorganic and organic film laminates. In this case, the edge of the encapsulation layer 200 can be regarded as the edge of the organic film.

[0132] Reference Figure 3 The dam region A_DAM can be the area surrounding the encapsulation layer region A_ENCAP. The structure used as the dam can be located within the dam region A_DAM. The dam prevents or reduces the outflow of the liquid organic film.

[0133] Figure 4 This is a cross-sectional view illustrating a portion of the display area DA of a display panel 110 according to an embodiment of the present disclosure.

[0134] Reference Figure 4 The substrate SUB may include a first substrate SUB1, an interlayer insulating film IPD, and a second substrate SUB2. The interlayer insulating film IPD may be located between the first substrate SUB1 and the second substrate SUB2. By configuring the substrate SUB as a first substrate SUB1, an interlayer insulating film IPD, and a second substrate SUB2, moisture penetration can be prevented or reduced. For example, the first substrate SUB1 and the second substrate SUB2 may be polyimide (PI) substrates. The first substrate SUB1 may be referred to as the main PI substrate, and the second substrate SUB2 may be referred to as the secondary PI substrate.

[0135] Reference Figure 4 On the substrate SUB, various patterns ACT, SD1 and GATE for forming transistors (such as driving transistors DRT), various insulating films MBUF, ABUF1, ABUF2, GI, ILD1, ILD2 and PAS0, and various metal patterns TM, GM, ML1 and ML2 can be provided.

[0136] Reference Figure 4 The multi-buffer layer MBUF can be disposed on the second substrate SUB2. The first active buffer layer ABUF1 can be disposed on the multi-buffer layer MBUF.

[0137] The first metal layer ML1 and the second metal layer ML2 may be disposed on the first active buffer layer ABUF1. The first metal layer ML1 and the second metal layer ML2 may be light-shielding layers LS for light blocking.

[0138] The second active buffer layer ABUF2 can be disposed on the first metal layer ML1 and the second metal layer ML2. The active layer ACT for driving the transistor DRT can be disposed on the second active buffer layer ABUF2.

[0139] The gate insulating film GI can be set at the same time as the active layer ACT is covered.

[0140] The gate electrode GATE of the driving transistor DRT can be disposed on the gate insulating film GI. In this case, at a location different from where the driving transistor DRT is formed, the gate material layer GM can be disposed together with the gate electrode GATE of the driving transistor DRT on the gate insulating film GI.

[0141] The first interlayer insulating film ILD1 can be formed simultaneously covering the gate electrode (GATE) and the gate material layer (GM). A metal pattern TM can be formed on the first interlayer insulating film ILD1. The metal pattern TM can be located at a different position than where the driving transistor (DRT) is formed. The second interlayer insulating film ILD2 can be formed simultaneously covering the metal pattern TM on the first interlayer insulating film ILD1.

[0142] Two first source-drain electrode patterns SD1 can be disposed on the second interlayer insulating film ILD2. One of the two first source-drain electrode patterns SD1 is the source node of the driving transistor DRT, and the other is the drain node of the driving transistor DRT. The two first source-drain electrode patterns SD1 can be electrically connected to the opposite sides of the active layer ACT through contact holes of the second interlayer insulating film ILD2, the first interlayer insulating film ILD1, and the gate insulating film GI.

[0143] The portion of the active layer ACT that overlaps with the gate electrode GATE is the channel region. One of the two first source / drain electrode patterns SD1 can be connected to one side of the channel region in the active layer ACT, and the other of the two first source / drain electrode patterns SD1 can be connected to the other side of the channel region in the active layer ACT.

[0144] The passivation layer PAS0 is formed while covering the two first source / drain electrode patterns SD1. A planarization layer PLN may be formed on the passivation layer PAS0. The planarization layer PLN may include a first planarization layer PLN1 and a second planarization layer PLN2.

[0145] The first planarization layer PLN1 can be disposed on the passivation layer PAS0.

[0146] The second source / drain electrode pattern SD2 can be disposed on the first planarization layer PLN1. The second source / drain electrode pattern SD2 can be disposed on one of the two first source / drain electrode patterns SD1 (corresponding to the contact holes of the first planarization layer PLN1). Figure 2 The first node N1 of the driving transistor DT in the sub-pixel SP is connected.

[0147] The second planarization layer PLN2 can be provided while covering the second source / drain electrode pattern SD2. The light-emitting element ED can be provided on the second planarization layer PLN2.

[0148] In the stacked structure of the light-emitting element (ED), the anode electrode AE ​​can be disposed on the second planarization layer PLN2. The anode electrode AE ​​can be electrically connected to the second source / drain electrode pattern SD2 through the contact holes of the second planarization layer PLN2.

[0149] The dam can be set while covering a portion of the anode electrode AE. The portion of the dam corresponding to the light-emitting area EA of the sub-pixel SP can be opened.

[0150] A portion of the anode electrode AE ​​can be exposed through an opening (opening portion) in the dam bank. The luminescent layer EL can be located on the side surface of the dam bank and on the opening (opening portion) of the dam bank. All or part of the luminescent layer EL can be located between adjacent dam banks.

[0151] In the opening of the dam BANK, the light-emitting layer EL can contact the anode electrode AE. The cathode electrode CE can be disposed on the light-emitting layer EL.

[0152] The light-emitting element (ED) can be formed by an anode electrode (AE), a light-emitting layer (EL), and a cathode electrode (CE). The light-emitting layer (EL) may include an organic film.

[0153] The encapsulation layer ENCAP can be disposed on the aforementioned light-emitting element ED.

[0154] The ENCAP encapsulation layer can have a single-layer or multi-layer structure. For example, Figure 6 and Figure 7 As shown, the encapsulation layer ENCAP may include a first inorganic encapsulation layer PAS1, an organic encapsulation layer PCL, and a second inorganic encapsulation layer PAS2.

[0155] For example, the first inorganic encapsulation layer PAS1 and the second inorganic encapsulation layer PAS2 can be inorganic films, and the organic encapsulation layer PCL can be an organic film. Among the first inorganic encapsulation layer PAS1, the organic encapsulation layer PCL, and the second encapsulation layer PAS2, the organic encapsulation layer PCL can be the thickest and is used as a planarization layer.

[0156] The first inorganic encapsulation layer PAS1 can be disposed on the cathode electrode CE and positioned closest to the light-emitting element ED. The first inorganic encapsulation layer PAS1 can be formed from an inorganic insulating material capable of low-temperature deposition. For example, the first inorganic encapsulation layer PAS1 can be formed from silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al2O3). Because the first inorganic encapsulation layer PAS1 is deposited in a low-temperature atmosphere, it can prevent or reduce damage to the light-emitting layer EL, including organic materials susceptible to high-temperature atmospheres, during the deposition process.

[0157] The organic encapsulation layer PCL can be formed in an area smaller than the first inorganic encapsulation layer PAS1. In this case, the organic encapsulation layer PCL can be formed to expose the two opposite ends of the first inorganic encapsulation layer PAS1. The organic encapsulation layer PCL serves as a buffer to alleviate interlayer stress caused by bending of the display device 100 and can also be used to enhance planarization performance. For example, the organic encapsulation layer PCL can be made of acrylic resin, epoxy resin, polyimide, polyethylene, or silicon carbide (SiOC) and formed from an organic insulating material. For example, the organic encapsulation layer PCL can be formed by an inkjet process.

[0158] A second inorganic encapsulation layer, PAS2, can be formed on a substrate SUB on which an organic encapsulation layer, PCL, is formed, to cover the top and side surfaces of each of the organic encapsulation layer PCL and the first inorganic encapsulation layer, PAS1. The second inorganic encapsulation layer, PAS2, can minimize, reduce, or block the penetration of external moisture or oxygen into the first inorganic encapsulation layer, PAS1, and the organic encapsulation layer PCL. For example, the second encapsulation layer, PAS2, can be formed from an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al2O3).

[0159] Reference Figure 4 When the touch sensor TS is the type embedded in the display panel PNL, the touch sensor TS can be disposed on the encapsulation layer ENCAP. The touch sensor structure is described in detail below.

[0160] The touch buffer film T-BUF can be mounted on the encapsulation layer ENCAP. The touch sensor TS can be mounted on the touch buffer film T-BUF.

[0161] The touch sensor TS may include a touch sensor metal TSM and a bridging metal BRG located on different layers.

[0162] The interlayer insulating film (T-ILD) can be placed between the touch sensor metal (TSM) and the bridging metal (BRG).

[0163] For example, a touch sensor metal TSM may include a first touch sensor metal TSM, a second touch sensor metal TSM, and a third touch sensor metal TSM disposed adjacent to each other. The third touch sensor metal TSM is disposed between the first touch sensor metal TSM and the second touch sensor metal TSM, and when the first touch sensor metal TSM and the second touch sensor metal TSM are electrically connected to each other, the first touch sensor metal TSM and the second touch sensor metal TSM can be electrically connected to each other through a bridging metal BRG located on different layers. The bridging metal BRG can be insulated from the third touch sensor metal TSM through a touch interlayer insulating film (T-ILD).

[0164] When the touch sensor TS is formed on the display panel PNL, the chemical solutions used in the process (such as developers or etchants) may generate moisture. By placing the touch sensor TS on the touch buffer film T-BUF, the penetration of chemical solutions or moisture into the light-emitting layer EL, which includes organic materials, during the manufacturing process of the touch sensor TS can be prevented or reduced. Therefore, the touch buffer film T-BUF can prevent or reduce damage to the light-emitting layer EL, which is susceptible to chemicals or moisture.

[0165] The touch buffer film T-BUF is formed from an organic insulating material with a low dielectric constant of 1 to 3 and is formed at a low temperature not exceeding a predetermined temperature (e.g., 100°C) to prevent or reduce damage to the light-emitting layer EL, which contains organic materials susceptible to high temperatures. For example, the touch buffer film T-BUF may be formed from acrylic, epoxy, or siloxane materials. When the display device 100 is bent, the encapsulation layer ENCAP may be damaged, and the touch sensor metal located on the touch buffer film T-BUF may break. Even when the display device 100 is bent, the touch buffer film T-BUF, formed from an organic insulating material and having planarization capability, can prevent or reduce damage to the encapsulation layer ENCAP and / or breakage of the metal TSM and BRG constituting the touch sensor TS.

[0166] The protective layer PAC can be applied while covering the touch sensor TS. The protective layer PAC can be an organic insulating film.

[0167] The display device according to the embodiments can perform touch sensing according to a mutual capacitance-based touch sensing scheme or a self-capacitance-based touch sensing scheme. In the following example, for ease of description, the display device performs mutual capacitance-based touch sensing and has a touch sensor structure for it.

[0168] Figure 5 This is a diagram illustrating a component for touch sensing according to an embodiment of the present disclosure.

[0169] Reference Figure 5 A touch sensor structure for mutual capacitance-based touch sensing may include multiple first touch electrode lines TEL1 and multiple second touch electrode lines TEL2. Here, the multiple first touch electrode lines TEL1 and multiple second touch electrode lines TEL2 may be located on the encapsulation layer ENCAP.

[0170] Each of the plurality of first touch electrode lines TEL1 can be disposed on a first direction DR1, and each of the plurality of second touch electrode lines TEL2 can be disposed on a second direction DR2. The first direction DR1 and the second direction DR2 are intersecting each other.

[0171] Reference Figure 5Each of the multiple first touch electrode lines TEL1 may consist of multiple electrically connected first touch electrodes TE1. Each second touch electrode line TEL2 may consist of multiple second touch electrodes TE2 electrically connected to each other. The multiple first touch electrodes TE1 and the multiple second touch electrodes TE2 are included in the multiple touch electrodes TE. The multiple first touch electrodes TE1 constituting each of the multiple first touch electrode lines TEL1 may be driving touch electrodes, and the multiple second touch electrodes TE2 constituting each of the multiple second touch electrode lines TEL2 may be sensing touch electrodes. In this case, each of the multiple first touch electrode lines TEL1 corresponds to a driving touch electrode line, and each of the multiple second touch electrode lines TEL2 corresponds to a sensing touch electrode line.

[0172] Reference Figure 5 The touch sensor metal for touch sensing may include multiple touch wirings TL, multiple first touch electrode lines TEL1, and multiple second touch electrode lines TEL2. The multiple touch wirings TL may include one or more first touch wirings TL1 connected to each of the multiple first touch electrode lines TEL1, and one or more second touch wirings TL2 connected to each of the multiple second touch electrode lines TEL2.

[0173] Reference Figure 5 Each of the multiple first touch electrode lines TEL1 may include multiple first touch electrodes TE1 arranged in the same row or column, and one or more first bridging metals BRG1 electrically connecting them. Here, the first bridging metal BRG1 connecting two adjacent first touch electrodes TE1 may be a metal integrated with the two adjacent first touch electrodes TE1, or it may be a metal connected to the two adjacent first touch electrodes TE1 through a contact hole.

[0174] Each of the multiple second touch electrode lines TEL2 may include multiple second touch electrodes TE2 arranged in the same column or row, and one or more second bridging metals BRG2 electrically connecting them. Here, the second bridging metal BRG2 connecting two adjacent second touch electrodes TE2 may be a metal integrated with the two adjacent second touch electrodes TE2, or it may be a metal connected to the two adjacent second touch electrodes TE2 through a contact hole.

[0175] Here, the first bridging metal BRG1 or the second bridging metal BRG2 connected to the first touch electrode TE1 or the second touch electrode TE2 through the contact hole can be referred to as the "connection pattern".

[0176] In the area where the first touch electrode line TEL1 and the second touch electrode line TEL2 intersect each other (touch electrode line intersection area), the first bridging metal BRG1 and the second bridging metal BRG2 may intersect each other.

[0177] As described above, when the first bridging metal BRG1 and the second bridging metal BRG2 cross each other in the intersection area of ​​the touch electrode lines, the first bridging metal BRG1 and the second bridging metal BRG2 can be disposed in different layers.

[0178] Therefore, in order to make multiple first touch electrode lines TEL1 and multiple second touch electrode lines TEL2 intersect, multiple first touch electrodes TE1, multiple first bridging metals BRG1, multiple second touch electrode lines TEL2 and multiple second bridging metals BRG2 can be arranged in two or more layers.

[0179] Reference Figure 5 Each of the multiple first touch electrode lines TEL1 can be electrically connected to the corresponding first touch pad TP1 through one or more first touch wirings TL1. In other words, the outermost first touch electrode TE1 among the multiple first touch electrodes TE1 included in a first touch electrode line TEL1 is electrically connected to the corresponding first touch pad TP1 through the first touch wiring TL1.

[0180] Each of the multiple second touch electrode lines TEL2 can be electrically connected to the corresponding second touch pad TP2 via one or more second touch wirings TL2. In other words, the outermost second touch electrode TE2 among the multiple second touch electrodes included in a second touch electrode line TEL2 is electrically connected to the corresponding second touch pad TP2 via the second touch wiring TL2. The traces or lines electrically connected to the touch pads TP1 and TP2 are described in more detail below.

[0181] Figure 6 This is a diagram illustrating the touch wiring TL1 in the non-display area NDA according to an embodiment of the present disclosure.

[0182] Reference Figure 6 , Figure 6 The substrate 111 shown can be used with Figure 3 The substrate 111 shown is the same. In Figure 6 Among the components of the substrate 111 shown, and Figure 3 The description of the same components as those on the substrate 111 shown may be omitted.

[0183] A cathode electrode CE can be disposed on the substrate 111. The cathode electrode CE can overlap with the display area DA. The periphery of the cathode electrode CE can be located further outward than the periphery of the display area DA. Therefore, referring to... Figure 6 The periphery of the cathode electrode CE is illustrated as including the periphery of the display area DA.

[0184] The curved region BA may be located between the display region DA and the pad region PA. It may be located at the edge of the substrate 111 in the pad region PA. The pad region PA may include multiple pads PD. The multiple pads PD may include multiple first touch pads TP1.

[0185] Multiple first touch pads TP1 can be electrically connected to multiple first touch traces TL1. The multiple first touch traces TL1 can extend from the pad area PA to the curved area BA. The multiple first touch traces TL1 can extend through the curved area BA to the periphery of the display area DA. The multiple first touch traces TL1 can be configured to at least partially surround the periphery of the display area DA.

[0186] Multiple first touch wirings TL1 may include external touch wiring TL1_a and internal touch wiring TL1_b.

[0187] The inner touch wiring TL1_b can be located closer to the display area DA than the outer touch wiring TL1_a. The outer touch wiring TL1_a can be located outside the inner touch wiring TL1_b. The outer touch wiring TL1_a can be the outermost of multiple first touch wirings TL1.

[0188] Because the inner touch wiring TL1_b and the outer touch wiring TL1_a are located in different positions, the length of the inner touch wiring TL1_b can differ from the length of the outer touch wiring TL1_a. Due to this length difference, the transmission time of the signal supplied to the inner touch wiring TL1_b may differ from the transmission time of the signal supplied to the outer touch wiring TL1_a. This could be due to RC delay. RC delay is an indicator of signal transmission time. RC delay is proportional to resistance and capacitance, and the resistance is proportional to the length of the resistive element. As the length of the resistive element increases, the resistance increases, and as the resistance increases, the RC delay value increases. Therefore, the signal transmission time between lines TL1_a and TL1_b may differ.

[0189] To prevent or avoid the aforementioned phenomenon, the outer touch wiring TL1_a may include a non-bending pattern in the first pattern area 610. The inner touch wiring TL1_b may include a bending pattern in the second pattern area 620. Because the inner touch wiring TL1_b includes a bending pattern, its length can be longer. Therefore, the difference between the lengths of the outer touch wiring TL1_a and the inner touch wiring TL1_b can be reduced. Consequently, the transmission time difference between the signals provided to the outer touch wiring TL1_a and the inner touch wiring TL1_b respectively can be reduced.

[0190] In addition, refer to Figure 6Lines AB, CD, and EF can be identified. Lines AB, CD, and EF are described below. For ease of description, only multiple first touch wirings TL1 are described below, but the characteristics applied to multiple first touch wirings TL1 can also be applied to multiple second touch wirings TL2.

[0191] Figure 7 , Figure 8 , Figure 9 and Figure 10 It is along Figure 6 The cross-sectional view shown is taken from line AB.

[0192] Figures 7 to 10 Some of the components shown, ILD2, PLN1, PLN2, CE, PAS1, PCL, PAS2, and T-ILD, may include [the components described]. Figure 4 Some of the components shown, ILD2, PLN1, PLN2, CE, PAS1, PCL, PAS2, and T-ILD, have the same characteristics. Figures 7 to 10 Among the components shown, and Figure 4 The description of the same component shown may be omitted.

[0193] Reference Figure 7 The driving voltage line VDDL may include a first source-drain electrode patterned material portion SD1 and a second source-drain electrode patterned material portion SD2. The first source-drain electrode patterned material portion SD1 of the driving voltage line VDDL may be electrically connected to the second source-drain electrode patterned material portion SD2 of the driving voltage line VDDL.

[0194] Reference Figure 7 The base voltage line VSSL may include a first source-drain electrode patterned material portion SD1 and a second source-drain electrode patterned material portion SD2. The first source-drain electrode patterned material portion SD1 of the base voltage line VSSL may be electrically connected to the second source-drain electrode patterned material portion SD2 of the base voltage line VSSL.

[0195] Reference Figure 7 The cathode electrode CE can be disposed on the second planarization layer PLN2. The cathode electrode CE can be electrically connected to the base voltage line VSSL. (Refer to...) Figure 7 This identifies the electrical connection portion EC that connects the cathode (CE) to the base voltage line (VSSL). This is combined with... Figure 8 To describe in more detail. See reference. Figure 8 The cathode electrode CE can be electrically connected to the anode electrode AE, and the anode electrode AE ​​can be electrically connected to the base voltage line VSSL.

[0196] Reference Figure 7The planar region 710 and the inclined region 720 can be identified. The planar region 710 can be a region where the encapsulation layer PCL is flat. Alternatively, the planar region 710 can correspond to a location where a cathode electrode CE is disposed. The inclined region 720 can be a region where the height of the encapsulation layer PCL decreases towards the outside of the substrate 111.

[0197] Multiple first touch wirings 730 and TL1 may be disposed on the planar area 710. The multiple first touch wirings 730 and TL1 may be in the form of single lines. A portion of the multiple first touch wirings 730 and TL1 may include the material of the touch sensor metal TSM, and another portion of the multiple first touch wirings 730 and TL1 may include the material of the bridging metal BRG.

[0198] Reference Figure 7 A grounding metal (GND) may be disposed on the inclined region 720. The grounding metal (GND) may be a metal used to provide a ground voltage. The grounding metal (GND) may include a bridging metal portion (BRG) and a touch sensor metal portion (TSM). The bridging metal portion (BRG) of the grounding metal (GND) may be electrically connected to the touch sensor metal portion (TSM) of the grounding metal (GND).

[0199] Reference Figure 8 Multiple first touch wirings 830, i.e., TL1, may be disposed in the planar region 810, and a ground metal GND may be disposed in the inclined region 820. In the inclined region 820, the encapsulation layer PCL may be configured to be adjacent to a first dam DAM1 disposed outside the encapsulation layer PCL. The first dam DAM1 may include the material of the dam bank. The first dam DAM1 may include one or more dam shapes. (See reference...) Figure 8 The first dam, DAM1, comprises two dam shapes.

[0200] Furthermore, the planar region 810 and the tilted region 820 are included in the non-display region NDA. One direction of development for the display device 100 may involve reducing the area of ​​the non-display region NDA. To reduce the area of ​​the non-display region NDA, the components disposed in the planar region 810 and the tilted region 820 may be disposed more densely.

[0201] For example, refer to Figure 8 Only the ground metal GND is provided in the inclined region 820. When only the ground metal GND is provided in the inclined region 820, the ground metal GND is easy to design. However, when not only the ground metal GND but also other components are provided in the inclined region 820, the area of ​​the non-display area NDA can be reduced.

[0202] In other words, narrow bezels can be achieved more easily. Narrow bezels refer to a relatively smaller area of ​​the non-display area (NDA). (See reference...) Figure 9This can be used to identify an example of a narrow bezel.

[0203] Reference Figure 9 ,and Figure 8 Unlike the previous example, the first inclined region 920 and the second inclined region 930 may be located outside the planar region 910. In other words, Figure 8 The tilted region 820 shown can be divided into Figure 9 The first inclined region 920 and the second inclined region 930 are shown. Figure 8 The tilted region 820 shown can be divided into a first tilted region 920 and a second tilted region 930, and the components can be configured to be spaced apart from each other in the divided regions 920 and 930.

[0204] Reference Figure 9 The first inclined region 920 may be located outside the planar region 910. The second inclined region 930 may be located outside the first inclined region 920. The second inclined region 930 may be a region extending from the first inclined region 920. The slope of the second inclined region 930 may be greater than the slope of the first inclined region 920. The horizontal width of the first inclined region 920 may be the same as the horizontal width of the second inclined region 930, but this disclosure is not limited thereto. In other words, for the purpose of designing a narrow bezel, the horizontal width of the first inclined region 920 may be different from the horizontal width of the second inclined region 930.

[0205] Reference Figure 9 A portion 950 of the first touch wiring TL1 may be disposed in the planar region 910. Furthermore, another portion 940 of the first touch wiring TL1 may be disposed in the first inclined region 920.

[0206] Reference Figure 9 The ground metal GND can be provided in the second inclined region 930, and the ground metal GND can be not provided in the first inclined region 920. Instead of not providing the ground metal GND in the first inclined region 920, a portion 940 of the first touch wiring TL1 can be provided in the first inclined region 920. Since a portion 940 of the first touch wiring TL1 is provided in the first inclined region 920, the area where the first touch wiring 950, i.e., TL1, is located in the planar region 910 can be designed to be denser. Therefore, it is easier to design a narrow bezel.

[0207] For example, the number of first touch wiring TL1 can be n. (See reference...) Figure 9 Two first touch wires TL1 are disposed in the first inclined region 920. In this case, since two first touch wires TL1 are disposed in the first inclined region 920, the remaining n-2 first touch wires TL1 are disposed in the planar region 910. If like Figure 8If the first touch wiring TL1 is not provided in the inclined region 820 as shown, the planar region 810 will inevitably become wider. In other words, by providing the touch wiring TL1 in the first inclined region 920, it is easier to design a narrow bezel.

[0208] Reference Figure 9 The first touch wiring TL1 is disposed in the first tilted region 920. However, by design, a portion 940 of the first touch wiring may be disposed in the second tilted region 930, and the ground metal GND may be disposed in the first tilted region 920.

[0209] Reference Figure 10 Multiple first touch wirings 1040 and 1050, i.e., TL1, can be disposed in the planar region 1010 and the first inclined region 1020. The ground metal GND can be disposed in the second inclined region 1030. (Refer to...) Figure 10 The cathode electrode CE can be electrically connected to the anode electrode AE, and the anode electrode AE ​​can be electrically connected to the base voltage line VSSL. The first dam DAM1 can be disposed outside the encapsulation layer PCL in the second inclined region 1030.

[0210] In addition, refer to Figure 9 The cathode electrode CE can be disposed on the second planarization layer PLN2. (Refer to...) Figure 9 The cathode electrode CE can be configured to contact the second planarization layer PLN2. The cathode electrode CE can receive voltage from the base voltage line VSSL. In other words, the cathode electrode CE can be electrically connected to the base voltage line VSSL via the electrical connection portion EC. For example, although in Figure 9 The cross-sectional view is not shown, but the cathode electrode CE can be electrically connected to the base voltage line VSSL through a contact hole formed in the second planarization layer PLN2. Figure 9 The electrical connection shown, EC, indicates that the cathode electrode CE and the base voltage line VSSL can be electrically connected to each other. Next, refer to... Figure 10 A further example of the electrical connection between the cathode electrode CE and the base voltage line VSSL is described.

[0211] Reference Figure 10An anode electrode AE ​​may be disposed on the second planarization layer PLN2. The anode electrode AE ​​may extend in a direction from the display area DA toward the second inclined region 1030. The anode electrode AE ​​may extend through the lower part of the first inclined region 1020 to the lower part of the second inclined region 1030. The anode electrode AE ​​may be electrically connected to the base voltage line VSSL in the lower part of the second inclined region 1030. In the lower part of the second inclined region 1030, the anode electrode AE ​​may extend downward along the side surface of the second planarization layer PLN2. Thereafter, the anode electrode AE ​​may be electrically connected to the base voltage line VSSL disposed on the side surface of the first planarization layer PLN1. The base voltage line VSSL is disposed on the side surface of the first planarization layer PLN1, and the end of the base voltage line VSSL may extend between the end of the first planarization layer PLN1 and the end of the second planarization layer PLN2. A dam may be disposed on the anode electrode AE. A contact hole may be formed in the dam, and the cathode electrode CE may be electrically connected to the anode electrode AN through the contact hole. The cathode electrode CE may extend in a direction from the display area DA toward the first inclined area 1020. The cathode electrode CE may be disposed in the lower region of the planar region 1010 and may be electrically connected to the anode electrode AN in the lower part of the planar region 1010.

[0212] The implementation of line AB has been described. Now, line CD will be described.

[0213] Figure 11 It is along Figure 6 The cross-sectional view shown is taken from line CD.

[0214] A first touch pad TP1 may be disposed in a pad area PA. The first touch pad TP1 may include a first source / drain electrode pattern material portion SD1 and a second source / drain electrode pattern material portion SD2. The first source / drain electrode pattern material portion SD1 of the first touch pad TP1 may overlap with the second source / drain electrode pattern material portion SD2 of the first touch pad TP1.

[0215] The first touch wiring TL1 may be electrically connected to the first touch pad TP1 in the pad area PA. The first touch wiring TL1 may include the material of the touch sensor metal TSM.

[0216] The first touch wiring TL1 can extend from the pad area PA to the display area DA. The first touch wiring TL1 can be a single line in the pad area PA and a double line when extending to the curved area BA. In this case, the first touch wiring TL1 can include the material of the touch sensor metal TSM and the material of the bridging metal BRG. The touch sensor metal material portion TSM of the ground metal GND can be connected to the bridging metal material portion BRG of the ground metal GND through one or more contact holes.

[0217] The first touch wiring TL1 can pass through the curved region BA. The first touch wiring TL1 can be in the form of a single line. In this case, the first touch wiring TL1 may include a touch sensor metal material portion and a second source / drain electrode pattern material portion SD2. The touch sensor metal material portion TSM of the first touch wiring TL1 can be disposed on the second source / drain electrode pattern material portion SD2 of the first touch wiring TL1. The touch sensor metal material portion TSM of the first touch wiring TL1 is disposed at two opposite ends of the curved region BA, and the second source / drain electrode pattern material portion SD2 can be disposed in the curved region BA except for the corresponding portions. Therefore, the first touch wiring TL1 can be configured in a "U" shape in the curved region BA.

[0218] The first touch wiring TL1 may extend from the curved region BA to the display region DA. In this case, the first touch wiring TL1 may be in the form of a dual line. The first touch wiring TL1 may include the material of the touch sensor metal TSM and the material of the bridging metal BRG. The first touch wiring TL1 may be configured to rise along the inclined surface of the encapsulation layer PCL. Furthermore, the first touch wiring TL1 may extend to a flat surface on the encapsulation layer PCL. Multiple first touch wirings TL1 may be located on a flat surface on the encapsulation layer PCL.

[0219] Reference Figure 11 The inner touch wiring TL1_b and the outer touch wiring TL1_a can be identified. For ease of description, the diagram shows six first touch wirings TL1. The number of multiple first touch wirings TL1 is not limited to six.

[0220] Reference Figure 11 The first dam DAM1 may be located outside the encapsulation layer PCL. The first touch wiring TL1 may be disposed on the first dam DAM1. The first dam DAM1 may include one or more dam shapes.

[0221] Reference Figure 11 The base voltage line VSSL may include materials for the cathode electrode CE and the anode electrode AE. The anode electrode material portion AE of the base voltage line VSSL may be disposed inside the first dam DAM1 and extend to the display area DA. The anode electrode material portion AE of the base voltage line VSSL may be electrically connected to the cathode electrode material portion CE of the base voltage line VSSL.

[0222] The driving voltage line VDDL can be located in the lower part of the area where the cathode electrode CE and the anode electrode AE ​​overlap. The driving voltage line VDDL may include a first source / drain electrode patterned material portion SD1 and a second source / drain electrode patterned material portion SD2.

[0223] Figure 12 , Figure 13 and Figure 14 It is along Figure 6 The cross-sectional view taken from line EF.

[0224] Reference Figure 12 , Figure 13 and Figure 14 Various implementations of grounding metal GND can be identified.

[0225] Reference Figure 12 Multiple first touch wirings TL1 can be set in the planar area 1210.

[0226] Reference Figure 12 The grounding metal GND can be set in the planar area 1210. The grounding metal GND can be set outside the multiple first touch wirings TL1.

[0227] Reference Figure 12 The ground metal GND and multiple first touch wirings TL1 may not be set in the inclined area 1220.

[0228] Reference Figure 12 The inclined region 1220 can be defined as the first dam setting region 1220, since the first dam DAM1 is set in it.

[0229] Reference Figure 12 The second dam setting area 1230 can be located outside the first dam setting area 1220.

[0230] Reference Figure 12 The second dam DAM2 may be disposed in the second dam placement area 1230. The second dam DAM2 may be an organic layer (e.g., for preventing or avoiding placement on the touch sensor metal TSM) used to prevent or avoid the application of such a layer on the touch sensor metal TSM. Figure 4 The component that overflows from the protective layer (PAC).

[0231] Reference Figure 12 The encapsulation layer crack detection ECD can be installed in the second dam installation area 1230. The encapsulation layer crack detection ECD can detect cracks generated in the encapsulation layer PCL. The encapsulation layer crack detection ECD may include the material of the bridging metal BRG. The encapsulation layer crack detection ECD can be located between the first dam DAM1 and the second dam DAM2.

[0232] Reference Figure 12 This indicates that a ground metal GND or a first touch wiring TL1 is not provided in the sloping area 1220. If a ground metal GND or a first touch wiring TL1 is provided in the sloping area 1220, it is easier to design a narrow bezel.

[0233] Reference Figure 12This indicates that no grounding metal GND or first touch wiring TL1 is provided in the second dam setting area 1230. If a grounding metal GND or first touch wiring TL1 is provided in the second dam setting area 1230, it is easier to design a narrow bezel.

[0234] Figure 13 An example of a grounding metal GND being installed in the second dam installation area 1330 is illustrated. Figure 14 An example is shown where the ground metal GND is set in the sloping region 1420. See below for reference. Figure 13 and Figure 14 To describe it.

[0235] Reference Figure 13 The grounding metal GND can be located in the second dam setting area 1330, instead of the planar area 1310. In this case, although a portion of the multiple first touch wirings TL1 is still located in the planar area 1310, another portion of the multiple first touch wirings TL1 can be set in the location where the grounding metal GND was previously set. In other words, since the grounding metal GND is not set in the planar area 1310, the arrangement of the multiple first touch wirings TL1 can be freely designed. Therefore, the size of the bezel can also be reduced.

[0236] For example, Figure 13 A portion 1350 of the first touch wiring TL1 shown may be located in Figure 12 The location of the ground metal GND is shown. It can be assumed that the number of first touch wires TL1 is n, and part 1350 of the first touch wires TL1 corresponds to three first touch wires TL1. In this case, the remaining part 1340 of the first touch wires TL1 is n-3 first touch wires TL1, and the area in the planar region 1310 where the first touch wires TL1 are set can be further reduced.

[0237] Reference Figure 13 The ground metal GND may include the material of the bridging metal BRG and the material of the touch sensor metal TSM. The ground metal GND may include two or more metals containing the material of the bridging metal BRG, and the encapsulation layer crack detection part ECD may be located therebetween.

[0238] Reference Figure 13 The grounding metal GND may not be placed in the inclined region 1320. Instead, refer to Figure 14 The grounding metal GND can be set in the inclined region 1420. Inclined regions 1320 and 1420 can be defined as the first dam setting regions 1320 and 1420.

[0239] Reference Figure 14 , Figure 14 The settings of the multiple first touch wirings TL1 shown can be compared with... Figure 13 The multiple first touch wirings TL1 shown are configured identically. However, the location of the ground metal GND differs.

[0240] Reference Figure 14 The grounding metal GND may be located in the inclined region 1420 and may extend to the second dam setting region 1430. The grounding metal GND may include the material of the bridging metal BRG and the material of the touch sensor metal TSM. The bridging metal material portion BRG of the grounding metal GND may extend from the inclined region 1420 to the second dam setting region 1430 and may cross the first dam DAM1.

[0241] The touch sensor metal portion TSM of the ground metal GND can extend from the inclined region 1420 to the second dam setting region 1430. The touch sensor metal portion TSM of the ground metal GND can be electrically connected to the bridging metal portion BRG of the ground metal GND.

[0242] Figure 14 The location of the ECD in the encapsulation layer crack detection section shown can be compared with... Figure 12 The locations of the encapsulation crack detection section (ECD) shown are the same. The encapsulation crack detection section may not overlap with the ground metal (GND), but this disclosure is not limited thereto. Depending on the design purpose, the encapsulation crack detection section may or may not overlap with the ground metal (GND).

[0243] In other words, by Figure 12 The ground metal GND shown is positioned outside the planar area 1210, making it easier to design narrow bezels. For example, the ground metal GND can be located in... Figure 13 The second dam is located in area 1330, as shown. Additionally, the grounding metal GND can be located in... Figure 14 The tilted region 1420 is shown.

[0244] Reference Figure 13 The grounding metal GND can be identified as being located in the second dam setting area 1330, and the first touch wiring TL1 is not set in the inclined area 1320. In this case, when the first touch wiring TL1 is set in the inclined area 1320, the narrow bezel can be designed to be thinner or narrower.

[0245] Reference Figure 14 The ground metal GND can be identified as being located in the inclined region 1420. In this case, the ground metal GND can be designed to be offset towards the lower part of the inclined region 1420, and the first touch wiring TL1 can be designed in the upper part of the inclined region 1420. Therefore, a thinner and narrower bezel can be designed.

[0246] The embodiments of the present disclosure described above are briefly described below.

[0247] Embodiments of this disclosure may provide a display device comprising: a substrate including a display area and a non-display area outside the display area; a plurality of light-emitting elements disposed on the substrate; an encapsulation layer disposed on the plurality of light-emitting elements; and a plurality of touch wirings disposed on an inclined region of the encapsulation layer.

[0248] Multiple touch wirings may include a first metal pattern material disposed on the encapsulation layer, or a second metal pattern material disposed above the first metal pattern material.

[0249] The display device may also include a grounding metal located in the inclined region and disposed outside the touch wiring.

[0250] Multiple touch wirings can be placed in the sloping and planar areas of the encapsulation layer.

[0251] Multiple touch traces may include inner traces with a curved pattern and outer traces without a curved pattern. Non-display areas may include pad areas and curved areas.

[0252] The curved pattern can be located between the pad area and the curved area.

[0253] Internal and external wiring can extend parallel to each other in the direction from the curved area to the display area.

[0254] Multiple light-emitting elements may include an anode electrode, a light-emitting element intermediate layer on the anode electrode, and a cathode electrode disposed on the light-emitting element intermediate layer. The cathode electrode may be electrically connected to a base voltage line. The base voltage line may include: a first source-drain electrode pattern disposed on a substrate; a second source-drain electrode pattern electrically connected to the first source-drain electrode pattern; an anode metal pattern electrically connected to the second source-drain electrode pattern and including the material included in the anode electrode; and a cathode metal pattern electrically connected to the anode metal pattern and including the material included in the cathode electrode.

[0255] Multiple touch wirings may overlap with the anode metal pattern in the sloping region. Multiple touch wirings may not overlap with the cathode metal pattern in the planar region of the package layer.

[0256] The display device may further include drive voltage lines comprising materials included in the first source-drain electrode pattern and materials included in the second source-drain electrode pattern. Multiple touch wirings may not overlap with the drive voltage lines.

[0257] A portion of the multiple touch traces may be a first touch trace extending in a direction from the display area toward the pad area. The first touch trace may include bridging metal portions and touch sensor metal portions in the area between the display area and the curved area. The first touch trace may include touch sensor metal portions and source / drain metal portions in the curved area. The first touch trace may include bridging metal portions and touch sensor metal portions between the curved area and the pad area. The first touch trace may include touch sensor metal portions in the pad area. The display device may also include a first touch pad electrically connected to the first touch trace.

[0258] The first touch pad may include a source / drain metal material portion and a metal material different from the source / drain metal material portion.

[0259] The display device may also include a grounding metal disposed in a sloping region of the encapsulation layer.

[0260] The display device may also include a grounded metal disposed outside the encapsulation layer.

[0261] At least a portion of the multiple touch wirings may be located in a planar region of the encapsulation layer and adjacent to the tilted region.

[0262] The display device may further include: a first dam disposed outside the encapsulation layer; and a second dam disposed outside the first dam. A grounding metal may be located between the first dam and the second dam.

[0263] The display device may also include a crack detection section for the encapsulation layer, which is configured to overlap with the grounded metal.

[0264] The display device may also include a grounded metal extending from the inclined region to the outside of the encapsulation layer.

[0265] At least a portion of the multiple touch wirings may be located in a planar region of the encapsulation layer and adjacent to a ground metal located in a sloping region.

[0266] The display device may also include a touch buffer layer, which is located between the encapsulation layer and multiple touch wires and is formed of an organic insulating material.

[0267] The slanted area of ​​the encapsulation layer is set in the non-display area.

[0268] Multiple touch wires can extend from the inclined area to the display area to electrically connect with multiple touch electrodes located in the display area.

[0269] Embodiments of this disclosure may provide a display device comprising: a substrate; a plurality of light-emitting elements disposed on the substrate; an encapsulation layer disposed on the plurality of light-emitting elements and including a planar region and an inclined region outside the planar region; an inner touch wiring disposed in the planar region; and an outer touch wiring disposed in the inclined region.

[0270] Embodiments of this disclosure may include a display device comprising: a substrate; a plurality of light-emitting elements disposed on the substrate; an encapsulation layer disposed on the plurality of light-emitting elements and including a planar region and an inclined region outside the planar region; a plurality of touch wirings disposed on the encapsulation layer; and a ground metal disposed in the inclined region of the encapsulation layer.

[0271] At least a portion of the multiple touch wirings may be located in a sloping region of the encapsulation layer and adjacent to a ground metal located in the sloping region.

[0272] The above description has been presented to enable any person skilled in the art to make and use the technical ideas of this disclosure, and is provided in the context of a particular application and its requirements. Various modifications, additions, and substitutions to the described embodiments will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments and applications without departing from the spirit and scope of this disclosure. The above description and drawings are provided as examples of the technical ideas of this disclosure for illustrative purposes only. For example, the disclosed embodiments are intended to illustrate the scope of the technical ideas of this disclosure.

[0273] Cross-references to related applications

[0274] This application claims the benefit and priority of Korean Patent Application No. 10-2024-0116041, filed in Korea on August 28, 2024, the entire contents of which are incorporated herein by reference for all purposes, as if fully set forth herein.

Claims

1. A display device comprising: a substrate including a display area and a non-display area outside the display area; a plurality of light emitting elements provided on the substrate; an encapsulation layer provided on the plurality of light emitting elements; and a plurality of touch wirings provided on an inclined area of the encapsulation layer. The plurality of touch wirings includes a first metal pattern material provided on the encapsulation layer or a second metal pattern material provided above the first metal pattern material.

2. The display device according to claim 1, wherein 3. The display device according to claim 1, further comprising a ground metal in the inclined area and provided outside the touch wirings. The plurality of touch wirings is provided in the inclined area and a planar area of the encapsulation layer.

4. The display device according to claim 1, wherein The plurality of touch wirings includes:

5. The display device according to claim 1, wherein an inner wiring having a curved pattern; and an outer wiring not having the curved pattern, and wherein the non-display area includes a pad area and a bending area. The curved pattern is located between the pad area and the bending area.

6. The display device of claim 5, wherein, The inner wiring and the outer wiring extend in parallel in a direction from the bending area to the display area.

7. The display device according to claim 5, wherein The plurality of light emitting elements includes an anode electrode, a light emitting element interlayer on the anode electrode, and a cathode electrode provided on the light emitting element interlayer, 8. The display device according to claim 1, wherein wherein the cathode electrode is electrically connected to a base voltage line, and wherein the base voltage line includes: a first source / drain electrode pattern provided on the substrate; a second source / drain electrode pattern electrically connected to the first source / drain electrode pattern; an anode metal pattern electrically connected to the second source / drain electrode pattern and including a material included in the anode electrode; and a cathode metal pattern electrically connected to the anode metal pattern and including a material included in the cathode electrode. The plurality of touch wirings overlaps the anode metal pattern in the inclined area, and 9. The display device of claim 8, wherein, wherein the plurality of touch wirings does not overlap the cathode metal pattern in a planar area of the encapsulation layer.

10. The display device according to claim 8, further comprising a drive voltage line including a material included in the first source / drain electrode pattern and a material included in the second source / drain electrode pattern, The plurality of touch wirings does not overlap the drive voltage line. wherein, A portion of the plurality of touch wirings is a first touch wiring extending in a direction from the display area toward a pad area of the non-display area, 11. The display device according to claim 1, wherein wherein the first touch wiring includes a bridging metal material portion and a touch sensor metal material portion in an area between the display area and a bending area of the non-display area, wherein the first touch wiring includes the touch sensor metal material portion and a source / drain metal material portion in the bending area, wherein the first touch wiring includes the bridging metal material portion and the touch sensor metal material portion between the bending area and the pad area, ​ wherein the first touch wiring includes the touch sensor metal material portion in the pad region, and wherein the display device further includes a first touch pad electrically connected to the first touch wiring.

12. The display device of claim 11, wherein, The first touch pad includes the source-drain metal material portion and a metal material different from the source-drain metal material portion.

13. The display device according to claim 1, further comprising a ground metal provided in the inclined region of the encapsulation layer.

14. The display device according to claim 1, further comprising a ground metal provided outside the encapsulation layer.

15. The display device of claim 14, wherein, At least a portion of the plurality of touch wirings is provided in a planar region of the encapsulation layer and is located adjacent to the inclined region.

16. The display device according to claim 14, further comprising: a first dam provided outside the encapsulation layer; and a second dam provided outside the first dam, wherein the ground metal is located between the first dam and the second dam.

17. The display device according to claim 14, further comprising an encapsulation layer crack detection portion provided to overlap the ground metal.

18. The display device according to claim 1, further comprising a ground metal extending from the inclined region to outside the encapsulation layer.

19. The display device according to claim 1, further comprising a touch buffer layer between the encapsulation layer and the plurality of touch wirings and formed of an organic insulating material.

20. The display device of claim 1, wherein, The inclined region of the encapsulation layer is provided in the non-display region.

21. The display device of claim 20, wherein, The plurality of touch wirings extend from the inclined region to the display region to be electrically connected to a plurality of touch electrodes provided in the display region.

22. A display device comprising: a substrate; a plurality of light emitting elements provided on the substrate; an encapsulation layer provided on the plurality of light emitting elements and including a planar region and an inclined region outside the planar region; an inner touch wiring provided in the planar region; and an outer touch wiring provided in the inclined region.

23. A display device comprising: a substrate; a plurality of light emitting elements provided on the substrate; an encapsulation layer provided on the plurality of light emitting elements and including a planar region and an inclined region outside the planar region; a plurality of touch wirings provided on the encapsulation layer; and a ground metal provided in the inclined region of the encapsulation layer. At least a portion of the plurality of touch wirings is provided in the inclined region of the encapsulation layer and is adjacent to the ground metal provided in the inclined region. ​ 24. The display device of claim 23, wherein, ​

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