Airborne high-performance computing platform

Abstract

The invention provides an airborne high-performance computing platform, which comprises a general data processing module used for meeting functional requirements of various application software on real-time reading of processed data through network dynamic configuration under control management of a system; the main control interface module is used for completing system resource scheduling and management and system key instruction storage functions and realizing interface scheduling and management functions with each subsystem; the power supply module is used for supplying power to each module in the platform; the map card module is used for realizing storage of graphic processing resource data; wherein various data sources are accessed to the general data processing module through the external interface, data processing of different data sources is completed through the general data processing module to obtain processed data, and the processed data is transmitted to the main control interface module through the internal SRIO switching network and then is transmitted to the airborne avionics system to complete service processing. According to the method, multiplexing of hardware resources by different functions is realized through system reconstruction and automatic loading, and the development requirements of future high-performance computing are met.

Description

Technical Field

[0001] This invention relates to the field of airborne platform data processing technology, and more specifically, to an airborne high-performance computing platform. Background Technology

[0002] Currently, as helicopters face increasingly sophisticated requirements for the integration of their avionics systems during training and combat missions, these systems, or the entire helicopter, are trending towards multi-functional parallel processing, high-performance processing, and dynamic reconfigurability. Simultaneously, the increasing complexity of the functions required by these systems places new demands on the computing power of airborne processing platforms in areas such as data processing, image processing, and intelligent computing. Under this highly integrated design approach, and following the integrated design philosophy, hardware resources need to be pooled, domain-specific integrated, and uniformly configured and managed. System reconfiguration and automatic loading enable the reuse of hardware resources for different functional requirements, maximizing functionality with minimal resource allocation and thereby improving mission reliability.

[0003] To enhance the decoupling capabilities of hardware and software in helicopter equipment, rapidly develop equipment products, and improve combat effectiveness, there is an urgent need to construct a dynamically configurable airborne high-performance computing platform for data processing. Hardware across all resource domains should adopt a modular, standardized, and universal design. Based on different combat missions, different software should be loaded onto shared hardware to achieve "soft" switching of tasks. This hardware-sharing approach significantly reduces the overall system size and power consumption, thereby achieving integrated and unified hardware and software decoupling capabilities for helicopter equipment and meeting the future development requirements of high-performance computing. Summary of the Invention

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art.

[0005] Therefore, the present invention provides an airborne high-performance computing platform.

[0006] This invention provides an airborne high-performance computing platform, comprising: A general data processing module is used to dynamically configure and meet the real-time data reading requirements of various application software through the network under the control and management of the system. The processed data includes internal map resources, pre-processed data, and pre-loaded data. The main control interface module is used to complete system resource scheduling and management as well as the storage of key system instructions, and to realize interface scheduling and management functions with various subsystems; The power module is used to provide power to the various modules within the platform. The map card module is used to store graphics processing resource data; Various data sources are connected to the general data processing module through external interfaces. The general data processing module processes the data from different data sources to obtain processed data. The processed data is then transmitted to the main control interface module via the internal SRIO exchange network and then sent to the airborne avionics system to complete the business processing.

[0007] The airborne high-performance computing platform according to the above-described technical solution of the present invention may also have the following additional technical features: In the above technical solution, the general data processing module includes multiple data processing units, which constitute a general data processing resource pool. The multiple data processing units adopt a unified and standardized design and are interchangeable.

[0008] In the above technical solution, the general data processing module adopts a PowerPC resource pool + GPU + ARM architecture, and all CPU and GPU resources are interconnected at the chip level through the SRIO network. Under the control and management of the system, the network can be dynamically configured to enable flexible deployment and dynamic reconstruction of the functional software loading, meet the deployment requirements of various application software and the resource requirements of the system's comprehensive processing, and meet the functional requirements of various application software for real-time reading of processed data.

[0009] In the above technical solution, the general data processing module includes: The smallest unit of the first PPC platform is used to perform computational tasks related to data processing. RIO switching Ethernet switching unit is used to manage and distribute data streams from different units, enabling data exchange between different units within the module; The ZYNQ unit integrates an ARM processor and programmable logic, and is used for at least signal processing and data conversion. The graphics processing unit is used to handle computational tasks related to graphics and images. The first power management unit is used to monitor and control the power supply inside the module; The first debugging interface unit is used for module debugging and testing.

[0010] In the above technical solution, the main control interface module includes: The AFDX daughter card is responsible for implementing the interface with the AFDX bus and for receiving and sending data. The smallest unit of an FPGA, used for signal processing and data conversion; The second smallest unit of the PPC platform is used to perform computational tasks related to resource scheduling. Storage daughter card, used to store critical system instructions and data; The management unit monitors and manages the overall system operation status, including power management and clock control. The second power management unit is used to monitor and control the power supply inside the module; The second debugging interface unit is used for module debugging and testing.

[0011] In the above technical solution, the power module includes two power units, which are designed to be redundant and backup for each other; The power supply unit is used to filter and preprocess the external input voltage and convert the external input voltage into the voltage required by the various modules inside the airborne high-performance computing platform. The power supply unit is equipped with power-on control and circuit protection functions; The circuit protection includes overheat protection, input reverse connection protection, input short circuit protection, input overvoltage protection, input undervoltage protection, output overvoltage protection, and output short circuit protection.

[0012] In the above technical solution, the power module also includes an energy storage circuit unit for storing electrical energy to supply at least 50ms of operation for the airborne high-performance computing platform.

[0013] In the above technical solution, the map card module uses a SATA bus to interact with the system, and adopts a structural design that supports quick assembly and disassembly, as well as corresponding external connectors, to enable rapid interaction of map card data between the ground preprocessing platform and the airborne equipment.

[0014] In the above technical solution, the computing platform uses an SRIO switching network as the backbone network for internal main business communication to achieve chip-level interconnection; it uses an Ethernet interface to achieve data interaction with the environmental perception and safety assurance system; it uses an ARINC429 bus interface to achieve data interaction with the navigation and flight parameter monitoring system; it uses an XGA interface to achieve data interaction with the vision and situational awareness system; it uses an AFDX interface to achieve interoperability with avionics; it uses a CAN bus as the internal maintenance bus of the rack and an Ethernet as the debugging bus network; it communicates with the helmet display and communication and navigation system through an RS422 interface; and it uses a discrete interface to achieve signal simulation, ground inspection, and key destruction operations.

[0015] In the above technical solution, during the interconnection process with external systems, the computing platform uses the main control interface module as the time processing center for the time-frequency distribution synchronization function to complete the reception and processing of time sources, time tracing, generation and distribution of B codes, and time quality level evaluation. The time distribution adopts the internal LVDS bus connection of the platform.

[0016] In summary, due to the adoption of the above-mentioned technical features, the beneficial effects of the present invention are: This invention designs an airborne high-performance computing platform, designed for future training and combat applications. It enables data interaction with devices such as laser / electro-optical collision avoidance systems, weather / collision avoidance radar, laser inertial navigation systems, fiber optic inertial navigation systems, communication and navigation systems, flight parameters, video processing units, and helmets. The platform provides real-time data reading, recording, preprocessing, preloading, large-capacity storage, and rapid unloading. It also offers hardware and software resources and a suitable operating environment for computational processing, graphics rendering, software storage and runtime content, and power-off storage. Furthermore, it features internal time distribution and synchronization capabilities. Specific advantages are as follows: (1) Chip-level interconnection based on high-speed bus. This invention adopts a distributed structure of multiple processing units and standardized general data processing modules to achieve chip-level interconnection based on high-speed bus. Through the internal high-speed data exchange network, each processing channel can perform processing collaboration and transmit intermediate data, collaborative messages and processing results.

[0017] (2) Platform Reconstruction under System Control and Scheduling. This invention manages the running functional software and the entire high-performance computing system platform. During power-on initialization, the hardware is ensured to be in a ready-to-work state, and hardware resources are allocated to the corresponding functions. The network and interfaces are configured, functional software is loaded, and operating parameters are preset. Then, the functional software is started and run, and the health monitoring software is run synchronously to monitor the system's operating status in real time. When the system's operating mode changes under task-driven conditions, or when the system itself malfunctions, the system will initiate a reconstruction process to isolate the faulty hardware and then re-execute the hardware resource allocation and configuration process to meet the operating requirements of the new mode or restore the faulty function.

[0018] (3) Chip-level platform resource deployment. The data processing resource pool in this invention realizes chip-level deployment of a large number of processors such as GPUs, CPUs, DSPs, and FPGAs. Chip-level interconnection is achieved through a high-speed SRIO network. Under the control and management of the system, dynamic configuration through the network and loading of functional software enable flexible deployment and dynamic reconfiguration. At the same time, the smallest processor units within the platform have a unified and standardized design. All processing resource nodes of the same type are completely identical in terms of storage and computing capabilities, and all serve as nodes in the system's high-speed network in terms of external interfaces. These features endow the system with chip-level reconfiguration capabilities, bringing great flexibility and convenience to system reconfiguration. System reconfiguration can be achieved with smaller-granularity backup resources, improving the reliability of system tasks.

[0019] Additional aspects and advantages of the invention will become apparent in the following description or may be learned by practice of the invention. Attached Figure Description

[0020] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which: Figure 1 This is a framework diagram of an airborne high-performance computing platform according to an embodiment of the present invention; Figure 2 This is an architecture diagram of a general data processing module in an airborne high-performance computing platform according to an embodiment of the present invention; Figure 3 This is an architecture diagram of the main control interface module in an airborne high-performance computing platform according to an embodiment of the present invention; Figure 4 This is an architecture diagram of the power module in an airborne high-performance computing platform according to an embodiment of the present invention; Figure 5 This is an architecture diagram of the map card module in an airborne high-performance computing platform according to an embodiment of the present invention. Detailed Implementation

[0021] To better understand the above-mentioned objectives, features, and advantages of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in these embodiments can be combined with each other.

[0022] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and therefore the scope of protection of the invention is not limited to the specific embodiments disclosed below.

[0023] The following reference Figures 1 to 5 This describes an airborne high-performance computing platform provided according to some embodiments of the present invention.

[0024] Some embodiments of this application provide an airborne high-performance computing platform.

[0025] like Figure 1 As shown, the first embodiment of the present invention proposes an airborne high-performance computing platform, including a general data processing module, a main control interface module, a power supply module, and a map card module.

[0026] The general data processing module is used to dynamically configure and meet the real-time data reading requirements of various application software under the control and management of the system. The processed data includes internal map resources, pre-processed data, and pre-loaded data. The main control interface module is used to complete system resource scheduling and management, as well as the storage of key system instructions, and to realize interface scheduling and management functions with various subsystems such as AFDX bus, ARINC429 bus, and RS422 bus. The power supply module is used to provide power to various modules within the platform. The map card module is used to store graphics processing resource data. Based on the above architecture, on the one hand, it can provide a hardware resource platform for functions such as integrated vision, multi-source detection fusion, route planning and processing, and navigation ground proximity warning: data from devices such as laser / electro-optical integrated collision avoidance system, meteorological / collision avoidance radar, laser inertial navigation, fiber optic inertial navigation, communication and navigation system, flight parameters, video processing unit, helmet, etc., are connected to the general data processing module through the SRIO fiber optic interface. The general data processing module completes the data processing of different data sources. After processing, the data is transmitted to the main control interface module through the internal SRIO switching network, and then sent to the airborne avionics system for business processing via AFDX bus. On the other hand, it has platform management functions: it can implement system resource scheduling and management according to different functions, can dynamically configure functional threads according to system task mode and resource health status, can perform health status monitoring, comprehensive fault diagnosis, isolation and reporting of resources and functional threads, and can complete task reconstruction and degradation reconstruction according to system resource status and health status.

[0027] This airborne high-performance computing platform is a parallel data processing and graphics processing platform that supports multi-channel parallel data input, processing, and output. Therefore, its design principle involves connecting multiple processing channels simultaneously to a high-speed signal-level switching network, flexibly forming various coexisting interconnection modes to meet the system's processing and I / O throughput requirements. For high-priority application software, it has expansion capabilities such as configuration, management, scheduling, and backup / reconstruction. The interconnection method between internal data processing resources is dynamically and flexibly configurable.

[0028] The computing platform's network switch connects to each data processing unit via an SRIO bus. Through this network, processing channels can collaborate, transmitting intermediate data, collaborative messages, and processing results. The platform comprehensively manages all running functional software. During power-on initialization, it ensures the platform hardware is in a ready-to-work state and allocates hardware resources to the corresponding functional software. It configures the network and interfaces, loads the functional software, and presets operating parameters. Then, the platform starts and runs each application software, simultaneously running health monitoring software to monitor the computing platform's operational status in real time. When a data processing unit malfunctions, the computing platform initiates a refactoring process, isolating the faulty hardware and then re-executing the hardware resource allocation and configuration process to meet the requirements of the new operating mode or restore the faulty function.

[0029] More specifically, in some embodiments, the computing platform described above can provide general data processing functions, platform management functions, time synchronization functions, data recording functions, and online loading functions.

[0030] The general data processing function refers to the ability of the airborne high-performance computing platform to provide data interaction, real-time reading, recording, preprocessing, preloading, large-capacity storage, and rapid unloading for devices such as laser / optoelectronic integrated collision avoidance systems, weather / collision avoidance radars, laser inertial navigation systems, fiber optic inertial navigation systems, communication and navigation systems, flight parameters, video processing units, and helmets. It also provides hardware and software resources and a software operating environment for computational processing, graphics rendering, software storage and runtime content, and power-off storage, as well as internal time distribution and synchronization functions. The general data processing module is connected via SRIO fiber optic interface to the external interface. This module processes the system's data, and the processed data is then transmitted to the main control interface module via internal SRIO switching, and finally sent to the airborne avionics system via the AFDX bus to complete the business implementation.

[0031] Platform management functions refer to the ability of the airborne high-performance computing platform to achieve status control and system resource scheduling management. It can generate system function configuration schemes based on system task modes and resource health status, allocate resources in real time, and complete the assembly of functional threads. It has the functions of monitoring the health status of resources and functional threads, fault isolation and reporting. It has reconstruction management and can complete task reconstruction and degradation reconstruction based on system resource status and health status. It can realize resource competition scheduling management.

[0032] The time distribution synchronization function refers to the onboard high-performance computing platform having functions such as time tracing and time distribution. It consists of a time source, a time processing center, and corresponding time distribution circuits. The time source is time from the AFDX network. The main control interface module, as the time processing center of the time-frequency distribution synchronization function, mainly completes the reception and processing of the time source, time tracing, generation and distribution of B codes, and time quality level evaluation. Time distribution is implemented using the internal LVDS bus of the device.

[0033] The online software loading function refers to the ability of the onboard high-performance computing platform to perform online software loading and upgrades, and to remotely load software online via a data loading and recording device. Specifically, the integrated task processor (SCM) is connected to the computing platform rack via the AFDX bus. The online upgrade file is transmitted via the ADFX bus to the online upgrade agent protocol software of the main control interface module, and then forwarded by the SCM software to the module being upgraded via the relevant bus. After the upgraded module completes the local data / program update, it sends the data / program loading result back to the SCM software, which then sends it back to the integrated task processor via the AFDX bus.

[0034] In some embodiments, the general data processing module includes multiple data processing units (e.g., 3, 5, etc.) constituting a general data processing resource pool. These multiple data processing units adopt a unified and standardized design and are interchangeable. Figure 2As shown, the general-purpose data processing module adopts a PowerPC resource pool + GPU + ARM architecture, with all CPU and GPU resources interconnected at the chip level through an SRIO network. Under the system's control and management, dynamic configuration via the network enables flexible deployment and dynamic reconfiguration of functional software loading, meeting the deployment requirements of various application software and the resource requirements of the system's comprehensive processing, as well as the functional requirements of each application software for real-time data reading. A 30% margin should be considered in the selection of components to accommodate future functional expansion needs.

[0035] exist Figure 2 In the specific embodiment shown, the general data processing module includes: The first PPC platform (PowerPC) is the smallest unit used to perform data processing-related computing tasks; in Figure 2 In the illustrated embodiment, the multiple first PPC platform minimum units are schematically represented as PPC1 platform minimum unit, PPC2 platform minimum unit, and PPC3 platform minimum unit.

[0036] RIO switching Ethernet switching unit is used to manage and distribute data streams from different units, enabling data exchange between different units within the module; The ZYNQ unit integrates an ARM processor and programmable logic, and is used for at least signal processing and data conversion. The graphics processing unit is used to handle computational tasks related to graphics and images. The first power management unit is used to monitor and control the power supply inside the module; The first debugging interface unit is used for module debugging and testing.

[0037] Figure 2 The diagram illustrates the connection links and bus selections of each unit in the general data processing module. This is for illustrative purposes only and can be adjusted according to actual needs. Figure 2 The high-speed connector shown in the diagram serves as the physical connection foundation for the entire system, supporting all the aforementioned connections. It enables high-speed data transmission between all units, ensuring the stability and reliability of data transmission.

[0038] In some embodiments, such as Figure 3 As shown, the main control interface module includes: The AFDX (Avionics Full Duplex Switched Ethernet, an Ethernet protocol for avionics) daughter card is responsible for implementing the interface with the AFDX bus and for receiving and sending data. The smallest unit of an FPGA, used for signal processing and data conversion; The second smallest unit of the PPC platform is used to perform computational tasks related to resource scheduling. Storage daughter card, used to store critical system instructions and data; The management unit monitors and manages the overall system operation status, including power management and clock control. The second power management unit is used to monitor and control the power supply inside the module; The second debugging interface unit is used for module debugging and testing.

[0039] Similarly, Figure 3 The high-speed connector shown is also the infrastructure for physical connections. It supports high-speed data transmission between all units, ensuring the stability and reliability of data transmission.

[0040] In some embodiments, such as Figure 4 As shown, the power module includes two power supply units with redundant backup design. These units are used to filter and pre-process the external +28V input voltage, converting it to the +12V voltage required by the processing units within the onboard high-performance computing platform. Each power supply unit has power-on control and provides 50ms of energy storage for the emergency circuit. Power-on control is distributed via a CAN bus power-on control signal. In addition, the power supply unit also features multiple protection functions, including overheat protection, input reverse connection protection, input short circuit protection, input overvoltage protection, input undervoltage protection, output overvoltage protection, and output short circuit protection.

[0041] In some embodiments, such as Figure 5 As shown, the map card module uses a SATA bus to interact with the system. The actual throughput rate depends on the performance of the storage chips, the size and throughput capacity of the buffer, and the capabilities of the data operation platform with which it interacts. The designed storage capacity is 2.0 Tbytes.

[0042] The map card module adopts a structural design that supports quick installation and removal, and corresponding external connectors, which can realize quick installation / removal and enable rapid exchange of map card data between the ground preprocessing platform (via a dedicated card reader) and airborne equipment.

[0043] In some embodiments, the bus design of the data exchange network of the airborne high-performance computing platform is as follows: The computing platform uses an SRIO switching network as the backbone network for internal main business communication, achieving chip-level interconnection; it uses an Ethernet interface to achieve data interaction with the environmental perception and safety assurance system, which refers to sensor systems such as meteorological / collision avoidance radar and laser / electro-optical integrated collision avoidance system; it uses an ARINC429 bus interface to achieve data interaction with the navigation and flight parameter monitoring system, which refers to sensor systems such as laser inertial navigation, fiber optic inertial navigation, and flight parameters; it uses an XGA interface to achieve data interaction with the vision and situational awareness system, which refers to the helmet-mounted display, video processing unit, and laser / electro-optical integrated collision avoidance system; it uses an AFDX interface to achieve interoperability with avionics; it uses a CAN bus as the internal maintenance bus of the rack and an Ethernet network as the debugging bus network; it communicates with the helmet-mounted display and communication and navigation system through an RS422 interface; and it uses a discrete interface to achieve signal simulation, ground inspection, and key destruction operations.

[0044] In this specification, the illustrative expressions of the terms used do not necessarily refer to the same embodiments or examples. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0045] Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this invention shall be included within the scope of protection of this invention.

Claims

1. An airborne high-performance computing platform, characterized in that, include: A general data processing module is used to dynamically configure and meet the real-time data reading requirements of various application software through the network under the control and management of the system. The processed data includes internal map resources, pre-processed data, and pre-loaded data. The main control interface module is used to complete system resource scheduling and management as well as the storage of key system instructions, and to realize interface scheduling and management functions with various subsystems; The power module is used to provide power to the various modules within the platform. The map card module is used to store graphics processing resource data; Various data sources are connected to the general data processing module through external interfaces. The general data processing module processes the data from different data sources to obtain processed data. The processed data is then transmitted to the main control interface module via the internal SRIO exchange network and then sent to the airborne avionics system to complete the business processing.

2. The airborne high-performance computing platform according to claim 1, characterized in that, The general data processing module includes multiple data processing units, which constitute a general data processing resource pool. The multiple data processing units adopt a unified and standardized design and are interchangeable.

3. The airborne high-performance computing platform according to claim 1, characterized in that, The general data processing module adopts a PowerPC resource pool + GPU + ARM architecture, with all CPU and GPU resources interconnected at the chip level through an SRIO network. Under the control and management of the system, it is dynamically configured through the network, enabling flexible deployment and dynamic reconstruction of functional software loading. This meets the deployment requirements of various application software and the resource requirements of the system's comprehensive processing, as well as the functional requirements of various application software for real-time reading of processed data.

4. The airborne high-performance computing platform according to claim 3, characterized in that, The general data processing module includes: The smallest unit of the first PPC platform is used to perform computational tasks related to data processing. RIO switching Ethernet switching unit is used to manage and distribute data streams from different units, enabling data exchange between different units within the module; The ZYNQ unit integrates an ARM processor and programmable logic, and is used for at least signal processing and data conversion. The graphics processing unit is used to handle computational tasks related to graphics and images. The first power management unit is used to monitor and control the power supply inside the module; The first debugging interface unit is used for module debugging and testing.

5. The airborne high-performance computing platform according to claim 1, characterized in that, The main control interface module includes: The AFDX daughter card is responsible for implementing the interface with the AFDX bus and for receiving and sending data. The smallest unit of an FPGA, used for signal processing and data conversion; The second smallest unit of the PPC platform is used to perform computational tasks related to resource scheduling. Storage daughter card, used to store critical system instructions and data; The management unit monitors and manages the overall system operation status, including power management and clock control. The second power management unit is used to monitor and control the power supply inside the module; The second debugging interface unit is used for module debugging and testing.

6. The airborne high-performance computing platform according to claim 1, characterized in that, The power module includes two power units, which are designed to be redundant and backup for each other. The power supply unit is used to filter and preprocess the external input voltage and convert the external input voltage into the voltage required by the various modules inside the airborne high-performance computing platform. The power supply unit is equipped with power-on control and circuit protection functions; The circuit protection includes overheat protection, input reverse connection protection, input short circuit protection, input overvoltage protection, input undervoltage protection, output overvoltage protection, and output short circuit protection.

7. The airborne high-performance computing platform according to claim 6, characterized in that, The power module also includes an energy storage circuit unit for storing electrical energy to power the onboard high-performance computing platform for at least 50ms.

8. The airborne high-performance computing platform according to claim 1, characterized in that, The map card module uses a SATA bus to interact with the system and features a structure that supports quick assembly and disassembly, along with corresponding external connectors, to enable rapid data exchange between the ground preprocessing platform and airborne equipment.

9. The airborne high-performance computing platform according to claim 1, characterized in that, The computing platform uses an SRIO switching network as the backbone network for internal main business communication, enabling chip-level interconnection; it uses an Ethernet interface for data interaction with the environmental perception and safety assurance system; it uses an ARINC429 bus interface for data interaction with the navigation and flight parameter monitoring system; it uses an XGA interface for data interaction with the vision and situational awareness system; it uses an AFDX interface for interoperability with Shanghai Avionics; and it uses a CAN bus as the internal maintenance bus and an Ethernet network as the debugging bus network. It communicates with the helmet display and communication navigation system via RS422 interface; and performs signal simulation, ground inspection and key destruction operations via discrete interface.

10. The airborne high-performance computing platform according to claim 9, characterized in that, During the interconnection process with external systems, the computing platform uses the main control interface module as the time processing center for the time-frequency distribution synchronization function to complete the reception and processing of time sources, time tracing, generation and distribution of B codes, and time quality level evaluation. Time distribution is achieved through the platform's internal LVDS bus connection.

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