Quantum chip state optimization method and device under excessive fusion architecture

Abstract

The invention discloses a quantum chip state optimization method and device under an excess fusion architecture, and relates to the technical field of quantum chip state analysis. According to the method, the type of a to-be-supplemented resource of a current excess fusion architecture is obtained, corresponding excess redundant resources are obtained, and redundancy correction and scheduling cooperative allocation are carried out at the same time; then, quantum gate parameter collaborative adjustment is carried out based on a scheduling collaborative allocation result, and meanwhile, the state of a quantum state task is matched with the state of a calculation link; and finally, based on a state matching result, fusion link optimization is carried out in the operation process of the specified quantum chip, and recovery verification of redundant resource nodes is carried out on the specified quantum chip after fusion link optimization is qualified, so that full-process collaborative management and control of quantum resources under the excessive fusion architecture are realized, and the quantum resource recovery efficiency is improved. The problems of resource scheduling lagging and low parameter collaboration in quantum task execution are effectively solved, and finally stable execution and efficient resource utilization of the quantum task under complex dynamic constraints are guaranteed.

Description

Technical Field

[0001] This invention relates to the field of quantum chip state analysis technology, and in particular to a method and apparatus for optimizing the state of quantum chips under a super-quantum fusion architecture. Background Technology

[0002] The hypercapacitated architecture, through its built-in global redundant resource pool and cross-module collaborative control link, starts with a global state assessment. Leveraging the architecture's data fusion capabilities, it synchronously collects quantum state stability, interaction response efficiency, and error suppression effects. Based on multi-dimensional data, it obtains the chip's global state and identifies the core areas requiring optimization. Subsequently, it enters the resource scheduling phase, activating and optimizing backup computing units, auxiliary calibration nodes, and high-speed data links from the redundant resource pool to meet specific needs. Simultaneously, it smoothly migrates currently running quantum tasks to backup quantum nodes, ensuring the overall chip functionality remains stable during optimization. The core fusion optimization process is achieved through the architecture's collaborative link, dynamically adjusting quantum gate operation logic based on real-time error feedback and optimizing data interaction processes to match the computation rhythm. After optimization, redundant resources are reclaimed to the resource pool for subsequent use, and the optimization parameters and effect data are stored in the architecture's shared database, providing a reference for optimizing similar tasks in the future.

[0003] For example, Chinese invention patent CN118095460B discloses a fusion computing system and method based on a quantum measurement and control board, including: data interaction with a GPU quantum measurement and control board via a PCIe bus; dividing predefined computing tasks into classical computing subtasks and quantum computing subtasks using a preset resource scheduling algorithm, and compiling the quantum computing subtasks into quantum circuits; receiving the quantum circuits and the corresponding pulse sequences transmitted by the CPU, and sending the pulse sequences to the quantum chip for the quantum chip to execute the quantum circuits to complete the quantum computing subtasks.

[0004] For example, Chinese invention patent application CN117592575A discloses a distributed measurement and control device and method for quantum supercomputer fusion computing, including: downloading the measurement and control box sequence to the distributed measurement and control device through a PCIe interface and a DMA controller; outputting the measurement and control waveform sequence to the quantum chip through a digital-to-analog converter; measuring the calculation results of the quantum chip through a second digital-to-analog converter and an analog-to-digital converter; and sending the calculation results to the supercomputer through a PCIe interface and a DMA controller.

[0005] The above-mentioned technology has at least the following technical problems:

[0006] During the execution of quantum tasks, the system is affected by external task scheduling, namely the fragility of quantum states, the finiteness of coherence time, the probabilistic nature of operations, and dynamic task queues. Because the underlying resource management framework needs to handle primitive constraints such as qubit mapping and pulse sequence arrangement in the allocation of computing power, the framework's decision-making response efficiency for rescheduling and remapping is lagging when faced with dynamic resource demand changes triggered by coherence or measurement results during task execution. At this time, when subsequent operations in the task chain have different preceding results due to the probabilistic nature of quantum measurement, and the need to preempt or release specific qubit resources based on the preceding results, the redundant resource scheduling delay due to dynamic resource allocation leads to the problem of low coordination of excess resource scheduling parameters. Summary of the Invention

[0007] To address the technical problem of low coordination of excess resource scheduling parameters in existing technologies, this invention provides a method and apparatus for optimizing the state of a quantum chip under an excess fusion architecture. The technical solution is as follows:

[0008] On the one hand, a method for optimizing the state of a quantum chip under a super-quantum fusion architecture is provided. This method includes: Step 1, obtaining the types of resources to be supplemented in the current super-quantum fusion architecture and the corresponding super-redundant resources, while performing redundancy correction and scheduling collaborative allocation to improve the dynamic load migration rate; Step 2, performing collaborative adjustment of quantum gate parameters based on the scheduling collaborative allocation results to improve the execution accuracy and stability of quantum computing tasks, while matching the quantum state task state with the state of the computing link to reduce the loss of data interaction. The quantum gate parameters include pulse frequency and pulse duration; Step 3, based on the state matching results, performing fusion link optimization during the operation of a specified quantum chip to reduce the data transmission latency during the operation of the specified quantum chip, while verifying the recycling of redundant resource nodes for the specified quantum chip after the fusion link optimization is qualified, so as to improve the recycling rate of quantum resources and the long-term reliability of the system.

[0009] On the other hand, a quantum chip state optimization device under a super-fusion architecture is provided. This device applies a quantum chip state optimization method under a super-fusion architecture. The device includes: a quantum measurement and control detector, a high-speed signal acquisition and analysis instrument, a network traffic monitor, and a quantum error correction analyzer. The quantum measurement and control detector is used to send pulses to the qubits participating in the operation and the auxiliary qubits and obtain the average fidelity of the qubits. The high-speed signal acquisition and analysis instrument is used to capture the electrical signals of the quantum state and monitor the interaction delay time in real time. The network traffic monitor is used to monitor the execution progress and transmission rate of the quantum task in real time. The quantum error correction analyzer is used to monitor the quantum state changes of the qubits in real time and obtain the statistical error rate, and obtain the quantum fidelity curve.

[0010] The beneficial effects of the technical solutions provided in the embodiments of the present invention include at least the following:

[0011] 1. In existing technologies, the coordination between the calibration of redundant resources and the operating status of the main computing unit is low. This solution improves the efficiency and coordination of redundancy correction by classifying resource types based on a reference computing power adaptation benchmark and performing quantitative evaluation of bit average fidelity and dynamic adjustment of preheating parameters. Based on the reference computing power adaptation benchmark of a specified quantum chip, the functional positioning of the currently supplemented resources is clarified, ensuring that the resource type classification is accurately aligned with the real-time needs of the main computing unit, avoiding aimless redundancy resource calls. Secondly, by adjusting the thermal balance coefficient of the interaction link between the main and backup units, the environmental adaptation time between the backup bits and the main unit is shortened. By increasing the horizontal filtering intensity, the signal-to-noise ratio of the backup bit measurement signal is improved, which not only reduces the resource waste caused by calibration, but also allows the backup bits to quickly adapt to the main computing unit status through hierarchical adjustment, improving the activation efficiency of redundant resources. This effectively solves the optimization interruption problem caused by low coordination between calibration and the main unit in existing technologies, laying a stable resource foundation for subsequent dynamic load migration.

[0012] 2. Redundant resource scheduling in quantum tasks is prone to disconnection from interaction link bandwidth and task execution progress, ultimately resulting in high scheduling latency and low coordination. This optimization method achieves deep coordination between resource scheduling and the entire quantum task process through collaborative processing of link bandwidth adaptation for path splitting, task progress adjustment for measurement counts, and dynamic adjustment of measurement time based on error requirements. In the scheduling coordination allocation phase, the quantum state splitting path is dynamically optimized by combining the interaction link bandwidth after the preheating parameters are adjusted. At the same time, the quantum task execution progress is acquired in real time to reduce link load and release resources to support task progress. In the error rate measurement phase, dynamic adjustments are made based on task error requirements. This achieves deep coordination between resource scheduling and the entire quantum task process. Link bandwidth adaptation reduces transmission loss, progress adjustment avoids resource waste, and error requirement adaptation improves error correction efficiency. The three factors work together to reduce the scheduling latency of dynamic load migration and effectively solve the problem of low scheduling coordination in existing technologies.

[0013] 3. In existing technologies, quantum gate parameter correction does not dynamically adjust the type of qubit error in real time. If an error occurs due to energy dissipation but the pulse frequency is adjusted, it will cause frequent repeated parameter tuning and task interruption. This method achieves a dual improvement in error correction capability and task stability by segmenting error types and making targeted parameter adjustments. By accurately segmenting relevant error rates and incoherent error rates, the dominant type of the current error is identified, providing a precise basis for subsequent parameter tuning. At the same time, differentiated adjustments are implemented based on the dominant error type to compensate for the resonant frequency detuning of the qubit and improve the fidelity of the quantum gate. Finally, a quantum gate parameter adjustment verification step is set up to achieve data-driven accurate error correction. The segmentation of error types avoids blind parameter tuning, targeted adjustments improve error correction efficiency, and closed-loop verification ensures the error correction effect. This effectively solves the problems of low error correction efficiency and frequent task interruption in existing technologies, ensuring the stable progress of quantum tasks.

[0014] 4. The current method of evaluating the state of a quantum chip by integrating the link optimization is limited to judging the chip state based on the quantum state fidelity at a certain moment. This results in significant deviations in the optimization direction when capturing the dynamic changes of the quantum state within the task cycle. This solution achieves a unified approach of comprehensive quantization of the chip state and efficient resource utilization through quantum fidelity curve integral evaluation. First, based on the obtained area under the fidelity curve and the effective index of the qubits, it covers both the stability of the quantum state over time and the differences in requirements at different task stages, providing a more comprehensive reflection of the chip's actual operating state. Second, it implements differentiated optimization based on the effective index of the qubits and monitors the trend of index changes in real time during the optimization process to avoid sudden fluctuations. The effective index quantifies the overall performance of the chip, and the dynamic adjustment of redundant nodes balances stability and utilization, effectively solving the problem of uncertain resource input in existing technologies and providing quantitative support for the long-term stable operation of quantum chips. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 This is a schematic diagram of a quantum chip state optimization method under an over-fusion architecture provided by an embodiment of the present invention;

[0017] Figure 2 The flowcharts corresponding to redundancy correction and scheduling collaborative allocation provided in the embodiments of the present invention are as follows;

[0018] Figure 3 A flowchart corresponding to the coordinated adjustment of quantum gate parameters provided in the embodiments of the present invention;

[0019] Figure 4 The flowcharts corresponding to the fusion link optimization and recycling verification provided in the embodiments of the present invention are shown. Detailed Implementation

[0020] The technical solution of the present invention will now be described with reference to the accompanying drawings.

[0021] In embodiments of the present invention, words such as "exemplarily," "for example," etc., are used to indicate that something is an example, illustration, or description. Any embodiment or design described as "exemplary" in the present invention should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of the word "exemplary" is intended to present the concept in a concrete manner. Furthermore, in embodiments of the present invention, the meaning expressed by "and / or" can be both, or either one.

[0022] In this embodiment of the invention, sometimes a subscript such as W1 may be written in a non-subscript form such as W1. When the difference is not emphasized, the meaning they express is the same.

[0023] To make the technical problems, technical solutions and advantages of the present invention clearer, a detailed description will be given below in conjunction with the accompanying drawings and specific embodiments.

[0024] This invention provides a method for optimizing the state of a quantum chip under a super-fusion architecture, such as... Figure 1 The flowchart shown illustrates a quantum chip state optimization method under a super-quantum fusion architecture. The method's processing flow can include the following steps: Step 1: Obtain the types of resources to be supplemented in the current super-quantum fusion architecture and acquire the corresponding super-redundant resources. Simultaneously, perform redundancy correction and scheduling coordination allocation to improve the dynamic load migration rate. Step 2: Based on the scheduling coordination allocation results, perform coordinated adjustment of quantum gate parameters to improve the execution accuracy and stability of quantum computing tasks. Simultaneously, match the quantum state task state with the computing link state to reduce data interaction losses. Quantum gate parameters include pulse frequency and pulse duration. Step 3: Based on the state matching results, optimize the fusion link during the operation of the specified quantum chip to reduce data transmission latency during the specified quantum chip's operation. Simultaneously, verify the redundant resource nodes of the specified quantum chip after successful fusion link optimization to improve the recycling rate of quantum resources and the long-term reliability of the system.

[0025] In this embodiment, when running quantum simulation and batch data processing tasks simultaneously in a quantum computing center, the following method is used: First, the accuracy fluctuations of the main computing unit processing the quantum simulation task are monitored, the types of redundant correction resources that need to be supplemented are accurately identified, and redundancy correction is completed. Simultaneously, resource links for the two tasks are optimized through scheduling and collaborative allocation to prevent the batch task link from crowding out simulation task resources, allowing for smoother migration of dynamic loads between the main and backup units. Next, based on the scheduling results, the quantum gate pulse frequency and duration of the quantum simulation task are adjusted to reduce gate operation errors and improve execution accuracy. At the same time, the quantum states output by the simulation task are precisely matched with the characteristics of the computing link to avoid data interaction losses caused by mismatch between the state and the link. Finally, the fusion link is optimized based on the matching results to further reduce the data transmission latency of the simulation task. After the link optimization is satisfactory, temporarily idle redundant resource nodes are reclaimed and verified. It is confirmed that both tasks can still run stably after reclamation, which improves the recycling efficiency of quantum resources and ensures long-term operational reliability.

[0026] like Figure 2 The flowchart shown is a redundancy correction and scheduling collaborative allocation flowchart provided in an embodiment of the present invention. Redundancy correction is performed based on the obtained average bit fidelity and compared with a preset value. If it is less than the preset value, the prediction parameters are adjusted. Scheduling collaborative adjustment is performed after adjusting the thermal balance waiting time and the horizontal filter intensity. When the obtained value is not less than the preset value, the quantum bit fidelity is determined to be qualified and scheduling collaborative adjustment is performed. After scheduling collaborative adjustment, quantum gate parameters are adjusted, including error rate measurement and quantum gate parameter correction.

[0027] Furthermore, the specific process of redundancy correction is as follows: Based on the reference computing power adaptation benchmark corresponding to the specified quantum chip, the types of resources to be supplemented are divided to obtain the average bit fidelity used to quantize the main computing unit participating in the quantum bit operation process in the hyper-fusion architecture; if the obtained average bit fidelity is less than the preset average bit fidelity, the fidelity of the corresponding quantum bit participating in the operation is determined to be unqualified, and the preheating parameters of the spare quantum bit are adjusted to improve the calibration efficiency of the spare quantum bit. The preheating parameters include thermal equilibrium waiting time and horizontal filtering intensity. The spare quantum bit represents the redundant resources configured in the hyper-fusion architecture to ensure the stable operation of the main computing unit; if the obtained average bit fidelity is not less than the preset average bit fidelity, the fidelity of the corresponding quantum bit participating in the operation is determined to be qualified, and no additional adjustment is required.

[0028] The preheating parameter adjustment includes adjusting the thermal equilibrium waiting time to improve the temperature balance between the qubit and the environment, and adjusting the horizontal filter intensity to improve the signal-to-noise ratio. The thermal equilibrium waiting time adjustment process is as follows: based on the difference between the preset average qubit fidelity and the acquired average qubit fidelity, a corresponding thermal equilibrium coefficient adjustment amount is mapped to shorten the thermal equilibrium waiting time by adjusting the thermal equilibrium coefficient of the interaction link between the spare qubit and the main computing unit. During the thermal equilibrium waiting time adjustment process, the interaction delay time used to quantize the storage computation between the spare qubit and the main computing unit is acquired and compared with the preset interaction delay time. If the interaction delay time is not greater than the preset interaction delay time, the operation of the designated quantum chip in the current thermal equilibrium state continues to be monitored; otherwise, based on the interaction delay time deviation, the thermal equilibrium waiting time is adjusted by the magnitude of the adjusted thermal equilibrium coefficient adjustment amount, and the average qubit fidelity is reacquired. If the reacquired average qubit fidelity is still less than the preset average qubit fidelity, the bit fidelity is optimized by increasing the horizontal filter intensity based on the mapped filter parameter correction value.

[0029] It is important to understand that the specific process of scheduling and collaborative allocation is as follows: On the current interaction link, the quantum task target of the specified quantum chip is obtained, and based on the interaction link bandwidth corresponding to the adjusted preheating parameters, the quantum state splitting paths corresponding to different quantum task targets are adjusted to reduce the transmission loss after quantum state splitting; After the quantum state splitting path is adjusted, the quantum task execution progress corresponding to the current quantum state is obtained. Within a preset monitoring period, if the growth rate of the quantum task execution progress is less than the preset progress growth rate, the number of quantum state redundant measurements in the data link is reduced based on the current progress growth rate deviation; After scheduling and collaborative allocation, quantum gate parameter collaborative adjustment is performed, which includes error rate measurement for obtaining real-time error information and quantum gate parameter correction to reduce real-time errors.

[0030] Specifically, the error rate measurement process is as follows: Based on a pre-set specific quantum error correction code, a corrector is obtained. Then, based on the real-time error data obtained during the decoding and error localization of the corrector, the measurement time of the auxiliary qubit is adjusted. The measurement time is dynamically adjusted according to the needs of the current quantum task. For example, when the quantum task requires a low error rate, the measurement time is reduced by a ratio corresponding to low errors to accelerate the error correction cycle frequency. When the quantum task requires a high error rate, the measurement time is increased by a ratio corresponding to high errors. The specific ratios corresponding to high / low errors are determined through quantitative analysis based on historical error statistics, task complexity, and past measurement performance feedback from similar quantum tasks. This ensures the rationality and relevance of the adjustment strategy, allowing the measurement signal more time to improve the signal-to-noise ratio and thus enhance the efficiency of error information feedback during the error correction process. The auxiliary qubit represents the qubit used to assist the main computing unit in error detection and correction, and does not directly participate in qubit operations. After adjusting the measurement time, the statistical error rate of the real-time error data is calculated, and errors are classified to improve the relevance and efficiency of the auxiliary quantum error correction.

[0031] In this embodiment, the preset average bit fidelity is set by summing and averaging the historical average bit fidelity of the specified quantum chip during its historical operation. The preheating parameter adjustment is based on the fidelity-preheating parameter mapping relationship. This mapping relationship can be used to obtain the adjustment amount of the corresponding thermal balance parameter and the correction value of the filtering parameter. The fidelity-preheating parameter mapping relationship is achieved by fixing the preheating parameter and adjusting another parameter. The average bit fidelity under each parameter combination is collected in real time using a quantum measurement and control detector. Variables such as ambient temperature and electromagnetic interference are recorded simultaneously to eliminate interference. Redundant resources are used to repeat the test to reduce random errors and form a multi-dimensional measured dataset. Subsequently, the data from the same scenario are classified, key parameter intervals are selected through statistical analysis, and the data is fitted and embedded into the super-quantum fusion architecture.

[0032] The preset progress growth rate is obtained by summing and averaging historical values ​​under the same quantum task objective in historical scheduling and collaborative allocation. The progress growth rate deviation is represented by the difference between the obtained growth rate and the progress growth rate. The adjustment of path splitting and the number of redundant quantum state measurements is also carried out within the quantum measurement and control detector. Combining the current quantum task requirements and objectives with the obtained basic deviation (growth rate deviation), the former is adjusted with the real-time bandwidth of the current interaction link as the adjustment direction. If the link bandwidth is sufficient, the path splitting is refined according to the sub-task granularity. If the bandwidth is limited, non-critical paths are simplified to avoid congestion. The latter is adjusted based on the real-time execution progress of the quantum task after path adjustment. The number of repeated quantum state measurements in the data link is reduced proportionally according to the degree of deviation between the two.

[0033] In the redundancy correction stage, the optimization effect is mainly reflected in the dual improvement of the calibration efficiency of the spare qubits and the operational stability of the main computing unit, while achieving a balance between resource replenishment and data interaction efficiency. Resource types are classified based on the reference computing power adaptation benchmark of a specified quantum chip, ensuring that the supplemented redundant resources accurately match the actual needs of the main computing unit, avoiding the waste of calibration resources caused by calling redundant resources, and ensuring that each redundancy correction directly serves to guarantee the computational accuracy of the main unit. Quantitative judgment of the average fidelity of the qubits provides a clear basis for calibration operations, reducing the occupation of system resources by invalid calibration processes. Adjustment of the thermal equilibrium waiting time, by dynamically adjusting the thermal equilibrium coefficient of the interaction link, accelerates the environmental adaptation speed between the spare qubits and the main computing unit, allowing the spare resources to reach a usable state more quickly.

[0034] The optimization effect of the scheduling and collaborative allocation process is mainly reflected in the deep collaboration between resource scheduling and quantum tasks and link states. This reduces transmission loss and resource waste, while improving the targeting of error monitoring and correction, laying the foundation for the efficient execution of quantum tasks. The quantum state splitting path is optimized based on the interactive link bandwidth corresponding to the adjusted preheating parameters, allowing quantum state transmission to fully adapt to the current link's carrying capacity. This avoids transmission congestion or resource idleness that occurs when the fixed splitting path experiences link bandwidth fluctuations, reduces transmission loss after quantum state splitting, and ensures efficient flow of task data within the link. By monitoring the quantum task execution progress and dynamically adjusting the number of quantum state redundancy measurements on the data link, redundant measurements are reduced when task progress is slow to free up link resources, allowing more resources to focus on the task's progress. This avoids excessive measurement dragging down task execution efficiency, achieving a dynamic balance between resource utilization and task progress.

[0035] like Figure 3 The flowchart shown is a flowchart of the coordinated adjustment of quantum gate parameters provided in an embodiment of the present invention. First, error classification is performed, and the error rate interval is classified based on the obtained statistical error rate. When it is in the first interval, the quantum bit error rate is deemed to be qualified. When it is in the second interval, quantum gate parameter correction is performed. When it is in the third interval, quantum bit error warning is performed. Quantum gate parameter correction is performed by obtaining the coherent error rate and the incoherent error rate within the statistical error rate, adjusting the pulse frequency and pulse duration, and verifying the quantum gate parameters after adjustment. Finally, the quantum state task state and the computing link are matched.

[0036] Furthermore, the specific error classification process is as follows: if the obtained statistical error rate is within the first statistical error rate interval, it indicates that the error rate of the qubit is acceptable and no additional adjustment is required; if the obtained statistical error rate is within the second statistical error rate interval, it indicates that the error rate of the qubit is unacceptable and quantum gate parameter correction is performed; if the obtained statistical error rate is within the third statistical error rate interval, a qubit error warning is issued to prompt the designated personnel to inspect the current qubit; the urgency of the first, second, and third statistical error rate intervals increases sequentially, and the sum of the values ​​corresponding to the three intervals is 1.

[0037] Specifically, the quantum gate parameter correction process is as follows: the obtained statistical error rate is input into the mapping relationship between pulse parameters and statistical error rates stored in the supersonic fusion architecture to obtain the coherent error rate and incoherent error rate that are adapted to the current error state; the coherent error rate represents the probability of errors occurring in the auxiliary quantum bit due to resonant frequency detuning, phase drift and other coherent characteristics of the quantum state itself, while the incoherent error rate represents the probability of errors occurring in the auxiliary quantum bit due to external interference with the coherence of the quantum state, such as energy dissipation and environmental noise.

[0038] If the incoherent error rate is greater than the coherent error rate, it indicates that the current error state is dominated by the incoherent error rate. Based on the acquired incoherent error rate, the duration of the laser pulse for the quantum gate is adjusted to reduce the mutation rate caused by the operation of the quantum gate by extending the pulse duration, thereby improving the fidelity of the quantum gate. If the coherent error rate is greater than the incoherent error rate, it indicates that the current error state is dominated by the coherent error rate. Based on the acquired coherent error rate, the pulse frequency of the quantum gate is adjusted to compensate for the resonant frequency detuning of the qubits and reduce repeated execution caused by gate errors. If the coherent error rate is equal to the incoherent error rate, both the pulse duration and pulse frequency are adjusted simultaneously. The coherent error rate, incoherent error rate, and statistical error rate are reacquired, and the quantum gate parameters are adjusted and verified to ensure the stable execution of the quantum task target corresponding to the specified quantum chip.

[0039] The quantum gate parameter adjustment and verification process is as follows: If the re-acquired statistical error rate is within the first statistical error rate interval, it indicates that the quantum gate parameter correction is complete, and the quantum state task state and computation link are matched. If the re-acquired statistical error rate is still within the second statistical error rate interval, the coherent error rate and incoherent error rate are determined: If the dominant relationship of the current error state has not changed, the adjustment range of the corresponding quantum gate parameter is increased based on the error rate value corresponding to the error type of the current error state; if the dominant relationship of the current error state has changed, the parameter adjustment strategy corresponding to the new dominant error type is switched, and the quantum gate parameter is optimized again. The matching of the quantum state task state and computation link is performed as follows: Based on the quantum task target corresponding to the current interaction link, it is determined whether the quantum state output by the corresponding qubit operation meets the current preset matching standard; if it does not meet the current preset matching standard, a secondary redundancy calibration is performed based on the super-fusion architecture call and redundant resources; if it meets the current preset matching standard, the corresponding quantum state task execution state and computation link matching result are synchronously updated in the link state log.

[0040] In this embodiment, the statistical error rate interval is usually preset in conjunction with the current quantum mission objective. For example, in scenarios requiring high precision, the first statistical error rate interval is usually [0.9, 1], the second statistical error rate interval is usually [0.7, 0.9), and the third statistical error rate interval is within [0, 0.7). The mapping relationship between pulse parameters and statistical error rates is stored in the super-quantum fusion architecture. The quantum gate parameters can be adjusted based on the obtained coherent and incoherent error rates. Specifically, in the chip operating environment, other variables are fixed, and multiple sets of pulse parameter combinations are generated by adjusting the pulse frequency and duration of the quantum gate. The statistical error rate under each set of parameters is measured in real time using auxiliary qubits, and the coherent and incoherent error rates are decomposed by decoding with a preset quantum error correction code. Repeated tests are performed to form a dataset covering different pulse parameters and corresponding error rates. Statistical analysis is performed based on the dataset and embedded into the super-quantum fusion architecture to form the mapping relationship.

[0041] Optimization of error classification and quantum gate parameter correction improves the reliability of quantum gate operation through error diagnosis and targeted parameter tuning, reducing error interference during task execution at its source. Dividing the statistical error rate into intervals of different urgency levels allows for rapid identification of error levels. Extending the laser pulse duration when incoherent errors dominate reduces the quantum gate operation mutation rate and mitigates the interference of energy dissipation on the quantum state. Adjusting the pulse frequency when coherent errors dominate compensates for resonant frequency detuning and reduces gate operation deviations caused by phase drift. This improves quantum gate fidelity, reducing quantum state collapse or task duplication caused by gate operation errors, while ensuring that each parameter adjustment focuses on the root cause of the error, guaranteeing the stable progress of the quantum mission as intended and avoiding resource waste.

[0042] Parameter adjustment verification and link matching form a closed-loop guarantee, reassessing the error rate and error dominance to ensure the effectiveness of parameter adjustments. Link matching is based on customized standards for quantum task objectives. High-fidelity tasks can adopt stricter matching requirements, while ordinary tasks focus on efficiency adaptation, satisfying the accuracy or timeliness requirements of different tasks while avoiding resource waste under a uniform standard. When the standard is not met, redundant resources are used for secondary calibration without interrupting the task, reducing data exchange losses. At the same time, the matching results are synchronously updated to the link log, providing a reference for subsequent similar tasks, supporting continuous system optimization, further reducing data transmission latency, improving the efficiency of quantum resource recycling, and enhancing the long-term reliability of the system.

[0043] like Figure 4 The diagram shows a flowchart of the redundancy correction and scheduling collaborative allocation provided in this embodiment of the invention. The process involves optimizing the fusion link by comparing the obtained effective qubit index with a preset value. If the obtained value is less than the preset value, the number of redundant nodes is adjusted, and a recycling verification is performed after the adjustment. If the value is greater than the preset value, recycling verification is performed. If the value is equal to the preset value, no adjustment is made, and the effective qubit index is continuously monitored. The recycling verification step involves conducting a simulated recycling test and, based on the results of the simulated recycling test, performing recycling with a preset gradient, a recycling gradient reduction mode, and pausing the recycling operation.

[0044] Furthermore, the fusion link optimization process is as follows: Within the total operating cycle of the specified quantum chip, the quantum fidelity curves of the qubits in the main computing unit at each time node are retrieved and integrated to obtain the area of ​​the quantum fidelity curve. This area is then averaged with the total operating cycle of the quantum task to obtain the effective index of the qubits. The quantum fidelity curve is represented as the product of the instantaneous quantum fidelity and the fidelity weighting factor. The fidelity weighting factor is used to highlight the differentiated fidelity requirements at different stages of the quantum task. If the obtained effective index of the qubits is equal to the preset effective index of the qubits, it indicates the current operating state of the specified quantum chip. The system is in a critically stable state, and the changing trend of the effective index of the qubits continues to be monitored. If the obtained effective index of the qubits is greater than the preset effective index of the qubits, the system will perform recycling verification based on the available redundant nodes in the super-fusion architecture. Otherwise, the number of redundant correction nodes will be adjusted based on the deviation of the obtained effective index of the qubits to reduce the impact of random noise. After the number adjustment, recycling verification will be performed. If no available redundant nodes are detected in the super-fusion architecture, the system will prompt the triggering of the emergency resource scheduling mechanism of the super-fusion architecture to retrieve idle redundant nodes from the backup resource pool to supplement the correction node group, ensuring that the recycling verification process proceeds normally.

[0045] The specific process of recycling verification is as follows: A simulated recycling test is conducted based on the screening constraints of available redundant nodes. The screening constraints indicate that available redundant nodes have not participated in the quantum task and the corresponding error correction rate is greater than the correction rate of the redundant nodes. The simulated recycling test involves: re-acquiring the effective index of the qubits with a preset number of measurements. If the re-acquired effective index of the qubits is greater than the preset effective index, it indicates that the fidelity of the corresponding qubits is stable after the simulated recycling test; otherwise, it prompts a switch to another available redundant node that meets the screening constraints for retesting. After retesting, available redundant nodes are recycled using a preset recycling gradient. If the effective index of the qubits obtained at this time is greater than the effective index of the qubits before the simulated recycling test, but less than the preset effective index, it indicates that the recycling verification is effective and the current recycling gradient is reduced to avoid imbalance in the effective index of the qubits due to adjustment. Otherwise, the recycling operation is paused and the recycled redundant nodes are restored to maintain the stable operation of the specified quantum chip.

[0046] In this embodiment, the specific expression for the effective index I of a quantum bit is:

[0047]

[0048] In the formula, T represents the total running cycle of the quantum task, t represents the current time, F(t) represents the instantaneous fidelity at time t (real-time acquisition by nodes in the super-quantum fusion architecture), and α(t) represents the fidelity weighting factor at time t, which is dynamically assigned according to the task logic. For example, α(t) = 1.2 for critical computation steps and α(t) = 0.8 for non-critical steps. This is used to highlight the differentiated fidelity requirements at different stages of the task, making the indicator more in line with actual business scenarios. The core principle of this formula is to combine the instantaneous fidelity with a dynamically changing weighting factor and perform integral averaging over the entire task cycle to obtain a comprehensive performance indicator that reflects the differentiated computational accuracy requirements of the quantum task at different execution stages. It emphasizes the performance under critical computation steps, making the evaluation results more in line with the actual distribution of computational tasks.

[0049] The preset effective index of qubits is a pre-set effective index based on the current quantum mission objective. The adjustment of the number of redundant correction nodes and their recovery gradient is based on the correction node-qubit effective mapping relationship stored in the super-quantum fusion architecture. This mapping relationship is obtained by adjusting the number of redundant correction nodes and the recovery gradient to construct multiple parameter combinations. For each combination, a typical quantum mission is run, and the effective index of qubits in the total cycle is recorded. The redundant resources of the architecture are used to perform repeated tests to reduce the random bias of a single measurement and form an associated dataset. At the same time, the corrected mapping relationship obtained by statistical fitting based on the dataset is embedded into the super-quantum fusion architecture.

[0050] The integrated link optimization achieves comprehensive evaluation and dynamic adaptation of the operating state of a specified quantum chip through the effective index of qubits, which not only ensures the stability of chip operation but also improves resource utilization efficiency. The effective index of qubits is used to quantify the stability of the quantum state and task adaptability of the chip throughout the entire cycle. This dynamic adjustment mechanism allows redundant resources to provide sufficient support when the chip state fluctuates and to release idle resources when the state is stable, avoiding the problems of over-investment or under-investment of resources. This ensures that the quantum chip always maintains a stable state that matches the task requirements during long-term operation, while improving the overall resource utilization efficiency.

[0051] The recycling verification, through screening constraints, simulation testing, and incremental recycling, improves the recycling efficiency of redundant resources while ensuring the stable operation of the specified quantum chip. Screening constraints ensure that the redundant nodes to be recycled are not involved in the current quantum task and that their error correction capabilities meet the standards, eliminating the interference of recycling on task execution from the source. Simulated recycling testing verifies the impact of recycling operations on the chip state by re-acquiring the effective indicators of qubits, avoiding stability fluctuations caused by recycling. The incremental recycling gradient makes the resource release process smoother. This recycling logic not only effectively recycles idle redundant resources but also ensures the stability of chip operation through multi-stage verification, providing support for long-term reliable operation.

[0052] This invention provides a quantum chip state optimization device under a super-quantum fusion architecture, comprising: a quantum measurement and control detector, a high-speed signal acquisition and analysis instrument, a network traffic monitor, and a quantum error correction analyzer; the quantum measurement and control detector is used to send pulses to the qubits participating in the operation and auxiliary qubits and obtain the average fidelity of the qubits; the high-speed signal acquisition and analysis instrument is used to capture the electrical signals of the quantum state and monitor the interaction delay time in real time; the network traffic monitor is used to monitor the execution progress and transmission rate of the quantum task in real time; and the quantum error correction analyzer is used to monitor the quantum state changes of the qubits in real time, obtain the statistical error rate, and acquire the quantum fidelity curve.

[0053] In this embodiment, the quantum measurement and control detector is directly connected to the main computing unit of the quantum chip. Its pulse transmission port is connected to the qubits participating in the operation and the auxiliary qubits, while the receiving port collects the feedback signal after the quantum state collapse to generate the average fidelity data of the qubits and transmits the data to the resource scheduling of the architecture. The input end of the high-speed signal acquisition and analysis instrument is connected to the storage and computing of the quantum chip respectively, capturing the electrical signals when the two interact. At the same time, it obtains the interaction delay duration data through the timing monitoring link. This data is pushed synchronously and used for link state evaluation. The network traffic monitor is connected to the interaction link of the quantum task. One end obtains the quantum task execution progress information, and the other end obtains the data transmission rate. The resulting progress and rate data are linked for feedback scheduling. The quantum error correction analyzer establishes a bidirectional connection with the auxiliary qubits and the quantum measurement and control detector. It receives the quantum state change signal transmitted by the auxiliary qubits to generate a statistical error rate and obtains instantaneous fidelity data from the quantum measurement and control detector. It combines the fidelity weighting factor to generate a quantum fidelity curve and finally summarizes the error rate and curve data. The data from other devices are used to support the optimization decision of the quantum chip state.

[0054] The above embodiments can be implemented, in whole or in part, by software, hardware (such as circuits), firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented, in whole or in part, as a computer program product. A computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, all or part of the flow or function according to the embodiments of the present invention is generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. Computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., infrared, wireless, microwave, etc.) means. A computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more sets of available media. Available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media. Semiconductor media can be solid-state drives.

[0055] It should be understood that the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. A and B can be singular or plural. Additionally, the character " / " in this article generally indicates an "or" relationship between the preceding and following related objects, but it can also represent an "and / or" relationship. Please refer to the context for a more accurate understanding.

[0056] In this invention, "at least one" means one or more, and "more than one" means two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of a single item or a plurality of items. For example, at least one of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be a single item or multiple items.

[0057] It should be understood that, in various embodiments of the present invention, the order of the above-mentioned process numbers does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0058] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0059] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the devices, apparatuses, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0060] In the embodiments provided by this invention, it should be understood that the disclosed devices, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0061] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0062] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0063] If the functionality is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0064] The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A method for optimizing the state of a quantum chip under a super-fusion architecture, characterized in that, Includes the following steps: Step 1: Obtain the types of resources that need to be supplemented in the current hyperconverged architecture, and obtain the corresponding hyper-redundant resources. At the same time, perform redundancy correction and scheduling coordination to improve the dynamic load migration rate. Step 2: Based on the results of scheduling and collaborative allocation, perform collaborative adjustment of quantum gate parameters to improve the execution accuracy and stability of quantum computing tasks. At the same time, perform matching between the quantum state task state and the computing link state to reduce the loss of data interaction. The quantum gate parameters include pulse frequency and pulse duration. Step 3: Based on the state matching results, perform fusion link optimization during the operation of the specified quantum chip to reduce the data transmission latency during the operation of the specified quantum chip. At the same time, the specified quantum chip that has passed the fusion link optimization is reclaimed and verified by redundant resource nodes to improve the recycling rate of quantum resources and the long-term reliability of the system.

2. The quantum chip state optimization method under a super-fusion architecture as described in claim 1, characterized in that, The redundancy correction process is as follows: Based on the reference computing power adaptation benchmark corresponding to the specified quantum chip, the types of resources to be supplemented are divided to obtain the average bit fidelity of the main computing unit participating in the quantum bit operation process in the hyper-fusion architecture. If the obtained average bit fidelity is less than the preset average bit fidelity, the fidelity of the corresponding qubit participating in the operation is determined to be unqualified, and the preheating parameters of the backup qubit are adjusted to improve the calibration efficiency of the backup qubit. The preheating parameters include thermal equilibrium waiting time and horizontal filtering intensity. The backup qubit represents the redundant resources configured in the super-fusion architecture to ensure the stable operation of the main computing unit. If the obtained average bit fidelity is not less than the preset average bit fidelity, then the fidelity of the corresponding qubit participating in the operation is deemed qualified, and no additional adjustment is required.

3. The quantum chip state optimization method under a super-fusion architecture as described in claim 2, characterized in that, The preheating parameter adjustment includes thermal equilibrium waiting time adjustment to improve the balance between the quantum bit and the ambient temperature, and horizontal filter intensity adjustment to improve the signal-to-noise ratio. The specific process for adjusting the thermal equilibrium waiting time is as follows: Based on the difference between the preset average bit fidelity and the obtained average bit fidelity, the corresponding thermal balance coefficient adjustment amount is mapped to shorten the thermal balance waiting time by adjusting the thermal balance coefficient of the interaction link between the spare quantum bits and the main computing unit. During the adjustment of the thermal equilibrium waiting time, the interaction delay time used for quantizing the storage computation between the spare qubit and the main computing unit is obtained and compared with the preset interaction delay time. If the interaction delay duration is not greater than the preset interaction delay duration, the operation of the specified quantum chip in the current thermal equilibrium state will continue to be monitored. Otherwise, based on the interaction delay duration deviation, the thermal equilibrium waiting time will be adjusted by magnitude based on the adjusted thermal equilibrium coefficient adjustment amount, and the bit average fidelity will be reacquired. If the reacquired bit average fidelity is still less than the preset bit average fidelity, the bit fidelity will be optimized by increasing the horizontal filtering intensity based on the correction value of the filter parameters obtained by mapping.

4. The quantum chip state optimization method under a super-fusion architecture as described in claim 3, characterized in that, The specific process of the scheduling and coordination allocation is as follows: On the current interaction link, the quantum task target of the specified quantum chip is obtained, and based on the interaction link bandwidth corresponding to the adjusted preheating parameters, the quantum state splitting path under different quantum task targets is adjusted to reduce the transmission loss after quantum state splitting. After adjusting the quantum state splitting path, the execution progress of the quantum task corresponding to the current quantum state is obtained. If the growth rate of the quantum task execution progress is less than the preset progress growth rate within the preset monitoring period, the number of quantum state redundant measurements in the data link is reduced based on the current progress growth rate deviation. After scheduling and collaborative allocation, quantum gate parameter collaborative adjustment is performed, which includes error rate measurement for obtaining real-time error information and quantum gate parameter correction to reduce real-time error. The error rate measurement process is as follows: Based on a pre-set specific quantum error correction code, a corrector is obtained, and based on the real-time error data obtained during the decoding and error localization process of the corrector, the measurement time of the auxiliary qubit is adjusted to improve the feedback efficiency of error information obtained during the error correction process. The auxiliary qubit refers to a qubit used to assist the main computing unit in completing error detection and correction, and does not directly participate in qubit operations. After adjusting the measurement time, the statistical error rate of the real-time error data is calculated and the errors are classified to improve the targeting and efficiency of assisted quantum error correction.

5. The quantum chip state optimization method under a super-fusion architecture as described in claim 4, characterized in that, The error classification process is as follows: If the obtained statistical error rate is within the first statistical error rate range, it means that the error rate of the quantum bit is acceptable and no additional adjustment is required. If the obtained statistical error rate is within the second statistical error rate range, it indicates that the error rate of the qubit is unqualified, and the quantum gate parameters need to be corrected. If the obtained statistical error rate is within the third statistical error rate interval, a quantum bit error warning will be issued to prompt the designated personnel to check the current quantum bit. The urgency of the first statistical error rate interval, the second statistical error rate interval, and the third statistical error rate interval increases sequentially.

6. The quantum chip state optimization method under a super-fusion architecture as described in claim 5, characterized in that, The specific process for correcting the quantum gate parameters is as follows: The obtained statistical error rate is input into the mapping relationship between the pulse parameters and the statistical error rate stored in the super-quantum fusion architecture to obtain the coherent error rate and the incoherent error rate adapted to the current error state. The coherence error rate represents the probability of errors occurring related to the coherence properties of the auxiliary qubit and the quantum state, while the incoherence error rate represents the probability of errors occurring where the auxiliary qubit interferes with the coherence of the quantum state. If the incoherent error rate is greater than the coherent error rate, it indicates that the current error state is dominated by the incoherent error rate. Based on the obtained incoherent error rate, the duration of the laser pulse of the quantum gate is adjusted. By extending the pulse duration, the mutation rate caused by the operation of the quantum gate is reduced, thereby improving the fidelity of the quantum gate. If the coherent error rate is greater than the incoherent error rate, it indicates that the current error state is dominated by the coherent error rate. Based on the obtained coherent error rate, the pulse frequency of the quantum gate is adjusted to compensate for the resonant frequency detuning of the quantum bit and reduce repeated execution caused by gate errors. If the coherent error rate equals the incoherent error rate, then the quantum gate parameters are adjusted simultaneously. After adjusting the quantum gate parameters, the coherent error rate, incoherent error rate, and statistical error rate are reacquired, and the quantum gate parameter adjustment is verified to ensure the stable execution of the quantum task target corresponding to the specified quantum chip.

7. The quantum chip state optimization method under a super-fusion architecture as described in claim 6, characterized in that, The specific process for adjusting and verifying the quantum gate parameters is as follows: If the reacquired statistical error rate is within the first statistical error rate range, it indicates that the quantum gate parameter correction is complete, and the quantum state task state and computation link are matched. If the re-acquired statistical error rate is still within the second statistical error rate range, then the coherent error rate and the incoherent error rate are determined as follows: If the dominant relationship of the current error state has not changed, then based on the error rate value corresponding to the error type of the current error state, increase the adjustment range of the corresponding quantum gate parameter; If the dominant relationship of the current error state changes, switch to the parameter adjustment strategy corresponding to the new dominant error type and re-optimize the quantum gate parameters; The specific process of matching the quantum state task state with the computation link is as follows: Based on the quantum task objective corresponding to the current interaction link, it is determined whether the quantum state output by the corresponding qubit operation meets the current preset matching criteria. If the current preset matching criteria are not met, a secondary redundancy calibration will be performed based on the super-converged architecture call and redundant resources; If the current preset matching criteria are met, the corresponding quantum state task execution status and the computation link matching result will be updated synchronously in the link status log.

8. The quantum chip state optimization method under a super-fusion architecture as described in claim 1, characterized in that, The specific process for optimizing the fusion link is as follows: Within the total operating cycle of the specified quantum chip, the quantum fidelity curves of the qubits in the main computing unit at each time node are retrieved and integrated to obtain the area of ​​the quantum fidelity curves. The area of ​​the quantum fidelity curves is then averaged with the total operating cycle of the quantum task to obtain the effective index of the qubits. If the obtained effective index of the qubit is equal to the preset effective index of the qubit, it indicates that the current operating state of the specified quantum chip is in a critical stable state, and the trend of the change of the effective index of the qubit continues to be monitored. If the obtained effective index of qubits is greater than the preset effective index of qubits, the available redundant nodes in the super-quantum fusion architecture are recycled for verification; otherwise, the number of redundant correction node groups is adjusted based on the deviation of the obtained effective index of qubits to reduce the impact of random noise. After the quantity is adjusted, a recycling verification is performed. If no available redundant nodes are detected in the super-converged architecture, the emergency resource scheduling mechanism of the super-converged architecture will be triggered.

9. The quantum chip state optimization method under a super-fusion architecture as described in claim 8, characterized in that, The specific process for the recycling verification is as follows: A simulated recycling test was conducted based on the screening constraint of available redundant nodes, wherein the screening constraint indicates that available redundant nodes did not participate in the quantum task and the corresponding error correction rate is greater than the correction rate of redundant nodes. The simulated recycling test specifically involves: re-acquiring the effective index of the qubit after a preset number of measurements; if the re-acquiring effective index of the qubit is greater than the preset effective index of the qubit, it indicates that the fidelity of the corresponding qubit is stable after the simulated recycling test; otherwise, it prompts to switch to other available redundant nodes that meet the screening constraints for retesting. After retesting, available redundant nodes are recycled with a preset recycling gradient. If the effective index of the qubit obtained at this time is greater than the effective index of the qubit before the simulated recycling test, but less than the preset effective index of the qubit, it means that the recycling verification is effective and the current recycling gradient is reduced to avoid the adjustment causing the effective index of the qubit to become unbalanced. Conversely, if the recycling operation fails, the recycling process is paused and the recycled redundant nodes are restored to maintain the stable operation of the specified quantum chip.

10. A quantum chip state optimization device under a super-fusion architecture, comprising applying the quantum chip state optimization method under a super-fusion architecture as described in any one of claims 1-9, including: Quantum measurement and control detector, high-speed signal acquisition and analysis instrument, network traffic monitor and quantum error correction analyzer; The quantum measurement and control detector is used to send pulses to the qubits participating in the operation and the auxiliary qubits and to obtain the average fidelity of the qubits. The high-speed signal acquisition and analysis instrument is used to capture the electrical signals of the quantum state and monitor the interaction delay time in real time. The network traffic detector is used to monitor the execution progress and transmission rate of quantum tasks in real time. The quantum error correction analyzer is used to monitor the quantum state changes of qubits in real time, obtain the statistical error rate, and acquire the quantum fidelity curve.

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