Silicon wafer defect detection method and system based on visual detection

Abstract

The invention discloses a defect detection method and system for a silicon wafer based on visual inspection, and relates to the technical field of visual inspection, the surface image of the silicon wafer is deeply excavated based on a multi-scale attention mechanism, and the primary defect content of the silicon wafer is subjected to multi-level fusion to output a plurality of primary defect areas; and each primary defect region and the corresponding associated region determine a final defect region in semantic dimension analysis, so that the accuracy of the final defect region is further improved. Performing multi-stage analysis on the plurality of silicon wafer defect characteristics along the gray gradient and the morphological parameters to determine the defect grade of each silicon wafer defect characteristic; according to the technical scheme, the plurality of defect combinations are determined according to the feature form of each silicon wafer defect feature and the corresponding defect level, the corresponding visual report is determined based on the identification of each defect combination, and the defect regulation and control instruction of the silicon wafer is determined along the multi-level iteration of the plurality of visual reports, so that the accuracy of the defect regulation and control instruction of the silicon wafer is improved.

Description

Technical Field

[0001] This invention relates to the field of visual inspection technology, and more particularly to a method and system for defect detection of silicon wafers based on visual inspection. Background Technology

[0002] With the rapid development of the photovoltaic industry, the requirements for the surface quality of silicon wafers are becoming increasingly stringent. Detection of defects on the silicon wafer surface is a crucial step in ensuring cell conversion efficiency and production yield. Currently, automated inspection equipment based on machine vision is widely used in silicon wafer production lines to replace traditional manual visual inspection. However, existing silicon wafer visual inspection technologies typically employ fixed light source layouts and fixed shooting angles. Because current technologies lack real-time perception of the silicon wafer's current orientation and dynamic adaptive adjustment to lighting conditions, they struggle to overcome high reflectivity interference, affecting the accuracy of primary defect areas and resulting in lower accuracy of the final defect areas. This makes it impossible to guarantee the accuracy of defect control commands for the silicon wafer. Summary of the Invention

[0003] The purpose of this invention is to overcome the shortcomings of the prior art. This invention provides a method and system for defect detection of silicon wafers based on visual inspection.

[0004] This invention provides a visual inspection-based defect detection method for silicon wafers, comprising: When the silicon wafer is in the vision inspection station, the high reflectivity area of ​​the silicon wafer in the current posture is marked. Based on each high reflectivity area, the positions of multiple light sources and industrial cameras are adjusted. The industrial cameras take pictures of the silicon wafer to determine the surface image of the silicon wafer. The surface image of the silicon wafer is deeply mined based on a multi-scale attention mechanism, and multi-level fusion is performed on the primary defect content of the silicon wafer to output multiple primary defect regions. Each primary defect region and its corresponding associated region are used to determine the final defect region in the semantic dimension analysis. The final defect area is identified, and multiple silicon wafer defect features are determined during the identification process. These multiple silicon wafer defect features are analyzed at multiple levels along grayscale gradients and morphological parameters to determine the defect level of each silicon wafer defect feature. Multiple defect combinations are determined based on the characteristic morphology and corresponding defect level of each silicon wafer defect. Based on the identification of each defect combination, a corresponding visualization report is determined. The defect control instructions for the silicon wafer are determined through multi-level iteration of multiple visualization reports.

[0005] This invention provides a defect detection system for silicon wafers based on visual inspection. This system is applied to the aforementioned defect detection method for silicon wafers based on visual inspection. The system includes: The surface image module is used to mark the high reflectivity areas of the silicon wafer in its current orientation when the silicon wafer is in the visual inspection station. Based on each high reflectivity area, the position adjustment of multiple light sources and industrial cameras is triggered, and the industrial cameras take pictures of the silicon wafer to determine the surface image of the silicon wafer. The final defect region module is used to perform deep mining of the surface image of the silicon wafer based on a multi-scale attention mechanism, and to perform multi-level fusion on the primary defect content of the silicon wafer to output multiple primary defect regions. Each primary defect region and its corresponding associated region determine the final defect region in the semantic dimension analysis. The defect level module is used to identify the final defect area and determine multiple silicon wafer defect features during the identification process. Multiple silicon wafer defect features are analyzed at multiple levels along grayscale gradient and morphological parameters to determine the defect level of each silicon wafer defect feature. The defect control instruction module is used to determine multiple defect combinations based on the characteristic morphology and corresponding defect level of each silicon wafer defect, determine the corresponding visualization report based on the identification of each defect combination, and determine the defect control instruction of the silicon wafer through multi-level iteration along multiple visualization reports.

[0006] Compared with the prior art, the beneficial effects of the present invention are: (1) When the silicon wafer is in the visual inspection station, the high reflectivity area of ​​the silicon wafer in the current posture is marked. The positions of multiple light sources and industrial cameras are adjusted according to each high reflectivity area. The industrial camera takes pictures of the silicon wafer to determine the surface image of the silicon wafer. The surface image of the silicon wafer is deeply mined based on the multi-scale attention mechanism, and multi-level fusion is performed on the primary defect content of the silicon wafer to output multiple primary defect areas. Each primary defect area and the corresponding associated area determine the final defect area in the semantic dimension analysis. The surface image of the silicon wafer is introduced, and the high reflectivity area of ​​the silicon wafer is overcome, the accuracy of the primary defect area is improved, and the accuracy of the final defect area is further improved.

[0007] (2) The final defect area is identified, and multiple silicon wafer defect features are determined during the identification process. Multiple silicon wafer defect features are analyzed in multiple levels along grayscale gradient and morphological parameters to determine the defect level of each silicon wafer defect feature. Multiple defect combinations are determined based on the characteristic morphology and corresponding defect level of each silicon wafer defect feature. Based on the identification of each defect combination, the corresponding visualization report is determined. The defect control instructions of the silicon wafer are determined along the multiple levels of the visualization reports. The defect level of each silicon wafer defect feature is quantified, and the multiple levels of the visualization reports are realized, which improves the accuracy of the defect control instructions of the silicon wafer. Attached Figure Description

[0008] Figure 1This is a schematic flowchart of a vision-based defect detection method for silicon wafers according to an embodiment of the present invention. Figure 2 This is a flowchart illustrating step S11 of the defect detection method for silicon wafers based on visual inspection in an embodiment of the present invention. Figure 3 This is a flowchart illustrating step S12 of the defect detection method for silicon wafers based on visual inspection in an embodiment of the present invention. Figure 4 This is a flowchart illustrating step S13 of the defect detection method for silicon wafers based on visual inspection in an embodiment of the present invention. Figure 5 This is a flowchart illustrating step S14 of the defect detection method for silicon wafers based on visual inspection in an embodiment of the present invention. Figure 6 This is a schematic diagram of the structural composition of a silicon wafer defect detection system based on visual inspection in an embodiment of the present invention. Detailed Implementation

[0009] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

[0010] Please see Figures 1 to 6 A vision-based defect detection method for silicon wafers is proposed and applied to vision inspection scenarios. The vision-based defect detection method for silicon wafers includes: Step S11: When the silicon wafer is in the vision inspection station, mark the high reflectivity area of ​​the silicon wafer in the current posture, and trigger the position adjustment of multiple light sources and industrial cameras according to each high reflectivity area. The industrial camera takes a picture of the silicon wafer to determine the surface image of the silicon wafer. Step S12: The surface image of the silicon wafer is deeply mined based on a multi-scale attention mechanism, and multi-level fusion is performed on the primary defect content of the silicon wafer to output multiple primary defect regions. Each primary defect region and its corresponding associated region determine the final defect region in the semantic dimension analysis. Step S13: Perform region identification on the final defect area, and identify multiple silicon wafer defect features during the identification process. Perform multi-level analysis on multiple silicon wafer defect features along grayscale gradient and morphological parameters to determine the defect level of each silicon wafer defect feature. Step S14: Determine multiple defect combinations based on the characteristic morphology and corresponding defect level of each silicon wafer defect feature, determine the corresponding visualization report based on the identification of each defect combination, and determine the defect control instructions for the silicon wafer through multi-level iteration along multiple visualization reports.

[0011] refer to Figure 2 In step S11, the specific steps are as follows: S111: When the silicon wafer is transferred to the vision inspection station, the current posture of the silicon wafer is collected, and the surface of the silicon wafer under the current posture is reconstructed in three dimensions by laser line scanning. The high reflective area of ​​the silicon wafer surface is constructed in real time. At the same time, the corresponding virtual space is determined according to the inspection environment of the vision inspection station and the surface characteristics of the silicon wafer. In the virtual space, the optical path is reversed and calculated for the high reflective area to generate the optimal control command for multi-axis linkage in real time. S112: Based on the optimal control command, the position adjustment of multiple light sources and industrial cameras is triggered. The incident vector of multiple light sources is dynamically adjusted through the aspherical lens group, and the shooting position and polarization angle of the industrial camera are combined for calibration to construct a dynamic heterogeneous light field that can adaptively suppress specular reflection. The industrial camera performs spatiotemporal multi-frame synthesis shooting in the environment of this dynamic heterogeneous light field, and fuses image details under different lighting conditions through time-sharing exposure to determine the surface image of the silicon wafer.

[0012] In the embodiments of this application, when the silicon wafer is transferred to the vision inspection station, the current posture of the silicon wafer is acquired, and the surface of the silicon wafer in the current posture is reconstructed in three dimensions by laser line scanning. The highly reflective area of ​​the silicon wafer surface is constructed in real time. At the same time, the corresponding virtual space is determined according to the inspection environment of the vision inspection station and the surface characteristics of the silicon wafer. In the virtual space, the optical path is reverse-engineered for the highly reflective area to generate the optimal control command for multi-axis linkage in real time. This takes into account the overall consideration of the inspection environment of the vision inspection station and the surface characteristics of the silicon wafer, and ensures the accuracy of the corresponding virtual space.

[0013] At this point, when the silicon wafer arrives at the inspection station via the conveyor belt or robot, the system uses external sensors (such as encoder feedback, visual positioning Mark points) or preliminary visual positioning to obtain the coarse pose of the silicon wafer in six degrees of freedom (6DOF). This includes the X, Y, and Z coordinates of the silicon wafer center, as well as the rotation angles (yaw, pitch, roll) around the X, Y, and Z axes.

[0014] The system starts a line laser scanner, projecting a high-energy laser line onto the silicon wafer surface. Using the principle of laser triangulation, an industrial camera captures the deformation of the laser line on the silicon wafer surface from another angle. As the silicon wafer moves (or the laser head moves), the system continuously acquires multiple frames of images. Through extraction from the center of the light stripe and parameter conversion, high-density three-dimensional point cloud data of the silicon wafer surface is reconstructed in real time. For objects like silicon wafers with specific micro-textures (such as textured surfaces) or surface warping, three-dimensional reconstruction can accurately capture the geometric undulations and normal directions of its surface.

[0015] Based on the reconstructed 3D point cloud data, the system calculates the normal vector of each surface micro-element; combined with the known position of the industrial camera and the initial light source position, it performs geometric calculations using the law of reflection (the angle of incidence equals the angle of reflection); the system determines which surface micro-element normal directions will reflect the incident light into the camera lens field of view; point cloud regions that meet this condition are marked as "high reflectivity regions".

[0016] The system constructs a "virtual space" in the computer that is completely mapped to the physical inspection station. This space not only contains a three-dimensional digital model of the silicon wafer, but also loads the constraint parameters of the inspection environment, such as the range of motion of the robotic arm, the degree of freedom of movement of the light source, the field of view limitation of the camera, and the physical occlusion relationship.

[0017] In the virtual space, the target constraint is set as "the light intensity received by the camera is moderate and there is no specular reflection". Starting from the camera receiver, the optimal incident vector direction of the light source is determined by tracing back along the light path. The system will traverse the position and angle combinations of the light source to find a configuration that causes the reflected light to deviate from the camera lens when the light is projected onto the highly reflective area marked S113, or to enter the lens using diffuse reflection. The theoretical positions and angles in the virtual space obtained by the reverse calculation are converted into control signals for motion actuators in the physical world. These instructions include: the joint angles of the light source robotic arm (servo motor positions), the focusing distance of the aspherical lens group, and the displacement of the camera fine-tuning platform involved. All motion axes must meet time synchronization (multi-axis linkage) to ensure that the light path is exactly in the preset state at the moment of shooting.

[0018] Specifically, on the silicon wafer sorting line, the silicon wafer surface has undergone texturing to present a pyramidal microstructure. Due to the thinning characteristics, the silicon wafer exhibits random slight warping and angular deflection on the conveyor belt. When the silicon wafer stops at the workstation, the vision positioning system instantly detects that the center of the silicon wafer has shifted to the right by 2mm, and that there is a 1.5-degree counterclockwise rotation along the long side of the silicon wafer. The system immediately locks onto this non-standard posture. The line laser is activated and scans along the radial direction of the silicon wafer. The system finds that due to the release of internal stress, the right edge of the silicon wafer exhibits an upward slight warping (height difference of about 0.5mm), and the pyramidal textured surface is uneven. These details are converted into a three-dimensional point cloud model in real time.

[0019] The results showed that due to the slight warping of the silicon wafer, the normal direction of the pyramid slope in the upper right corner was exactly aligned with the ring light source at the top. If the image were taken at this time, a strong mirror spot would be formed in the upper right corner, covering up the "scratches" in the area. The system marked this area as a high-reflectivity risk zone in real time.

[0020] In the virtual space, the system loads the travel limits of the robotic arm; for the highly reflective area in the upper right corner, the optical path inverse calculation algorithm begins to calculate: to eliminate the reflection without moving the camera, the top ring light must be deflected, or the side strip light must be used for supplementary lighting and suppress the main light; the system calculates the optimal solution: deflect the top light source 10 degrees to the left and adjust the incident height of the left strip light to illuminate the warped area with oblique light; at the same time, based on the inverse calculation result, the system sends multi-axis linkage commands to the motion control system: command A: control the rotation axis of the top light source gimbal to deflect 10 degrees to the left; command B: control the lifting axis of the left strip light source to rise 5mm. This series of commands is sent within tens of milliseconds to ensure that the optical path has been adjusted before the camera shutter opens, so that the upper right corner area, which would have been overexposed, becomes a diffuse reflection area that can be clearly imaged.

[0021] Therefore, based on the optimal control command, the positions of multiple light sources and industrial cameras are adjusted. The incident vectors of multiple light sources are dynamically adjusted through an aspherical lens group, and the shooting position and polarization angle of the industrial camera are calibrated to construct a dynamic heterogeneous light field that can adaptively suppress specular reflection. The industrial camera performs spatiotemporal multi-frame synthesis shooting in this dynamic heterogeneous light field environment, and the image details under different lighting conditions are fused through time-sharing exposure to determine the surface image of the silicon wafer, thus introducing the surface image of the silicon wafer.

[0022] At this point, the system receives the optimal control command generated by S111 and triggers the multi-axis motion system. The light source, camera, and the mounted adjustment platform then perform precise spatial displacement according to the coordinate parameters in the command. The core of this step lies in the "response speed" and "positioning accuracy" to ensure that the optical element can accurately reach the predetermined physical position in the extremely short time it takes for the silicon wafer to pass through the detection window.

[0023] Once the light source reaches the designated position, the precision adjustment mechanism inside the optical system begins to work. By driving the lens elements inside the aspherical lens group, it changes the propagation path and focusing characteristics of the light beam. Here, the "incident vector" adjustment refers to the precise control of the angle and energy density distribution of the light beam hitting the silicon wafer surface. The application of aspherical lenses can eliminate spherical aberration, ensuring that even at the edge of the field of view, the light can hit the micro-texture of the silicon wafer with a predetermined precise vector, rather than being randomly scattered.

[0024] On the one hand, the position of the industrial camera is fine-tuned to ensure that the depth of field covers the silicon wafer surface; on the other hand, the focus is on polarization angle calibration. After the light emitted by the light source passes through the polarizer and illuminates the silicon wafer surface, its reflected component (specular reflection) usually maintains a specific polarization direction, while the polarization direction of the scattered component (diffuse reflection, which carries defect information) will depolarize or rotate. The analyzer at the camera end is calibrated to be perpendicular (orthogonal) to the polarization direction of the reflected light, thereby physically blocking the high-intensity specular reflection light and allowing only the diffuse reflection light that can reflect surface defects to pass through.

[0025] Through the above adjustments, a special illumination field—a dynamic heterogeneous light field—is formed on the silicon wafer surface. "Dynamic" means that the light field parameters change in real time with the orientation of the silicon wafer. "Heterogeneous" means that the light field distribution is non-uniform and optimized for specific areas. For example, there is uniform diffuse light in the flat area of ​​the silicon wafer, while there is high-angle grazing light in the warped edge area. This light field can adaptively suppress local specular reflections caused by geometric deformation of the silicon wafer surface (such as warping and bending), ensuring the consistency of the contrast of the entire image.

[0026] Industrial cameras perform "spatiotemporal multi-frame synthesis" under dynamic heterogeneous light fields using extremely short time windows. In several consecutively captured frames, the light field state or exposure parameters are different. For example, the first frame uses light at a specific angle to highlight scratches, while the second frame uses light at another angle to highlight particles. These frame images under different lighting conditions are registered and fused. Long exposure frames preserve dark details, while short exposure frames preserve bright textures. Finally, they are fused into a high-fidelity image of the silicon wafer surface that is free from overexposure and reflection interference and contains complete defect details, thus completing image determination.

[0027] Specifically, based on optimal control instructions, the system quickly controls the robotic arm to move the right auxiliary light source to the calculated "optimal fill light position." At the same time, the gimbal carrying the industrial camera performs micron-level Z-axis lifting and lowering to ensure that the lens focal plane falls precisely on the center surface of the silicon wafer's undulations. The aspherical lens group inside the right light source is activated, adjusting the originally divergent beam into a converging "blade beam." The incident vector of this beam is strictly set to an angle tangent to the right warped area of ​​the silicon wafer. This precise vector adjustment ensures that the light can "sweep" across the surface texture of the warped area, rather than being directly reflected back to the lens.

[0028] The motorized polarizer at the front of the industrial camera rotates rapidly to a 135-degree angle. This angle is calibrated to filter out the intense glare on the silicon wafer surface caused by polygrain boundaries or smooth areas to the maximum extent. At this moment, the originally glaring white spot in the field of view darkens instantly, revealing the background details that were previously obscured. The silicon wafer is now in a composite light field: the top is the main illumination light, providing overall brightness; the right side is a special light for the warped area. This light field is "heterogeneous" because the illumination characteristics of different areas are different; it is also "dynamic" because it is specifically generated for the warped state of this silicon wafer. This light field successfully suppresses all highly reflective points that could cause misjudgment.

[0029] An industrial camera captures two frames in 10 milliseconds: the first frame, under special light from the right, shows a tiny microcrack at the edge of the silicon wafer that is elongated due to the light and shadow effect and becomes clearly visible; the second frame, under top light, shows a clear and sharp grid structure in the center of the silicon wafer without overexposure; these two images are then fused together, and the edge details of the first frame and the center structure of the second frame are taken to output a perfect, non-reflective image of the silicon wafer surface.

[0030] refer to Figure 3 In step S12, the specific steps are as follows: S121: Input the surface image of the silicon wafer into the deep feature extraction network and output multiple image features. Use a multi-scale attention mechanism to perform deep mining of the image features. Combine the texture and gradient changes of the image features with the primary defect content of the silicon wafer for multi-level fusion. During the multi-level fusion process, determine multiple primary defect regions step by step. S122: Combine each primary defect region with a semantic-appearance dual-discrimination segmentation network, and deeply analyze the appearance defect content of each primary defect region and its surrounding related regions in the semantic dimension. Determine the final defect region based on the appearance defect content and the defect impact content of the corresponding related regions.

[0031] In the embodiments of this application, the surface image of the silicon wafer is input into a deep feature extraction network, which outputs multiple image features. A multi-scale attention mechanism is used to perform deep mining of the image features. The texture and gradient changes of the image features are combined with the primary defect content of the silicon wafer for multi-level fusion. During the multi-level fusion process, multiple primary defect regions are determined step by step, which is compatible with the overall consideration of step by step in the multi-level fusion process and ensures the accuracy of multiple primary defect regions.

[0032] At this point, the preprocessed silicon wafer surface image generated by S11 is input into the feature extraction backbone network based on convolutional neural network (CNN). The network extracts feature maps of different levels of abstraction from the image through multi-layer convolution operations. The shallow network preserves the geometric details of the image (such as edges and corners), while the deep network extracts semantic information (such as defect shapes and category concepts). Finally, a set of high-dimensional feature tensors is output, covering all information from micro-texture to macro-structure.

[0033] Silicon wafer defects vary greatly in size, ranging from tiny "perforations" to long "scratches". Therefore, a multi-scale mechanism (such as Feature Pyramid Network) is introduced to detect defects on feature maps of different resolutions. At the same time, attention modules (such as Channel Attention SE-Block or Spatial Attention CBAM) are embedded. The network automatically learns weights, suppresses responses to the background (such as uniform texturing texture), and significantly enhances the activation of features in abnormal regions.

[0034] While performing deep feature mining, the system extracts the physical features of the image in parallel—texture and gradient. Texture variation: using Local Binary Pattern (LBP) or Gabor filter response, the regularity of the texturing structure on the silicon wafer surface is analyzed. Defects often disrupt this regularity, causing texture breaks or abrupt changes. Gradient variation: the gray-level gradient of the image is calculated to capture areas of sharp jumps in pixel values. For silicon wafers, defect edges are usually accompanied by significant gradient changes.

[0035] By splicing or weighting the semantic features, multi-scale features, and texture / gradient features obtained from deep mining and physical calculations at the channel dimension, this multi-level fusion strategy makes up for the shortcomings of single features: deep features understand "semantics" and physical features understand "details". The fused feature vector contains both the recognition of defect categories and precise edge positioning information. Through fusion, the system forms a complete description of the "primary defect content of silicon wafers", providing a high-confidence feature basis for subsequent region generation.

[0036] During the fusion process, region proposal is carried out step by step. The rough location of large defects is located on the low-resolution feature map, and then the boundary is finely corrected and small defects are detected on the high-resolution feature map. By setting a dynamic threshold, activation mapping is performed on the fused feature map to generate a series of candidate boxes, and background areas with low confidence are removed. Finally, multiple "primary defect regions" are output.

[0037] Specifically, a silicon wafer on the testing stage has a typical pyramidal textured surface and is printed with fine grid lines; there is an extremely fine "hidden crack" in the lower left corner of the silicon wafer and a "chipped edge" in the upper right corner; the silicon wafer image is input into the network; the shallow convolution of the network keenly captures the microscopic graininess of the pyramidal textured surface and the straight line features of the grid lines; the deep convolution abstracts the overall geometric outline.

[0038] For large-scale geometric distortions like the chipped edge in the upper right corner, the network assigns high weights to the low-scale feature map. For the tiny crack in the lower left corner, the network highlights it from the background by focusing on local pixels in the high-scale feature map. In the lower left corner, gradient analysis reveals an extremely narrow "misalignment band" in the pyramid texture, with the grayscale gradient exhibiting abrupt positive and negative jumps. In the upper right corner, texture analysis detects that the edges of straight lines that should be continuous suddenly break, and the texture direction changes drastically. These physical evidences are marked as strong anomalous signals.

[0039] The system powerfully fuses the "deep semantic features (suspected crack)" and "gradient jump features" in the lower left corner to confirm that the anomaly is physically destructive; at the same time, it fuses the "semantic features (edge ​​defects)" and "texture interruption features" in the upper right corner; at this point, the feature vector intensity of these two regions far exceeds the background noise; based on the fused high-response features, the network begins to draw bounding boxes step by step; coarse localization: first, a small square area in the lower left corner is drawn; fine correction: based on the high-resolution features, the bounding box is shrunk to accurately match the direction of the fine crack; output: finally, two "primary defect regions" (ROI 1 and ROI 2) are output.

[0040] Furthermore, each primary defect region is combined with a semantic-appearance dual-discrimination segmentation network, and the semantic appearance defect content of each primary defect region and its surrounding associated regions is deeply analyzed. The final defect region is determined based on the appearance defect content and the defect impact content of the corresponding associated regions. This approach takes into account the overall consideration of the appearance defect content and the defect impact content of the corresponding associated regions, ensuring the accuracy of the final defect region. At the same time, the surface image of the silicon wafer is introduced, and the high reflectivity of the silicon wafer is overcome, which improves the accuracy of the primary defect region and further improves the accuracy of the final defect region.

[0041] At this point, all primary defect regions (ROIs) generated in stage S121 are cropped and standardized, and then input into a pre-trained "semantic-appearance dual-discrimination segmentation network". This network typically adopts a two-stream architecture: appearance stream: focuses on pixel-level features (color, texture, edges) within the region; semantic stream: focuses on the contextual relationship between the region and its surrounding environment (structural logic, physical coherence).

[0042] The appearance flow branch performs deep feature deconstruction on pixels within the primary defect region; analyzes whether the texture within the region conforms to the physical properties of typical defects; for example, edge chipping usually manifests as a rough texture of material peeling off, while scratches manifest as a smooth cut with strong directionality; at the same time, it calculates the gray-level distribution statistics within the region; for silicon wafers, microcracks usually manifest as linear gray-level extremely low values ​​(dark lines), while oil stains manifest as blurry gray-level patches.

[0043] The semantic flow branch expands the scope to the "associated region" surrounding the primary defect area, which is the key to discrimination. The core is to detect the "physical impact" of the defect on the surrounding environment. Real physical damage (such as cracks and microcracks) often destroys the internal structure of the material, causing slight changes in the optical refractive index of the surrounding area, or manifesting as subtle texture distortion (stress lines) in the image. The system analyzes whether the structural logic of the surrounding area is interrupted. For example, whether the grid lines are broken at the defect, or whether the pyramidal texture of the surface is misaligned at the edge of the defect. By analyzing the "associated region", the system can distinguish between "surface attachments" (such as dust, with continuous texture below and no physical impact) and "body damage" (such as cracks, with misaligned texture below and physical stress impact).

[0044] The network performs a weighted fusion of the "appearance defect confidence" output from the appearance stream and the "defect impact confidence" output from the semantic stream. The discrimination logic is as follows: if the appearance looks like a defect and there is physical influence around it, it is judged as a real defect, preserved and its boundaries are refined; if the appearance looks like a defect but there is no physical influence around it (texture continuous coverage), it is judged as an artifact / foreign object (such as dirt or water stains) and discarded; if the appearance does not look like a defect, it is directly discarded. The regions that pass the discrimination are segmented at the pixel level, edge noise is removed, and a high-precision "final defect region" coordinate set is output.

[0045] Specifically, after processing by S121, the silicon wafer image outputs two primary defect regions: Region A (a thin line located in the center of the silicon wafer) and Region B (a black spot located on the edge of the silicon wafer). For Region A (the thin line): appearance branch analysis revealed that the pixels inside this region are elongated, with extremely low gray values, sharp edges, and strong directionality; the appearance characteristics highly match the physical properties of "hidden cracks" or "scratches". For Region B (the black spot): appearance branch analysis revealed that the pixels inside this region are irregularly clustered, with uniformly low gray values ​​and slightly blurred edges; the appearance characteristics resemble a "dirt spot" or a "dark area caused by uneven lighting".

[0046] For the associated regions of region A: the semantic branch conducts an in-depth analysis of the associated regions around the thin line; it is found that the originally uniformly arranged "pyramid" texturing structure on both sides of the thin line has a slight misalignment, and half-bright and half-dark "stress lines" caused by lattice stress are faintly visible on both sides of the line; conclusion: this region has a significant physical impact on the surrounding structure.

[0047] Regarding the associated regions of region B: Semantic branch analysis of the associated regions around the black spot revealed that the pyramid texture beneath the black spot was clearly visible, and the texture arrangement direction was consistent, passing under the black spot without any interruption or distortion. This indicates that the black spot is merely a layer of covering on the surface and has not damaged the silicon wafer structure. Conclusion: This region has no physical impact on the surrounding structure.

[0048] Meanwhile, for region A: appearance (conforming to microcrack characteristics) + impact (stress lines present) = double pass; the system determines it as a real defect; the segmentation network performs fine segmentation of the line, removes surrounding noise, and outputs the precise final defect area of ​​"microcrack"; for region B: appearance (suspected defect) + impact (no structural damage, continuous texture) = semantic fail; the system determines it to be surface dust or stains, not a material defect of the silicon wafer itself, and therefore removes it, not as the final defect output; the system successfully filtered out non-destructive surface dirt, accurately locked the microcrack defect with physical hazards, and ensured the accuracy of the defect level determination in the subsequent S13 step.

[0049] refer to Figure 4 In step S13, the specific steps are as follows: S131: Perform sub-pixel-level analysis on the final defect area and extract multiple corresponding geometric features, fractal dimension features and texture features. Construct a corresponding high-dimensional description vector of silicon wafer defects based on multiple geometric features, fractal dimension features and texture features. Determine the corresponding defect details based on the recognition of the high-dimensional description vector of silicon wafer defects, so as to output multiple corresponding silicon wafer defect features. S132: Among the various silicon wafer defect features, the various silicon wafer defect features are input into a multi-level analysis network, and two analysis channels are constructed in the multi-level analysis network. The two analysis channels perform multiple analyses along the gray-level gradient and morphological parameters, respectively, to output the stain-damage feature associated with the silicon wafer defect feature. Based on the stain-damage feature and the multi-criteria decision fusion network, the defect coefficient of the corresponding silicon wafer defect feature is determined, and the defect level of each silicon wafer defect feature is determined based on the mapping relationship between the defect coefficient and the defect level.

[0050] In the embodiments of this application, features and texture features are used to construct a corresponding high-dimensional description vector of silicon wafer defects based on multiple geometric features, fractal dimension features and texture features. Based on the identification of the high-dimensional description vector of silicon wafer defects, the corresponding defect details are determined to output multiple corresponding silicon wafer defect features. This approach is compatible with the overall consideration of identifying high-dimensional description vectors of silicon wafer defects and ensures the accuracy of the corresponding defect details.

[0051] At this point, macroscopic geometric parameters of the defect area are introduced, including the basic area, perimeter, aspect ratio, roundness, and density. These features describe the "skeleton" and "outline" of the defect. For example, aspect ratio can help distinguish between linear "scratches" and dot-like "spots," while roundness can distinguish between "chipped edges" (irregularities) and "bubbles" (usually more round).

[0052] The fractal dimension of the defect edge profile can be calculated using box counting or differential box dimension method. Silicon wafers are crystalline materials, and their naturally fractured or broken edges have specific statistical self-similarity. The fractal dimension can quantify the “roughness” and “complexity” of the edge. For example, mechanically cut edges (regular) have a low fractal dimension, while stress-induced natural fractures or microcracks (extremely tortuous and rough) have a high fractal dimension. This characteristic is crucial for distinguishing between physical damage and surface disturbance.

[0053] The statistical features of the interior and edges of defects are extracted based on the gray-level co-occurrence matrix (GLCM). These features mainly include contrast (local changes in gray-level gradient), correlation (linear dependence of gray-level), entropy (randomness / complexity of texture), and energy (uniformity of texture). Texture features capture the "materiality" of defects. For example, oil stains are characterized by a smooth texture with low contrast and low entropy, while broken silicon wafers are characterized by a chaotic texture with high contrast and high entropy.

[0054] The extracted geometric feature set, fractal dimension feature set, and texture feature set are cleaned and normalized (e.g., Z-score standardization) to eliminate the influence of different dimensions. These feature vectors are then concatenated in a predetermined order to form a vector V=[f1,f2,...,fn] containing dozens or even hundreds of components. This "high-dimensional description vector" is the unique coordinate of the defect in the feature space. It is no longer an image, but a precise mathematical model that can reflect the subtle physical differences of the defect (e.g., chipped edges and scratches of the same size are far apart in a high-dimensional vector).

[0055] The constructed high-dimensional description vector is input into a trained classifier (such as Support Vector Machine (SVM), Random Forest, or Deep Fully Connected Network). The classifier calculates the similarity or probability score between this vector and various defect prototype vectors (such as "hidden crack prototype" and "dirt prototype"). By comparison, the system determines the defect category that best matches the high-dimensional vector, thereby "determining the corresponding defect details". The system outputs specific "silicon wafer defect features" (such as: defect type = hidden crack, accompanying feature = stress pattern), providing accurate input labels for subsequent S132 grading.

[0056] Specifically, after the S122 step, an irregular defect region located at the edge of the silicon wafer was segmented. The system measured the area of ​​this region to be 4 mm², with a relatively long perimeter and a calculated circularity of only 0.3 (extremely irregular), exhibiting a flat aspect ratio. The system performed fractal calculations on the edge contour, yielding a fractal dimension of 1.82. This high value indicates that the edge is extremely rough and uneven, consistent with the characteristics of single-crystal silicon undergoing natural cleavage fracture along the crystal lattice under external impact, rather than smooth mechanical cutting. Simultaneously, GLCM analysis showed a high grayscale entropy value inside the defect, indicating a disordered crystal structure; the extremely high contrast indicated a strong depth difference between the broken surface and the intact surface.

[0057] The system normalizes the above data (area 4mm², roundness 0.3, fractal dimension 1.82, high entropy, high contrast, etc.) and combines them into a 50-dimensional high-dimensional vector Vdefect. This vector accurately describes an entity in mathematical space that is "extremely irregular in shape, extremely rough at the edges, and has broken internal crystals." The system inputs Vdefect into a classification network for comparison. Compared with the "surface oil stain" prototype: oil stains have low fractal dimension, smooth texture, and are far away, so they are excluded. Compared with the "mechanical scratch" prototype: scratches have high aspect ratio, relatively regular edges, and are far away, so they are excluded. Compared with the "edge chipping" prototype: the edge chipping feature set (high fractal dimension, irregular geometry, broken texture) highly overlaps with Vdefect. The system determines that the defect details in this area are "edge chipping" and outputs the corresponding silicon wafer defect features: {Type: edge chipping; Geometric shape: U-shaped missing corner; Surface texture: crystal cleavage fracture}.

[0058] Furthermore, among the various silicon wafer defect features, these features are input into a multi-level analysis network, where two analysis channels are constructed. These two channels perform multiple analyses along the grayscale gradient and morphological parameters, respectively, to output the stain-damage features associated with the silicon wafer defect features. Based on the stain-damage features and the multi-criteria decision fusion network, the defect coefficients of the corresponding silicon wafer defect features are determined. Based on the mapping relationship between the defect coefficients and defect levels, the defect levels of each silicon wafer defect feature are determined, thus incorporating a holistic consideration of the mapping relationship between defect coefficients and defect levels and ensuring the accuracy of the defect levels of each silicon wafer defect feature.

[0059] At this point, multiple silicon wafer defect features (such as geometric description, fractal dimension, etc.) output by S131 are input into a multi-level analysis network; two dedicated analysis channels are constructed in parallel within the network; gray-scale gradient analysis channel: focuses on the depth properties of defects, this channel calculates the gray-scale change rate of the defect edge and inside; for physical damage (such as cracks, chipping), the edge usually shows an extremely high gray-scale gradient (material abrupt change); while for stains or watermarks, the gray-scale change is usually relatively gentle (gradual transition).

[0060] Meanwhile, the morphological parameter analysis channel focuses on the geometric structural properties of defects. This channel analyzes the regularity, topological complexity, and deviation from standard geometric features of the defect contour. Physical damage is often accompanied by irregular jagged edges, while artificial marks or stains present a relatively regular or diffuse morphology. The analysis results of the two channels are combined to output "stain-damage features", which is a continuous feature value or probability vector used to quantify the tendency of a defect to belong to "surface attachments (stains)" or "body structural damage (damage)".

[0061] Using the aforementioned "stain-damage feature" as the core input, and integrating other decision criteria such as defect size, distance from the gate line or edge (location sensitivity), and defect density, a weighted fusion or neural network model is employed to simulate the decision-making logic of a human quality inspection expert. For example, if the "stain-damage feature" indicates damage, and the area is large and the location is critical, the overall risk is extremely high. The network outputs a normalized "defect coefficient," which is a value between 0 and 1. The larger the value, the more severe the impact of the defect on the silicon wafer quality. It comprehensively considers the type, degree, size, and location of the defect.

[0062] Establish a mapping rule base between "defect coefficient" and "defect level", which is usually a piecewise function or threshold table; for example: 0.0≤Dc<0.2: good product (negligible); 0.2≤Dc<0.5: Level 3 defect (minor, needs to be recorded); 0.5≤Dc<0.8: Level 2 defect (obvious, needs to be downgraded); 0.8≤Dc≤1.0: Level 1 defect (serious, scrapped); based on the calculated defect coefficient Dc, look up the table or calculate to determine the final defect level.

[0063] Specifically, the silicon wafer was identified as having an edge defect in S131; Gray-scale gradient channel: The system performed gradient detection on the defect area; It was found that the pixel gray-scale value at the defect edge dropped from 255 (surface) to 30 (fracture) in a very short distance, with an extremely high gradient amplitude, which is consistent with the physical characteristics of material fracture; Morphological parameter channel: The system analyzed the defect contour and found that the edge exhibited an extremely irregular serrated shape and a high fractal dimension, consistent with the morphological characteristics of natural crystal cleavage, rather than the smoothness of foreign matter covering it; Based on the high gradient and irregular morphology, the network output "stain-damage feature" value was 0.92 (1.0 indicates complete confirmation of damage, 0.0 indicates confirmation of stain), which strongly indicates that the defect is physical damage to the silicon wafer itself.

[0064] The decision network receives "damage feature 0.92" as the primary weight and combines it with other criteria: area criterion: defect area reaches 5mm² (high weight); location criterion: defect is located at the edge of the silicon wafer, only 1mm away from the main gate line (high-risk location). Due to the high degree of damage, large area and sensitive location, the multi-criteria fusion network calculates the final defect coefficient Dc=0.88. At the same time, according to the preset mapping relationship, a defect coefficient greater than 0.8 is judged as the highest level defect. The system determines the level of the silicon wafer defect feature as "Level 1 defect (scrap)". The system not only confirms that this is "damage", but also quantifies its severity by calculating the defect coefficient of 0.88, thereby automatically issuing a precise "scrap" judgment command.

[0065] refer to Figure 5 In step S14, the specific steps are as follows: S141: Collect the virtual space corresponding to the visual inspection station, and determine the heterogeneous data combination corresponding to the silicon wafer defect feature based on the combination of each silicon wafer defect feature and the virtual space. The heterogeneous data combination covers the defect parameters and characteristic morphology of the silicon wafer defect feature. S142: Deeply correlate heterogeneous data with defect levels and define multi-factor anomaly areas. Intelligently match these multi-factor anomaly areas with a preset hierarchical knowledge graph to output multiple sub-report contents. Determine the corresponding visualization report based on the multiple sub-report contents and their corresponding priorities. S143: Perform multi-level iterations on multiple visualization reports and output defect association information sequentially in each iteration. Determine the defect control instructions for the silicon wafer based on each defect association information, the real-time image of the silicon wafer, and the final defect area. Based on the defect control instructions of the silicon wafer, determine multiple defect optimization projects. Then, determine the defect control instructions for the silicon wafer based on the multiple defect optimization projects and the corresponding silicon wafer maintenance equipment.

[0066] In the embodiments of this application, the virtual space corresponding to the visual inspection station is collected, and the heterogeneous data combination corresponding to the silicon wafer defect feature is determined based on the combination of each silicon wafer defect feature and the virtual space. The heterogeneous data combination covers the defect parameters and characteristic morphology of the silicon wafer defect feature, and is compatible with the overall consideration of the combination of each silicon wafer defect feature and the virtual space, so as to ensure the accuracy of the heterogeneous data combination corresponding to the silicon wafer defect feature.

[0067] At this point, the system retraces and locks the real-time virtual space (or digital twin model) constructed in stage S11. This is not just an image, but a data set containing rich physical parameters, specifically including: spatial kinematic parameters: the precise 6DOF (six degrees of freedom) coordinates of the industrial camera, light source, and robot at the moment of shooting; optical environment parameters: the dynamic heterogeneous light field configuration at that time, including the incident angle, intensity distribution, and modulation state of the aspherical lens of each light source; and workpiece posture parameters: the pose of the silicon wafer in three-dimensional space, including whether there is warping, rotation, or offset.

[0068] The "silicon wafer defect features" (such as type and grade) output by S13 are highly accurate in spatiotemporal registration and fusion with the virtual space parameters collected above; a mapping relationship between the defect area and the virtual world coordinate system is established; environmental information such as illumination vector and viewing angle parameters are attached to each defect feature as labels, and through combination, the defect is given the ability to "perceive the scene"; for example, it is no longer "a scratch", but "a scratch that appears in the warped area of ​​the silicon wafer under lateral grazing light".

[0069] After integration, the system constructs a structured "heterogeneous data combination." This data package integrates two types of core data, forming a comprehensive description of the defect: Defect parameters: quantitative numerical indicators, including the defect's geometric dimensions (length, width, area), depth information (from the 3D reconstruction in S11), defect coefficients (from S132), and confidence scores; Characteristic morphology: qualitative morphological descriptions, including the defect's texture features (roughness, fractal dimension), edge contour features (jagged, smooth), and grayscale statistical characteristics (mean, variance). "Heterogeneous" means the diversity of data types (numerical, vector, label, 3D coordinates). This combination is the direct input for subsequent knowledge graph reasoning, covering all key information from microscopic texture to macroscopic spatial location.

[0070] Specifically, after inspections S11-S13, the silicon wafer was identified as having a "chipped edge" defect on its right edge. The system retrieved a virtual spatial snapshot of the silicon wafer during the inspection from memory. The data showed: Spatial pose: The silicon wafer was rotated counterclockwise by 1.5 degrees on the transport belt, and there was an upward warping of 0.3mm on the right edge; Light field state: To suppress reflection, the auxiliary light source on the right was incident at a 30-degree grazing angle, and the aspherical lens was in focus mode; Camera parameters: The camera was located directly above, with an aperture of F / 5.6.

[0071] The “right edge chipping” feature determined in S13 is bound to the aforementioned virtual space data. System analysis reveals that it is precisely because the “warping posture” of the silicon wafer, combined with “grazing light”, that the cross-sectional shadow of the chipped edge is elongated, thus being captured with high precision. The system solidifies this causal relationship in the data—that is, the significant feature of the chipped edge is highly correlated with a specific illumination angle and warping state.

[0072] The system generates a complete heterogeneous data package for the edge chipping defect, including: defect parameters: defect type: edge chipping; geometric dimensions: area 4.2 mm², depth 0.15 mm; defect coefficient: 0.88 (severe); spatial coordinates: (X=150.5, Y=280.2, Z=0.3); characteristic morphology: edge contour: extremely irregular, fractal dimension 1.85 (rough); surface texture: exhibits a stepped texture of crystal cleavage; grayscale characteristics: high contrast, with obvious shadow areas at the fracture. This heterogeneous data combination is generated as a whole object and prepared to be transmitted to step S142 for querying the knowledge graph to determine whether the edge chipping was caused by mechanical impact from the conveyor belt.

[0073] Furthermore, heterogeneous data combinations are deeply correlated with defect levels, and multi-factor anomaly areas are defined. These multi-factor anomaly areas are then intelligently matched with a pre-defined hierarchical knowledge graph to output multiple sub-report contents. Based on the multiple sub-report contents and their corresponding priorities, a corresponding visualization report is determined. This approach takes into account the overall consideration of multiple sub-report contents and their corresponding priorities, ensuring the accuracy of the corresponding visualization report.

[0074] At this point, the system performs multi-dimensional cross-analysis and weighted binding of the "heterogeneous data combination" (containing geometric, texture, and environmental parameters of defects) generated in S141 and the "defect level" determined in S132; the system analyzes the contribution of specific parameters to the level; for example, it analyzes whether high fractal dimension (edge ​​roughness) is the dominant factor leading to a high level (scrap) or because the defect location is too critical; the level label is written back into the heterogeneous data as a high-weight feature to form an enhanced data object with "severity attribute", which provides more accurate input for subsequent map matching.

[0075] Focusing solely on the defect itself is insufficient; the system needs to expand its perspective from spatial and environmental dimensions, defining an "abnormal region" encompassing multiple influencing factors. Starting from the defect center, the system extends outwards to boundaries where pixel gradient changes are gradual or the physical structure is stable, forming a three-dimensional spatial envelope. Within this region, external factors such as uneven illumination distribution, silicon wafer deformation gradient (warpage), and equipment status parameters are superimposed. This expands the "point defect" into a "planar abnormal region," capturing the interaction between the defect and its surrounding environment, such as whether a blind spot in illumination leads to missed detection, or whether mechanical stress causes crack propagation.

[0076] The pre-defined hierarchical knowledge graph includes equipment structure, process logic, historical failure modes and their interrelationships (e.g., conveyor belt vibration > silicon wafer displacement > edge impact > edge chipping). The feature vectors of "multi-factor abnormal areas" are used as query conditions to perform semantic retrieval and subgraph matching in the graph. The system finds the graph path that best matches the current abnormal mode. The graph returns the matched node paths and infers the deep-seated causes (root causes) of the defects and their derivative effects (secondary causes).

[0077] Based on the matching results, multiple dimensions of "sub-report content" are generated in parallel; for example: defect morphology report (describes appearance), cause diagnosis report (attribution of graph results), equipment early warning report (related to equipment health), and process optimization report (suggests parameter adjustments); the sub-reports are weighted and sorted according to the current monitoring strategy (such as "safety first" or "quality first"); for example, reports involving equipment safety hazards have the highest priority, while those involving minor appearance defects have a lower priority; the sorted sub-report content is then integrated into an intuitive "visual report".

[0078] Specifically, the right edge of the silicon wafer was identified as a "chipped edge" by S141, with a defect level of Level 1 (severe). The system correlated the heterogeneous data of the "chipped edge" (fractal dimension 1.85, depth 0.15mm) with the "Level 1 defect" level. The analysis confirmed that the reason for classifying it as Level 1 was not only because of its large area, but also because of its extremely high fractal dimension, indicating that it was a typical brittle fracture, not surface wear.

[0079] The system is not limited to the chipped edge point, but defines a multi-factor abnormal area that includes "the right edge of the silicon wafer + the corresponding transport belt block area + the light blind zone". Within this area, the system detects a slight counterclockwise deflection of the silicon wafer, and the transport belt speed in this area fluctuates slightly at the moment of detection. The regional characteristics are defined as "high stress contact area + dynamic motion interference".

[0080] The system inputs the abnormal area features into a hierarchical knowledge graph; the graph matches a high-frequency path: "Silicon wafer edge chipping + dynamic displacement" > attribution node: "Mechanical interference of conveyor belt stop"; the graph shows that this matching degree is as high as 95%, indicating that the root cause of the chipping is the wear of the conveyor belt stop leading to an increased gap, or the vibration of the conveyor belt causing the silicon wafer to hit the stop; sub-report output: "Defect Morphology Report": confirms edge chipping, high fractal dimension; "Cause Diagnosis Report" (highest priority): the graph infers "mechanical impact of conveyor belt stop"; "Equipment Warning Report": the associated equipment ID is Motor-04, and it is recommended to check the wear of the stop.

[0081] On the control panel, a red high-priority visualization pop-up window appears; a 3D model of the silicon wafer is displayed in the center of the screen, with a red dot flashing at the chipped edge on the right; the red dot points to the 3D model of the "transport belt stop" through a dynamic connection line, and is marked "mechanical interference probability 95%"; a note next to it reads: "It is recommended to stop the machine and check the stop".

[0082] Therefore, multiple visualization reports are iterated at multiple levels, and defect association information is output sequentially in each iteration. Based on each defect association information, the real-time image of the silicon wafer, and the final defect area, the defect control instructions for the silicon wafer are determined. Based on the defect control instructions for the silicon wafer, multiple defect optimization projects are identified. The defect control instructions for the silicon wafer are then determined based on the multiple defect optimization projects and the corresponding silicon wafer maintenance equipment. This approach takes into account the overall consideration of multiple defect optimization projects and corresponding silicon wafer maintenance equipment, ensuring the accuracy of the defect control instructions for the silicon wafer. At the same time, the defect level of each silicon wafer defect feature is quantified, and multiple levels of iteration of multiple visualization reports are realized, thereby improving the accuracy of the defect control instructions for the silicon wafer.

[0083] At this point, the system performs hierarchical logical iterations on the visualization report, peeling away the deep-seated correlations behind the defects layer by layer. The first iteration (microscopic layer): focusing on the current single silicon wafer; analyzing whether the defect is independent and outputting the individual attribute correlation of the current defect (e.g., edge chipping > damage to the structural integrity of the single wafer); the second iteration (batch / time layer): combining historical data; analyzing whether the defect occurs continuously in a short period of time and outputting the time series correlation (e.g., five consecutive wafers with right edge chipping > periodic anomaly); the third iteration (system / equipment layer): combining the global state; analyzing whether the defect is related to specific equipment operating conditions and outputting the root cause correlation (e.g., periodic anomaly + conveyor belt speed fluctuation > equipment component wear). Through multi-level iterations, the system no longer processes defects in isolation, but outputs a series of "defect correlation information" with causal logic, providing contextual basis for subsequent decisions.

[0084] Based on the correlation information output from the previous step, combined with real-time visual evidence (real-time images of the silicon wafer) and precise positioning data (final defect area), a comprehensive logical judgment is made to form a strategic control instruction. The system checks whether the "defect correlation information" and the "real-time image" are consistent (for example, if the system suspects a transport belt problem, the real-time image confirms that the silicon wafer position has indeed shifted) to prevent misjudgment. Based on the fusion result, the direction of the control strategy is determined. For example, for severe and continuous defects, the instruction not only includes rejection but also includes dynamic correction of process parameters. At this time, the "control instruction" is a high-dimensional strategy description (such as "optimize transport dynamics" or "perform precise rejection"), rather than a low-level level signal.

[0085] The control commands are mapped to specific process parameters or physical actions; for example, "optimizing transmission dynamics" is broken down into specific items such as "reducing acceleration" and "adjusting tension"; a specific execution target value is defined for each optimization item (such as a 10% reduction in speed), and the target of the item is clearly defined; the optimization item is the bridge connecting the decision-making logic and the physical equipment, ensuring that each strategy has a corresponding landing point.

[0086] Based on the optimization project and its corresponding "silicon wafer maintenance equipment" (or production execution mechanism), the final equipment control instructions are generated; the system queries the equipment topology diagram to find the hardware ID corresponding to the optimization project (such as PLC address, robot joint controller, light source driver); and the optimization project is converted into standard instructions for specific equipment communication protocols (such as Modbus register write value, robot motion instructions).

[0087] Specifically, a silicon wafer was found to have severe edge chipping on its right edge. S142 has deduced that the cause is mechanical interference from the conveyor belt stop. First iteration: The system analyzes the current silicon wafer and confirms that the edge chipping on the right edge caused the main grid line of the battery to break, outputting the related information: "Current silicon wafer is functionally unusable". Second iteration: The system searches the detection records of the past 10 minutes and finds that 12 consecutive silicon wafers have varying degrees of damage on their right edges, outputting the related information: "There is a high-frequency trend of mechanical impact on the right edge". Third iteration: Combining the equipment monitoring logs, it is found that there is current jitter in the conveyor belt motor at the moment of commutation, outputting the related information: "The impact trend is strongly correlated with the commutation jitter of the conveyor belt".

[0088] The system integrates information such as "right edge chipping," "high-frequency impact," and "reversal jitter," and verifies the offset of the silicon wafer position in the real-time image. The decision is made that simply removing the current silicon wafer cannot solve the fundamental problem; immediate intervention in the conveyor belt's movement is necessary. An instruction is generated to "immediately execute silicon wafer removal and initiate the conveyor belt stability optimization strategy." The system breaks down the above strategy instruction into specific items: Item 1: The current defective wafer needs to be removed from the production line; Item 2: Excessive conveyor belt acceleration causes jitter, requiring acceleration reduction; Item 3: Excessive conveyor belt speed results in high impact force, requiring a reduction in the base speed.

[0089] The system locates the corresponding equipment based on the project: For "Removing Defective Wafers" > Matching equipment: Pneumatic Rejection Rod > Generating command: Trigger_Air_Cylinder(port_3, duration_500ms); For "Reducing Acceleration / Speed" > Matching equipment: Conveyor Belt Servo Driver > Generating command: Modify_Motion_Profile(acc=0.5m / s², vel=1.2m / s); When the command is issued, the rejection rod kicks the current silicon wafer out of the waste box, while the conveyor belt smoothly decelerates, so subsequent silicon wafers are no longer subjected to violent impacts, and the defect rate is reduced accordingly.

[0090] Please see Figure 6 , Figure 6 This is a schematic diagram of the structural composition of a silicon wafer defect detection system based on vision inspection according to an embodiment of the present invention; the silicon wafer defect detection system based on vision inspection is applied to the above-described silicon wafer defect detection method based on vision inspection; the silicon wafer defect detection system based on vision inspection includes: Surface image module 21 is used to mark the high reflectivity areas of the silicon wafer in its current posture when the silicon wafer is in the visual inspection station. Based on each high reflectivity area, the position adjustment of multiple light sources and industrial cameras is triggered, and the industrial cameras take pictures of the silicon wafer to determine the surface image of the silicon wafer. The final defect region module 22 is used to perform deep mining of the surface image of the silicon wafer based on a multi-scale attention mechanism, and to perform multi-level fusion on the primary defect content of the silicon wafer to output multiple primary defect regions. Each primary defect region and its corresponding associated region determine the final defect region in the semantic dimension analysis. The defect level module 23 is used to identify the final defect area and determine multiple silicon wafer defect features during the identification process. The multiple silicon wafer defect features are analyzed in multiple levels along the grayscale gradient and morphological parameters to determine the defect level of each silicon wafer defect feature. The defect control instruction module 24 is used to determine multiple defect combinations based on the characteristic morphology and corresponding defect level of each silicon wafer defect, determine the corresponding visualization report based on the identification of each defect combination, and determine the defect control instruction of the silicon wafer through multi-level iteration along multiple visualization reports.

[0091] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity, not all combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

Claims

1. A defect detection method for silicon wafers based on visual inspection, characterized in that, include: When the silicon wafer is in the vision inspection station, the high reflectivity area of ​​the silicon wafer in the current posture is marked. Based on each high reflectivity area, the positions of multiple light sources and industrial cameras are adjusted. The industrial cameras take pictures of the silicon wafer to determine the surface image of the silicon wafer. The surface image of the silicon wafer is deeply mined based on a multi-scale attention mechanism, and multi-level fusion is performed on the primary defect content of the silicon wafer to output multiple primary defect regions. Each primary defect region and its corresponding associated region are used to determine the final defect region in the semantic dimension analysis. The final defect area is identified, and multiple silicon wafer defect features are determined during the identification process. These multiple silicon wafer defect features are analyzed at multiple levels along grayscale gradients and morphological parameters to determine the defect level of each silicon wafer defect feature. Multiple defect combinations are determined based on the characteristic morphology and corresponding defect level of each silicon wafer defect. Based on the identification of each defect combination, a corresponding visualization report is determined. The defect control instructions for the silicon wafer are determined through multi-level iteration of multiple visualization reports.

2. The defect detection method for silicon wafers based on visual inspection according to claim 1, characterized in that, When the silicon wafer is in the visual inspection station, the high-reflectivity areas of the silicon wafer in its current orientation are marked. Multiple light sources and industrial cameras are then activated based on the positions of these high-reflectivity areas. The industrial cameras then capture images of the silicon wafer to determine its surface image, including: When the silicon wafer is transferred to the vision inspection station, the current posture of the silicon wafer is acquired, and the surface of the silicon wafer under the current posture is reconstructed in three dimensions by laser line scanning. The highly reflective area of ​​the silicon wafer surface is constructed in real time. At the same time, the corresponding virtual space is determined according to the inspection environment of the vision inspection station and the surface characteristics of the silicon wafer. In the virtual space, the optical path is reverse-calculated for the highly reflective area to generate the optimal control command for multi-axis linkage in real time.

3. The defect detection method for silicon wafers based on vision inspection according to claim 2, characterized in that, The process of marking the high-reflectivity areas of the silicon wafer in its current orientation when it is at a visual inspection station, triggering the position adjustment of multiple light sources and industrial cameras based on each high-reflectivity area, and having the industrial cameras capture images of the silicon wafer to determine its surface image, also includes: Based on the optimal control command, the positions of multiple light sources and industrial cameras are adjusted. The incident vectors of multiple light sources are dynamically adjusted through an aspherical lens group, and the shooting position and polarization angle of the industrial camera are calibrated to construct a dynamic heterogeneous light field that can adaptively suppress specular reflection. The industrial camera performs spatiotemporal multi-frame synthesis shooting in this dynamic heterogeneous light field environment, and fuses image details under different lighting conditions through time-sharing exposure to determine the surface image of the silicon wafer.

4. The defect detection method for silicon wafers based on vision inspection according to claim 1, characterized in that, The surface image of the silicon wafer is deeply mined based on a multi-scale attention mechanism, and multi-level fusion is performed on the primary defect content of the silicon wafer to output multiple primary defect regions. Each primary defect region and its corresponding associated region are used to determine the final defect region in semantic dimension analysis, including: The surface image of the silicon wafer is input into a deep feature extraction network, which outputs multiple image features. A multi-scale attention mechanism is used to perform deep mining of the image features. The texture and gradient changes of the image features are combined with the primary defect content of the silicon wafer for multi-level fusion. During the multi-level fusion process, multiple primary defect regions are determined step by step.

5. The defect detection method for silicon wafers based on vision inspection according to claim 4, characterized in that, The surface image of the silicon wafer is deeply mined based on a multi-scale attention mechanism, and multi-level fusion is performed on the primary defect content of the silicon wafer to output multiple primary defect regions. Each primary defect region and its corresponding associated region are used to determine the final defect region in semantic dimension analysis, including: Each primary defect region is combined with a semantic-appearance dual-discrimination segmentation network, and the appearance defect content of each primary defect region and its surrounding related regions in the semantic dimension is deeply analyzed. The final defect region is determined based on the appearance defect content and the defect impact content of the corresponding related regions.

6. The defect detection method for silicon wafers based on vision inspection according to claim 1, characterized in that, The process involves region identification of the final defect area, during which multiple silicon wafer defect features are determined. These features are then analyzed at multiple levels along grayscale gradients and morphological parameters to determine the defect level of each feature, including: The final defect region is analyzed at the sub-pixel level, and multiple corresponding geometric features, fractal dimension features, and texture features are extracted. Based on these features, a high-dimensional description vector of the silicon wafer defect is constructed. The corresponding defect details are determined based on the identification of this high-dimensional description vector, and multiple silicon wafer defect features are output.

7. The defect detection method for silicon wafers based on vision inspection according to claim 6, characterized in that, The process of identifying the final defect area and determining multiple silicon wafer defect features during the identification process, and performing multi-level analysis along grayscale gradients and morphological parameters to determine the defect level of each silicon wafer defect feature, also includes: Among the various silicon wafer defect features, these features are input into a multi-level analysis network. Two analysis channels are constructed within this network, and each channel performs multiple analyses along the grayscale gradient and morphological parameters to output the stain-damage feature associated with the silicon wafer defect feature. Based on the stain-damage feature and the multi-criteria decision fusion network, the defect coefficient of the corresponding silicon wafer defect feature is determined, and the defect level of each silicon wafer defect feature is determined based on the mapping relationship between the defect coefficient and the defect level.

8. The defect detection method for silicon wafers based on vision inspection according to claim 1, characterized in that, The process involves determining multiple defect combinations based on the characteristic morphology and corresponding defect level of each silicon wafer defect, identifying corresponding visualization reports based on the identification of each defect combination, and determining defect control instructions for the silicon wafer through multi-level iterations of multiple visualization reports, including: The virtual space corresponding to the visual inspection station is collected. Based on the combination of each silicon wafer defect feature and the virtual space, the heterogeneous data combination corresponding to the silicon wafer defect feature is determined. The heterogeneous data combination covers the defect parameters and characteristic morphology of the silicon wafer defect feature. Heterogeneous data combinations are deeply correlated with defect levels, and multi-factor anomaly areas are defined. These multi-factor anomaly areas are then intelligently matched with a pre-defined hierarchical knowledge graph to output multiple sub-report contents. The corresponding visualization report is determined based on the multiple sub-report contents and their respective priorities.

9. The defect detection method for silicon wafers based on vision inspection according to claim 8, characterized in that, The process of determining multiple defect combinations based on the characteristic morphology and corresponding defect level of each silicon wafer defect, determining corresponding visualization reports based on the identification of each defect combination, and determining defect control instructions for the silicon wafer through multi-level iterations of multiple visualization reports, further includes: Multiple visualization reports are iterated at multiple levels, and defect association information is output sequentially in each iteration. Based on each defect association information, the real-time image of the silicon wafer and the final defect area, the defect control instructions of the silicon wafer are determined. Based on the defect control instructions of the silicon wafer, multiple defect optimization projects are identified, and the defect control instructions of the silicon wafer are determined based on the multiple defect optimization projects and the corresponding silicon wafer maintenance equipment.

10. A defect detection system for silicon wafers based on vision inspection, characterized in that, The vision-based silicon wafer defect detection system is applied to the vision-based silicon wafer defect detection method as described in any one of claims 1-9; The vision-based defect detection system for silicon wafers includes: The surface image module is used to mark the high reflectivity areas of the silicon wafer in its current orientation when the silicon wafer is in the visual inspection station. Based on each high reflectivity area, the position adjustment of multiple light sources and industrial cameras is triggered, and the industrial cameras take pictures of the silicon wafer to determine the surface image of the silicon wafer. The final defect region module is used to perform deep mining of the surface image of the silicon wafer based on a multi-scale attention mechanism, and to perform multi-level fusion on the primary defect content of the silicon wafer to output multiple primary defect regions. Each primary defect region and its corresponding associated region determine the final defect region in the semantic dimension analysis. The defect level module is used to identify the final defect area and determine multiple silicon wafer defect features during the identification process. Multiple silicon wafer defect features are analyzed at multiple levels along grayscale gradient and morphological parameters to determine the defect level of each silicon wafer defect feature. The defect control instruction module is used to determine multiple defect combinations based on the characteristic morphology and corresponding defect level of each silicon wafer defect, determine the corresponding visualization report based on the identification of each defect combination, and determine the defect control instruction of the silicon wafer through multi-level iteration along multiple visualization reports.

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