Pixel, display device including same, and electronic device including same

Abstract

A pixel, a display device including the pixel, and an electronic device including the pixel are disclosed. The pixel includes a light emitting element, first to fifth switching elements. The first switching element includes a control electrode connected to the first node, a first electrode connected to the second node, and a second electrode connected to the anode electrode of the light emitting element. The second switching element and the fifth switching element are connected in series between the data line and the first node. The third switching element includes a control electrode to which an emission signal is applied, a first electrode to which a first power supply voltage is applied, and a second electrode connected to a second node. The fourth switching element includes a control electrode to which a second gate signal is applied, a first electrode to which a first voltage is applied, and a second electrode connected to the anode electrode of the light emitting element. A first gate signal is applied to a control electrode of the second switching element. The fifth switching element is connected in a diode manner. A second power supply voltage is applied to a cathode electrode of the light-emitting element.

Description

Technical Field

[0001] The present invention relates to a pixel, a display device including the pixel, and an electronic device including the pixel, and more specifically, to a pixel applicable to a high-resolution display device, a display device including the pixel, and an electronic device including the pixel. Background Technology

[0002] Typically, a display device includes a display panel and a display panel driving unit. The display panel includes multiple gate lines, multiple data lines, multiple emission lines, and multiple pixels. The display panel driving unit includes a gate driving unit that provides gate signals to the multiple gate lines, a data driving unit that provides data voltages to the data lines, an emission driving unit that provides emission signals to the emission lines, and a driving control unit that controls the gate driving unit, the data driving unit, and the emission driving unit.

[0003] When the data swing range of the driving switching element in the aforementioned pixels is small, there is a problem that it is difficult to accurately represent grayscale. When the data swing is large, there is a problem that the display quality is reduced due to the blurring of the vertical lines. Summary of the Invention

[0004] One object of the present invention is to provide a pixel that improves display quality by including a fifth switching element connected in a diode manner to increase the data swing range.

[0005] Another object of the present invention is to provide a display device including the aforementioned pixels.

[0006] Another object of the present invention is to provide an electronic device including the aforementioned pixels.

[0007] A pixel according to an embodiment of the present invention for achieving the above-described objectives includes a light-emitting element, a first switching element, a second switching element, a third switching element, a fourth switching element, and a fifth switching element. The first switching element includes a control electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to the anode electrode of the light-emitting element. The second and fifth switching elements are connected in series between the data line and the first node. The third switching element includes a control electrode to which a transmission signal is applied, a first electrode to which a first power supply voltage is applied, and a second electrode connected to the second node. The fourth switching element includes a control electrode to which a second gate signal is applied, a first electrode to which a first voltage is applied, and a second electrode connected to the anode electrode of the light-emitting element. The control electrode of the second switching element is to which the first gate signal is applied. The fifth switching element is connected in a diode configuration. The cathode electrode of the light-emitting element is to which a second power supply voltage is applied.

[0008] In one embodiment of the present invention, the pixel may further include: a first capacitor, including a first electrode connected to the first node and a second electrode connected to the second node; and a second capacitor, including a first electrode connected to the first node and a second electrode to which an initialization voltage is applied.

[0009] In one embodiment of the present invention, the pixel may further include: a third capacitor, including a first electrode connected to the first node and a second electrode connected to the anode electrode of the light-emitting element.

[0010] In one embodiment of the present invention, the first switching element, the second switching element, and the third switching element may be P-type transistors, and the fourth switching element may be an N-type transistor.

[0011] In one embodiment of the present invention, the first voltage of the fourth switching element may be the initialization voltage.

[0012] In one embodiment of the present invention, the first voltage of the fourth switching element may be the second power supply voltage.

[0013] In one embodiment of the present invention, a ground voltage may be applied to the first electrode of the fourth switching element.

[0014] In one embodiment of the present invention, the first switching element, the second switching element, the third switching element, and the fourth switching element may be P-type transistors. The first voltage of the fourth switching element may be a bias voltage.

[0015] In one embodiment of the present invention, the fifth switching element may include a control electrode connected to the third node, a first electrode connected to the data line, and a second electrode connected to the third node. The second switching element may include the control electrode to which the first gate signal is applied, the first electrode connected to the third node, and the second electrode connected to the first node.

[0016] In one embodiment of the present invention, the fifth switching element may include a control electrode connected to the first node, a first electrode connected to the third node, and a second electrode connected to the first node. The second switching element may include the control electrode to which the first gate signal is applied, the first electrode connected to the data line, and the second electrode connected to the third node.

[0017] In one embodiment of the present invention, during the first time period, the transmitted signal may have an activation level, the first gate signal may have an activation level, and the second gate signal may have an activation level.

[0018] In one embodiment of the present invention, during the first time period, the first switching element, the second switching element, the third switching element, the fourth switching element, and the fifth switching element can be turned on.

[0019] In one embodiment of the present invention, during a second time period following the first time period, the transmitted signal may have an inactive level, the first gate signal may have the active level, and the second gate signal may have the active level.

[0020] In one embodiment of the present invention, during the second time period, the first switching element, the second switching element, the fourth switching element, and the fifth switching element can be turned on, and the third switching element can be turned off.

[0021] In one embodiment of the present invention, during a third time period following the second time period, the transmitted signal may have the activation level, the first gate signal may have the inactive level, and the second gate signal may have the activation level.

[0022] In one embodiment of the present invention, during the third time period, the first switching element, the third switching element, the fourth switching element, and the fifth switching element can be turned on, and the second switching element can be turned off.

[0023] In one embodiment of the present invention, during a fourth time period following the third time period, the transmitted signal may have the activated level, the first gate signal may have the deactivated level, and the second gate signal may have the deactivated level. During the fourth time period, the first switching element, the third switching element, and the fifth switching element may be turned on, while the second switching element and the fourth switching element may be turned off.

[0024] In one embodiment of the present invention, the channel length of the first switching element may be equal to the channel length of the fifth switching element.

[0025] A display device according to an embodiment for achieving the objectives of the present invention includes a display panel, a gate driving unit, and a data driving unit. The display panel includes pixels. The gate driving unit outputs a gate signal to the pixel. The data driving unit outputs a data voltage to the pixel. The pixel is as described above, and a data voltage is applied to the data line.

[0026] An electronic device according to an embodiment of the present invention for achieving the above-described object includes a display panel, a gate driving unit, a data driving unit, a driving control unit, and a processor. The display panel includes pixels. The gate driving unit outputs gate signals to the pixels. The data driving unit outputs data voltages to the pixels. The driving control unit controls the operation of the gate driving unit and the operation of the data driving unit. The processor outputs input image data and input control signals to the driving control unit. The pixels are as described above, and data voltages are applied to the data lines.

[0027] According to the pixel, the display device including the pixel, and the electronic device including the pixel as described above, the pixel may include the fifth switching element connected in a diode manner. The data voltage can be reduced in level by the fifth switching element and applied to the control electrode of the first switching element. Therefore, the data voltage can be used over a relatively wide range. In this way, the data swing range can be increased, thereby improving the display quality of the display panel.

[0028] The pixel may include five switching elements and three capacitors. The pixel includes a relatively small number of switching elements and a relatively small number of capacitors, thus enabling its application in high-resolution display devices. Attached Figure Description

[0029] Figure 1 This is a block diagram illustrating a display device according to an embodiment of the present invention.

[0030] Figure 2 It is shown Figure 1 The circuit diagram of the pixels of the display panel.

[0031] Figure 3 It shows that it is applied to Figure 2 A timing diagram of an example of the input signal of a pixel.

[0032] Figure 4 It is shown Figure 2 The circuit diagram of the operation of the pixels in the first time period.

[0033] Figure 5 It is shown Figure 2 The circuit diagram of the operation of the pixels in the second time period.

[0034] Figure 6 It is shown Figure 2 The circuit diagram of the operation of the pixels in the third time period.

[0035] Figure 7 It is shown Figure 2 The circuit diagram of the operation of the pixels in the fourth time period.

[0036] Figure 8 This is a circuit diagram illustrating the pixels of a display panel of a display device according to an embodiment of the present invention.

[0037] Figure 9 This is a circuit diagram illustrating the pixels of a display panel of a display device according to an embodiment of the present invention.

[0038] Figure 10 This is a circuit diagram illustrating the pixels of a display panel of a display device according to an embodiment of the present invention.

[0039] Figure 11 It shows that it is applied to Figure 10 A timing diagram of an example of the input signal of a pixel.

[0040] Figure 12 This is a circuit diagram illustrating the pixels of a display panel of a display device according to an embodiment of the present invention.

[0041] Figure 13 This is a block diagram illustrating an electronic device according to an embodiment of the present invention.

[0042] Figure 14 It is shown Figure 13 The diagram shows an example of an electronic device implemented as a virtual reality display system.

[0043] Figure 15 It is shown Figure 13 The diagram shows an example of an electronic device implemented as a smartphone.

[0044] Explanation of reference numerals in the attached figures Detailed Implementation

[0045] The present invention will now be described in more detail with reference to the accompanying drawings.

[0046] Figure 1 This is a block diagram illustrating a display device according to an embodiment of the present invention.

[0047] Reference Figure 1 The display device includes a display panel 100 and a display panel driving unit. The display panel driving unit includes a driving control unit 200, a gate driving unit 300, a gamma reference voltage generating unit 400, a data driving unit 500, and a transmission driving unit 600.

[0048] The display panel 100 includes a display section for displaying images and a peripheral section arranged adjacent to the display section.

[0049] The display panel 100 includes multiple gate lines GWL, GRL, multiple data lines DL, multiple emitter lines EL, and multiple pixels electrically connected to each of the multiple gate lines GWL, GRL, data lines DL, and emitter lines EL. The gate lines GWL and GRL can extend along a first direction D1, the data lines DL can extend along a second direction D2 intersecting the first direction D1, and the emitter lines EL can extend along the first direction D1.

[0050] The drive control unit 200 receives input image data IMG and input control signal CONT from an external device. For example, the input image data IMG may include red image data, green image data, and blue image data. The input image data IMG may also include white image data. The input image data IMG may also include magenta image data, yellow image data, and cyan image data. The input control signal CONT may include a master clock signal and a data enable signal. The input control signal CONT may also include a vertical synchronization signal and a horizontal synchronization signal.

[0051] The drive control unit 200 generates a first control signal CONT1, a second control signal CONT2, a third control signal CONT3, a fourth control signal CONT4, and a data signal DATA based on the input image data IMG and the input control signal CONT.

[0052] The drive control unit 200 generates a first control signal CONT1 for controlling the operation of the gate drive unit 300 based on the input control signal CONT, and outputs the first control signal CONT1 to the gate drive unit 300. The first control signal CONT1 may include a vertical start signal and a gate clock signal.

[0053] The drive control unit 200 generates a second control signal CONT2 for controlling the operation of the data drive unit 500 based on the input control signal CONT, and outputs the second control signal CONT2 to the data drive unit 500. The second control signal CONT2 may include a horizontal start signal and a load signal.

[0054] The drive control unit 200 generates a data signal DATA based on the input image data IMG. The drive control unit 200 outputs the data signal DATA to the data drive unit 500.

[0055] The drive control unit 200 generates a third control signal CONT3 based on the input control signal CONT for controlling the operation of the gamma reference voltage generation unit 400, and outputs the third control signal CONT3 to the gamma reference voltage generation unit 400.

[0056] The drive control unit 200 generates a fourth control signal CONT4 for controlling the operation of the transmitter drive unit 600 based on the input control signal CONT, and outputs the fourth control signal CONT4 to the transmitter drive unit 600.

[0057] The gate driving unit 300 generates a gate signal for driving the gate lines GWL and GRL in response to the first control signal CONT1 received from the driving control unit 200. The gate driving unit 300 can output the gate signal to the gate lines GWL and GRL.

[0058] The gamma reference voltage generation unit 400 generates a gamma reference voltage VGREF in response to the third control signal CONT3 received from the drive control unit 200. The gamma reference voltage generation unit 400 provides the gamma reference voltage VGREF to the data drive unit 500. The gamma reference voltage VGREF has a value corresponding to each data signal DATA.

[0059] For example, the gamma reference voltage generation unit 400 may be arranged within the drive control unit 200 or within the data drive unit 500.

[0060] The data driving unit 500 receives the second control signal CONT2 and the data signal DATA from the driving control unit 200, and receives the gamma reference voltage VGREF from the gamma reference voltage generation unit 400. The data driving unit 500 uses the gamma reference voltage VGREF to convert the data signal DATA into an analog data voltage. The data driving unit 500 outputs the data voltage to the data line DL.

[0061] The transmit drive unit 600 generates a transmit signal for driving the transmit line EL in response to the fourth control signal CONT4 received from the drive control unit 200. The transmit drive unit 600 can output the transmit signal to the transmit line EL.

[0062] exist Figure 1For ease of explanation, the diagram shows a configuration where the gate driving portion 300 is arranged on the first side of the display panel 100 and the emission driving portion 600 is arranged on the second side of the display panel 100; however, the invention is not limited thereto. For example, both the gate driving portion 300 and the emission driving portion 600 may be arranged on the first side of the display panel 100. Alternatively, both the gate driving portion 300 and the emission driving portion 600 may be arranged on both sides of the display panel 100 (the first side and the second side). Furthermore, the gate driving portion 300 and the emission driving portion 600 may be integrally formed.

[0063] Figure 2 It is shown Figure 1 Circuit diagram of a display panel with 100 pixels. Figure 3 It shows that it is applied to Figure 2 A timing diagram of an example of the input signal of a pixel. Figure 4 It is shown Figure 2 The circuit diagram of the operation of the pixels in the first time period P1. Figure 5 It is shown Figure 2 The circuit diagram of the operation of the pixels in the second time period P2. Figure 6 It is shown Figure 2 The circuit diagram of the operation of the pixels in the third time period P3. Figure 7 It is shown Figure 2 The circuit diagram of the operation of the pixels in the fourth time period P4.

[0064] Reference Figures 1 to 7 The display panel 100 includes a plurality of pixels, each of which includes a light-emitting element EE. For example, the light-emitting element EE may be a micro-organic light-emitting diode (Micro-OLED).

[0065] For example, the display device according to this embodiment may be a microdisplay including the micro-organic light-emitting diode (Micro-OLED). For example, the pixels may be formed on a silicon substrate. For example, the display device may be a microdisplay including pixels formed on a silicon substrate.

[0066] The pixel receives a first gate signal GW, a second gate signal GR, the data voltage VDATA, and the transmit signal EM, and emits light according to the level of the data voltage VDATA to display the image.

[0067] The pixel includes the light-emitting element EE, the first switching element T1, the second switching element T2, the third switching element T3, the fourth switching element T4, and the fifth switching element T5.

[0068] The first switching element T1 includes a first control electrode connected to the first node N1, a first electrode connected to the second node N2, and a second electrode connected to the anode electrode of the light-emitting element EE.

[0069] The second switching element T2 and the fifth switching element T5 are connected in series between the data line to which the data voltage VDATA is applied and the first node N1.

[0070] The third switching element T3 includes a first control electrode to which the transmission signal EM is applied, a first electrode to which the first power supply voltage ELVDD is applied, and a second electrode connected to the second node N2.

[0071] The fourth switching element T4 includes a first control electrode to which the second gate signal GR is applied, a first electrode to which a first voltage is applied, and a second electrode connected to the anode electrode of the light-emitting element EE. In this embodiment, the first voltage may be an initialization voltage VINT. That is, the fourth switching element T4 may include the first control electrode to which the second gate signal GR is applied, the first electrode to which the initialization voltage VINT is applied, and the second electrode connected to the anode electrode of the light-emitting element EE.

[0072] The first gate signal GW is applied to the first control electrode of the second switching element T2. The second switching element T2 can write the data voltage VDATA to the first control electrode of the first switching element T1 in response to the first gate signal GW.

[0073] The fifth switching element T5 is connected in a diode configuration. Therefore, the fifth switching element T5 can be always turned on during the driving of the pixel. The fifth switching element T5 acts as a resistor, and can reduce the voltage level applied to the first electrode of the fifth switching element T5 and transmit that voltage to the second electrode. That is, the data voltage VDATA applied to the data line can be reduced by the fifth switching element T5, thereby being written to the first control electrode of the first switching element T1. Therefore, a relatively high data voltage VDATA can be utilized, and the data swing range can be extended compared to the case without the fifth switching element T5. For example, if the range of the data voltage VDATA without the fifth switching element T5 is 1V to 2V, then the range of the data voltage VDATA with the fifth switching element T5 can be 2V to 4V. Here, the data swing range without the fifth switching element T5 can be 1V, the difference between 2V and 1V, and the data swing range with the fifth switching element T5 can be 2V, the difference between 4V and 2V.

[0074] For example, the channel length of the first switching element T1 can be equal to the channel length of the fifth switching element T5.

[0075] The cathode electrode of the light-emitting element EE is supplied with a second power supply voltage, ELVSS.

[0076] For example, the first power supply voltage ELVDD can be a high power supply voltage used to make the light-emitting element EE emit light, and the second power supply voltage ELVSS can be a low power supply voltage used to make the light-emitting element EE emit light. The first power supply voltage ELVDD can be greater than the second power supply voltage ELVSS.

[0077] The pixel may further include: a first capacitor C1, including a first electrode connected to the first node N1 and a second electrode connected to the second node N2; and a second capacitor C2, including a first electrode connected to the first node N1 and a second electrode to which the initialization voltage VINT is applied.

[0078] The pixel may further include: a third capacitor C3, including a first electrode connected to the first node N1 and a second electrode connected to the anode electrode of the light-emitting element EE.

[0079] In this embodiment, the first switching element T1, the second switching element T2, and the third switching element T3 can be P-type transistors. The fourth switching element T4 can be an N-type transistor. The fifth switching element T5 can be a P-type transistor.

[0080] For example, the first switching element T1, the second switching element T2, the third switching element T3, and the fifth switching element T5 can be low-temperature polysilicon (LTPS) thin-film transistors. For example, the fourth switching element T4 can be an oxide semiconductor transistor.

[0081] In this embodiment, the second switching element T2 and the fifth switching element T5 can be directly connected to the first node N1, and the fifth switching element T5 can be directly connected to the data line. Specifically, the fifth switching element T5 may include a first control electrode connected to the third node N3, a first electrode connected to the data line, and a second electrode connected to the third node N3. The second switching element T2 may include a first control electrode to which the first gate signal GW is applied, a first electrode connected to the third node N3, and a second electrode connected to the first node N1.

[0082] For example, the first switching element T1 may further include a second control electrode to which the first power supply voltage ELVDD is applied. For example, the second switching element T2 may further include a second control electrode to which the first power supply voltage ELVDD is applied. For example, the third switching element T3 may further include a second control electrode to which the first power supply voltage ELVDD is applied. For example, the fourth switching element T4 may further include a second control electrode to which the initialization voltage VINT is applied. For example, the fifth switching element T5 may further include a second control electrode to which the first power supply voltage ELVDD is applied.

[0083] observe Figure 3 and Figure 4 During the first time period P1, the transmit signal EM may have an active level, the first gate signal GW may have an active level, and the second gate signal GR may have an active level. The first time period P1 may be an initialization period and a data writing period.

[0084] Here, when the switching element to which the signal is applied is P-type, the activation level can be low and the deactivation level can be high. Conversely, when the switching element to which the signal is applied is N-type, the activation level can be high and the deactivation level can be low.

[0085] During the first time period P1, the first switching element T1, the second switching element T2, the third switching element T3, the fourth switching element T4, and the fifth switching element T5 can be turned on.

[0086] During the first time period P1, the second switching element T2 provides the data voltage VDATA to the first node N1, and therefore, the data voltage VDATA can be written to the first capacitor C1. Furthermore, since a path is formed through the third switching element T3, the first switching element T1, and the fourth switching element T4, the first electrode of the first switching element T1 and the anode electrode of the light-emitting element EE can be initialized.

[0087] observe Figure 3 and Figure 5 In the second time period P2 following the first time period P1, the transmitted signal EM may have an inactive level, the first gate signal GW may have the active level, and the second gate signal GR may have the active level. The second time period P2 may be a compensation period.

[0088] During the second time period P2, the first switching element T1, the second switching element T2, the fourth switching element T4, and the fifth switching element T5 can be turned on, and the third switching element T3 can be turned off.

[0089] During the second time period P2, the second switching element T2 provides a data voltage VDATA to the first node N1. Therefore, the voltage of the first node N1 can be the data voltage VDATA, and the voltage of the second node N2 can be VDATA - VTH. Here, VDATA can be the data voltage, and VTH can be the threshold voltage of the first switching element T1. During the second time period P2, the threshold voltage of the first switching element T1 can be compensated.

[0090] observe Figure 3 and Figure 6 In the third period P3 following the second period P2, the transmit signal EM may have the activation level, the first gate signal GW may have the deactivation level, and the second gate signal GR may have the activation level. The third period P3 may be an anode hold period.

[0091] During the third time period P3, the first switching element T1, the third switching element T3, the fourth switching element T4, and the fifth switching element T5 can be turned on, while the second switching element T2 can be turned off.

[0092] During the third time period P3, the writing of the data voltage VDATA can be completed, and the anode electrode of the light-emitting element EE can be initialized to the initialization voltage VINT.

[0093] observe Figure 3 and Figure 7 In the fourth period P4 following the third period P3, the transmitted signal EM may have the activated level, the first gate signal GW may have the deactivated level, and the second gate signal GR may have the deactivated level. The fourth period P4 may be a light-emitting period.

[0094] During the fourth time period P4, the first switching element T1, the third switching element T3, and the fifth switching element T5 can be turned on, while the second switching element T2 and the fourth switching element T4 can be turned off.

[0095] During the fourth time period P4, the first power supply voltage ELVDD can be applied to the first switching element T1 to generate a drive current, and this drive current can be applied to the light-emitting element EE. That is, the light-emitting element EE can emit light with a brightness corresponding to the drive current. The drive current can be determined based on the gate-source voltage of the first switching element T1.

[0096] According to this embodiment, the pixel may include the fifth switching element T5 connected in a diode manner. The data voltage VDATA can be reduced in level by the fifth switching element T5 and applied to the first control electrode of the first switching element T1. Therefore, the data voltage VDATA can be used over a relatively wide range. In this way, the data swing range can be increased, thereby improving the display quality of the display panel 100.

[0097] The pixel may include five switching elements T1, T2, T3, T4, T5 and three capacitors C1, C2, C3. The pixel may include a relatively small number of switching elements and a relatively small number of capacitors, so that the pixel can be used in high-resolution display devices.

[0098] Figure 8 This is a circuit diagram showing the pixels of a display panel 100 of a display device according to an embodiment of the present invention.

[0099] Apart from the configuration of the fourth switching element T4 of the pixel, the display device according to this embodiment and Figures 1 to 7 The display devices are substantially the same, therefore, the same reference numerals are used for the same or similar components, and repeated descriptions are omitted.

[0100] Reference Figure 1 , Figures 3 to 8 The display panel 100 includes a plurality of pixels, each of which includes a light-emitting element EE. For example, the light-emitting element EE may be a micro-organic light-emitting diode (Micro-OLED).

[0101] The pixel receives a first gate signal GW, a second gate signal GR, the data voltage VDATA, and the transmit signal EM, and emits light according to the level of the data voltage VDATA to display the image.

[0102] The pixel includes the light-emitting element EE, the first switching element T1, the second switching element T2, the third switching element T3, the fourth switching element T4, and the fifth switching element T5.

[0103] The second switching element T2 and the fifth switching element T5 are connected in series between the data line to which the data voltage VDATA is applied and the first node N1.

[0104] The fourth switching element T4 includes a first control electrode to which the second gate signal GR is applied, a first electrode to which a first voltage is applied, and a second electrode connected to the anode electrode of the light-emitting element EE. In this embodiment, the first voltage may be a second power supply voltage ELVSS. That is, the fourth switching element T4 may include the first control electrode to which the second gate signal GR is applied, the first electrode to which the second power supply voltage ELVSS is applied, and the second electrode connected to the anode electrode of the light-emitting element EE.

[0105] The cathode electrode of the light-emitting element EE is supplied with the second power supply voltage ELVSS.

[0106] The pixel may further include: a first capacitor C1, including a first electrode connected to the first node N1 and a second electrode connected to the second node N2; and a second capacitor C2, including a first electrode connected to the first node N1 and a second electrode to which the initialization voltage VINT is applied.

[0107] The pixel may further include: a third capacitor C3, including a first electrode connected to the first node N1 and a second electrode connected to the anode electrode of the light-emitting element EE.

[0108] In this embodiment, the first switching element T1, the second switching element T2, and the third switching element T3 can be P-type transistors. The fourth switching element T4 can be an N-type transistor. The fifth switching element T5 can be a P-type transistor.

[0109] For example, the first switching element T1 may further include a second control electrode to which the first power supply voltage ELVDD is applied. For example, the second switching element T2 may further include a second control electrode to which the first power supply voltage ELVDD is applied. For example, the third switching element T3 may further include a second control electrode to which the first power supply voltage ELVDD is applied. For example, the fourth switching element T4 may further include a second control electrode to which the second power supply voltage ELVSS is applied. For example, the fifth switching element T5 may further include a second control electrode to which the first power supply voltage ELVDD is applied.

[0110] According to this embodiment, the pixel may include the fifth switching element T5 connected in a diode manner. The data voltage VDATA can be reduced in level by the fifth switching element T5 and applied to the first control electrode of the first switching element T1. Therefore, the data voltage VDATA can be used over a relatively wide range. In this way, the data swing range can be increased, thereby improving the display quality of the display panel 100.

[0111] The pixel may include five switching elements T1, T2, T3, T4, T5 and three capacitors C1, C2, C3. The pixel may include a relatively small number of switching elements and a relatively small number of capacitors, so that the pixel can be used in high-resolution display devices.

[0112] Figure 9 This is a circuit diagram showing the pixels of a display panel 100 of a display device according to an embodiment of the present invention.

[0113] Apart from the configuration of the fourth switching element T4 of the pixel, the display device according to this embodiment and Figures 1 to 7 The display devices are substantially the same, therefore, the same reference numerals are used for the same or similar components, and repeated descriptions are omitted.

[0114] Reference Figure 1 , Figures 3 to 7 as well as Figure 9 The display panel 100 includes a plurality of pixels, each of which includes a light-emitting element EE. For example, the light-emitting element EE may be a micro-organic light-emitting diode (Micro-OLED).

[0115] The pixel receives a first gate signal GW, a second gate signal GR, the data voltage VDATA, and the transmit signal EM, and emits light according to the level of the data voltage VDATA to display the image.

[0116] The pixel includes the light-emitting element EE, the first switching element T1, the second switching element T2, the third switching element T3, the fourth switching element T4, and the fifth switching element T5.

[0117] The second switching element T2 and the fifth switching element T5 are connected in series between the data line to which the data voltage VDATA is applied and the first node N1.

[0118] The fourth switching element T4 includes a first control electrode to which the second gate signal GR is applied, a first electrode to which a first voltage is applied, and a second electrode connected to the anode electrode of the light-emitting element EE. In this embodiment, the first voltage may be ground voltage GND. That is, the fourth switching element T4 may include the first control electrode to which the second gate signal GR is applied, the first electrode to which ground voltage GND is applied, and the second electrode connected to the anode electrode of the light-emitting element EE.

[0119] The cathode electrode of the light-emitting element EE is supplied with the second power supply voltage ELVSS.

[0120] The pixel may further include: a first capacitor C1, including a first electrode connected to the first node N1 and a second electrode connected to the second node N2; and a second capacitor C2, including a first electrode connected to the first node N1 and a second electrode to which the initialization voltage VINT is applied.

[0121] The pixel may further include: a third capacitor C3, including a first electrode connected to the first node N1 and a second electrode connected to the anode electrode of the light-emitting element EE.

[0122] In this embodiment, the first switching element T1, the second switching element T2, and the third switching element T3 can be P-type transistors. The fourth switching element T4 can be an N-type transistor. The fifth switching element T5 can be a P-type transistor.

[0123] For example, the first switching element T1 may further include a second control electrode to which the first power supply voltage ELVDD is applied. For example, the second switching element T2 may further include a second control electrode to which the first power supply voltage ELVDD is applied. For example, the third switching element T3 may further include a second control electrode to which the first power supply voltage ELVDD is applied. For example, the fourth switching element T4 may further include a second control electrode to which the ground voltage GND is applied. For example, the fifth switching element T5 may further include a second control electrode to which the first power supply voltage ELVDD is applied.

[0124] According to this embodiment, the pixel may include the fifth switching element T5 connected in a diode manner. The data voltage VDATA can be reduced in level by the fifth switching element T5 and applied to the first control electrode of the first switching element T1. Therefore, the data voltage VDATA can be used over a relatively wide range. In this way, the data swing range can be increased, thereby improving the display quality of the display panel 100.

[0125] The pixel may include five switching elements T1, T2, T3, T4, T5 and three capacitors C1, C2, C3. The pixel may include a relatively small number of switching elements and a relatively small number of capacitors, so that the pixel can be used in high-resolution display devices.

[0126] Figure 10 This is a circuit diagram showing the pixels of a display panel 100 of a display device according to an embodiment of the present invention. Figure 11 It shows that it is applied to Figure 10 A timing diagram of an example of the input signal of a pixel.

[0127] Apart from the configuration of the fourth switching element T4 of the pixel, the display device according to this embodiment and Figures 1 to 7 The display devices are substantially the same, therefore, the same reference numerals are used for the same or similar components, and repeated descriptions are omitted.

[0128] Reference Figure 1 , Figures 4 to 7 , Figure 10 as well as Figure 11 The display panel 100 includes a plurality of pixels, each of which includes a light-emitting element EE. For example, the light-emitting element EE may be a micro-organic light-emitting diode (Micro-OLED).

[0129] The pixel receives a first gate signal GW, a second gate signal GR, the data voltage VDATA, and the transmit signal EM, and emits light according to the level of the data voltage VDATA to display the image.

[0130] The pixel includes the light-emitting element EE, the first switching element T1, the second switching element T2, the third switching element T3, the fourth switching element T4, and the fifth switching element T5.

[0131] The second switching element T2 and the fifth switching element T5 are connected in series between the data line to which the data voltage VDATA is applied and the first node N1.

[0132] The fourth switching element T4 includes a first control electrode to which the second gate signal GR is applied, a first electrode to which a first voltage is applied, and a second electrode connected to the anode electrode of the light-emitting element EE. In this embodiment, the first voltage may be a bias voltage VBIAS. That is, the fourth switching element T4 may include the first control electrode to which the second gate signal GR is applied, the first electrode to which the bias voltage VBIAS is applied, and the second electrode connected to the anode electrode of the light-emitting element EE.

[0133] The cathode electrode of the light-emitting element EE is supplied with the second power supply voltage ELVSS.

[0134] The pixel may further include: a first capacitor C1, including a first electrode connected to the first node N1 and a second electrode connected to the second node N2; and a second capacitor C2, including a first electrode connected to the first node N1 and a second electrode to which the initialization voltage VINT is applied.

[0135] The pixel may further include: a third capacitor C3, including a first electrode connected to the first node N1 and a second electrode connected to the anode electrode of the light-emitting element EE.

[0136] In this embodiment, the first switching element T1, the second switching element T2, and the third switching element T3 can be P-type transistors. The fourth switching element T4 can be a P-type transistor. The fifth switching element T5 can be a P-type transistor.

[0137] In this embodiment, the first switching element T1 to the fifth switching element T5 may all include P-type transistors, thus simplifying the manufacturing process.

[0138] For example, the first switching element T1 may further include a second control electrode to which the first power supply voltage ELVDD is applied. For example, the second switching element T2 may further include a second control electrode to which the first power supply voltage ELVDD is applied. For example, the third switching element T3 may further include a second control electrode to which the first power supply voltage ELVDD is applied. For example, the fourth switching element T4 may further include a second control electrode to which the first power supply voltage ELVDD is applied. For example, the fifth switching element T5 may further include a second control electrode to which the first power supply voltage ELVDD is applied.

[0139] exist Figure 2 In the circuit diagram, the fourth switching element T4 can be an N-type transistor. Figure 10 In the circuit diagram, the fourth switching element T4 can be a P-type transistor. Therefore, besides the waveform of the second gate signal GR applied to the first control electrode of the fourth switching element T4, the waveform of the second gate signal GR is also different. Figure 3 In contrast to the timing diagram, Figure 11 The timing diagram and Figure 3 The timing diagrams are essentially the same.

[0140] According to this embodiment, the pixel may include the fifth switching element T5 connected in a diode manner. The data voltage VDATA can be reduced in level by the fifth switching element T5 and applied to the first control electrode of the first switching element T1. Therefore, the data voltage VDATA can be used over a relatively wide range. In this way, the data swing range can be increased, thereby improving the display quality of the display panel 100.

[0141] The pixel may include five switching elements T1, T2, T3, T4, T5 and three capacitors C1, C2, C3. The pixel includes a relatively small number of switching elements and a relatively small number of capacitors, thus enabling its application in high-resolution display devices.

[0142] Figure 12 This is a circuit diagram showing the pixels of a display panel 100 of a display device according to an embodiment of the present invention.

[0143] Apart from the configuration of the second switching element T2 and the fifth switching element T5 of the pixel, the display device according to this embodiment and Figures 1 to 7 The display devices are substantially the same, therefore, the same reference numerals are used for the same or similar components, and repeated descriptions are omitted.

[0144] Reference Figure 1 , Figures 3 to 7 as well as Figure 12 The display panel 100 includes a plurality of pixels, each of which includes a light-emitting element EE. For example, the light-emitting element EE may be a micro-organic light-emitting diode (Micro-OLED).

[0145] The pixel receives a first gate signal GW, a second gate signal GR, the data voltage VDATA, and the transmit signal EM, and emits light according to the level of the data voltage VDATA to display the image.

[0146] The pixel includes the light-emitting element EE, the first switching element T1, the second switching element T2, the third switching element T3, the fourth switching element T4, and the fifth switching element T5.

[0147] The second switching element T2 and the fifth switching element T5 are connected in series between the data line to which the data voltage VDATA is applied and the first node N1.

[0148] The fourth switching element T4 includes a first control electrode to which the second gate signal GR is applied, a first electrode to which a first voltage is applied, and a second electrode connected to the anode electrode of the light-emitting element EE.

[0149] The first gate signal GW is applied to the first control electrode of the second switching element T2. The second switching element T2 can write the data voltage VDATA to the first control electrode of the first switching element T1 in response to the first gate signal GW.

[0150] The fifth switching element T5 is connected in a diode configuration. Therefore, the fifth switching element T5 can be always on during the driving of the pixel. The fifth switching element T5 acts as a resistor, acting as a diode, and can reduce the level of the voltage applied to the first electrode of the fifth switching element T5 and transmit that voltage to the second electrode. That is, the data voltage VDATA applied to the data line can be reduced by the fifth switching element T5, thereby being written to the first control electrode of the first switching element T1. Therefore, a relatively high data voltage VDATA can be utilized, and the data swing range can be extended compared to the case without the fifth switching element T5. For example, if the range of the data voltage VDATA without the fifth switching element T5 is 1V to 2V, then the range of the data voltage VDATA with the fifth switching element T5 can be 2V to 4V. Here, the data swing range without the fifth switching element T5 can be 1V, the difference between 2V and 1V, and the data swing range with the fifth switching element T5 can be 2V, the difference between 4V and 2V.

[0151] For example, the channel length of the first switching element T1 can be equal to the channel length of the fifth switching element T5.

[0152] The cathode electrode of the light-emitting element EE can be supplied with a second power supply voltage ELVSS.

[0153] The pixel may further include: a first capacitor C1, including a first electrode connected to the first node N1 and a second electrode connected to the second node N2; and a second capacitor C2, including a first electrode connected to the first node N1 and a second electrode to which the initialization voltage VINT is applied.

[0154] The pixel may further include: a third capacitor C3, including a first electrode connected to the first node N1 and a second electrode connected to the anode electrode of the light-emitting element EE.

[0155] In this embodiment, the fifth switching element T5 can be directly connected to the first node N1, and the second switching element T2 can be directly connected to the data line. Specifically, the fifth switching element T5 may include a first control electrode connected to the first node N1, a first electrode connected to the third node N3, and a second electrode connected to the first node N1. The second switching element T2 may include a first control electrode to which the first gate signal GW is applied, a first electrode connected to the data line, and a second electrode connected to the third node N3.

[0156] For example, the first switching element T1 may further include a second control electrode to which the first power supply voltage ELVDD is applied. For example, the second switching element T2 may further include a second control electrode to which the first power supply voltage ELVDD is applied. For example, the third switching element T3 may further include a second control electrode to which the first power supply voltage ELVDD is applied. For example, the fourth switching element T4 may further include a second control electrode to which the initialization voltage VINT is applied. For example, the fifth switching element T5 may further include a second control electrode to which the first power supply voltage ELVDD is applied.

[0157] Figure 12 It shows in Figure 2 The circuit diagram shows a scenario where the positions of the second switching element T2 and the fifth switching element T5 are interchanged. Although not shown, Figure 8 In the circuit diagram, the positions of the second switching element T2 and the fifth switching element T5 can be interchanged. Although not shown, Figure 9 In the circuit diagram, the positions of the second switching element T2 and the fifth switching element T5 can be interchanged. Although not shown, Figure 10 In the circuit diagram, the positions of the second switching element T2 and the fifth switching element T5 can be interchanged.

[0158] According to this embodiment, the pixel may include the fifth switching element T5 connected in a diode manner. The data voltage VDATA can be reduced in level by the fifth switching element T5 and applied to the first control electrode of the first switching element T1. Therefore, the data voltage VDATA can be used over a relatively wide range. In this way, the data swing range can be increased, thereby improving the display quality of the display panel 100.

[0159] The pixel may include five switching elements T1, T2, T3, T4, T5 and three capacitors C1, C2, C3. The pixel includes a relatively small number of switching elements and a relatively small number of capacitors, thus enabling its application in high-resolution display devices.

[0160] Figure 13 This is a block diagram illustrating an electronic device 1000 according to an embodiment of the present invention. Figure 14 It is shown Figure 13 The electronic device 1000 is implemented as an example of a virtual reality display system. Figure 15 It is shown Figure 13 The diagram shows an example of an electronic device 1000 implemented as a smartphone.

[0161] Reference Figures 1 to 15 The electronic device 1000 may include a processor 1010, a memory device 1020, a storage device 1030, an input / output device 1040, a power supply 1050, and a display device 1060. In this case, the display device 1060 may be... Figure 1 The display device. In addition, the electronic device 1000 may also include multiple ports that can communicate with graphics cards, sound cards, memory cards, universal serial bus (USB) devices, or other systems.

[0162] According to one embodiment, such as Figure 15 As shown, the electronic device 1000 can be implemented as a smartphone. However, this is only an example, and the electronic device 1000 is not limited to this. For example, the electronic device 1000 can be implemented as a mobile phone, video phone, smart tablet, smartwatch, tablet PC, vehicle navigation system, computer monitor, laptop computer, head-mounted display device, etc.

[0163] Processor 1010 can perform specific calculations or tasks. According to embodiments, processor 1010 can be a microprocessor, central processing unit, application processor, etc. Processor 1010 can be connected to other components via address bus, control bus, and data bus. According to embodiments, processor 1010 can also be connected to an expansion bus such as a Peripheral Component Interconnect (PCI) bus.

[0164] The processor 1010 can send to Figure 1The drive control unit 200 outputs the input image data IMG and the input control signal CONT.

[0165] The memory device 1020 can store data required for the operation of the electronic device 1000. For example, memory device 1020 may include non-volatile memory such as erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory device, phase change random access memory (PRAM), resistive random access memory (RRAM), nano-floating gate memory (NFGM), polymer random access memory (PoRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), and / or non-volatile memory such as dynamic random access memory (DRAM) and static random access memory (SRAM). Volatile memory devices such as memory devices and mobile DRAM devices.

[0166] Storage device 1030 may include a solid-state drive (SSD), a hard disk drive (HDD), a CD-ROM, etc. Input / output device 1040 may include input devices such as a keyboard, keypad, touchpad, touchscreen, mouse, etc., and output devices such as speakers, printers, etc. According to an embodiment, display device 1060 may also be included in input / output device 1040. Power supply 1050 can supply the power required for the operation of electronic device 1000. Display device 1060 can be connected to other components via the bus or other communication links.

[0167] Reference Figure 14The virtual reality (VR) display system may include a lens unit 10, a display device 20, and a housing 30. The display device 20 is arranged adjacent to the lens unit 10. The housing 30 can house the lens unit 10 and the display device 20. Figure 14 The illustration shows the lens portion 10 and the display device 20 housed on a first side of the housing 30, but the invention is not limited thereto. For example, the lens portion 10 may be housed on the first side of the housing 30, and the display device 20 may be housed on a second side of the housing 30 opposite to the first side. When the lens portion 10 and the display device 20 are housed on different sides of each other with respect to the housing 30, the housing 30 may have a transmissive portion for transmitting light.

[0168] For example, the virtual reality display system may be a head-mounted display system worn on the user's head. Although not shown, the virtual reality display system may also include a headband for wearing on the user's head.

[0169] In contrast, the virtual reality display system can also take the form of smart glasses, which are shaped like eyeglasses.

[0170] Furthermore, the electronic device 1000 can also be implemented as an augmented reality (AR) display system. The AR display system can take the form of a smartphone, smart glasses, a head-mounted display, etc., and its form is not limited to these.

[0171] Furthermore, the electronic device 1000 can also be implemented as a mixed reality display system supporting mixed reality (MR). The mixed reality display system can take the form of a smartphone, smart glasses, a head-mounted display, etc., and its form is not limited to these.

[0172] Industrial availability The pixels, display device, and electronic device of the present invention described above can improve the display quality of the display panel by increasing the data swing range. Furthermore, a high-resolution display device can be achieved.

[0173] The above description refers to the embodiments. However, those skilled in the art will understand that various modifications and alterations can be made to the present invention without departing from the concept and scope of the invention as set forth in the claims.

Claims

1. A pixel, comprising: Light-emitting elements; The first switching element includes a control electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to the anode electrode of the light-emitting element; The second and fifth switching elements are connected in series between the data line and the first node; The third switching element includes a control electrode to which a transmission signal is applied, a first electrode to which a first power supply voltage is applied, and a second electrode connected to the second node; as well as The fourth switching element includes a control electrode to which a second gate signal is applied, a first electrode to which a first voltage is applied, and a second electrode connected to the anode electrode of the light-emitting element. The control electrode of the second switching element is supplied with a first gate signal. The fifth switching element is connected in a diode configuration. A second power supply voltage is applied to the cathode electrode of the light-emitting element.

2. The pixel as described in claim 1, further comprising: The first capacitor includes a first electrode connected to the first node and a second electrode connected to the second node; as well as The second capacitor includes a first electrode connected to the first node and a second electrode to which an initialization voltage is applied.

3. The pixel as described in claim 2, further comprising: The third capacitor includes a first electrode connected to the first node and a second electrode connected to the anode electrode of the light-emitting element.

4. The pixel as claimed in claim 2, wherein, The first switching element, the second switching element, and the third switching element are P-type transistors. The fourth switching element is an N-type transistor.

5. The pixel as claimed in claim 4, wherein, The first voltage of the fourth switching element is the initialization voltage.

6. The pixel as claimed in claim 4, wherein, The first voltage of the fourth switching element is the second power supply voltage.

7. The pixel as claimed in claim 4, wherein, A ground voltage is applied to the first electrode of the fourth switching element.

8. The pixel as claimed in claim 1, wherein, The first switching element, the second switching element, the third switching element, and the fourth switching element are P-type transistors. The first voltage of the fourth switching element is the bias voltage.

9. The pixel as claimed in claim 1, wherein, The fifth switching element includes a control electrode connected to the third node, a first electrode connected to the data line, and a second electrode connected to the third node. The second switching element includes the control electrode to which the first gate signal is applied, a first electrode connected to the third node, and a second electrode connected to the first node.

10. The pixel as claimed in claim 1, wherein, The fifth switching element includes a control electrode connected to the first node, a first electrode connected to the third node, and a second electrode connected to the first node. The second switching element includes the control electrode to which the first gate signal is applied, a first electrode connected to the data line, and a second electrode connected to the third node.

11. The pixel as claimed in claim 1, wherein, In the first period, The transmitted signal has an activation level. The first gate signal has an activation level. The second gate signal has an activation level.

12. The pixel as claimed in claim 11, wherein, During the first time period, The first switching element, the second switching element, the third switching element, the fourth switching element, and the fifth switching element are turned on.

13. The pixel as claimed in claim 11, wherein, In the second period following the first period The transmitted signal has an inactive level. The first gate signal has the activation level. The second gate signal has the activation level.

14. The pixel as claimed in claim 13, wherein, In the second time period, The first switching element, the second switching element, the fourth switching element, and the fifth switching element are turned on. The third switching element is turned off.

15. The pixel as claimed in claim 13, wherein, In the third period following the second period, The transmitted signal has the activation level. The first gate signal has an inactive level. The second gate signal has the activation level.

16. The pixel of claim 15, wherein, In the third time period, The first switching element, the third switching element, the fourth switching element, and the fifth switching element are turned on. The second switching element is turned off.

17. The pixel as claimed in claim 15, wherein, In the fourth period following the third period, The transmitted signal has the activation level. The first gate signal has the inactive level. The second gate signal has an inactive level. In the fourth time period, The first switching element, the third switching element, and the fifth switching element are turned on. The second switching element and the fourth switching element are turned off.

18. The pixel as claimed in claim 1, wherein, The channel length of the first switching element is equal to the channel length of the fifth switching element.

19. A display device, comprising: Display panel, including pixels; The gate driving section outputs a gate signal to the pixel; as well as The data driving unit outputs data voltage to the pixel. Wherein, the pixel is the pixel according to any one of claims 1 to 18. The data line is supplied with the data voltage.

20. An electronic device comprising: Display panel, including pixels; The gate driving section outputs a gate signal to the pixel; The data driving unit outputs data voltage to the pixel; A drive control unit controls the operation of the gate drive unit and the data drive unit; as well as The processor outputs the input image data and input control signals to the drive control unit. The pixel is the pixel according to any one of claims 1 to 18. The data line is supplied with the data voltage.

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