Power management and fault self-recovery control module for marine master and slave clocks

Abstract

The invention relates to a power management and fault self-recovery control module of a marine master-slave clock, and relates to the technical field of marine master-slave clocks. A power management and fault self-recovery control module is located in a master clock, is used for providing direct current power supply for each sub-clock, and comprises a protection switch circuit, a fault monitoring circuit, a fault reset circuit and a control management circuit; an automatic fault recovery mode and a manual fault recovery mode are provided, when output overvoltage, output overcurrent, output short circuit and input undervoltage occur in a secondary clock power supply channel, output turn-off and fault alarm are carried out, and accidental power supply faults can be processed through automatic fault recovery or manual fault recovery can be carried out through an upper computer instruction; starting current and peak power consumption of the master clock can be reduced by managing and controlling power supply channels of the slave clocks. According to the invention, secondary clock power supply management, power supply fault monitoring and self-recovery control are provided for the marine primary and secondary clock, the maintainability and reliability of the marine primary and secondary clock are improved, and the marine primary and secondary clock has high application value.

Description

Technical Field

[0001] This invention relates to the field of marine master-slave clock technology, specifically to a power management and fault self-recovery control module for a marine master-slave clock. Background Technology

[0002] Marine master-slave clocks receive time signals from higher command and, through flexible configuration of the master and slave clocks, distribute standard time information to all locations on board that require time display, providing continuous and unified time display services. A marine master-slave clock system consists of one master clock and several slave clocks. The master clock has multiple slave clock interfaces, each connecting to several slave clocks. The master clock provides DC power and time information to each slave clock.

[0003] The slave clocks connected to the various interfaces of the master clock are connected in parallel. During installation, use, and maintenance, power supply abnormalities in the slave clocks may occur due to human error, sudden anomalies, or operational malfunctions, including output overvoltage, output overcurrent, and output short circuits. Traditional marine master-slave clocks often add resettable fuses or fusible fuses to the power output interfaces of the master clock to protect the power interfaces of the master and slave clocks in case of output short circuits or overcurrents. When a fault occurs, the fusible fuse relies on the thermal effect of current; when the current abnormally increases, the fuse heats up and melts, thus providing protection. However, the fuse often needs to be replaced repeatedly after a fault occurs. Resettable fuses rely on the thermal effect of materials; when the current abnormally increases, the resistance increases sharply, thus breaking the circuit. When the fault is cleared, the fuse automatically returns to the conducting state. However, they have disadvantages such as slow response speed, long recovery time, and reduced protection capability under high temperature conditions. Traditional solutions cannot effectively identify and respond quickly to faults, reducing the maintainability and reliability of the master-slave clock equipment.

[0004] To address the above technical problems, this invention proposes a power management and fault self-recovery control module for marine master-slave clocks. Summary of the Invention

[0005] The purpose of this invention is to overcome the shortcomings of existing technologies and provide a power management and fault self-recovery control module for marine master-slave clocks. Located inside the master clock, this module provides DC power to each slave clock and performs power management and fault self-recovery control. It includes a protection switch circuit, a fault monitoring circuit, a fault reset circuit, and a control management circuit. It features both automatic and manual fault recovery modes. When output overvoltage, output overcurrent, output short circuit, or input undervoltage occurs in the slave clock power supply channel, it shuts off the output and issues a fault alarm. It can handle intermittent power supply faults through automatic fault recovery or perform manual fault recovery via a host computer command. By managing and controlling the power supply channels of each slave clock, it can reduce the starting current and peak power consumption of the master clock. This invention provides slave clock power supply management, power supply fault monitoring, and self-recovery control methods for marine master-slave clocks, improving their maintainability and reliability. It is simple to implement, has good versatility, and has high application value.

[0006] The technical problem solved by this invention is achieved through the following technical solution: A power management and fault self-recovery control module for a marine master-slave clock is disclosed. The marine master-slave clock consists of one master clock and several slave clocks. The master clock has multiple slave clock interfaces, each of which connects to several slave clocks. The master clock is equipped with a power management and fault self-recovery control module, which provides DC power to each slave clock and performs power management and fault self-recovery control.

[0007] Furthermore, the power management and fault self-recovery control module includes a protection switch circuit, a fault monitoring circuit, a fault reset circuit, and a control management circuit; the protection switch circuit includes a soft-start control circuit, an output overvoltage protection circuit, an output overcurrent protection circuit, and a switch circuit; the fault monitoring circuit includes an opto-isolation circuit and a fault feedback circuit; the fault reset circuit includes an opto-isolation circuit and an enable control circuit; and the control management circuit includes a main control circuit, a log storage circuit, and a communication interaction circuit.

[0008] Furthermore, the power management and fault self-recovery control module monitors the power supply status of each slave clock interface through a fault monitoring circuit, including output overvoltage, output overcurrent, and output short circuit. The power management and fault self-recovery control module reports the power-on status, fault status, and input power supply status information of the slave clock power supply output interface to the host computer in real time through a communication interaction circuit. The power management and fault self-recovery control module receives instructions from the host computer to manage and control the output of the slave clock power supply interface to enable or disable, and to read fault log information. Log reading and writing are completed through the SPI bus interface.

[0009] Furthermore, the power management and fault self-recovery control module includes an automatic fault recovery mode and a manual fault recovery mode, and its workflow is as follows: The power management and fault self-recovery control module operates by default in manual fault recovery mode, specifically as follows: (1) After the power management and fault self-recovery control module is powered on, the control management circuit outputs n enable signals, which enable the power supply output of n protection switch circuits through the fault reset circuit respectively; (2) The fault monitoring circuit monitors the input voltage, output voltage, and output current of the protection switch circuit in real time. When the i-th protection switch circuit is detected to have output overvoltage, output overcurrent, output short circuit, or input undervoltage, it sends the corresponding fault alarm information to the control management circuit and immediately controls the cut-off of the i-th power supply output. (3) The control and management circuit receives the fault alarm information, and after the main control circuit calculates it, it keeps the output of the i-th channel closed. It reports the fault alarm information and the output channel shutdown information to the host computer through the communication interaction circuit, and inputs the relevant information to the log storage circuit. (4) After the fault occurs, wait for manual troubleshooting on site; after the troubleshooting is completed, send the power supply restoration command for the i-th channel through the host computer. After the control management circuit receives the command, it controls the power supply output of the i-th channel to be reset through the fault reset circuit. (5) Receive instructions from the host computer and complete the operation of switching working modes, reading logs, and setting parameters.

[0010] The power management and fault self-recovery control module can be set to automatic fault recovery via a host computer to automatically handle intermittent faults. Its specific operating mode is as follows: 1) After the power management and fault self-recovery control module is powered on, the control management circuit outputs n enable signals, which enable the n protection switch circuits to start power supply output through the fault reset circuit; 2) The fault monitoring circuit monitors the input voltage, output voltage, and output current of the protection switch circuit in real time. When the i-th protection switch circuit is detected to have output overvoltage, output overcurrent, output short circuit, or input undervoltage, it sends the corresponding fault alarm information to the control management circuit and immediately controls the cut-off of the i-th power supply output. 3) The control and management circuit receives fault alarm information, and after the main control circuit calculates it, it keeps the output of the i-th channel closed. It reports the fault alarm information and the output channel shutdown information to the host computer through the communication interaction circuit, and inputs the relevant information to the log storage circuit. 4) After a fault occurs, if the waiting time of the control management circuit exceeds the fault recovery judgment time, it will automatically control the power supply output of the i-th channel to be turned on. If the power supply of the i-th channel is restored to normal, it will continue to be maintained; otherwise, the power supply will be turned off and the fault will be reported. 5) If the i-th power supply channel continues to fail, repeat step 4). When the number of failures exceeds the fault recovery count threshold, the power supply output of the i-th channel will no longer be automatically controlled to recover. 6) After step 5) occurs, wait for on-site manual troubleshooting; after troubleshooting is completed, send the power supply restoration command for the i-th channel through the host computer. After receiving the command, the control management circuit controls the power supply output of the i-th channel to reset through the fault reset circuit. 7) Receive instructions from the host computer and complete operations such as switching working modes, reading logs, and setting parameters.

[0011] Furthermore, when the device starts up, the power management and fault self-recovery control module manages and controls each slave clock interface to turn on the power supply output sequentially at fixed time intervals, thereby reducing the start-up current and peak power consumption of the master clock.

[0012] The advantages and positive effects of this invention are: This invention discloses a power management and fault self-recovery control module for marine master-slave clocks. Located inside the master clock, this module provides DC power to each slave clock and performs power management and fault self-recovery control. It includes a protection switch circuit, a fault monitoring circuit, a fault reset circuit, and a control management circuit. It features both automatic and manual fault recovery modes. When output overvoltage, output overcurrent, output short circuit, or input undervoltage occurs in the slave clock power supply channel, it shuts off the output and issues a fault alarm. It can handle intermittent power supply faults through automatic fault recovery or perform manual fault recovery via a host computer command. It supports fault alarms, log recording and reading. By managing and controlling each slave clock power supply channel, it can reduce the master clock's starting current and peak power consumption. This invention provides slave clock power supply management, power supply fault monitoring, and self-recovery control for marine master-slave clocks, improving their maintainability and reliability. It is simple to implement, highly versatile, and has high application value. Attached Figure Description

[0013] Figure 1 This is a schematic diagram of the power management and fault self-recovery control module for marine master-daughter clocks of the present invention. Figure 2 This is a schematic diagram of the power management and fault self-recovery control module of the marine master-slave clock of the present invention. Figure 3 This is a schematic diagram illustrating the working process of the power management and fault self-recovery control module of the marine master-slave clock of the present invention. Detailed Implementation

[0014] The present invention will be further described in detail below through specific embodiments. The following embodiments are merely descriptive and not limiting, and should not be used to limit the scope of protection of the present invention.

[0015] like Figure 1 As shown, a power management and fault self-recovery control module for a marine master-slave clock is disclosed. The marine master-slave clock consists of one master clock and several slave clocks. The master clock has multiple slave clock interfaces, each of which connects to several slave clocks. The master clock is equipped with a power management and fault self-recovery control module, which provides DC power to each slave clock and performs power management and fault self-recovery control. Furthermore, when the device is started, the power management and fault self-recovery control module manages and controls each slave clock interface to sequentially turn on the power supply output at fixed time intervals, thereby reducing the start-up current and peak power consumption of the master clock.

[0016] The marine master-slave clock consists of one master clock and several slave clocks; the master clock has eight slave clock interfaces, and each slave clock interface is connected to several slave clocks in parallel. The master clock converts AC 220V power to DC 24V and 5V power through a voltage regulator module and inputs them to the power management and fault self-recovery control module. Among them, 24V is used as the input of the protection switch circuit and finally outputs 8 channels to power the slave clock; 5V is used to power other circuits inside the power management and fault self-recovery control module. The power management and fault self-recovery control module monitors output channel faults and reports the status to the motherboard module in real time via the CAN bus. The motherboard module acts as the host computer, responsible for receiving status information, sending control commands, and controlling the display module to complete the human-machine interface display through LVDS signals.

[0017] like Figure 2 As shown, the power management and fault self-recovery control module adopts the following technical solution: The power management and fault self-recovery control module includes a protection switch circuit, a fault monitoring circuit, a fault reset circuit, and a control management circuit; the protection switch circuit includes a soft-start control circuit, an output overvoltage protection circuit, an output overcurrent protection circuit, and a switch circuit; the fault monitoring circuit includes an opto-isolation circuit and a fault feedback circuit; the fault reset circuit includes an opto-isolation circuit and an enable control circuit; and the control management circuit includes a main control circuit, a log storage circuit, and a communication interaction circuit.

[0018] The power management and fault self-recovery control module monitors the power supply status of each slave clock interface through a fault monitoring circuit, including output overvoltage, output overcurrent, and output short circuit. The power management and fault self-recovery control module reports the power-on status, fault status, and input power supply status of the slave clock power supply output interface to the host computer in real time through a communication interaction circuit. The power management and fault self-recovery control module receives instructions from the host computer to manage and control the output of the slave clock power supply interface to enable or disable, and to read fault log information. Log reading and writing are completed through the SPI bus interface.

[0019] like Figure 3 As shown, the power management and fault self-recovery control module operates in manual fault recovery mode by default. The specific operating mode is as follows: (1) After the power management and fault self-recovery control module is powered on, the control management circuit outputs n enable signals, which enable the power supply output of n protection switch circuits through the fault reset circuit respectively; among them, the fixed time interval for enabling the power supply output of each sub-clock interface is 1s. (2) The fault monitoring circuit monitors the input voltage, output voltage, and output current of the protection switch circuit in real time. When the i-th protection switch circuit is detected to have output overvoltage, output overcurrent, output short circuit, or input undervoltage, it sends the corresponding fault alarm information to the control management circuit and immediately controls the cut-off of the i-th power supply output. (3) The control and management circuit receives the fault alarm information, and after the main control circuit calculates it, it keeps the output of the i-th channel closed. It reports the fault alarm information and the output channel shutdown information to the host computer through the communication interaction circuit, and inputs the relevant information to the log storage circuit. (4) After the fault occurs, wait for manual troubleshooting on site; after the troubleshooting is completed, send the power supply restoration command for the i-th channel through the host computer. After the control management circuit receives the command, it controls the power supply output of the i-th channel to be reset through the fault reset circuit. (5) Receive instructions from the host computer and complete the operation of switching working modes, reading logs, and setting parameters.

[0020] The power management and fault self-recovery control module can be set to automatic fault recovery via the host computer to automatically handle intermittent faults. Its specific operating mode is as follows: 1) After the power management and fault self-recovery control module is powered on, the control management circuit outputs n enable signals, which enable the n protection switch circuits to start power supply output through the fault reset circuit; 2) The fault monitoring circuit monitors the input voltage, output voltage, and output current of the protection switch circuit in real time. When the i-th protection switch circuit is detected to have output overvoltage, output overcurrent, output short circuit, or input undervoltage, it sends the corresponding fault alarm information to the control management circuit and immediately controls the cut-off of the i-th power supply output. 3) The control and management circuit receives fault alarm information, and after the main control circuit calculates it, it keeps the output of the i-th channel closed. It reports the fault alarm information and the output channel shutdown information to the host computer through the communication interaction circuit, and inputs the relevant information to the log storage circuit. 4) After a fault occurs, if the waiting time of the control management circuit exceeds the fault recovery judgment time, it will automatically control the power supply output of the i-th channel to be turned on. If the power supply of the i-th channel is restored to normal, it will continue to be maintained; otherwise, the power supply will be turned off and the fault will be reported. The fault recovery judgment time is 3 seconds. 5) If the i-th power supply channel continues to fail, repeat step 4). When the number of failures exceeds the fault recovery count threshold, the power supply output of the i-th channel will no longer be automatically controlled to recover. The fault recovery count threshold is set to 5 times. 6) After step 5) occurs, wait for on-site manual troubleshooting; after troubleshooting is completed, send the power supply restoration command for the i-th channel through the host computer. After receiving the command, the control management circuit controls the power supply output of the i-th channel to reset through the fault reset circuit. 7) Receive instructions from the host computer and complete operations such as switching working modes, reading logs, and setting parameters.

[0021] This invention discloses a power management and fault self-recovery control module for marine master-slave clocks. Located inside the master clock, this module provides DC power to each slave clock and performs power management and fault self-recovery control. It includes a protection switch circuit, a fault monitoring circuit, a fault reset circuit, and a control management circuit. It features both automatic and manual fault recovery modes. When output overvoltage, output overcurrent, output short circuit, or input undervoltage occurs in the slave clock power supply channel, it shuts off the output and issues a fault alarm. It can handle intermittent power supply faults through automatic fault recovery or perform manual fault recovery via a host computer command. It supports fault alarms, log recording and reading. By managing and controlling each slave clock power supply channel, it can reduce the master clock's starting current and peak power consumption. This invention provides slave clock power supply management, power supply fault monitoring, and self-recovery control for marine master-slave clocks, improving their maintainability and reliability. It is simple to implement, highly versatile, and has high application value.

[0022] Although embodiments and drawings of the present invention have been disclosed for illustrative purposes, those skilled in the art will understand that various substitutions, variations and modifications are possible without departing from the spirit and scope of the present invention and the appended claims. Therefore, the scope of the present invention is not limited to the contents disclosed in the embodiments and drawings.

Claims

1. A power management and fault self-recovery control module for a marine master-slave clock, characterized in that: The marine master-slave clock consists of one master clock and several slave clocks; the master clock has multiple slave clock interfaces, each of which connects to several slave clocks; the master clock is equipped with a power management and fault self-recovery control module, which provides DC power to each slave clock and performs power management and fault self-recovery control.

2. The power management and fault self-recovery control module for a marine master-slave clock according to claim 1, characterized in that: The power management and fault self-recovery control module includes a protection switch circuit, a fault monitoring circuit, a fault reset circuit, and a control management circuit; the protection switch circuit includes a soft-start control circuit, an output overvoltage protection circuit, an output overcurrent protection circuit, and a switch circuit; the fault monitoring circuit includes an opto-isolation circuit and a fault feedback circuit; the fault reset circuit includes an opto-isolation circuit and an enable control circuit; and the control management circuit includes a main control circuit, a log storage circuit, and a communication interaction circuit.

3. The power management and fault self-recovery control module for a marine master-slave clock according to claim 1, characterized in that: The power management and fault self-recovery control module monitors the power supply status of each slave clock interface through a fault monitoring circuit, including output overvoltage, output overcurrent, and output short circuit. The power management and fault self-recovery control module reports the power-on status, fault status, and input power supply status of the slave clock power supply output interface to the host computer in real time through a communication interaction circuit. The power management and fault self-recovery control module receives instructions from the host computer to manage and control the output of the slave clock power supply interface to enable or disable, and to read fault log information. Log reading and writing are completed through the SPI bus interface.

4. A power management and fault self-recovery control module for a marine master-slave clock according to any one of claims 1 to 3, characterized in that: The power management and fault self-recovery control module includes an automatic fault recovery mode and a manual fault recovery mode, and its workflow is as follows: The power management and fault self-recovery control module operates by default in manual fault recovery mode, specifically as follows: (1) After the power management and fault self-recovery control module is powered on, the control management circuit outputs n enable signals, which enable the power supply output of n protection switch circuits through the fault reset circuit respectively; (2) The fault monitoring circuit monitors the input voltage, output voltage, and output current of the protection switch circuit in real time. When the i-th protection switch circuit is detected to have output overvoltage, output overcurrent, output short circuit, or input undervoltage, it sends the corresponding fault alarm information to the control management circuit and immediately controls the cut-off of the i-th power supply output. (3) The control and management circuit receives the fault alarm information, and after the main control circuit calculates it, it keeps the output of the i-th channel closed. It reports the fault alarm information and the output channel shutdown information to the host computer through the communication interaction circuit, and inputs the relevant information to the log storage circuit. (4) After the fault occurs, wait for on-site manual troubleshooting; After troubleshooting is completed, the host computer sends a power supply recovery command for the i-th channel. After receiving the command, the control management circuit controls the power supply output of the i-th channel to reset through the fault reset circuit. (5) Receive instructions from the host computer and complete operations such as switching working modes, reading logs, and setting parameters; The power management and fault self-recovery control module can be set to automatic fault recovery via a host computer to automatically handle intermittent faults. Its specific operating mode is as follows: 1) After the power management and fault self-recovery control module is powered on, the control management circuit outputs n enable signals, which enable the n protection switch circuits to start power supply output through the fault reset circuit; 2) The fault monitoring circuit monitors the input voltage, output voltage, and output current of the protection switch circuit in real time. When the i-th protection switch circuit is detected to have output overvoltage, output overcurrent, output short circuit, or input undervoltage, it sends the corresponding fault alarm information to the control management circuit and immediately controls the cut-off of the i-th power supply output. 3) The control and management circuit receives fault alarm information, and after the main control circuit calculates it, it keeps the output of the i-th channel closed. It reports the fault alarm information and the output channel shutdown information to the host computer through the communication interaction circuit, and inputs the relevant information to the log storage circuit. 4) After a fault occurs, if the waiting time of the control management circuit exceeds the fault recovery judgment time, it will automatically control the power supply output of the i-th channel to be turned on. If the power supply of the i-th channel is restored to normal, it will continue to be maintained; otherwise, the power supply will be turned off and the fault will be reported. 5) If the i-th power supply channel continues to fail, repeat step 4). When the number of failures exceeds the fault recovery count threshold, the power supply output of the i-th channel will no longer be automatically controlled to recover. 6) After step 5) occurs, wait for on-site manual troubleshooting; After troubleshooting is completed, the host computer sends a power supply recovery command for the i-th channel. After receiving the command, the control management circuit controls the power supply output of the i-th channel to reset through the fault reset circuit. 7) Receive instructions from the host computer and complete operations such as switching working modes, reading logs, and setting parameters.

5. The power management and fault self-recovery control module for a marine master-slave clock according to claim 1, characterized in that: When the device starts up, the power management and fault self-recovery control module manages and controls each slave clock interface to turn on the power supply output sequentially at fixed time intervals, thereby reducing the start-up current and peak power consumption of the master clock.

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