Full-opening BMS charging circuit
By designing a fully split-port BMS charging circuit, utilizing an ideal diode circuit and an analog front-end chip U4, combined with a comparator U7 and a transistor Q42, the problem of existing BMS charging circuits being unable to achieve high-current charging and short-circuit protection is solved, thus realizing a safe and reliable charging process.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-28
- Publication Date
- 2026-03-13
AI Technical Summary
Existing BMS charging circuits cannot achieve high-current charging and short-circuit protection, and the charging port cannot effectively prevent short circuits.
Design a fully split-port BMS charging circuit, using an ideal diode circuit and an analog front-end chip U4. Through the cooperation of comparator U7 and transistor Q42, high-current charging and short-circuit protection are achieved. Diode D28 is used to accelerate the discharge of the junction capacitance of MOSFETs QC1 and QC3 to quickly turn off the MOSFETs.
It enables rapid shutdown of the MOSFET under short-circuit conditions, ensuring that the MOSFET can withstand large current when turned off, thus ensuring charging safety and efficiency.
Smart Images
Figure CN121663706A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of battery charging technology, and more specifically to a fully split-port BMS charging circuit. Background Technology
[0002] A Battery Management System (BMS) is a control and monitoring system for the safe, reliable, and efficient operation of battery packs. It primarily performs real-time monitoring and management of parameters such as voltage, temperature, current, SOC (State of Charge), and SOH (State of Health) of the battery pack. Through equalization circuits, protection circuits, and communication interfaces, it provides protection against overcharge, over-discharge, overcurrent, short circuit, and over-temperature. The BMS can coordinate the consistency of individual battery cells, extending battery life, and, by communicating with the main control system of the vehicle or equipment, ensures the performance and safety of the battery during charging and discharging. The current BMS split circuit is actually a semi-split circuit. Charging is also done by splitting the charging port through the discharge MOS. The disadvantage is that the charging port cannot achieve short circuit protection or a diode can be connected in series with the charging port to achieve unidirectional charging function. However, the diode has a large voltage drop and cannot achieve high current charging. Therefore, it is urgent to design an ideal diode circuit connected in series with the charging circuit to achieve high current and short circuit protection functions.
[0003] The technical problem that this invention aims to solve is to provide a fully split-port BMS charging circuit. Summary of the Invention
[0004] The technical problem solved by this invention is to provide a fully split-port BMS charging circuit. During charging, if there is an output short circuit, once the discharge current exceeds the charging current or is zero, a reverse current flows through resistor RX10, causing the voltage at the third pin of comparator U7 to rise. This causes comparator U7 to flip, and the fourth pin changes from high to low. Transistor Q42 is cut off, and MOSFETs QC1 and QC3 are also cut off, shutting down the output. Diode D28 changes from high to low when the charging current is lower than the set flip current. Diode D28 accelerates the discharge of the junction capacitance of MOSFETs QC1 and QC3, accelerating the turn-off and making the falling edge of MOSFETs QC1 and QC3 steeper. Thus, the MOSFETs can withstand a large current when turned off.
[0005] A fully split-port BMS charging circuit includes an analog front-end chip U4; the analog front-end chip U4 is connected to a voltage input and equalization module, a power supply circuit, and an ideal diode circuit for high current and short-circuit protection; the ideal diode circuit includes an amplifier U7; the first pin of the amplifier U7 is connected to a resistor R164; the third pin of the amplifier U7 is connected to a resistor RX10; the third pin of the amplifier U7 is connected to MOSFETs QC3 and QC1; the gate of MOSFET QC3 is connected to the gate of MOSFET QC1; the drain of MOSFET QC3 is connected to MOSFET QC4; the drain of MOSFET QC1 is connected to MOSFET QC2; the other end of the resistor RX10 is connected to the analog front-end chip U4; the four pins of the amplifier U7 are connected to a diode D28, a transistor Q42, and a transistor Q34.
[0006] Preferably, the first pin of amplifier U7 is connected to resistor R170 and capacitor C76; the other end of capacitor C76 is connected to capacitor C21; the third pin of amplifier U7 is connected to resistor R108, resistor R171, and diode D31; the other end of diode D31 is connected to resistor R182; the gate of MOSFET QC4 is connected to resistor R183 and diode D17; the fourth pin of amplifier U7 is connected to resistor R117; the emitter of transistor Q42 is connected to resistor R175; the collector of transistor Q42 is connected to resistor R163; the other end of resistor R117 is connected to diode D22; the emitter of transistor Q34 is connected to resistor R69; the base of transistor Q34 is connected to resistor R104; the other ends of resistors R108 and R117 are both connected to the fifth pin of amplifier U7.
[0007] Preferably, an acceleration circuit is also provided; the acceleration circuit includes a transistor Q43; and the emitter of transistor Q43 is connected to transistor Q15; the base of transistor Q43 is connected to resistors R166 and R48; the base of transistor Q15 is connected to transistor Q38; the collector of transistor Q15 is connected to resistor R50 and capacitor C20; the base of transistor Q38 is connected to resistor R38; the other end of resistor R50 is connected to diode D21; the other end of resistor R38 is connected to diode D20; the collector of transistor Q43 is connected to the drain of MOSFET QC4.
[0008] Preferably, the power supply circuit includes a voltage regulator chip U1; the VIN pin of the voltage regulator chip U1 is connected to a resistor R45 and a capacitor C34; the OUT pin of the voltage regulator chip U1 is connected to a diode D5; the other end of the diode D5 is connected to a capacitor C32; the other end of the resistor R45 is connected to a diode D9; the other end of the diode D9 is connected to capacitors C43, C41, and C40; diode D10, inductor L6, and resistor R155; the other end of the inductor is connected to the VSW pin of the analog front-end chip U4; the VDC pin of the analog front-end chip U4 is connected to a capacitor C30, a diode D4, a capacitor C28, and a diode D2; the other end of the diode D2 is connected to a resistor R28; the VCC pin of the analog front-end chip U4 is connected to a capacitor C37, a diode D7, a capacitor C35, and a diode D6; the other end of the diode D6 is connected to a resistor R36; the VBAT pin of the analog front-end chip U4 is connected to a capacitor C29, a diode D1, a capacitor C26, and a resistor R26.
[0009] Preferably, the voltage input and equalization module includes connector socket P1 and connector socket P5; and connector socket P1 and connector socket P5 are each connected to several equalization modules; and the equalization module includes transistor Q2; the collector of transistor Q2 is connected to resistor R2; the other end of resistor R2 is connected to resistor R1; the base of transistor Q2 is connected to resistor R3; resistor R4 is connected between the emitter and base of transistor Q2; capacitor C8 is connected between resistor R1 and resistor R4; the other ends of resistor R1 and resistor R4 are both connected to analog front-end chip U4.
[0010] Compared with the prior art, the beneficial effects of the present invention are as follows: In the fully split-port BMS charging circuit of the present invention, if there is an output short circuit during charging, once the discharge current is greater than the charging current or zero, a reverse current flows through resistor RX10, causing the voltage of the third pin of comparator U7 to rise, causing comparator U7 to flip, and the fourth pin to change from high level to low level. Transistor Q42 is cut off, and MOSFETs QC1 and QC3 are cut off, shutting down the output. The function of diode D28 is to change from high level to low level when the charging current is lower than the set flip current. Through diode D28, the junction capacitance of MOSFETs QC1 and QC3 is accelerated to discharge, accelerating the discharge and turning off, making the falling edge of MOSFETs QC1 and QC3 steep. In this way, the MOSFETs can withstand a large current when turned off.
[0011] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description
[0012] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0013] Figure 1 This is a schematic diagram of the overall circuit of the present invention.
[0014] Figure 2 This is the invention Figure 1 The upper part of the circuit diagram.
[0015] Figure 3 This is the present invention. Figure 1 The lower half of the circuit diagram.
[0016] Figure 4 This is a schematic diagram of the ideal diode circuit of the present invention. Detailed Implementation
[0017] The technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0018] It should be noted that the terms "first," "second," etc., used in this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this disclosure described herein can be implemented in orders other than those illustrated or described herein. The implementations described in the following exemplary embodiments do not represent all implementations consistent with this disclosure.
[0019] Please see Figures 1-4In this embodiment of the invention, a fully split-port BMS charging circuit includes an analog front-end chip U4; the analog front-end chip U4 is connected to a voltage input and equalization module, a power supply circuit, and an ideal diode circuit for high current and short-circuit protection; the ideal diode circuit includes an amplifier U7; the first pin of the amplifier U7 is connected to a resistor R164; the third pin of the amplifier U7 is connected to a resistor RX10; the third pin of the amplifier U7 is connected to MOSFETs QC3 and QC1; the gate of MOSFET QC3 is connected to the gate of MOSFET QC1; the drain of MOSFET QC3 is connected to MOSFET QC4; the drain of MOSFET QC1 is connected to MOSFET QC2; the other end of the resistor RX10 is connected to the analog front-end chip U4; the four pins of the amplifier U7 are connected to a diode D28, a transistor Q42, and a transistor Q34.
[0020] As an example, the analog front-end chip U4 can be model AMG8824A.
[0021] Furthermore, the first pin of amplifier U7 is connected to resistor R170 and capacitor C76; the other end of capacitor C76 is connected to capacitor C21; the third pin of amplifier U7 is connected to resistor R108, resistor R171, and diode D31; the other end of diode D31 is connected to resistor R182; the gate of MOSFET QC4 is connected to resistor R183 and diode D17; the fourth pin of amplifier U7 is connected to resistor R117; the emitter of transistor Q42 is connected to resistor R175; the collector of transistor Q42 is connected to resistor R163; the other end of resistor R117 is connected to diode D22; the emitter of transistor Q34 is connected to resistor R69; the base of transistor Q34 is connected to resistor R104; the other ends of resistors R108 and R117 are both connected to the fifth pin of amplifier U7.
[0022] Furthermore, an acceleration circuit is provided; the acceleration circuit includes a transistor Q43; the emitter of transistor Q43 is connected to transistor Q15; the base of transistor Q43 is connected to resistors R166 and R48; the base of transistor Q15 is connected to transistor Q38; the collector of transistor Q15 is connected to resistor R50 and capacitor C20; the base of transistor Q38 is connected to resistor R38; the other end of resistor R50 is connected to diode D21; the other end of resistor R38 is connected to diode D20; the collector of transistor Q43 is connected to the drain of MOSFET QC4.
[0023] Furthermore, the power supply circuit includes a voltage regulator chip U1; the VIN pin of the voltage regulator chip U1 is connected to a resistor R45 and a capacitor C34; the OUT pin of the voltage regulator chip U1 is connected to a diode D5; the other end of the diode D5 is connected to a capacitor C32; the other end of the resistor R45 is connected to a diode D9; the other end of the diode D9 is connected to capacitors C43, C41, and C40; diode D10, inductor L6, and resistor R155; the other end of the inductor is connected to the VSW pin of the analog front-end chip U4; the VDC pin of the analog front-end chip U4 is connected to a capacitor C30, a diode D4, a capacitor C28, and a diode D2; the other end of the diode D2 is connected to a resistor R28; the VCC pin of the analog front-end chip U4 is connected to a capacitor C37, a diode D7, a capacitor C35, and a diode D6; the other end of the diode D6 is connected to a resistor R36; the VBAT pin of the analog front-end chip U4 is connected to a capacitor C29, a diode D1, a capacitor C26, and a resistor R26.
[0024] Furthermore, the voltage input and equalization module includes connector socket P1 and connector socket P5; and connector socket P1 and connector socket P5 are each connected to several equalization modules; and the equalization module includes transistor Q2; the collector of transistor Q2 is connected to resistor R2; the other end of resistor R2 is connected to resistor R1; the base of transistor Q2 is connected to resistor R3; resistor R4 is connected between the emitter and base of transistor Q2; capacitor C8 is connected between resistor R1 and resistor R4; the other ends of resistor R1 and resistor R4 are both connected to analog front-end chip U4.
[0025] Circuit principle: When the line is not connected to the charger, there is no circuit from the CHG pin of the analog front-end chip U4 to C-. Transistors Q38 and Q15 are in the off state, the B+ voltage cannot supply power to transistor Q34 through transistor Q15, comparator U7 is not powered, transistor Q42 is in the no-power state, MOSFETs QC3 and QC1 are also in the off state, and QC2 and QC4 are also in the off state. At this time, the line cannot discharge even when it is being charged, achieving bidirectional cutoff.
[0026] When the charger is plugged in, C- forms a circuit through the charger. The CHG pin output of the analog front-end chip U4 is a constant current source, generating a voltage of approximately 12-15V through resistor R48. This voltage drives transistors Q38 and Q15 to conduct, while transistor Q43 is cut off. The B+ voltage then powers transistor Q34 and MOSFETs QC2 and QC4 through transistor Q15. Simultaneously, transistor Q34 powers comparator U7. When there is no current from the charger, the voltage at the first pin of comparator U7 is lower than the voltage at the third pin, resulting in a low level at the fourth pin of the comparator. This causes transistor Q42 to cut off, and MOSFETs QC1 and QC3 to cut off as well. Because MOSFET Q... When C2 and MOSFET QC4 are turned on, the charging current forms a loop through the parasitic diodes of MOSFETs QC1 and QC3 to charge the circuit. At this time, the charging current generates a voltage drop across resistor R10, which lowers the voltage at the third pin of the comparator. Here, a preset value is set. When the charging current exceeds a certain value, the voltage drop generated by resistor R10 becomes lower than the voltage at the first pin. At this time, comparator U7 reverses from cutoff to conduction, and transistor Q42 conducts. At the same time, R164 forms a positive feedback pin, applying a high voltage to maintain power supply to comparator U7 and MOSFETs QC1 and QC3, causing MOSFETs QC1 and QC3 to conduct. This allows a larger charging current to pass through.
[0027] If there is an output short circuit during charging, once the discharge current is greater than the charging current or zero, a reverse current flows through resistor RX10, causing the voltage on the third pin of comparator U7 to rise, causing comparator U7 to flip, and the fourth pin to change from high level to low level. Transistor Q42 is cut off, and MOSFETs QC1 and QC3 are cut off, thus shutting down the output.
[0028] The function of diode D28 is to switch from high level to low level when the charging current is lower than the set switching current. Diode D28 accelerates the discharge of the junction capacitance of MOSFETs QC1 and QC3, thus accelerating the turn-off and making the falling edge of MOSFETs QC1 and QC3 steeper. In this way, the MOSFETs can withstand a large current when they are turned off.
[0029] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, it is intended that all variations falling within the meaning and scope of equivalents of the claims be included within the present invention.
Claims
1. A fully split-port BMS charging circuit, characterized in that, The system includes an analog front-end chip U4; the analog front-end chip U4 is connected to a voltage input and equalization module, a power supply circuit, and an ideal diode circuit for high current and short-circuit protection; the ideal diode circuit includes an amplifier U7; the first pin of amplifier U7 is connected to a resistor R164; the third pin of amplifier U7 is connected to a resistor RX10; the third pin of amplifier U7 is connected to MOSFETs QC3 and QC1; the gate of MOSFET QC3 is connected to the gate of MOSFET QC1; the drain of MOSFET QC3 is connected to MOSFET QC4; the drain of MOSFET QC1 is connected to MOSFET QC2; the other end of resistor RX10 is connected to the analog front-end chip U4; the four pins of amplifier U7 are connected to diode D28, transistor Q42, and transistor Q34.
2. The fully split-port BMS charging circuit according to claim 1, characterized in that, Amplifier U7's first pin is connected to resistor R170 and capacitor C76; the other end of capacitor C76 is connected to capacitor C21; amplifier U7's third pin is connected to resistor R108, resistor R171, and diode D31; the other end of diode D31 is connected to resistor R182; MOSFET QC4's gate is connected to resistor R183 and diode D17; amplifier U7's fourth pin is connected to resistor R117; transistor Q42's emitter is connected to resistor R175; transistor Q42's collector is connected to resistor R163; the other end of resistor R117 is connected to diode D22; transistor Q34's emitter is connected to resistor R69; transistor Q34's base is connected to resistor R104; the other ends of resistors R108 and R117 are both connected to amplifier U7's fifth pin.
3. A fully split-port BMS charging circuit according to claim 2, characterized in that, An acceleration circuit is also included; the acceleration circuit includes transistor Q43; the emitter of transistor Q43 is connected to transistor Q15; the base of transistor Q43 is connected to resistors R166 and R48; the base of transistor Q15 is connected to transistor Q38; the collector of transistor Q15 is connected to resistor R50 and capacitor C20; the base of transistor Q38 is connected to resistor R38; the other end of resistor R50 is connected to diode D21; the other end of resistor R38 is connected to diode D20; the collector of transistor Q43 is connected to the drain of MOSFET QC4.
4. The fully split-port BMS charging circuit according to claim 1, characterized in that, The voltage input and equalization module includes connector socket P1 and connector socket P5; and connector socket P1 and connector socket P5 are each connected to several equalization modules; and the equalization module includes transistor Q2; the collector of transistor Q2 is connected to resistor R2; the other end of resistor R2 is connected to resistor R1; the base of transistor Q2 is connected to resistor R3; resistor R4 is connected between the emitter and base of transistor Q2; capacitor C8 is connected between resistor R1 and resistor R4; the other ends of resistor R1 and resistor R4 are both connected to analog front-end chip U4.
5. A fully split-port BMS charging circuit according to claim 1, characterized in that, The power supply circuit includes a voltage regulator chip U1; the VIN pin of voltage regulator chip U1 is connected to a resistor R45 and a capacitor C34; the OUT pin of voltage regulator chip U1 is connected to a diode D5; the other end of diode D5 is connected to a capacitor C32; the other end of resistor R45 is connected to a diode D9; the other end of diode D9 is connected to capacitors C43, C41, and C40; diode D10, inductor L6, and resistor R155; the other end of the inductor is connected to the VSW pin of analog front-end chip U4; the VDC pin of analog front-end chip U4 is connected to a capacitor C30, a diode D4, a capacitor C28, and a diode D2; the other end of diode D2 is connected to a resistor R28; the VCC pin of analog front-end chip U4 is connected to a capacitor C37, a diode D7, a capacitor C35, and a diode D6; the other end of diode D6 is connected to a resistor R36; the VBAT pin of analog front-end chip U4 is connected to a capacitor C29, a diode D1, a capacitor C26, and a resistor R26.