Phototransistor with adjustable light response sensitivity and application thereof

Abstract

The invention relates to the field of design and application of a photoelectric detector in an intelligent machine vision system, in particular to a photoelectric transistor with adjustable light response sensitivity and application of the photoelectric transistor. According to the photoelectric transistor, a photodiode is introduced into a gate structure and serves as a photosensitive layer to be embedded into a device system, dynamic modulation of diode conductance under light intensity driving is achieved, distribution of gate voltage between a device gate dielectric layer and a channel is regulated and controlled, and the overall light response capacity is effectively enhanced. The device can accurately control the light response range by adjusting the grid voltage, and background noise interference is effectively suppressed while accurate recognition of a low-contrast target is achieved. Compared with a traditional photoelectric detector, the sensitivity of the device in low-contrast signal detection is improved by more than 1000 times, and the anti-noise performance is remarkably improved. An intelligent visual system constructed based on the photoelectric transistor shows excellent target identification capability in a complex visual environment, and has a wide application prospect in a high-order machine vision technology.

Description

Technical Field

[0001] This invention relates to the design and application of photodetectors in intelligent machine vision systems, specifically to a phototransistor with tunable light response sensitivity and its application. Background Technology

[0002] Photodetectors are electronic devices that convert light signals into electrical signals and have broad application prospects in intelligent vision systems such as precision guidance, intelligent monitoring, early warning, environmental perception, and human-computer interaction [References 1-2]. With the rapid development of technologies such as image recognition and artificial intelligence, higher performance requirements have been placed on photodetectors, especially in achieving functions such as weak signal extraction, target recognition, and anti-interference under complex backgrounds and low contrast conditions, which has become an important technical bottleneck in the design of high-performance image perception systems [References 3-4].

[0003] Currently, the mainstream types of photodetector devices mainly include photodiodes, photoconductive devices, and phototransistors. These devices mostly rely on the separation and transport of photogenerated electron-hole pairs within the material in the junction region or channel to generate photocurrent, and their response mechanism has certain structural and physical limitations [Reference 5]. Since the output signal of these devices is usually linearly related to the incident light intensity, when the light intensity difference between the target and the background is small, the change in the photocurrent generated by the device is not obvious, making it difficult to effectively distinguish between the target and the background, resulting in poor recognition ability and anti-interference ability of the detector in low-contrast scenes [Reference 6].

[0004] To address this issue, some studies have attempted to improve the image signal-to-noise ratio by extending exposure time, image overlay, or image post-processing, thereby enhancing target recognizability [Reference 7]. However, these methods typically require long data processing cycles and are not suitable for fast-moving scenarios. Other technologies attempt to improve the sensitivity and specificity of detection by integrating multiple photoelectric units with peripheral gating devices (such as transistors and diodes) to construct complex image edge extraction systems [Reference 8]. However, these systems are often complex in structure, consume a lot of power, and occupy a large chip area, limiting their application in high-density, low-power chip integration. In addition, current photodetectors generally lack the ability to adjust the light response sensitivity and cannot dynamically adjust their response window according to different light intensity ranges to selectively enhance or suppress the light signal [Reference 9]. In practical applications, the ambient light intensity varies significantly in different scenarios. For example, the target detection requirements under strong outdoor sunlight and weak indoor light conditions differ greatly. Traditional devices struggle to balance sensitivity and dynamic range, and are prone to problems such as response saturation, signal loss, or background noise interference. Therefore, developing a novel phototransistor with adjustable light response sensitivity and segmented controllable response range, capable of flexibly adjusting the response range according to application requirements, accurately identifying target features under different light intensities, and improving target recognition capabilities while reducing system complexity, has become an important direction for the development of current photodetectors.

[0005] References:

[0006] 1. Zhou, F. & Chai, Y. Near-sensor and in-sensor computing. Nature Electron. 3, 664-671 (2020).

[0007] 2. Chai, Y. In-sensor computing for machine vision. Nature 579, 32-33 (2020).

[0008] 3.Ren,Q.etal.Optoelectronicdevicesfor in-sensorcomputing.Adv.Mater.2407476(2024).

[0009] 4.Long,Z.etal.Biomimetic optoelectronicswithnanomaterialsforartificial vision.Nat.Rev.Mater.(2024).

[0010] 5. Wang, F., Zhang, T., Xie, R., Wang, Z. & Hu, W. How to characterize figures of merit of two-dimensional photodetectors. Nature Commun. 14, 2224 (2023).

[0011] 6. Roy, K., Jaiswal, A. & Panda, P. Towards spike-based machine intelligence with neuromorphic computing. Nature 575, 607 - 617 (2019).

[0012] 7. Zhu, Q.-B. et al. A flexible ultrasensitive optoelectronics sensor array for neuromorphic vision systems. Nature Commun. 12, 1798 (2021).

[0013] 8. Yang, Y. et al. In-sensor dynamic computing for intelligent machine vision. Nature Electron. 7, 225 - 233 (2024).

[0014] 9. Wu, P. et al. Next-generation machine vision systems incorporating two-dimensional materials: progress and perspectives. InfoMat 4, e12275 (2021). Summary of the Invention

[0015] The present invention aims to provide a phototransistor with tunable light response sensitivity and its applications. This device integrates a heterogeneous photosensitive element with photosensitive conductivity characteristics within its gate structure, enabling dynamic adjustment of the light response sensitivity across different light intensities, achieving segmented response and accurate recognition of optical signals. Specifically, the device controls the conductivity of the photosensitive heterogeneous structure by adjusting the gate voltage, thereby changing the response range of the device's current output to incident light intensity. This structure eliminates the need for an additional selection transistor, achieving highly selective detection of low-contrast optical signals and effectively improving image recognition capabilities in complex lighting environments. The device described in this invention features a compact structure, high sensitivity, and strong noise immunity, making it suitable for constructing high-performance image sensor arrays and showing broad application prospects in fields such as intelligent vision, low-light imaging, and autonomous driving.

[0016] The technical solution of the present invention:

[0017] A phototransistor with tunable photoresponse sensitivity includes: a bottom substrate having an insulating layer on its surface; a gate structure located on the insulating layer of the substrate, used to regulate the carrier distribution and conductivity state in a channel layer by an applied voltage; a photosensitive modulation layer, having the function of generating charge accumulation or potential change in incident light, located between the gate structure and the gate dielectric layer, having the ability to generate photogenerated charge accumulation or potential modulation in the incident light signal, and affecting the local electric field of the region above it under different light intensities; a gate dielectric layer, located between the photosensitive modulation layer and the channel layer, used to achieve capacitive coupling and insulating isolation, while ensuring effective transmission of gate modulation; a semiconductor channel layer disposed on the gate dielectric layer, the conductivity of which is controlled by the combined action of the gate voltage and the photosensitive modulation layer; a source electrode and a drain electrode, respectively electrically connected to the two ends of the channel layer, used to inject and collect carriers in the channel to form a tunable photocurrent output path.

[0018] The aforementioned phototransistor with adjustable light response sensitivity has a photosensitive control layer that generates segmented response control to light of different intensities under different gate voltage bias conditions. This allows the channel layer to generate conductance changes only for incident light within the target light intensity range, outputting a current signal with distinguishing characteristics, thereby achieving selective identification and response to different light intensity levels.

[0019] The aforementioned phototransistor with tunable light response sensitivity has a photosensitive control layer that is modulated through surface or bulk doping, plasma treatment, bandgap engineering, or surface modification to enhance its potential response to changes in light intensity.

[0020] The aforementioned phototransistor with tunable light response sensitivity has a spatial isolation structure or a heterojunction potential coupling structure between the photosensitive control layer and the channel layer, so that the control process is mainly through electrostatic field modulation rather than direct charge injection.

[0021] The aforementioned phototransistor with tunable light response sensitivity has a channel layer made of a two-dimensional material, a nanofilm, or a similar structure, which has the characteristic that its in-plane conductivity changes with the gate voltage.

[0022] The aforementioned phototransistor with adjustable light response sensitivity has a gate structure consisting of a control electrode group made of a single or multiple layers of conductive material, and possesses localized control capability in the lateral or vertical direction.

[0023] The aforementioned phototransistor with adjustable light response sensitivity has a photocurrent response covering multiple light intensity ranges under different gate voltages, and each range has a non-overlapping threshold range, with an output current variation ratio of not less than two orders of magnitude.

[0024] The aforementioned phototransistor with tunable light response sensitivity further includes an upper protective layer and / or a lower protective layer disposed above or below the channel layer to improve the environmental stability and operating life of the device.

[0025] The aforementioned phototransistor with adjustable light response sensitivity is used in dynamic vision sensors, high dynamic range imaging systems, bio-visual bionic systems, or multi-level optical logic processing circuits.

[0026] Furthermore, the substrate has an insulating layer on its surface to support the device structure and provide electrical insulation.

[0027] Furthermore, the gate can be selected from metallic materials (such as titanium (Ti), gold (Au), copper (Cu), aluminum (Al) etc.) or semi-metallic / conductive two-dimensional materials (such as graphene, carbon nanofilms etc.), and its preparation method can include electron beam evaporation, thermal evaporation, chemical vapor deposition, sputtering deposition etc. The thickness of the gate material ranges from about 0.3 nm to 100 nm to adapt to the control sensitivity and stability requirements of different device structures.

[0028] Furthermore, the gate dielectric layer can be a high-dielectric-constant insulating film such as alumina (Al2O3) or hafnium oxide (HfO2) formed by atomic layer deposition (ALD), or a two-dimensional insulating material prepared by chemical vapor deposition (CVD), mechanical exfoliation, etc., such as hexagonal boron nitride (h-BN) or fluorinated graphene, with a thickness ranging from 5 nm to 100 nm. The aforementioned gate dielectric layer material should possess good insulation properties and interface compatibility to achieve effective capacitive isolation and electric field transmission between the photosensitive control layer and the channel layer. In addition, depending on the device structure requirements, the dielectric layer can also be a multilayer stacked structure, or doped / functionalized to control its dielectric properties and bandgap characteristics, thereby further optimizing device performance.

[0029] Furthermore, the channel material can be a traditional or oxide-based semiconductor thin film such as silicon, zinc oxide (ZnO), or indium gallium zinc oxide (IGZO), or a two-dimensional semiconductor material such as molybdenum disulfide (MoS2), tungsten diselenide (WSe2), black phosphorus, or tin telluride (SnTe), possessing a suitable band structure, high mobility, and excellent photoelectric response characteristics. The channel material can be constructed in single-layer, few-layer, or multi-layer forms according to application requirements, and can be prepared through processes such as mechanical exfoliation, chemical vapor deposition (CVD), solution methods, or atomic layer deposition to achieve control over the device's conductivity and photosensitive behavior.

[0030] Furthermore, the source and drain materials can be conventional metallic materials, such as Au, Ti, Al, chromium (Cr), palladium (Pd), and silver (Ag), or two-dimensional semi-metallic materials, such as graphene, MXene, and carbon nanotube networks, possessing good conductivity and interfacial compatibility. They can be prepared using processes such as electron beam evaporation, thermal deposition, sputtering, inkjet printing, or transfer. Depending on the channel material and device structure used, ohmic or Schottky contact structures are selected to optimize the device's carrier injection efficiency and response performance.

[0031] The design concept of this invention:

[0032] With the rapid development of image sensing, environmental perception, and intelligent vision systems, higher demands are being placed on the performance of photodetectors, especially in achieving accurate identification and response control of different light intensities in complex lighting environments. Traditional phototransistors generally suffer from a fixed light response range and difficulty in adapting to varying lighting conditions, limiting their application in intelligent sensing systems. This invention aims to solve these problems by proposing a phototransistor structure with tunable light response sensitivity. By introducing a photosensitive control layer, which has the ability to generate charge accumulation or potential modulation in response to light, it can achieve tunable light response sensitivity within a specific light intensity range of 0.01–100 mW / cm² under different gate voltages. 2The device employs segmented control, meaning it can selectively respond to incident light of specific intensities under different operating voltages. This allows the channel conductivity to change only within the target light intensity range, thereby enhancing the discriminative power of the output current and achieving precise light intensity sensing and identification. The device utilizes a layered, stacked heterogeneous structure design, including a substrate, gate, photosensitive control layer, gate dielectric layer, semiconductor channel layer, and source / drain electrodes. The gate voltage modulates the electrostatic coupling between the photosensitive layer and the channel, altering the channel layer's response threshold to light illumination, resulting in differentiated conduction behavior across different light intensity ranges. This mechanism effectively enhances the device's adaptability and dynamic adjustment capabilities. Furthermore, the proposed structure exhibits excellent compatibility, integrating with various two-dimensional materials, flexible materials, and conventional semiconductor processes, demonstrating potential for large-scale integration and application. By adjusting the material type and thickness of the photosensitive layer and the gate voltage conditions, the device can also be extended to meet diverse needs such as multimodal sensing, electro-optic control, and low-light identification, showcasing significant functional scalability and application prospects.

[0033] The advantages and beneficial effects of this invention are:

[0034] 1. This invention proposes a phototransistor with tunable light response sensitivity. By introducing a photosensitive control layer and combining it with a gate voltage adjustment mechanism, segmented response control within a specific light intensity range is achieved. This structure allows the device to produce conductance changes only within the target light intensity range under different gate voltages, effectively improving the selectivity and accuracy of the light response. It provides a hardware foundation for achieving multi-intensity resolution and visual signal front-end preprocessing, and has good scalability and integration potential.

[0035] 2. The device of this invention achieves a segmented current response to light intensity under different gate voltages, with clearly distinguishable output currents. This allows for precise identification of minute light intensity changes, making it suitable for high dynamic range imaging or low-light detection in complex lighting environments. This adjustable mechanism enables the device to operate within a range of 0.01–100 mW / cm². 2 Selective response is achieved within the light intensity range, effectively avoiding the saturation failure problem of traditional phototransistors under strong light.

[0036] 3. The structural design of this invention is compatible with various material systems. The photosensitive control layer, gate dielectric layer, and channel material can all be made of two-dimensional materials, traditional semiconductor thin films, or flexible electronic materials, exhibiting good scalability. Each structural layer can be realized using mature processes such as atomic layer deposition, chemical vapor deposition, and electron beam evaporation, facilitating subsequent large-area fabrication and array integration. This phototransistor is particularly suitable for fields such as multi-level light intensity recognition, biomimetic perception of human vision, high-precision image perception, low-illuminance environment monitoring, and neuromorphic vision systems, and is expected to provide core device support for intelligent image processing and low-power visual front-ends.

[0037] 4. This invention's phototransistor incorporates a photodiode within its gate structure, embedding it as a photosensitive layer within the device system. This enables dynamic modulation of the diode's conductance under light intensity, thereby controlling the distribution of the gate voltage between the gate dielectric layer and the channel, effectively enhancing the overall photoresponse capability. The device can precisely control the photoresponse range by adjusting the gate voltage, achieving accurate recognition of low-contrast targets while effectively suppressing background noise interference. Compared to traditional photodetectors, this invention's device exhibits over 1000 times higher sensitivity in low-contrast signal detection, significantly improving noise immunity. The intelligent vision system built upon this phototransistor demonstrates excellent target recognition capabilities in complex visual environments, showcasing its broad application prospects in advanced machine vision technology. Attached Figure Description

[0038] Figure 1 This is a flowchart of the manufacturing process for an adjustable sensitivity phototransistor.

[0039] Figure 2 This diagram shows the structure and characterization of a tunable sensitivity phototransistor. (a) is a schematic diagram of the tunable sensitivity phototransistor, using Si / SiO2 (Si substrate with a SiO2 insulating layer deposited on the surface) as the substrate, graphite as the gate and source / drain electrodes, an oxygen-doped MoS2 / MoS2 junction as the photosensitive control layer, h-BN as the gate dielectric layer, MoS2 as the channel layer, graphene as the contact electrode, and top and bottom h-BN layers as protective layers; (b) is a transmission electron microscope (TEM) image of the cross-section of the tunable sensitivity phototransistor, and the O-doped layer in the TEM imaging. (d) Energy dispersive X-ray spectroscopy (EDX) elemental maps of S, Mo, N, O, and C corresponding to the MoS2 / MoS2 junction, with a scale bar of 5 nm; (e) EDX elemental maps of the h-BN / MoS2 / h-BN / MoS2 layer and its corresponding S, Mo, N, O, and C layers in TEM imaging, with a scale bar of 5 nm; (f) Equivalent circuit diagram of the tunable sensitivity phototransistor, where S represents the source, D represents the drain, G represents the gate, and hv represents illumination; (c) Schematic diagram of the band structure of the tunable sensitivity phototransistor, where Diode represents the O-doped MoS2 / MoS2 junction, E... C Represents the bottom of the conduction band, E F Represents the Fermi level, E V Represents the valence band peak; (g) at optical power density (P in The value ranges from 0 to 1.2 mW / cm. 2 Current-gate voltage curve of tunable sensitivity phototransistor under 516nm laser irradiation, with V on the horizontal axis. GS Represents gate voltage (V), ordinate IDS Represents current (A).

[0040] Figure 3 This is a graph showing the photoelectric performance of a tunable sensitivity phototransistor. (a) shows the current-time curves of the device under darkness and different power densities of 516nm laser light at a gate voltage of -9V. The horizontal axis represents time (s), and the vertical axis represents current (I). DS Represents current (A), V GS P represents the gate voltage (V). in Representative power density (μW / cm) 2 (b) Optical power density-current curves of the device under different gate voltages, with the horizontal axis P in Represents optical power density (μW / cm²) 2 ), ordinate I DS (c) Current ratio-optical power density ratio curves of tunable sensitivity phototransistors and conventional phototransistors at different gate voltages, with the horizontal axis P. in / P0 represents the optical power density ratio, and the vertical axis represents the current ratio; (d) Responsivity-optical power density curves of tunable sensitivity phototransistors and conventional phototransistors at different gate voltages, with the horizontal axis P in Represents optical power density (μW / cm²) 2 The vertical axis R represents the responsiveness (A / W).

[0041] Figure 4 This is a functional demonstration of a photodetector array based on tunable sensitivity phototransistors as its basic unit. (a) Optical photograph of a 3×3 photodetector array, where S represents the source electrode, D represents the drain electrode, and G represents the gate electrode; the scale bar is 200 micrometers. (b) Optical photograph of an array unit; toph-BN and bottomh-BN represent the top and bottom h-BN protective layers, respectively; Gr represents the graphene contact electrode; Middleh-B dielectric represents the h-BN gate dielectric; TopMoS2channel represents the channel layer; O-dopedMoS2 represents O-doped MoS2; Source, Drain, and Gate represent the source, drain, and gate electrodes, respectively; the scale bar is 10 micrometers. (c) Nine devices in the array under darkness and illumination (516nm laser, optical power density P0). in =2.3mW / cm 2 The transfer characteristic curve under the condition, with the horizontal axis V GS Represents gate voltage (V), ordinate I DS(d) Demonstration of array contrast increasing function under the conditions of gate voltage of -9V and source-drain voltage of 0.1V. The upper figure is the light signal input, and the two figures below are the electrical signal output of conventional phototransistors and the tunable-sensitive phototransistors of this invention, respectively. in Representative power density (μW / cm) 2 ), I A (e) Demonstration of array noise-increasing function under the conditions of gate voltage of -5V and source-drain voltage of 0.1V. The upper figure shows the optical signal input, and the two figures below show the electrical signal output of the conventional transistor and the phototransistor with adjustable optical response sensitivity of the present invention, respectively. in Representative power density (μW / cm) 2 ), I A Represents current (A). Detailed Implementation

[0042] In its specific implementation, this invention utilizes two-dimensional graphene, MoS2, and h-BN, and employs electron beam lithography (EBL), reactive ion etching (RIE), electron beam evaporation (EBV), dry transfer, oxygen plasma doping, and vacuum annealing techniques to fabricate tunable sensitivity phototransistors, including the following steps:

[0043] (1) Graphene, MoS2 and h-BN sheets were peeled onto a Si substrate with a SiO2 insulating layer on the surface by micromechanical peeling.

[0044] (2) Using a heterojunction transfer platform, a sufficiently thick h-BN protective layer is raised with propylene carbonate (PPC), and then the graphene source, drain electrode, MoS2 channel layer, h-BN gate dielectric layer, MoS2 photosensitive control layer and bottom h-BN protective layer are raised in sequence and stacked on a 300nm SiO2 / Si substrate to form an h-BN / MoS2 / h-BN / MoS2 / h-BN heterojunction;

[0045] (3) Place the stacked h-BN / MoS2 / h-BN / MoS2 / h-BN heterojunction into a vacuum annealing furnace for annealing treatment to remove PPC;

[0046] (4) Construct lead electrodes for graphene source, drain electrode and gate through EBL, RIE, EBV and stripping processes;

[0047] (5) Using O2plasma, MoS2 that is not protected by the h-BN protective layer is oxygen-doped to form an O-dopedMoS2 / MoS2 junction, which serves as the photosensitive control layer of the device.

[0048] (6) Using a heterojunction transfer platform, polydimethylsiloxane (PDMS) is used as a dielectric transfer gate graphene electrode to contact O-doped MoS2 and the gate lead electrode, respectively.

[0049] The feasibility of the present invention will be further demonstrated below through examples.

[0050] Example

[0051] like Figure 1 As shown, the tunable sensitivity phototransistor is constructed through the following six steps:

[0052] (a) Graphene (Gr), MoS2 and h-BN sheets were peeled from the bulk onto a Si substrate with a SiO2 insulating layer by micromechanical exfoliation.

[0053] (b) A sufficiently thick h-BN protective layer is lifted using the PPC attached to the bottom of PDMS. Then, the graphene source, drain electrode, MoS2 channel layer, h-BN gate dielectric layer, MoS2 photosensitive control layer and bottom h-BN protective layer are lifted in sequence and dropped onto a 300nm SiO2 / Si substrate at a high temperature of 120-140℃, thereby forming an h-BN / MoS2 / h-BN / MoS2 / h-BN heterojunction.

[0054] (c) Remove PPC residue on the surface of the heterojunction by vacuum annealing. Control the vacuum annealing temperature to 350°C, the heating time to 0.5h, the holding time to 1h, and then cool to room temperature in the furnace.

[0055] (d) The contact windows of the graphene source and drain electrodes are constructed and lead electrodes are formed by EBL, RIE, EBV and stripping processes; in addition, the lead electrode of the gate is constructed on the SiO2 / Si substrate side.

[0056] The lead electrode is a composite of titanium (Ti) layer and gold (Au) layer. First, a Ti layer with a thickness range of 4-6 nm is deposited on the SiO2 / Si substrate and the graphene electrode, and then an Au layer with a thickness range of 50-60 nm is deposited.

[0057] (e) Using oxygen plasma (O2 plasma), MoS2 not protected by the h-BN protective layer is subjected to oxygen doping treatment. The oxygen flow rate (O2) is controlled at 180 sccm, the power of the oxygen plasma treatment instrument is 200 W, and the time is 60 min to form oxygen-doped MoS2 and O-doped MoS2 / MoS2 junction.

[0058] (f) Using a heterojunction transfer platform, polydimethylsiloxane (PDMS) was used as the dielectric to transfer the gate graphene electrode, which was then contacted with O-doped MoS2 and the gate lead electrode, respectively. During the release of the graphene electrode, the sample temperature was controlled at 80°C to form an adjustable sensitivity phototransistor.

[0059] The tunable sensitivity phototransistor consists of a top h-BN protective layer, graphene source / drain electrodes, a MoS2 channel layer, an h-BN gate dielectric layer, an in-plane O-doped MoS2 / MoS2 junction photosensitive control layer, a bottom h-BN protective layer, and a graphene gate. The graphene gate is located on top of the O-doped MoS2 layer. The in-plane O-doped MoS2 / MoS2 junction photosensitive control layer is located on top of the bottom h-BN protective layer. The h-BN gate dielectric layer is located on top of the MoS2 layer of the photosensitive control layer. The MoS2 channel layer is located on top of the h-BN gate dielectric layer. The graphene source / drain electrodes are located on top of the MoS2 channel layer. The top h-BN protective layer covers the graphene source / drain electrodes and the MoS2 channel layer. (See...) Figure 2 a.

[0060] The photosensitive control layer can exert a range-based control effect on light intensity under different gate voltage bias conditions, allowing the channel layer to produce a significant conductivity change only for incident light within a specific intensity range. This results in the output of a current signal with discriminative characteristics, enabling selective identification and response to light intensity levels. This mechanism allows the device to achieve high-precision, low-error segmented optical signal response over a wide dynamic range, making it suitable for scenarios such as high-contrast image detection, low-light detection, and intelligent visual recognition.

[0061] Among them, the micromechanical exfoliation method was used to peel off multilayer two-dimensional materials on SiO2 / Si substrates: Novoselov, KS, Geim, AK, Morozov, SV, et al. (2004) Electric Field Effect in Atomically ThinCarbon Films. Science, 306, 666-669.

[0062] The thickness of the h-BN protective layer is 10–50 nm, the thickness of the h-BN gate dielectric layer is 5–30 nm, the thickness of the graphene electrode layer is 1–10 nm, the thickness of the MoS2 channel layer is 5–20 nm, and the thickness of the O-doped MoS2 / MoS2 junction photosensitive control layer is 5–20 nm.

[0063] like Figure 2 The diagram shows the structure and characterization of the tunable sensitivity phototransistor. (a) is a schematic diagram of the tunable sensitivity phototransistor, using Si / SiO2 as the substrate, graphene as the gate and source / drain electrodes, an O-doped MoS2 / MoS2 junction as the photosensitive control layer, h-BN as the gate dielectric layer, MoS2 as the channel layer, graphene as the contact electrode, and top and bottom h-BN layers as protective layers, respectively; (b) is a transmission electron microscope (TEM) image of the cross-section of the tunable sensitivity phototransistor and the energy dispersive X-ray spectroscopy (EDX) elemental map of S, Mo, N, O, and C corresponding to the O-doped MoS2 / MoS2 junction in the TEM image, with a scale bar of 5 nm. (c) Abundant oxygen was found in plasma-treated MoS2 thin films; (d) EDX elemental maps of h-BN / MoS2 / h-BN / MoS2 layers and their corresponding S, Mo, N, O, and C in TEM imaging, with a scale bar of 5 nm. No oxygen was found in the top-layer h-BN-protected MoS2 thin film; (e) Equivalent circuit diagram of a tunable sensitivity phototransistor, where S represents the source, D represents the drain, G represents the gate, and hv represents illumination; (f) Schematic diagram of the band structure of a tunable sensitivity phototransistor, where Diode represents the O-doped MoS2 / MoS2 junction, E C Represents the bottom of the conduction band, E F Represents the Fermi level, E V The representative price band top, when a negative gate voltage (V) is applied GS In darkness, the gate voltage is primarily applied to the reverse-biased oxygen-doped MoS2 / MoS2 diode, keeping the MoS2 transistor on. When the light intensity is sufficient, photogenerated carriers cause a decrease in diode resistance, allowing more negative voltage to be applied to the h-BN dielectric layer and the MoS2 channel, thus turning the transistor off. With negative V... GS As the voltage increases, the bias voltage applied to the MoS2 channel also increases, allowing the transistor to turn off under weaker light conditions, thereby adjusting V. GS (f) Achieving adjustable photoresponse sensitivity; when the gate voltage is -2V, the light intensity is below 0.7mW / cm². 2 Within the specified range, the device current changes relatively little. However, when the light intensity is between 0.7 and 1.2 mW / cm², the change is more pronounced. 2 During this period, the device current changed by nearly 10 7A jump of several times. These results indicate that the transistor can generate a nonlinear response relationship between photocurrent and light intensity.

[0064] like Figure 3 The photoelectric characteristics of the tunable sensitivity phototransistor are shown in the figure. Among them, (a) when a voltage of -9V is simultaneously applied... GS When a 100-millisecond light pulse is applied, and the light intensity is below 77 μW / cm², 2 At first, the device did not exhibit a significant photoresponse. However, as the light intensity further increased, the transistor current suddenly decreased; once the light intensity exceeded 454 μW / cm², the current dropped further. 2 (b) By adjusting V GS Furthermore, it can adjust the device's response range to light intensity. For example, when V GS At -7V, the device's photoresponse range is 392–1061 μW / cm. 2 ; and when V GS At -5V, the response range is adjusted to 748~2122μW / cm. 2 Overall, by adjusting V GS The device can operate at 77–50000 μW / cm². 2 (c) To further verify the device's ability to sense minute changes in light intensity, we extracted different V values. GS Current ratio and optical power density ratio (P) in The relationship between / P0). When the light intensity changes by 3 to 5 times, the current ratio of the tunable sensitivity phototransistor exceeds 10. 4 The current ratio of a conventional MoS2 phototransistor is only about 5. This indicates that, compared with conventional photodetectors, this tunable sensitivity phototransistor has an ability to detect minute changes in light intensity that is more than 1000 times better; (d) this tunable sensitivity phototransistor exhibits a responsivity far superior to that of a conventional MoS2 phototransistor, and the responsivity can be adjusted by changing V. GS This change is a feature that traditional MoS2 phototransistors do not possess.

[0065] like Figure 4The image shows a functional demonstration of a photodetector array based on tunable sensitivity phototransistors as the basic unit. (a) Optical photograph of a 3×3 photodetector array, where S represents the source electrode, D represents the drain electrode, G represents the gate electrode, and the scale bar is 200 micrometers; (b) Optical photograph of an array unit; top h-BN and bottom h-BN represent the top and bottom h-BN protective layers, respectively; Gr represents the graphene contact electrode; Middle hB dielectric represents the h-BN gate dielectric; Top MoS2 channel represents the channel layer; O-doped MoS2 represents O-doped MoS2; Source, Drain, and Gate represent the source, drain, and gate electrodes, respectively, and the scale bar is 10 micrometers; (c) Nine devices in the array under darkness and illumination (optical power density P). in =2.3mW / cm 2 (d) The transfer characteristic curve under the condition of -9V gate voltage and 0.1V source-drain voltage demonstrates the array contrast enhancement function. The upper figure shows the optical signal input and the lower figure shows the electrical signal output. in Representative power density (μW / cm) 2 ), I A The current is represented by (A). To verify the device's ability to recognize low-contrast targets, we input five sets of low-contrast light signals of "O" patterns into a conventional phototransistor array and a tunable sensitivity phototransistor array, respectively. The light intensity to background intensity ratio of the "O" pattern varied between 1.2 and 2.1. For the conventional phototransistor array, even at the highest intensity ratio of 2.1, its output current ratio was only 1.7, failing to form a clear image. In contrast, the tunable sensitivity phototransistor array achieved a current ratio of 3.4 even at an intensity ratio as low as 1.2, successfully recognizing a clear "O" image. This demonstrates that tunable sensitivity phototransistors have a significant advantage in low-contrast target detection. (e) Demonstration of array noise immunity under gate voltage of -5V and source-drain voltage of 0.1V. The upper figure shows the light signal input, and the lower figure shows the electrical signal output. P in Representative power density (μW / cm) 2 ), I A The representative current is (A). The developed array exhibits superior noise filtering capabilities. When an "L" image and its gradually increasing surrounding noise are input into a conventional phototransistor array, the output "L" image becomes increasingly blurred as the noise intensity increases due to the wide response range of the conventional detector. In contrast, at a gate voltage of -5V, the tunable sensitivity phototransistor array only filters noise from 748 to 2122 μW / cm². 2 It responds to light intensity within the range and can effectively shield light noise outside the range, continuously outputting clear images.

[0066] The examples demonstrate that this invention provides a phototransistor with tunable optical response sensitivity. Based on innovative design of the device structure and working mechanism, it achieves effective control over the optical signal response range under different gate voltages. The device remains on in the dark, and its output current changes abruptly upon illumination, thus achieving light-driven turn-off behavior and exhibiting significant nonlinear response characteristics. By adjusting the gate voltage, the response range of the device to different light intensity ranges can be flexibly defined, thereby achieving segmented identification and precise response to light intensity. The device exhibits excellent photoelectric conversion capability, extremely high resolution of weak light signals, and the ability to suppress both strong and weak light noise, significantly improving the accuracy and reliability of optical signal processing. The photoelectric array constructed based on this device can effectively avoid optical signal crosstalk, achieving high-fidelity, low-noise image acquisition. In summary, this invention provides a novel device architecture and implementation path for developing photoelectric detection systems with high sensitivity, tunability, and anti-interference characteristics, suitable for various highly integrated optoelectronic applications.

Claims

1. A phototransistor with tunable light response sensitivity, characterized in that, include: The bottom substrate has an insulating layer on its surface; A gate structure, located on the insulating layer of the substrate, is used to regulate the carrier distribution and conductivity state in the channel layer by applying an external voltage; The photosensitive control layer, which has the function of generating charge accumulation or potential change in incident light, is located between the gate structure and the gate dielectric layer. It has the ability to generate photogenerated charge accumulation or potential modulation in the incident light signal and affects the local electric field of the region above it under different light intensities. A gate dielectric layer, located between the photosensitive control layer and the channel layer, is used to achieve capacitive coupling and insulation isolation, while ensuring effective transmission of gate control. A semiconductor channel layer is disposed on the gate dielectric layer, and its conductivity is controlled by the combined action of the gate voltage and the photosensitive control layer. The source electrode and the drain electrode are electrically connected to the two ends of the channel layer, respectively, for injecting and collecting carriers in the channel to form a controllable photocurrent output path.

2. The phototransistor with tunable light response sensitivity according to claim 1, characterized in that, The photosensitive control layer generates segmented response control to light of different intensities under different gate voltage bias conditions, so that the channel layer only generates conductivity changes for incident light within the target light intensity range, and outputs a current signal with distinguishing characteristics, thereby achieving selective identification and response to different light intensity levels.

3. The phototransistor with tunable light response sensitivity according to claim 1, characterized in that, The photosensitive control layer can be modulated through surface or bulk doping, plasma treatment, band engineering, or surface modification to enhance its potential response to changes in light intensity.

4. The phototransistor with tunable light response sensitivity according to claim 1, characterized in that, There is a spatial isolation structure or a heterojunction potential coupling structure between the photosensitive control layer and the channel layer, so that the control process is mainly through electrostatic field modulation rather than direct charge injection.

5. The phototransistor with tunable light response sensitivity according to claim 1, characterized in that, The channel layer is a two-dimensional material, a nanofilm, or a similar structure, and has the characteristic that its in-plane conductivity varies with the gate voltage.

6. The phototransistor with tunable light response sensitivity according to claim 1, characterized in that, The gate structure is a control electrode group composed of a single layer or multiple layers of conductive materials, which has the ability to control the local area in the lateral or vertical direction.

7. The phototransistor with tunable light response sensitivity according to claim 1, characterized in that, The device's photocurrent response under different gate voltages covers multiple light intensity ranges, and each range has a non-overlapping threshold range, with an output current variation ratio of not less than two orders of magnitude.

8. The phototransistor with tunable light response sensitivity according to claim 1, characterized in that, It further includes an upper protective layer and / or a lower protective layer disposed above or below the channel layer to improve the environmental stability and service life of the device.

9. An application of a phototransistor with tunable light response sensitivity as described in any one of claims 1 to 8, characterized in that, Phototransistors are used in dynamic vision sensors, high dynamic range imaging systems, bio-visual bionic systems, or multi-level optical logic processing circuits.

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