Preparation method of zinc-doped gallium nitride buffer layer with low dislocation density, corresponding buffer layer structure and semiconductor device
By introducing a Zn-doped three-layer buffer layer structure into the GaN epitaxial layer, the problem of high dislocation density is solved by utilizing the dislocation pinning and bending annihilation mechanism of Zn atoms, thus achieving improved crystal and optoelectronic performance of high-quality GaN-based devices.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-19
- Publication Date
- 2026-03-13
Smart Images

Figure CN121665779A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor epitaxial growth technology, and more specifically, to a method for preparing a zinc-doped gallium nitride buffer layer with low dislocation density, as well as the corresponding buffer layer structure and semiconductor device. Background Technology
[0002] Gallium nitride (GaN)-based semiconductor materials are typical representatives of third-generation semiconductors. Due to their excellent properties such as wide bandgap, high thermal conductivity, and high electron saturation velocity, they have broad application prospects in fields such as semiconductor lighting (LED), lasers (LD), and power electronic devices (such as high electron mobility transistors, HEMT).
[0003] However, the commercial production of GaN-based semiconductor devices faces a core technological challenge: the preparation of high-quality GaN single-crystal materials. Due to the lack of low-cost, large-size GaN homogeneous substrates, current GaN epitaxial growth mainly relies on heterogeneous substrates, such as sapphire, silicon carbide (SiC), or silicon (Si) substrates. Taking the most commonly used sapphire substrate as an example, there is a significant lattice mismatch and thermal expansion coefficient mismatch between it and GaN.
[0004] This inherent mismatch leads to GaN material typically nucleating in a three-dimensional island pattern during the early stages of GaN epitaxial growth. As these individual crystal islands gradually grow and eventually merge, a large number of crystal defects are generated at the merging boundaries, the most prominent of which are through dislocations. In GaN epitaxial layers employing conventional buffer layer techniques (such as conventional low-temperature GaN nucleation layers or AlN buffer layers), the density of through dislocations is typically as high as 10⁻⁶. 8 - 10 10 cm -2 .
[0005] These high-density penetrating dislocations have a catastrophic impact on the performance and reliability of GaN-based devices. In optoelectronic devices (such as LEDs), dislocations act as nonradiative recombination centers, trapping injected electrons and holes and causing them to recombine as heat (phonons) rather than light (photons), thus significantly reducing the device's internal quantum efficiency (IQE). In power electronic devices, dislocations become leakage paths, reducing the device's breakdown voltage and switching performance. Furthermore, during long-term operation of devices (especially LEDs and lasers), particularly under high current density and high temperature conditions, dislocation lines become sources of defect proliferation and migration, accelerating device aging and failure.
[0006] Therefore, how to fabricate GaN epitaxial layers with low dislocation density on heterogeneous substrates is a key technical problem that urgently needs to be solved in the field of GaN-based device technology. Summary of the Invention
[0007] The purpose of this invention is to overcome the above-mentioned defects of the prior art and provide a method for preparing a zinc-doped gallium nitride buffer layer with low dislocation density, as well as the corresponding buffer layer structure and semiconductor device. The aim is to effectively reduce the penetration dislocation density in the GaN epitaxial layer, thereby improving the crystal quality, optoelectronic performance and operational reliability of GaN-based devices.
[0008] To achieve the above objectives, a first aspect of the present invention provides a method for preparing a zinc-doped gallium nitride buffer layer with low dislocation density, comprising the following steps: On the substrate, a first undoped GaN sublayer, a second Zn-doped GaN sublayer, and a third undoped GaN sublayer are grown sequentially to form the buffer layer. During the growth of the second Zn-doped GaN sublayer, a DEZn (diethylzinc) source is introduced, with a DEZn flow rate of 10-50 sccm. During the growth of the first undoped GaN sublayer, a TMGa (trimethylgallium) source is introduced, with a TMGa flow rate of 300-500 sccm; During the growth of the second Zn-doped GaN sublayer, a TMGa source is introduced, with a TMGa flow rate of 500-900 sccm; During the growth of the third undoped GaN sublayer, a TMGa source is introduced, with a TMGa flow rate of 900-1200 sccm.
[0009] In a preferred embodiment, the total thickness of the buffer layer is 1-3 μm.
[0010] In a preferred embodiment, the thicknesses of the first undoped GaN sublayer, the second Zn-doped GaN sublayer, and the third undoped GaN sublayer are each 0.3-0.6 μm.
[0011] In a preferred embodiment, the growth temperature of the three sublayers is 900-1100 °C, and the growth pressure is 100-200 torr.
[0012] In a preferred embodiment, during the growth of the three sublayers, the NH3 (ammonia) flow rate is 40,000 - 85,000 sccm.
[0013] A second aspect of the present invention provides a gallium nitride buffer layer structure with low dislocation density, the buffer layer structure being disposed on a substrate and comprising: First undoped GaN sublayer; A second Zn-doped GaN sublayer is disposed on the first undoped GaN sublayer; A third undoped GaN sublayer is disposed on the second Zn-doped GaN sublayer.
[0014] In a preferred embodiment, the buffer layer structure is prepared by the method described in the first aspect of the present invention.
[0015] A third aspect of the present invention provides a GaN-based semiconductor device, comprising: Substrate; The buffer layer structure as described in the second aspect of the present invention is disposed on the substrate.
[0016] In a preferred embodiment, the GaN-based semiconductor device further includes, sequentially grown on the buffer layer structure, the following layers: an undoped UGAN layer; an N-type GaN (NGAN) layer; a multiple quantum well (MQW) active layer; a P-type EBL (electron blocking layer, such as P-AlGaN) layer; and a P-type GaN (PGAN) layer.
[0017] Compared with the prior art, the present invention has the following beneficial effects: This invention provides a unique GaN / GaN:Zn / GaN three-layer composite buffer layer structure and its preparation method. The core technical concept lies in introducing a specific concentration of Zn doping into the middle (second sublayer) of the buffer layer, coupled with an increasing TMGa growth rate across the three layers.
[0018] The design principle of this technical solution is as follows: 1. Dislocation Pinning and Annihilation: During GaN crystal growth, the atomic radius of Zn atoms is larger than that of Ga atoms (by approximately 7%). When Zn atoms replace Ga atom sites in the second sublayer, they "push away" the surrounding nitrogen (N) atoms, causing a change in local atomic bond lengths. This results in local lattice expansion near the doping point, introducing local compressive strain into the crystal. The dislocation lines themselves carry a strain field. According to the principle of minimum energy, these larger-radius Zn atoms are strongly attracted by the strain field around the dislocation lines, thus preferentially accumulating around them. This accumulation of Zn atoms produces a strong dislocation "pinning" effect, like driving nails into wood, creating a strong obstacle to the vertical propagation of dislocations.
[0019] 2. Dislocation Bending and Annihilation: As subsequent GaN lattices (i.e., the third sublayer) continue to grow, the lattice forces the dislocation lines to bend in order to bypass the dislocation lines pinned by Zn atoms below. This causes the propagation direction to change from perpendicular to the substrate (c-axis) to parallel to the substrate (lateral propagation). Once the dislocation lines begin to move laterally, the probability of them meeting and reacting (e.g., the merging of two dislocations with opposite signs) increases significantly, leading to the "annihilation" of dislocations and reducing the total dislocation density.
[0020] 3. Improved Island Merging: Furthermore, the lattice distortion and local strain field caused by Zn atoms also affect the atomic migration energy and surface energy of the GaN growth surface. This helps to promote a smoother and more optimized three-dimensional island merging process in the early stages of GaN growth, reducing the number of new dislocations generated during island merging due to lattice collisions and orientation mismatches.
[0021] This invention, through the synergistic effects of Zn doping pinning, induced dislocation bending annihilation, and improved island merging, combined with an optimized process using a three-layer incremental GaN growth rate (achieved through incremental TMGa flux), effectively blocks the upward extension of penetrating dislocations into the active region of the device, significantly reducing the total dislocation density of the GaN epitaxial layer. Ultimately, this invention improves the crystal quality of GaN-based devices (such as LEDs), enhances their internal quantum efficiency (luminous efficacy) and electrostatic discharge (ESD) resistance, and strengthens the long-term operational reliability of the devices. Attached Figure Description
[0022] Figure 1 This is a schematic diagram of the epitaxial structure of a GaN-based device in the prior art.
[0023] Figure 2 This is a schematic diagram of the GaN-based LED device structure of the present invention. Detailed Implementation
[0024] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of protection of this invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this invention should be included within the scope of protection of this invention.
[0025] Embodiments of the present invention can typically be performed using a metal-organic chemical vapor deposition (MOCVD) apparatus.
[0026] Example
[0027] This embodiment provides a method for fabricating a low dislocation density zinc-doped gallium nitride buffer layer, and uses it to fabricate a GaN-based LED device structure, the structure of which is as follows: Figure 2 As shown.
[0028] The preparation process includes the following steps: Step 1: Providing a substrate. In this embodiment, a sapphire substrate is used. Before growth, the substrate is subjected to conventional cleaning and high-temperature (e.g., 1100 °C) baking in a H2 atmosphere.
[0029] Step 2: Grow the buffer layer. First, grow a low-temperature buffer layer on the substrate, such as a low-temperature GaN nucleation layer or an AlN nucleation layer. This step is a conventional technique in the field.
[0030] Step 3: Growth of the GaN / GaN:Zn / GaN three-layer composite buffer layer of this invention. This step is the core of this invention. The buffer layer consists of three sublayers with a total thickness of 1.5 μm. The growth of all three sublayers was carried out at a temperature of 1050 °C and a pressure of 150 torr, with a constant NH3 (N source) flow rate of 80,000 sccm. Specific parameters of each sublayer are shown in Table 1.
[0031] sub-layer Material Thickness (μm) TMGa flow rate (sccm) DEZn flow rate (sccm) Temperature (°C) stress (torr) <![CDATA[ NH3 (sccm)]]> First sub-layer Undoped GaN 0.5 400 0 1050 150 80000 Second sub-layer GaN:Zn 0.5 700 30 1050 150 80000 Third sub-layer Undoped GaN 0.5 1000 0 1050 150 80000 As shown in Table 1, in this embodiment, the TMGa flow rate of the first sublayer (undoped GaN) is 400 sccm; the TMGa flow rate of the second sublayer (GaN:Zn) is increased to 700 sccm, and a DEZn source of 30 sccm is introduced for Zn doping; the TMGa flow rate of the third sublayer (undoped GaN) is further increased to 1000 sccm, and the introduction of DEZn is stopped. The increasing TMGa flow rate controls the different growth rates and lattice qualities of each sublayer.
[0032] Step 4: Growing the subsequent device structure. On top of the buffer layer prepared in Step 3, continue epitaxial growth of the complete LED device structure, such as... Figure 2 As shown, it includes, in sequence: 1. Undoped GaN (uGAN) layer; 2. N-type GaN (nGaN) layer (e.g., Si doped); 3. Multiple quantum well (MQW) active layers (e.g., InGaN / GaN quantum wells); 4. Low-temperature p-type GaN layer (LT-PGaN) is used to protect the MQW; 5. P-type AlGaN layer (P-AIGaN), serving as an electron blocking layer; 6. P-type GaN (P-GAN) contact layer (e.g., Mg doping).
[0033] During the growth of the second sublayer, the introduced DEZn source incorporates Zn atoms into the GaN lattice. Since the radius of Zn atoms (approximately 7%) is larger than that of Ga atoms, it introduces a local compressive strain field in the GaN:Zn layer. This strain field attracts penetrating dislocation lines extending from the lower layer (first sublayer) and "pins" them into the second sublayer. When the third sublayer grows, the pinned dislocations are forced to bend and undergo lateral movement, increasing the probability of dislocation annihilation and thus preventing a large number of dislocations from penetrating upwards to the MQW active layer.
[0034] Comparative Example
[0035] To verify the technical effect of the present invention, a comparative example was set up. The preparation method of the comparative example is basically the same as that of the example, except for step three.
[0036] In the comparative example, step three employs a conventional buffer layer from the prior art (such as...). Figure 1 As shown in the example, a conventional undoped GaN buffer layer with a total thickness of 1.5 μm was epitaxially grown at the same temperature (1050 °C) and pressure (150 torr) as in the example, without containing a GaN:Zn sublayer, and the TMGa flow rate remained constant or used conventional settings during the growth process.
[0037] Steps one, two, and four are exactly the same as in the example.
[0038] Comparison of experimental data and beneficial effects
[0039] Subsequent tests and characterizations were performed on the epitaxial wafer samples prepared in the examples and comparative examples.
[0040] 1. Comparison of crystal quality (refer to Table 2): Table 2 XRD test 002 102 Example Sample 1 (Low Doping Sample) 82.78 135.38 Example Sample 2 (Highly Doped Sample) 81.28 152.3 Comparative sample 86.4 156.4 Table 2 shows the XRD (X-ray diffraction) full width at half maximum (FWHM) test results for three samples (Example Sample 1, Example Sample 2, and Comparative Sample), where: (002) Peak reflects the crystal orientation and penetrating dislocation density of the material along the c-axis (vertical direction); (102) Peak reflects the density of tilted dislocations and the degree of overall crystal distortion.
[0041] The smaller the full width at half maximum (FWHM) of the XRD peak, the better the crystal quality and the lower the dislocation density.
[0042] Results analysis: (002) Peak Results The comparative sample was 86.4, while Example Sample 1 and Example Sample 2 were 82.78 and 81.28, respectively. Compared with the comparative sample, the (002) half-width of the Zn-doped sample was significantly reduced, indicating that the vertical dislocation density was reduced and the lattice orientation was improved.
[0043] (102) Peak Results The comparative sample was 156.4, the example sample 1 was 135.38, and the example sample 2 was 152.3. This also shows that the Zn-doped buffer layer can effectively reduce tilt dislocations. However, when the doping amount is too high (example sample 2), the improvement effect is slightly weakened, indicating that excessive Zn doping may cause local lattice distortion.
[0044] Table 2 shows that: The use of a GaN / GaN:Zn / GaN three-layer buffer structure can significantly reduce the dislocation density of GaN epitaxial layers; Example 1 (low-doped sample) showed the best peak widths in both (002) and (102) and had the highest crystal quality; Although Example Sample 2 (highly doped sample) is still superior to the comparative sample, excessive Zn doping may lead to some lattice strain accumulation; Therefore, appropriate Zn doping helps alleviate strain, improve lattice integrity, and reduce dislocation density, which is key to achieving high-quality GaN epitaxial layers.
[0045] 2. Comparison of device performance (refer to Table 3): Table 3 Electrical parameters VF IV IR ESD Lighting effects Example Sample 1 3.13 279.39 0.0021 99.05% 89.26 Example Sample 2 3.13 278.02 0.0027 98.81% 88.82 Comparative sample 3.11 277.04 0.0045 98.70% 89.08 The epitaxial wafers of Examples 1 and Comparative Example 1 were fabricated into LED chips, and their photoelectric performance and reliability were tested. Table 3 shows the comparison results of the main electrical and optical properties of the three samples under the same epitaxial structure and test conditions.
[0046] As can be seen from the table: Forward voltage (VF): The three are similar, around 3.1V, indicating that the Zn-doped buffer layer does not cause significant degradation in current-carrying characteristics.
[0047] Forward current (IV) and luminous efficacy (light output efficiency): Example Sample 1 and Example Sample 2 showed a slight improvement compared to the comparative sample, with Example Sample 1 having the highest luminous efficacy (approximately 89.26), indicating that appropriate Zn doping can improve the injection efficiency of the light-emitting layer and the crystal integrity.
[0048] Reverse leakage current (IR): The comparative sample had the highest leakage current (0.0045 μA), while the Zn-doped sample showed a significant reduction (0.0021 μA for Example 1 and 0.0027 μA for Example 2), indicating that the Zn-doped buffer layer significantly reduced the leakage channels caused by defects.
[0049] ESD resistance: The ESD pass rates of Example Sample 1 and Example Sample 2 were 99.05% and 98.81%, respectively, both higher than the comparative sample (98.70%), indicating that the low dislocation density structure enhances the electrostatic discharge reliability of the device.
[0050] Experimental data comparison fully demonstrates that: by adopting a GaN / GaN:Zn / GaN three-layer buffer layer structure and precisely controlling the Zn doping flux and the incremental TMGa flux, the present invention successfully reduces the dislocation density of the GaN epitaxial layer by utilizing the dislocation pinning and annihilation mechanism of Zn atoms, and significantly improves the crystal quality, optical output efficiency and ESD reliability of GaN-based devices.
[0051] Those skilled in the art should understand that the embodiments are merely preferred examples of the present invention. Within the scope defined by the claims, adjustments to the process parameters can achieve the technical effects of the present invention. For example, varying the DEZn flow rate between 10 and 50 sccm; varying the total thickness of the buffer layer between 1 and 3 μm; varying the thickness of each sublayer between 0.3 and 0.6 μm; varying the growth temperature between 900 and 1100 °C; varying the pressure between 100 and 200 torr; and adjusting the TMGa flow rate within their respective ranges (300-500 sccm, 500-900 sccm, 900-1200 sccm) do not depart from the technical concept of the present invention.
Claims
1. A method for preparing a zinc-doped gallium nitride buffer layer with low dislocation density, characterized in that, Includes the following steps: On the substrate, a first undoped GaN sublayer, a second Zn-doped GaN sublayer, and a third undoped GaN sublayer are grown sequentially to form the buffer layer. During the growth of the second Zn-doped GaN sublayer, a DEZn source is introduced, and the DEZn flow rate is 10-50 sccm. During the growth of the first undoped GaN sublayer, a TMGa source is introduced, with a TMGa flow rate of 300-500 sccm; During the growth of the second Zn-doped GaN sublayer, a TMGa source is introduced, with a TMGa flow rate of 500-900 sccm; During the growth of the third undoped GaN sublayer, a TMGa source is introduced, with a TMGa flow rate of 900-1200 sccm.
2. The method according to claim 1, characterized in that, The total thickness of the buffer layer is 1-3 μm.
3. The method according to claim 1 or 2, characterized in that, The thicknesses of the first undoped GaN sublayer, the second Zn-doped GaN sublayer, and the third undoped GaN sublayer are each 0.3 - 0.6 μm.
4. The method according to claim 1, characterized in that, The growth temperature of the first undoped GaN sublayer, the second Zn-doped GaN sublayer, and the third undoped GaN sublayer is 900-1100 ℃; the growth pressure is 100-200 torr.
5. The method according to claim 1, characterized in that, During the growth of the first undoped GaN sublayer, the second Zn-doped GaN sublayer, and the third undoped GaN sublayer, the NH3 flow rate was 40,000 - 85,000 sccm.
6. A gallium nitride buffer layer structure with low dislocation density, characterized in that, The buffer layer structure is disposed on the substrate and includes: First undoped GaN sublayer; A second Zn-doped GaN sublayer is disposed on the first undoped GaN sublayer; A third undoped GaN sublayer is disposed on the second Zn-doped GaN sublayer.
7. The buffer layer structure according to claim 6, characterized in that, The buffer layer structure is prepared by the method described in any one of claims 1 to 5.
8. A GaN-based semiconductor device, characterized in that, include: Substrate; The buffer layer structure as described in claim 6 or 7 is disposed on the substrate.
9. The GaN-based semiconductor device according to claim 8, characterized in that, It also includes the following layers grown sequentially on the buffer layer structure: an undoped GaN layer; an N-type GaN layer; a multi-quantum-well active layer; a low-temperature P-type GaN layer; a P-type EBL layer; and a P-type GaN layer.