Calibration processing method for CIS probe card measuring equipment

Abstract

The invention discloses a CIS probe card measuring equipment calibration processing method, and relates to the field of equipment calibration, and the method comprises the following steps: obtaining chip basic information and multi-dimensional verification reference data of a CIS reference sample; adjusting a data acquisition terminal according to the multi-dimensional verification reference data, and acquiring data acquisition information of the CIS to-be-tested sample through the data acquisition terminal; constructing a verification error analysis model according to the historical data acquisition information to obtain different verification results and error sources of the verification results; performing clustering correlation analysis on different verification results and error sources of the verification results, and constructing a verification error analysis atlas according to analysis results; performing error verification on a verification result corresponding to the data acquisition information and a corresponding error source according to the verification error analysis map, and performing error compensation according to the verification result; re-checking the CIS sample to be tested according to the error compensation result to obtain a checking result; according to the invention, the accuracy of the verification process is improved.

Description

Technical Field

[0001] This invention relates to the field of equipment calibration technology, and in particular to a calibration process method for CIS probe card measurement equipment. Background Technology

[0002] With the development of chip manufacturing technology, CIS (contact image sensor) has been widely used in office equipment, industrial inspection, biometrics and other fields due to its advantages such as small size, low cost and low power consumption. As the application scenarios increase the requirements for image quality and accuracy, the requirements for CIS performance are becoming more and more stringent. As a key tool for detecting and ensuring CIS performance, the calibration accuracy of probe card measurement equipment directly affects product quality. A search revealed Chinese patent CN120669186A, which discloses a calibration method for a CIS probe card measurement device. The method includes the following steps: Step 1: Before testing, adjust the product holder used to fix the product under test to a preset height; Step 2: Obtain multiple calibration blocks, each with dimensions consistent with various types of products under test, and multiple calibration seats, each adapted to various types of products under test. Install a calibration block into the product holder using its corresponding calibration seat; Step 3: Place a light source in front of the calibration block and a light sensor behind the calibration block. Adjust the horizontal and vertical angles of the light sensor to make the planes containing the light source, calibration block, and light sensor parallel; Step 4: Remove the calibration block, replace it with the corresponding product under test, and begin testing; Step 5: After testing, compensate the output value of the light sensor based on a compensation algorithm to obtain the calibration result. This invention can eliminate deviations in light intensity, illuminance, and other parameters of the light source at different positions, enabling the detection of optical parameters of the lens module.

[0003] Compared with existing technologies, the Chinese patent with patent number CN120669186A can eliminate the impact of light source deviation on the optical parameter detection process of the lens module through steps such as product bracket adjustment, adapter calibration, setting light source, and compensating for the output value of the light sensor, thereby improving the calibration accuracy of the measurement equipment.

[0004] However, existing calibration methods for CIS probe card measurement equipment have many problems. During the data acquisition process, errors from various data sources other than light source deviations can easily occur, affecting the calibration process and resulting in insufficient accuracy of the CIS sample under test. Summary of the Invention

[0005] The purpose of this invention is to address the shortcomings of insufficient accuracy in existing technologies by proposing a calibration method for CIS probe card measurement equipment.

[0006] To achieve the above objectives, the present invention adopts the following technical solution: A calibration process for a CIS probe card measurement device includes the following steps: Step S1: Set up the verification processing platform, obtain the chip basic information of the CIS reference sample through the verification processing platform, and set up multi-dimensional verification reference data based on the chip basic information; Step S2: Adjust the data acquisition terminal according to the multidimensional verification reference data of the CIS reference sample, and obtain the data acquisition information of the CIS sample to be tested through the data acquisition terminal. The data acquisition information includes three types of data: appearance acquisition data, electrical acquisition data and environmental acquisition data. Step S3: Obtain historical data acquisition information corresponding to the chip's basic information, set the obtained historical data acquisition information as a historical dataset, analyze and process it based on deep learning algorithms, and construct a verification error analysis model; Step S4: Based on the constructed verification error analysis model, obtain the corresponding verification results and the error sources corresponding to the verification results, perform correlation analysis on the error sources corresponding to different verification results, and construct a verification error analysis map; Step S5: Verify the error sources corresponding to the verification results of each data acquisition information according to the verification error analysis map, obtain the verification results of the error sources corresponding to each verification result, and perform error compensation on the data acquisition information according to the verification results. Step S6: Perform repeated verification on the CIS chip corresponding to the data acquisition information according to the error compensation, and obtain the corresponding verification results.

[0007] The above technical solution further includes: the process of setting multi-dimensional verification reference data based on chip basic information includes: A verification processing platform is set up, and a chip input terminal is set up in the verification processing platform; The chip basic information of the corresponding CIS reference sample in the verification processing platform is obtained through the chip input terminal. The chip basic information includes chip identification information, physical structure information and electrical parameter information. Feature extraction is performed on the obtained chip basic information to obtain multi-dimensional calibration reference data, which includes mechanical positioning calibration parameters, optical signal calibration parameters, and core index calibration parameters.

[0008] Furthermore, the process of acquiring data acquisition information of the CIS sample to be tested through the data acquisition terminal includes: The operating parameters of the data acquisition terminal are adjusted according to the multidimensional verification reference data. The data acquisition information of the CIS sample under test is obtained according to the adjusted operating parameters of the data acquisition terminal. The data acquisition information includes three types of data: appearance acquisition data, electrical acquisition data and environmental acquisition data.

[0009] Furthermore, the process of constructing the verification error analysis model includes: Obtain historical data collection information and historical verification analysis data corresponding to the CIS reference sample. Based on the corresponding results, set up verification analysis datasets for each data type. Analyze and process each verification analysis dataset based on deep learning algorithms to construct verification evaluation sub-models for each data type. Input the verification analysis dataset into the verification evaluation sub-model to obtain the initial verification evaluation data of the corresponding data type. Based on the obtained initial verification evaluation data, obtain the corresponding error sources and set the error statistical analysis set.

[0010] Based on the obtained error statistical analysis set, deep learning algorithms are used to analyze and process the data, and a verification error analysis model is constructed. The error sources of the output results of each verification evaluation sub-model are obtained through the verification error analysis model.

[0011] Furthermore, the process of constructing the verification error analysis map includes: Obtain the initial verification evaluation data and corresponding error sources obtained within the verification error analysis model; perform cluster association analysis on the error sources corresponding to different initial verification evaluation data, and extract the common features, isolation features, and corresponding feature similarity data among the initial verification evaluation data corresponding to different error sources; Based on the common and isolation features between the initial verification and evaluation data corresponding to each error source, different mapping relationships between error sources and data acquisition terminals are set. Based on the mapping relationships, corresponding mapping nodes are set. Based on the obtained mapping nodes and feature similarity data, mapping weights are set. The obtained mapping nodes and mapping weights are used to generate a verification error analysis map.

[0012] Furthermore, the process of verifying the error sources corresponding to the verification results of each data acquisition information based on the verification error analysis map includes: Obtain the data collection information corresponding to the CIS test sample, and input the obtained data collection information into the verification and evaluation sub-model to obtain the initial verification and evaluation data of each CIS test sample. Set the initial verification evaluation data corresponding to each CIS sample to be tested as the initial verification dataset, input the initial verification dataset into the verification error analysis model, and obtain the corresponding error sources; The obtained initial verification evaluation data and error sources are mapped onto the verification error analysis map to generate the test error verification map; The obtained test error verification map is logically verified and analyzed based on the corresponding mapping nodes and feature similarity data in the verification error analysis map to determine whether there are unreasonable connections in the test error verification map, and verification results are generated based on the judgment results.

[0013] Furthermore, the process of obtaining the verification results of the error sources corresponding to each verification result, and compensating for errors in the data acquisition information based on the verification results, includes: The verification processing platform has an error compensation comparison database set up according to each error source. The error compensation comparison database is used to compare the error compensation according to the corresponding error source and obtain the corresponding error compensation parameters. If the verification results do not show any unreasonable connections, error compensation is performed according to the error compensation reference database corresponding to the error source, error compensation information is generated, and the information is fed back to the data acquisition terminal. If the verification results contain unreasonable connections, the obtained error sources will be marked as abnormal, verification anomaly information will be generated, and the obtained verification anomaly information will be fed back to the verification processing platform.

[0014] Furthermore, the process of repeatedly verifying the CIS chip corresponding to the data acquisition information based on error compensation includes: The corresponding error compensation information is obtained through the data acquisition terminal. The operating parameters are adjusted according to the error compensation parameters corresponding to the error compensation information, and the secondary data acquisition information of the corresponding CIS sample to be tested is obtained. The obtained secondary data acquisition information is repeatedly verified to obtain the corresponding secondary verification evaluation information and error sources. If the initial verification evaluation information is consistent with the secondary verification evaluation information, the output is the verification result of the corresponding CIS sample to be tested. If the initial verification evaluation information is inconsistent with the secondary verification evaluation information, then the secondary verification evaluation information corresponding to the inconsistent CIS test samples will be used to generate an error statistical analysis set, and the error source output by the verification error analysis model to which the error statistical analysis set belongs will be obtained. If the verification error analysis model does not have an error source, the secondary verification evaluation information will be output as the verification result of the corresponding CIS sample to be tested. If the error analysis model has an error source that is consistent with the error source before error compensation, then error compensation is performed again until no error source is output. If it is inconsistent with the error source before error compensation, then the obtained error source is re-verified, and a verification threshold is set until the verification threshold is reached or no error source is output. If an error source still exists after reaching the verification threshold, a verification warning message is generated and fed back to the verification processing platform.

[0015] The present invention has the following beneficial effects: 1. This invention analyzes and processes the initial verification and evaluation information corresponding to multiple CIS test samples to obtain the corresponding error sources. Based on the obtained initial verification and evaluation information and error sources, cluster association analysis is performed to obtain the corresponding common features, isolation features and corresponding feature similarity data. Based on these, a verification error analysis map is set. Based on the constructed verification error analysis map, different error sources are verified to determine whether there are unreasonable connections between different error sources. This minimizes the impact of errors on the calibration process of CIS probe card measurement equipment, thereby improving the accuracy of the calibration process. 2. This invention uses a set verification error analysis chart to perform error verification analysis on the verification evaluation results and error sources corresponding to the CIS test sample. Based on the error verification results, error compensation is performed on error sources that do not have unreasonable errors. Based on the error compensation results, the CIS test sample is verified multiple times, which can improve the accuracy of the CIS test sample calibration process to a certain extent and avoid the impact of errors on the verification process to the greatest extent. Attached Figure Description

[0016] Figure 1 This is a schematic flowchart of a calibration process for a CIS probe card measurement device proposed in this invention. Detailed Implementation

[0017] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] Example 1 like Figure 1 As shown, the present invention proposes a calibration method for a CIS probe card measurement device, which includes the following steps: Step S1: Set up the verification processing platform, obtain the chip basic information of the CIS reference sample through the verification processing platform, and set up multi-dimensional verification reference data based on the chip basic information; Step S2: Adjust the data acquisition terminal according to the multidimensional verification reference data of the CIS reference sample, and obtain the data acquisition information of the CIS sample to be tested through the data acquisition terminal. The data acquisition information includes three types of data: appearance acquisition data, electrical acquisition data and environmental acquisition data. Step S3: Obtain historical data acquisition information corresponding to the chip's basic information, set the obtained historical data acquisition information as a historical dataset, analyze and process it based on deep learning algorithms, and construct a verification error analysis model; Step S4: Based on the constructed verification error analysis model, obtain the corresponding verification results and the error sources corresponding to the verification results, perform correlation analysis on the error sources corresponding to different verification results, and construct a verification error analysis map; Step S5: Verify the error sources corresponding to the verification results of each data acquisition information according to the verification error analysis map, obtain the verification results of the error sources corresponding to each verification result, and perform error compensation on the data acquisition information according to the verification results. Step S6: Perform repeated verification on the CIS chip corresponding to the data acquisition information according to the error compensation, and obtain the corresponding verification results.

[0019] In this embodiment, as described in steps S1 to S6 above, with the continuous development of the chip industry, the application fields of chips are also constantly expanding. Therefore, the requirements for chip manufacturing product verification are also constantly increasing. Traditional verification processes rely on manual verification or verification with fixed parameters, which to some extent affects the efficiency and accuracy of the verification process. In this invention, by performing secondary verification on the error sources corresponding to the verification results, and performing error compensation based on the verification results, and then re-verifying the chip verification process based on the error compensation results, the accuracy of the verification process can be greatly improved.

[0020] In the specific implementation process, the step S1 of setting up a verification processing platform, obtaining the chip basic information of the CIS reference sample through the verification processing platform, and setting up multi-dimensional verification reference data based on the chip basic information includes: S11: Set up a verification processing platform, which includes a chip input terminal; S12: Obtain the basic chip information of the corresponding CIS reference sample in the verification processing platform through the chip input terminal. The basic chip information includes chip identification information, physical structure information and electrical parameter information. S13: Perform feature extraction on the obtained chip basic information to obtain multi-dimensional calibration reference data, which includes mechanical positioning calibration parameters, optical signal calibration parameters and core index calibration parameters; S131: Extract features from the physical structure information corresponding to the chip's basic information to obtain the corresponding mechanical positioning calibration parameters, which include the corresponding die size, pad size, and probe alignment mark size; S132: Extract features from the electrical parameter information corresponding to the chip's basic information to obtain the corresponding optical signal calibration parameters. The optical signal calibration parameters include optical system resolution, probe contact resistance threshold, signal sampling gain, ambient temperature compensation range, and temperature drift error range, etc. S133: Extract features from the physical structure information and electrical parameter information corresponding to the chip's basic information to obtain the corresponding core indicator calibration parameters. The core indicator calibration parameters include probe wear rate index, contact reliability index, electrical measurement linearity, and signal delay index, etc.

[0021] In the specific implementation process, the step S2, which involves adjusting the data acquisition terminal based on the multidimensional verification reference data of the CIS reference sample and acquiring the data acquisition information of the CIS sample under test through the data acquisition terminal, wherein the data acquisition information includes three data types: appearance acquisition data, electrical acquisition data, and environmental acquisition data, includes: S21: Adjust the operating parameters of the data acquisition terminal according to the multi-dimensional verification reference data; S22: Obtain the data acquisition information of the CIS sample to be tested according to the adjusted operating parameters of the data acquisition terminal. The data acquisition information includes three types of data: appearance acquisition data, electrical acquisition data, and environmental acquisition data. It should be further explained that, as described in steps S21 to S22 above, the operating parameters of the data acquisition terminal are adjusted by using the multi-dimensional verification reference data corresponding to the CIS reference sample. This facilitates the calibration processing platform to perform calibration processing according to the calibration requirements of different CIS reference samples. For example, the acquisition range of the data acquisition terminal is adjusted according to the mechanical positioning calibration parameters, and the electrical parameters of the data acquisition terminal are adjusted according to the optical signal calibration parameters and the core indicator calibration parameters.

[0022] In the specific implementation process, the step S3, which involves acquiring historical data collection information corresponding to the chip's basic information, setting the acquired historical data collection information as a historical dataset, analyzing and processing it based on deep learning algorithms, and constructing a verification error analysis model, includes: S31: Obtain historical data collection information corresponding to the CIS reference sample and historical verification analysis data corresponding to each historical data collection information. The historical verification analysis data includes the initial verification evaluation data analysis process corresponding to the historical data collection information and the corresponding error sources. S32: Set up the verification analysis datasets corresponding to each data type based on the historical verification analysis data corresponding to the historical data collection information of each data type; S321: Classify and process different historical data collection information and corresponding historical verification analysis data to obtain different data types and their corresponding multidimensional calibration reference data. Process the corresponding data types, multidimensional calibration reference data and historical verification analysis data in sequence to obtain the multidimensional calibration reference data corresponding to each data type, and then obtain the corresponding historical verification analysis data based on each multidimensional calibration reference data. S322: Set up corresponding verification analysis datasets according to the processing results of different data types, multidimensional calibration reference data, and historical verification analysis data; S323: The obtained verification analysis dataset is labeled according to the data type of the data collection information, and the data type labeling result of the verification analysis dataset is obtained; S33: Based on deep learning algorithms, analyze and process each verification analysis dataset separately, and construct verification evaluation sub-models corresponding to the data types; S331: Obtain the verification analysis dataset corresponding to the labeling results of the corresponding data type, and divide each verification analysis dataset into a training set and a validation set respectively; S332: Based on deep learning algorithms, the training sets corresponding to each verification analysis dataset are analyzed and processed respectively, and a verification evaluation sub-model corresponding to the labeling results of the corresponding data type is constructed. The verification evaluation sub-model is used to perform verification analysis on the collected data collection information of the corresponding data type according to the corresponding multidimensional calibration reference data, and output the initial verification evaluation data according to the verification analysis results. S333: The constructed verification and evaluation sub-model is verified based on the verification set until the corresponding loss function tends to be stable, and the corresponding verification and evaluation sub-model is output. S34: Input the verification analysis dataset into the verification evaluation sub-model, obtain the initial verification evaluation data of the corresponding data type, obtain the corresponding error source based on the obtained initial verification evaluation data, and set the error statistical analysis set; S341: Obtain historical data collection information, input the obtained historical data collection information into the corresponding verification and evaluation sub-model, and obtain the initial verification and evaluation data of the corresponding data type; S342: Obtain the initial verification and evaluation data corresponding to the historical data collection information within the same time period; perform statistical analysis on the obtained initial verification and evaluation data of the corresponding type; during the statistical analysis, perform error analysis based on the initial verification and evaluation data obtained from each data collection information location to obtain the corresponding error value; extract the associated feature data based on the dimension of the multidimensional calibration reference data to which the corresponding error value belongs; perform visual statistical analysis on the obtained error value and associated feature data to obtain the distribution characteristics and changing trends of the associated feature data of the corresponding dimension to which the error value belongs, obtain the corresponding error type and error characteristics, and construct an error source feature library, which includes error types and error characteristics of various error sources; input the error characteristics corresponding to each error type into the error source feature library for traversal and comparative analysis to obtain the error source of the statistical data set corresponding to the initial evaluation data in the historical verification analysis data, which includes various types such as mechanical positioning error, optical imaging error, and electrical contact error; S343: Match the obtained error sources of the corresponding type with the initial verification and evaluation data of the corresponding type, and set up the error statistical analysis dataset; S35: Based on the obtained error statistical analysis set, perform analysis and processing using deep learning algorithms to construct a verification error analysis model, and obtain the error sources of the output results of each verification evaluation sub-model through the verification error analysis model; S351: Obtain the error statistical analysis dataset, which is the initial verification evaluation data of the corresponding type and the historical data analysis process corresponding to the error source; S352: Based on deep learning algorithms, the error statistical analysis dataset is analyzed and processed to construct a verification error analysis model. Multiple initial verification evaluation data of the same type are input into the verification error analysis model, and after analysis and processing by the verification error analysis model, the corresponding error sources are output.

[0023] In the specific implementation process, the step S4, which involves obtaining the corresponding verification results and error sources corresponding to the verification results based on the constructed verification error analysis model, performing correlation analysis on the error sources corresponding to different verification results, and constructing a verification error analysis map, includes: S41: Obtain the initial verification evaluation data and corresponding error sources obtained in the verification error analysis model; perform cluster association analysis on the error sources corresponding to different initial verification evaluation data, and extract the common features, isolation features and corresponding feature similarity data between the initial verification evaluation data corresponding to different error sources; S411: Obtain the acquisition process of the data acquisition terminal corresponding to the CIS reference sample, sort the initial verification and evaluation data of each data type according to the acquisition process, and obtain the sorting result. S412: Perform time-series and scenario statistics on the corresponding type of initial verification and evaluation data according to the corresponding acquisition process to obtain the time-series and scenario characteristics between different types of initial verification and evaluation data; S413: Based on the sorting results, temporal characteristics, and scene characteristics of different types of initial verification and evaluation data, different types of error sources are combined and processed in sequence to obtain the corresponding associated datasets; S414: Set an initial K value, and perform clustering and association processing on each obtained associated dataset based on the K-Means algorithm to obtain K clusters; S415: Calculate the variance of the corresponding error sources within each cluster with respect to the features corresponding to each type of initial verification and evaluation data. Based on the cluster variance minimization criterion, obtain the corresponding common features and the corresponding feature similarity data. The common features are the initial verification and evaluation data of the common occurrence of the error sources corresponding to the cluster. S416: Calculate the mutual information entropy difference of the correlation strength of the corresponding error sources between each cluster with respect to the features corresponding to each type of initial verification and evaluation data, filter out the unique differential features of the corresponding clusters, and obtain the corresponding isolation features. S42: Based on the common and isolation features between the initial verification and evaluation data corresponding to each error source, set the mapping relationship between different error sources and data acquisition terminals, set the corresponding mapping nodes according to the mapping relationship, and set the mapping weights according to the obtained mapping nodes and feature similarity data; S421: Obtain the common and isolation features among the initial verification and evaluation data corresponding to each error source, and combine the corresponding error sources and initial verification and evaluation data to set them as mapping nodes; S422: Connect the set mapping nodes according to the common features and feature similarity between each mapping node, set the corresponding mapping weights according to the feature similarity data, and set the connection length according to the mapping weights; S43: Generate a verification error analysis graph from the obtained mapping nodes and mapping weights.

[0024] In the specific implementation process, the step S5, which involves verifying the error sources corresponding to the verification results of each data acquisition information based on the verification error analysis graph, obtaining the verification results of the error sources corresponding to each verification result, and compensating for errors in the data acquisition information based on the verification results, includes: S51: Obtain the data collection information corresponding to the CIS test sample, input the obtained data collection information into the verification and evaluation sub-model respectively, and obtain the initial verification and evaluation data of each CIS test sample. S52: Set the initial verification evaluation data corresponding to each CIS sample to be tested as the initial verification dataset, input the initial verification dataset into the verification error analysis model, and obtain the corresponding error source; S521: Obtain the initial verification and evaluation data for each CIS sample to be tested, set the verification and evaluation statistical threshold, and set the error statistics data set when the obtained initial verification and evaluation data reaches the verification and evaluation statistical threshold. S522: Analyze and process the initial verification and evaluation data of each type in the error statistics set, determine the pass rate in the error statistics set, set a pass rate threshold, compare the pass rate with the pass rate threshold, and if the pass rate is less than the pass rate threshold, mark the error statistics set as the initial verification dataset. S523: Input the obtained initial verification dataset into the verification error analysis model, which will then analyze and process it to obtain the corresponding error sources; S53: Map the obtained initial verification evaluation data and error sources to the verification error analysis graph to generate the test error verification graph; S54: Perform logical verification analysis on the obtained test error verification map based on the corresponding mapping nodes and feature similarity data in the verification error analysis map, determine whether there are unreasonable connections in the test error verification map, and generate verification results based on the judgment results; S541: Obtain the mapping nodes and the connections between them involved in the test error verification map; S542: Compare and match the mapping nodes and connections between mapping nodes involved in the test error verification map with the corresponding mapping nodes and connections between mapping nodes in the verification error analysis map; S543: Determine whether there are any connections in the test error verification map that are not present in the verification error analysis map. If they exist, for example, if the mapping node corresponding to the isolation feature in the verification error analysis map is connected to the mapping node corresponding to the test error verification map, then mark it as an unreasonable connection; if not, output the test error verification map; generate the verification result based on the judgment result. S55: The verification processing platform has an error compensation comparison database set up according to each error source. The error compensation comparison database is used to compare the error compensation according to the corresponding error source and obtain the corresponding error compensation parameters. S551: If the verification result does not show any unreasonable connection, then error compensation is performed according to the error compensation comparison database corresponding to the error source, error compensation information is generated, and fed back to the data acquisition terminal. S552: If an unreasonable connection is found during verification, the obtained error source will be marked as an anomaly, verification anomaly information will be generated, and the obtained verification anomaly information will be fed back to the verification processing platform.

[0025] In the specific implementation process, the step S6 of repeatedly verifying the CIS chip corresponding to the data acquisition information based on error compensation and obtaining the corresponding verification result includes: S61: Obtain the corresponding error compensation information through the data acquisition terminal, adjust the operating parameters according to the error compensation parameters corresponding to the error compensation information, and obtain the secondary data acquisition information of the corresponding CIS sample to be tested. S62: Repeatedly verify the obtained secondary data acquisition information to obtain the corresponding secondary verification evaluation information and error sources; S621: If the initial verification evaluation information is consistent with the secondary verification evaluation information, the output is the verification result of the corresponding CIS sample to be tested; S622: If the initial verification evaluation information is inconsistent with the secondary verification evaluation information, then the secondary verification evaluation information corresponding to the inconsistent CIS test samples will be used to generate an error statistical analysis set, and the error source output by the verification error analysis model to which the error statistical analysis set belongs will be obtained. S623: If the verification error analysis model does not have an error source, the secondary verification evaluation information will be output as the verification result of the corresponding CIS sample to be tested. S624: If the verification error analysis model has an error source, and the error source is the same as before error compensation, then perform error compensation again until no error source is output. S625: If the error source is inconsistent with the error source before error compensation, the obtained error source is re-verified, and a verification threshold is set until the verification threshold is reached or the error source is output as not present. S626: If an error source still exists after reaching the verification threshold, a verification warning message will be generated and fed back to the verification processing platform; As further explained in steps S61 to S62 above, the present invention performs secondary or multiple verifications on the initial verification evaluation information that may have verification errors based on the verification results of the error source. This can, to a certain extent, avoid the impact of errors on the CIS sample under test during the verification process, thereby improving the accuracy of the CIS measurement, calibration and evaluation process.

[0026] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and variations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A calibration processing method for a CIS probe card measurement device, characterized in that, The method comprises the following steps: Step S1: setting a verification processing platform, acquiring chip basic information of a CIS reference sample through the verification processing platform, and setting multi-dimensional verification reference data according to the chip basic information; Step S2: adjusting a data acquisition terminal according to the multi-dimensional verification reference data of the CIS reference sample, acquiring data acquisition information of a CIS sample to be tested through the data acquisition terminal, wherein the data acquisition information comprises three data types of appearance acquisition data, electrical acquisition data and environmental acquisition data; Step S3: acquiring historical data acquisition information corresponding to the chip basic information, setting the obtained historical data acquisition information as a historical data set, analyzing and processing based on a deep learning algorithm, and constructing a verification error analysis model; Step S4: acquiring corresponding verification results and error sources corresponding to the verification results according to the constructed verification error analysis model, correlating and analyzing the error sources corresponding to different verification results, and constructing a verification error analysis graph; Step S5: verifying the error sources corresponding to the verification results corresponding to each data acquisition information according to the verification error analysis graph, acquiring verification results of the error sources corresponding to each verification result, and compensating errors of the data acquisition information according to the verification results; Step S6: repeatedly verifying the CIS chip corresponding to the data acquisition information according to the error compensation, and acquiring corresponding verification results.

2. The CIS probe card metrology apparatus calibration process of claim 1, wherein, The process of setting multi-dimensional verification reference data according to the chip basic information comprises: setting a verification processing platform, wherein the verification processing platform is provided with a chip input terminal; acquiring chip basic information of a CIS reference sample in the verification processing platform through the chip input terminal, wherein the chip basic information comprises chip identification information, physical structure information and electrical parameter information; extracting features from the obtained chip basic information, and acquiring multi-dimensional calibration reference data, wherein the multi-dimensional calibration reference data comprises mechanical positioning calibration parameters, optical signal calibration parameters and core index calibration parameters.

3. The CIS probe card metrology apparatus calibration process of claim 2, wherein, The process of acquiring data acquisition information of a CIS sample to be tested through a data acquisition terminal comprises: adjusting operating parameters of the data acquisition terminal according to the multi-dimensional verification reference data, acquiring data acquisition information of a CIS sample to be tested according to the adjusted operating parameters of the data acquisition terminal, and the data acquisition information comprises three data types of appearance acquisition data, electrical acquisition data and environmental acquisition data.

4. The CIS probe card metrology apparatus calibration process of claim 3, wherein, The process of constructing a verification error analysis model comprises: acquiring historical data acquisition information corresponding to a CIS reference sample and historical verification analysis data corresponding to the historical data acquisition information, setting verification analysis data sets corresponding to each data type according to the corresponding results, respectively analyzing and processing each verification analysis data set based on a deep learning algorithm, and constructing verification evaluation sub-models corresponding to each data type; inputting the verification analysis data set into the verification evaluation sub-model, acquiring initial verification evaluation data of the corresponding data type, acquiring corresponding error sources according to the obtained initial verification evaluation data, and setting an error statistical analysis set; According to the obtained error statistical analysis set, analysis and processing are performed based on a deep learning algorithm, a verification error analysis model is constructed, and an error source of an output result of each verification evaluation sub-model is obtained through the verification error analysis model.

5. The CIS probe card metrology apparatus calibration process of claim 4, wherein, The process of constructing the verification error analysis graph includes: Obtaining initial verification evaluation data and corresponding error sources obtained in the verification error analysis model; Respectively performing clustering and correlation analysis on the error sources corresponding to different initial verification evaluation data, extracting common features, isolation features and corresponding feature similarity data between each initial verification evaluation data corresponding to different error sources; According to the common features and isolation features between each initial verification evaluation data corresponding to each error source, a mapping relationship between different error sources and data acquisition terminals is set, corresponding mapping nodes are respectively set according to the mapping relationship, and mapping weights are set according to the obtained mapping nodes and feature similarity data; The obtained mapping nodes and mapping weights generate a verification error analysis graph.

6. The CIS probe card metrology apparatus calibration process of claim 5, wherein, The process of verifying the error source corresponding to the verification result corresponding to each data acquisition information according to the verification error analysis graph includes: Obtaining data acquisition information corresponding to the CIS sample to be tested, inputting the obtained data acquisition information into the verification evaluation sub-model respectively, and obtaining initial verification evaluation data of each CIS sample to be tested; Set the initial verification evaluation data corresponding to each CIS sample to be tested as an initial verification data set, input the initial verification data set into the verification error analysis model, and obtain the corresponding error source; Map the obtained initial verification evaluation data and error source to the verification error analysis graph to generate a test error verification graph; According to the corresponding mapping nodes and feature similarity data in the verification error analysis graph, logical verification analysis is performed on the obtained test error verification graph, it is judged whether there is unreasonable connection in the test error verification graph, and a verification result is generated according to the judgment result.

7. The CIS probe card metrology apparatus calibration process of claim 6, wherein, The process of obtaining the verification result of the error source corresponding to each verification result and compensating the error of the data acquisition information according to the verification result includes: The error compensation reference database is respectively set in the verification processing platform according to each error source, and the error compensation reference database is used for error compensation reference according to the corresponding error source to obtain corresponding error compensation parameters; If there is no unreasonable connection in the verification result, error compensation is performed according to the error compensation reference database corresponding to the error source, error compensation information is generated, and is fed back to the data acquisition terminal; If there is unreasonable connection in the verification result, the obtained error source is marked as abnormal, verification abnormal information is generated, and the obtained verification abnormal information is fed back to the verification processing platform.

8. The CIS probe card metrology apparatus calibration process of claim 7, wherein, The process of repeatedly verifying the CIS chip corresponding to the data acquisition information according to the error compensation includes: Obtaining the corresponding error compensation information through the data acquisition terminal, adjusting the operating parameters according to the error compensation parameters corresponding to the error compensation information, and obtaining the secondary data acquisition information of the corresponding CIS sample to be tested; The obtained secondary data acquisition information is repeatedly checked to obtain corresponding secondary check evaluation information and error sources. If the initial check evaluation information is consistent with the secondary check evaluation information, the output is the check result of the corresponding CIS sample to be tested. If the initial check evaluation information is inconsistent with the secondary check evaluation information, the secondary check evaluation information corresponding to the inconsistent CIS sample to be tested is generated into an error statistical analysis set, and the error source output by the check error analysis model to which the error statistical analysis set belongs is obtained. If the check error analysis model does not have an error source, the secondary check evaluation information is output as the check result of the corresponding CIS sample to be tested. If the check error analysis model has an error source and is consistent with the error source before error compensation, error compensation is performed again until there is no error source. If it is inconsistent with the error source before error compensation, the obtained error source is reverified, a verification threshold is set, and the verification threshold is reached or no error source is output until the verification threshold is reached or no error source is output. If there is still an error source after reaching the verification threshold, check warning information is generated and fed back to the check processing platform.

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